stv0900_core.c 48.7 KB
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/*
 * stv0900_core.c
 *
 * Driver for ST STV0900 satellite demodulator IC.
 *
 * Copyright (C) ST Microelectronics.
 * Copyright (C) 2009 NetUP Inc.
 * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/i2c.h>

#include "stv0900.h"
#include "stv0900_reg.h"
#include "stv0900_priv.h"
#include "stv0900_init.h"

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int stvdebug = 1;
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module_param_named(debug, stvdebug, int, 0644);
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/* internal params node */
struct stv0900_inode {
	/* pointer for internal params, one for each pair of demods */
	struct stv0900_internal		*internal;
	struct stv0900_inode		*next_inode;
};

/* first internal params */
static struct stv0900_inode *stv0900_first_inode;

/* find chip by i2c adapter and i2c address */
static struct stv0900_inode *find_inode(struct i2c_adapter *i2c_adap,
							u8 i2c_addr)
{
	struct stv0900_inode *temp_chip = stv0900_first_inode;

	if (temp_chip != NULL) {
		/*
		 Search of the last stv0900 chip or
		 find it by i2c adapter and i2c address */
		while ((temp_chip != NULL) &&
			((temp_chip->internal->i2c_adap != i2c_adap) ||
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			(temp_chip->internal->i2c_addr != i2c_addr)))
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			temp_chip = temp_chip->next_inode;
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	}

	return temp_chip;
}

/* deallocating chip */
static void remove_inode(struct stv0900_internal *internal)
{
	struct stv0900_inode *prev_node = stv0900_first_inode;
	struct stv0900_inode *del_node = find_inode(internal->i2c_adap,
						internal->i2c_addr);

	if (del_node != NULL) {
		if (del_node == stv0900_first_inode) {
			stv0900_first_inode = del_node->next_inode;
		} else {
			while (prev_node->next_inode != del_node)
				prev_node = prev_node->next_inode;

			if (del_node->next_inode == NULL)
				prev_node->next_inode = NULL;
			else
				prev_node->next_inode =
					prev_node->next_inode->next_inode;
		}

		kfree(del_node);
	}
}

/* allocating new chip */
static struct stv0900_inode *append_internal(struct stv0900_internal *internal)
{
	struct stv0900_inode *new_node = stv0900_first_inode;

	if (new_node == NULL) {
		new_node = kmalloc(sizeof(struct stv0900_inode), GFP_KERNEL);
		stv0900_first_inode = new_node;
	} else {
		while (new_node->next_inode != NULL)
			new_node = new_node->next_inode;

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		new_node->next_inode = kmalloc(sizeof(struct stv0900_inode),
								GFP_KERNEL);
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		if (new_node->next_inode != NULL)
			new_node = new_node->next_inode;
		else
			new_node = NULL;
	}

	if (new_node != NULL) {
		new_node->internal = internal;
		new_node->next_inode = NULL;
	}

	return new_node;
}

s32 ge2comp(s32 a, s32 width)
{
	if (width == 32)
		return a;
	else
		return (a >= (1 << (width - 1))) ? (a - (1 << width)) : a;
}

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void stv0900_write_reg(struct stv0900_internal *intp, u16 reg_addr,
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								u8 reg_data)
{
	u8 data[3];
	int ret;
	struct i2c_msg i2cmsg = {
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		.addr  = intp->i2c_addr,
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		.flags = 0,
		.len   = 3,
		.buf   = data,
	};

	data[0] = MSB(reg_addr);
	data[1] = LSB(reg_addr);
	data[2] = reg_data;

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	ret = i2c_transfer(intp->i2c_adap, &i2cmsg, 1);
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	if (ret != 1)
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		dprintk("%s: i2c error %d\n", __func__, ret);
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}

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u8 stv0900_read_reg(struct stv0900_internal *intp, u16 reg)
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{
	int ret;
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	u8 b0[] = { MSB(reg), LSB(reg) };
	u8 buf = 0;
	struct i2c_msg msg[] = {
		{
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			.addr	= intp->i2c_addr,
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			.flags	= 0,
			.buf = b0,
			.len = 2,
		}, {
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			.addr	= intp->i2c_addr,
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			.flags	= I2C_M_RD,
			.buf = &buf,
			.len = 1,
		},
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	};

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	ret = i2c_transfer(intp->i2c_adap, msg, 2);
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	if (ret != 2)
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		dprintk("%s: i2c error %d, reg[0x%02x]\n",
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				__func__, ret, reg);
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	return buf;
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}

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static void extract_mask_pos(u32 label, u8 *mask, u8 *pos)
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{
	u8 position = 0, i = 0;

	(*mask) = label & 0xff;

	while ((position == 0) && (i < 8)) {
		position = ((*mask) >> i) & 0x01;
		i++;
	}

	(*pos) = (i - 1);
}

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void stv0900_write_bits(struct stv0900_internal *intp, u32 label, u8 val)
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{
	u8 reg, mask, pos;

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	reg = stv0900_read_reg(intp, (label >> 16) & 0xffff);
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	extract_mask_pos(label, &mask, &pos);

	val = mask & (val << pos);

	reg = (reg & (~mask)) | val;
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	stv0900_write_reg(intp, (label >> 16) & 0xffff, reg);
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}

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u8 stv0900_get_bits(struct stv0900_internal *intp, u32 label)
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{
	u8 val = 0xff;
	u8 mask, pos;

	extract_mask_pos(label, &mask, &pos);

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	val = stv0900_read_reg(intp, label >> 16);
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	val = (val & mask) >> pos;

	return val;
}

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static enum fe_stv0900_error stv0900_initialize(struct stv0900_internal *intp)
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{
	s32 i;

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	if (intp == NULL)
		return STV0900_INVALID_HANDLE;
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	intp->chip_id = stv0900_read_reg(intp, R0900_MID);
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	if (intp->errs != STV0900_NO_ERROR)
		return intp->errs;
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	/*Startup sequence*/
	stv0900_write_reg(intp, R0900_P1_DMDISTATE, 0x5c);
	stv0900_write_reg(intp, R0900_P2_DMDISTATE, 0x5c);
	msleep(3);
	stv0900_write_reg(intp, R0900_P1_TNRCFG, 0x6c);
	stv0900_write_reg(intp, R0900_P2_TNRCFG, 0x6f);
	stv0900_write_reg(intp, R0900_P1_I2CRPT, 0x20);
	stv0900_write_reg(intp, R0900_P2_I2CRPT, 0x20);
	stv0900_write_reg(intp, R0900_NCOARSE, 0x13);
	msleep(3);
	stv0900_write_reg(intp, R0900_I2CCFG, 0x08);

	switch (intp->clkmode) {
	case 0:
	case 2:
		stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20
				| intp->clkmode);
		break;
	default:
		/* preserve SELOSCI bit */
		i = 0x02 & stv0900_read_reg(intp, R0900_SYNTCTRL);
		stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 | i);
		break;
	}

	msleep(3);
	for (i = 0; i < 181; i++)
		stv0900_write_reg(intp, STV0900_InitVal[i][0],
				STV0900_InitVal[i][1]);
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	if (stv0900_read_reg(intp, R0900_MID) >= 0x20) {
		stv0900_write_reg(intp, R0900_TSGENERAL, 0x0c);
		for (i = 0; i < 32; i++)
			stv0900_write_reg(intp, STV0900_Cut20_AddOnVal[i][0],
					STV0900_Cut20_AddOnVal[i][1]);
	}

	stv0900_write_reg(intp, R0900_P1_FSPYCFG, 0x6c);
	stv0900_write_reg(intp, R0900_P2_FSPYCFG, 0x6c);

	stv0900_write_reg(intp, R0900_P1_PDELCTRL2, 0x01);
	stv0900_write_reg(intp, R0900_P2_PDELCTRL2, 0x21);

	stv0900_write_reg(intp, R0900_P1_PDELCTRL3, 0x20);
	stv0900_write_reg(intp, R0900_P2_PDELCTRL3, 0x20);

	stv0900_write_reg(intp, R0900_TSTRES0, 0x80);
	stv0900_write_reg(intp, R0900_TSTRES0, 0x00);

	return STV0900_NO_ERROR;
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}

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static u32 stv0900_get_mclk_freq(struct stv0900_internal *intp, u32 ext_clk)
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{
	u32 mclk = 90000000, div = 0, ad_div = 0;

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	div = stv0900_get_bits(intp, F0900_M_DIV);
	ad_div = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6);
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	mclk = (div + 1) * ext_clk / ad_div;

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	dprintk("%s: Calculated Mclk = %d\n", __func__, mclk);
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	return mclk;
}

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static enum fe_stv0900_error stv0900_set_mclk(struct stv0900_internal *intp, u32 mclk)
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{
	u32 m_div, clk_sel;

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	dprintk("%s: Mclk set to %d, Quartz = %d\n", __func__, mclk,
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			intp->quartz);
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	if (intp == NULL)
		return STV0900_INVALID_HANDLE;
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	if (intp->errs)
		return STV0900_I2C_ERROR;

	clk_sel = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6);
	m_div = ((clk_sel * mclk) / intp->quartz) - 1;
	stv0900_write_bits(intp, F0900_M_DIV, m_div);
	intp->mclk = stv0900_get_mclk_freq(intp,
					intp->quartz);

	/*Set the DiseqC frequency to 22KHz */
	/*
		Formula:
		DiseqC_TX_Freq= MasterClock/(32*F22TX_Reg)
		DiseqC_RX_Freq= MasterClock/(32*F22RX_Reg)
	*/
	m_div = intp->mclk / 704000;
	stv0900_write_reg(intp, R0900_P1_F22TX, m_div);
	stv0900_write_reg(intp, R0900_P1_F22RX, m_div);

	stv0900_write_reg(intp, R0900_P2_F22TX, m_div);
	stv0900_write_reg(intp, R0900_P2_F22RX, m_div);

	if ((intp->errs))
		return STV0900_I2C_ERROR;

	return STV0900_NO_ERROR;
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}

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static u32 stv0900_get_err_count(struct stv0900_internal *intp, int cntr,
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					enum fe_stv0900_demod_num demod)
{
	u32 lsb, msb, hsb, err_val;

	switch (cntr) {
	case 0:
	default:
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		hsb = stv0900_get_bits(intp, ERR_CNT12);
		msb = stv0900_get_bits(intp, ERR_CNT11);
		lsb = stv0900_get_bits(intp, ERR_CNT10);
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		break;
	case 1:
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		hsb = stv0900_get_bits(intp, ERR_CNT22);
		msb = stv0900_get_bits(intp, ERR_CNT21);
		lsb = stv0900_get_bits(intp, ERR_CNT20);
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		break;
	}

	err_val = (hsb << 16) + (msb << 8) + (lsb);

	return err_val;
}

static int stv0900_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{
	struct stv0900_state *state = fe->demodulator_priv;
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	struct stv0900_internal *intp = state->internal;
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	enum fe_stv0900_demod_num demod = state->demod;

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	stv0900_write_bits(intp, I2CT_ON, enable);
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	return 0;
}

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static void stv0900_set_ts_parallel_serial(struct stv0900_internal *intp,
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					enum fe_stv0900_clock_type path1_ts,
					enum fe_stv0900_clock_type path2_ts)
{

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	dprintk("%s\n", __func__);
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	if (intp->chip_id >= 0x20) {
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		switch (path1_ts) {
		case STV0900_PARALLEL_PUNCT_CLOCK:
		case STV0900_DVBCI_CLOCK:
			switch (path2_ts) {
			case STV0900_SERIAL_PUNCT_CLOCK:
			case STV0900_SERIAL_CONT_CLOCK:
			default:
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				stv0900_write_reg(intp, R0900_TSGENERAL,
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							0x00);
				break;
			case STV0900_PARALLEL_PUNCT_CLOCK:
			case STV0900_DVBCI_CLOCK:
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				stv0900_write_reg(intp, R0900_TSGENERAL,
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							0x06);
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				stv0900_write_bits(intp,
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						F0900_P1_TSFIFO_MANSPEED, 3);
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				stv0900_write_bits(intp,
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						F0900_P2_TSFIFO_MANSPEED, 0);
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				stv0900_write_reg(intp,
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						R0900_P1_TSSPEED, 0x14);
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				stv0900_write_reg(intp,
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						R0900_P2_TSSPEED, 0x28);
				break;
			}
			break;
		case STV0900_SERIAL_PUNCT_CLOCK:
		case STV0900_SERIAL_CONT_CLOCK:
		default:
			switch (path2_ts) {
			case STV0900_SERIAL_PUNCT_CLOCK:
			case STV0900_SERIAL_CONT_CLOCK:
			default:
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				stv0900_write_reg(intp,
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						R0900_TSGENERAL, 0x0C);
				break;
			case STV0900_PARALLEL_PUNCT_CLOCK:
			case STV0900_DVBCI_CLOCK:
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				stv0900_write_reg(intp,
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						R0900_TSGENERAL, 0x0A);
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				dprintk("%s: 0x0a\n", __func__);
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				break;
			}
			break;
		}
	} else {
		switch (path1_ts) {
		case STV0900_PARALLEL_PUNCT_CLOCK:
		case STV0900_DVBCI_CLOCK:
			switch (path2_ts) {
			case STV0900_SERIAL_PUNCT_CLOCK:
			case STV0900_SERIAL_CONT_CLOCK:
			default:
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				stv0900_write_reg(intp, R0900_TSGENERAL1X,
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							0x10);
				break;
			case STV0900_PARALLEL_PUNCT_CLOCK:
			case STV0900_DVBCI_CLOCK:
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				stv0900_write_reg(intp, R0900_TSGENERAL1X,
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							0x16);
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				stv0900_write_bits(intp,
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						F0900_P1_TSFIFO_MANSPEED, 3);
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				stv0900_write_bits(intp,
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						F0900_P2_TSFIFO_MANSPEED, 0);
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				stv0900_write_reg(intp, R0900_P1_TSSPEED,
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							0x14);
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				stv0900_write_reg(intp, R0900_P2_TSSPEED,
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							0x28);
				break;
			}

			break;
		case STV0900_SERIAL_PUNCT_CLOCK:
		case STV0900_SERIAL_CONT_CLOCK:
		default:
			switch (path2_ts) {
			case STV0900_SERIAL_PUNCT_CLOCK:
			case STV0900_SERIAL_CONT_CLOCK:
			default:
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				stv0900_write_reg(intp, R0900_TSGENERAL1X,
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							0x14);
				break;
			case STV0900_PARALLEL_PUNCT_CLOCK:
			case STV0900_DVBCI_CLOCK:
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				stv0900_write_reg(intp, R0900_TSGENERAL1X,
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							0x12);
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				dprintk("%s: 0x12\n", __func__);
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				break;
			}

			break;
		}
	}

	switch (path1_ts) {
	case STV0900_PARALLEL_PUNCT_CLOCK:
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		stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x00);
		stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x00);
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		break;
	case STV0900_DVBCI_CLOCK:
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		stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x00);
		stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x01);
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		break;
	case STV0900_SERIAL_PUNCT_CLOCK:
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		stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x01);
		stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x00);
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		break;
	case STV0900_SERIAL_CONT_CLOCK:
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		stv0900_write_bits(intp, F0900_P1_TSFIFO_SERIAL, 0x01);
		stv0900_write_bits(intp, F0900_P1_TSFIFO_DVBCI, 0x01);
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		break;
	default:
		break;
	}

	switch (path2_ts) {
	case STV0900_PARALLEL_PUNCT_CLOCK:
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		stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x00);
		stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x00);
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		break;
	case STV0900_DVBCI_CLOCK:
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		stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x00);
		stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x01);
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		break;
	case STV0900_SERIAL_PUNCT_CLOCK:
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		stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x01);
		stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x00);
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		break;
	case STV0900_SERIAL_CONT_CLOCK:
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		stv0900_write_bits(intp, F0900_P2_TSFIFO_SERIAL, 0x01);
		stv0900_write_bits(intp, F0900_P2_TSFIFO_DVBCI, 0x01);
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		break;
	default:
		break;
	}

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	stv0900_write_bits(intp, F0900_P2_RST_HWARE, 1);
	stv0900_write_bits(intp, F0900_P2_RST_HWARE, 0);
	stv0900_write_bits(intp, F0900_P1_RST_HWARE, 1);
	stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0);
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}

void stv0900_set_tuner(struct dvb_frontend *fe, u32 frequency,
							u32 bandwidth)
{
	struct dvb_frontend_ops *frontend_ops = NULL;
	struct dvb_tuner_ops *tuner_ops = NULL;

	if (&fe->ops)
		frontend_ops = &fe->ops;

	if (&frontend_ops->tuner_ops)
		tuner_ops = &frontend_ops->tuner_ops;

	if (tuner_ops->set_frequency) {
		if ((tuner_ops->set_frequency(fe, frequency)) < 0)
			dprintk("%s: Invalid parameter\n", __func__);
		else
			dprintk("%s: Frequency=%d\n", __func__, frequency);

	}

	if (tuner_ops->set_bandwidth) {
		if ((tuner_ops->set_bandwidth(fe, bandwidth)) < 0)
			dprintk("%s: Invalid parameter\n", __func__);
		else
			dprintk("%s: Bandwidth=%d\n", __func__, bandwidth);

	}
}

void stv0900_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth)
{
	struct dvb_frontend_ops *frontend_ops = NULL;
	struct dvb_tuner_ops *tuner_ops = NULL;

	if (&fe->ops)
		frontend_ops = &fe->ops;

	if (&frontend_ops->tuner_ops)
		tuner_ops = &frontend_ops->tuner_ops;

	if (tuner_ops->set_bandwidth) {
		if ((tuner_ops->set_bandwidth(fe, bandwidth)) < 0)
			dprintk("%s: Invalid parameter\n", __func__);
		else
			dprintk("%s: Bandwidth=%d\n", __func__, bandwidth);

	}
}

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u32 stv0900_get_freq_auto(struct stv0900_internal *intp, int demod)
{
	u32 freq, round;
	/*	Formulat :
	Tuner_Frequency(MHz)	= Regs / 64
	Tuner_granularity(MHz)	= Regs / 2048
	real_Tuner_Frequency	= Tuner_Frequency(MHz) - Tuner_granularity(MHz)
	*/
	freq = (stv0900_get_bits(intp, TUN_RFFREQ2) << 10) +
		(stv0900_get_bits(intp, TUN_RFFREQ1) << 2) +
		stv0900_get_bits(intp, TUN_RFFREQ0);

	freq = (freq * 1000) / 64;

	round = (stv0900_get_bits(intp, TUN_RFRESTE1) >> 2) +
		stv0900_get_bits(intp, TUN_RFRESTE0);

	round = (round * 1000) / 2048;

	return freq + round;
}

void stv0900_set_tuner_auto(struct stv0900_internal *intp, u32 Frequency,
						u32 Bandwidth, int demod)
{
	u32 tunerFrequency;
	/* Formulat:
	Tuner_frequency_reg= Frequency(MHz)*64
	*/
	tunerFrequency = (Frequency * 64) / 1000;

	stv0900_write_bits(intp, TUN_RFFREQ2, (tunerFrequency >> 10));
	stv0900_write_bits(intp, TUN_RFFREQ1, (tunerFrequency >> 2) & 0xff);
	stv0900_write_bits(intp, TUN_RFFREQ0, (tunerFrequency & 0x03));
	/* Low Pass Filter = BW /2 (MHz)*/
	stv0900_write_bits(intp, TUN_BW, Bandwidth / 2000000);
	/* Tuner Write trig */
	stv0900_write_reg(intp, TNRLD, 1);
}

610
static s32 stv0900_get_rf_level(struct stv0900_internal *intp,
611 612 613 614 615 616 617 618 619
				const struct stv0900_table *lookup,
				enum fe_stv0900_demod_num demod)
{
	s32 agc_gain = 0,
		imin,
		imax,
		i,
		rf_lvl = 0;

620
	dprintk("%s\n", __func__);
621

622 623
	if ((lookup == NULL) || (lookup->size <= 0))
		return 0;
624

625 626
	agc_gain = MAKEWORD(stv0900_get_bits(intp, AGCIQ_VALUE1),
				stv0900_get_bits(intp, AGCIQ_VALUE0));
627

628 629 630 631 632 633
	imin = 0;
	imax = lookup->size - 1;
	if (INRANGE(lookup->table[imin].regval, agc_gain,
					lookup->table[imax].regval)) {
		while ((imax - imin) > 1) {
			i = (imax + imin) >> 1;
634

635 636 637 638 639 640 641
			if (INRANGE(lookup->table[imin].regval,
					agc_gain,
					lookup->table[i].regval))
				imax = i;
			else
				imin = i;
		}
642

643 644 645 646 647 648 649 650 651 652
		rf_lvl = (s32)agc_gain - lookup->table[imin].regval;
		rf_lvl *= (lookup->table[imax].realval -
				lookup->table[imin].realval);
		rf_lvl /= (lookup->table[imax].regval -
				lookup->table[imin].regval);
		rf_lvl += lookup->table[imin].realval;
	} else if (agc_gain > lookup->table[0].regval)
		rf_lvl = 5;
	else if (agc_gain < lookup->table[lookup->size-1].regval)
		rf_lvl = -100;
653

654
	dprintk("%s: RFLevel = %d\n", __func__, rf_lvl);
655 656 657 658 659 660 661 662 663 664 665

	return rf_lvl;
}

static int stv0900_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
{
	struct stv0900_state *state = fe->demodulator_priv;
	struct stv0900_internal *internal = state->internal;
	s32 rflevel = stv0900_get_rf_level(internal, &stv0900_rf,
								state->demod);

666 667 668 669 670 671 672 673
	rflevel = (rflevel + 100) * (65535 / 70);
	if (rflevel < 0)
		rflevel = 0;

	if (rflevel > 65535)
		rflevel = 65535;

	*strength = rflevel;
674 675 676 677 678 679 680 681

	return 0;
}

static s32 stv0900_carr_get_quality(struct dvb_frontend *fe,
					const struct stv0900_table *lookup)
{
	struct stv0900_state *state = fe->demodulator_priv;
682
	struct stv0900_internal *intp = state->internal;
683 684
	enum fe_stv0900_demod_num demod = state->demod;

685 686 687 688
	s32	c_n = -100,
		regval,
		imin,
		imax,
689 690 691 692
		i,
		noise_field1,
		noise_field0;

693
	dprintk("%s\n", __func__);
694 695

	if (stv0900_get_standard(fe, demod) == STV0900_DVBS2_STANDARD) {
696 697
		noise_field1 = NOSPLHT_NORMED1;
		noise_field0 = NOSPLHT_NORMED0;
698
	} else {
699 700
		noise_field1 = NOSDATAT_NORMED1;
		noise_field0 = NOSDATAT_NORMED0;
701 702
	}

703
	if (stv0900_get_bits(intp, LOCK_DEFINITIF)) {
704 705 706 707
		if ((lookup != NULL) && lookup->size) {
			regval = 0;
			msleep(5);
			for (i = 0; i < 16; i++) {
708
				regval += MAKEWORD(stv0900_get_bits(intp,
709
								noise_field1),
710
						stv0900_get_bits(intp,
711
								noise_field0));
712 713 714 715 716 717
				msleep(1);
			}

			regval /= 16;
			imin = 0;
			imax = lookup->size - 1;
718 719 720
			if (INRANGE(lookup->table[imin].regval,
					regval,
					lookup->table[imax].regval)) {
721 722
				while ((imax - imin) > 1) {
					i = (imax + imin) >> 1;
723 724 725
					if (INRANGE(lookup->table[imin].regval,
						    regval,
						    lookup->table[i].regval))
726 727 728 729 730 731
						imax = i;
					else
						imin = i;
				}

				c_n = ((regval - lookup->table[imin].regval)
732 733 734 735
						* (lookup->table[imax].realval
						- lookup->table[imin].realval)
						/ (lookup->table[imax].regval
						- lookup->table[imin].regval))
736 737 738 739 740 741 742 743 744
						+ lookup->table[imin].realval;
			} else if (regval < lookup->table[imin].regval)
				c_n = 1000;
		}
	}

	return c_n;
}

745 746 747
static int stv0900_read_ucblocks(struct dvb_frontend *fe, u32 * ucblocks)
{
	struct stv0900_state *state = fe->demodulator_priv;
748
	struct stv0900_internal *intp = state->internal;
749 750 751 752 753 754 755 756 757
	enum fe_stv0900_demod_num demod = state->demod;
	u8 err_val1, err_val0;
	u32 header_err_val = 0;

	*ucblocks = 0x0;
	if (stv0900_get_standard(fe, demod) == STV0900_DVBS2_STANDARD) {
		/* DVB-S2 delineator errors count */

		/* retreiving number for errnous headers */
758 759 760
		err_val1 = stv0900_read_reg(intp, BBFCRCKO1);
		err_val0 = stv0900_read_reg(intp, BBFCRCKO0);
		header_err_val = (err_val1 << 8) | err_val0;
761 762

		/* retreiving number for errnous packets */
763 764 765
		err_val1 = stv0900_read_reg(intp, UPCRCKO1);
		err_val0 = stv0900_read_reg(intp, UPCRCKO0);
		*ucblocks = (err_val1 << 8) | err_val0;
766 767 768 769 770 771
		*ucblocks += header_err_val;
	}

	return 0;
}

772 773
static int stv0900_read_snr(struct dvb_frontend *fe, u16 *snr)
{
774
	s32 snrlcl = stv0900_carr_get_quality(fe,
775
			(const struct stv0900_table *)&stv0900_s2_cn);
776 777 778 779 780 781 782 783
	snrlcl = (snrlcl + 30) * 384;
	if (snrlcl < 0)
		snrlcl = 0;

	if (snrlcl > 65535)
		snrlcl = 65535;

	*snr = snrlcl;
784 785 786 787

	return 0;
}

788
static u32 stv0900_get_ber(struct stv0900_internal *intp,
789 790 791 792 793
				enum fe_stv0900_demod_num demod)
{
	u32 ber = 10000000, i;
	s32 demod_state;

794
	demod_state = stv0900_get_bits(intp, HEADER_MODE);
795 796 797 798 799 800 801 802 803 804 805

	switch (demod_state) {
	case STV0900_SEARCH:
	case STV0900_PLH_DETECTED:
	default:
		ber = 10000000;
		break;
	case STV0900_DVBS_FOUND:
		ber = 0;
		for (i = 0; i < 5; i++) {
			msleep(5);
806
			ber += stv0900_get_err_count(intp, 0, demod);
807 808 809
		}

		ber /= 5;
810
		if (stv0900_get_bits(intp, PRFVIT)) {
811 812 813 814 815 816 817 818 819
			ber *= 9766;
			ber = ber >> 13;
		}

		break;
	case STV0900_DVBS2_FOUND:
		ber = 0;
		for (i = 0; i < 5; i++) {
			msleep(5);
820
			ber += stv0900_get_err_count(intp, 0, demod);
821 822 823
		}

		ber /= 5;
824
		if (stv0900_get_bits(intp, PKTDELIN_LOCK)) {
825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844
			ber *= 9766;
			ber = ber >> 13;
		}

		break;
	}

	return ber;
}

static int stv0900_read_ber(struct dvb_frontend *fe, u32 *ber)
{
	struct stv0900_state *state = fe->demodulator_priv;
	struct stv0900_internal *internal = state->internal;

	*ber = stv0900_get_ber(internal, state->demod);

	return 0;
}

845
int stv0900_get_demod_lock(struct stv0900_internal *intp,
846 847 848
			enum fe_stv0900_demod_num demod, s32 time_out)
{
	s32 timer = 0,
849
		lock = 0;
850 851 852 853

	enum fe_stv0900_search_state	dmd_state;

	while ((timer < time_out) && (lock == 0)) {
854
		dmd_state = stv0900_get_bits(intp, HEADER_MODE);
855 856 857 858 859 860 861 862 863
		dprintk("Demod State = %d\n", dmd_state);
		switch (dmd_state) {
		case STV0900_SEARCH:
		case STV0900_PLH_DETECTED:
		default:
			lock = 0;
			break;
		case STV0900_DVBS2_FOUND:
		case STV0900_DVBS_FOUND:
864
			lock = stv0900_get_bits(intp, LOCK_DEFINITIF);
865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881
			break;
		}

		if (lock == 0)
			msleep(10);

		timer += 10;
	}

	if (lock)
		dprintk("DEMOD LOCK OK\n");
	else
		dprintk("DEMOD LOCK FAIL\n");

	return lock;
}

882
void stv0900_stop_all_s2_modcod(struct stv0900_internal *intp,
883 884 885 886 887
				enum fe_stv0900_demod_num demod)
{
	s32 regflist,
	i;

888
	dprintk("%s\n", __func__);
889

890
	regflist = MODCODLST0;
891 892

	for (i = 0; i < 16; i++)
893
		stv0900_write_reg(intp, regflist + i, 0xff);
894 895
}

896
void stv0900_activate_s2_modcod(struct stv0900_internal *intp,
897 898 899
				enum fe_stv0900_demod_num demod)
{
	u32 matype,
900 901 902 903
		mod_code,
		fmod,
		reg_index,
		field_index;
904

905
	dprintk("%s\n", __func__);
906

907
	if (intp->chip_id <= 0x11) {
908 909
		msleep(5);

910 911 912
		mod_code = stv0900_read_reg(intp, PLHMODCOD);
		matype = mod_code & 0x3;
		mod_code = (mod_code & 0x7f) >> 2;
913

914 915
		reg_index = MODCODLSTF - mod_code / 2;
		field_index = mod_code % 2;
916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933

		switch (matype) {
		case 0:
		default:
			fmod = 14;
			break;
		case 1:
			fmod = 13;
			break;
		case 2:
			fmod = 11;
			break;
		case 3:
			fmod = 7;
			break;
		}

		if ((INRANGE(STV0900_QPSK_12, mod_code, STV0900_8PSK_910))
934
						&& (matype <= 1)) {
935
			if (field_index == 0)
936
				stv0900_write_reg(intp, reg_index,
937 938
							0xf0 | fmod);
			else
939
				stv0900_write_reg(intp, reg_index,
940 941 942
							(fmod << 4) | 0xf);
		}

943 944 945
	} else if (intp->chip_id >= 0x12) {
		for (reg_index = 0; reg_index < 7; reg_index++)
			stv0900_write_reg(intp, MODCODLST0 + reg_index, 0xff);
946

947 948 949 950
		stv0900_write_reg(intp, MODCODLSTE, 0xff);
		stv0900_write_reg(intp, MODCODLSTF, 0xcf);
		for (reg_index = 0; reg_index < 8; reg_index++)
			stv0900_write_reg(intp, MODCODLST7 + reg_index, 0xcc);
951 952 953 954 955


	}
}

956
void stv0900_activate_s2_modcod_single(struct stv0900_internal *intp,
957 958 959 960
					enum fe_stv0900_demod_num demod)
{
	u32 reg_index;

961
	dprintk("%s\n", __func__);
962

963 964 965 966 967
	stv0900_write_reg(intp, MODCODLST0, 0xff);
	stv0900_write_reg(intp, MODCODLST1, 0xf0);
	stv0900_write_reg(intp, MODCODLSTF, 0x0f);
	for (reg_index = 0; reg_index < 13; reg_index++)
		stv0900_write_reg(intp, MODCODLST2 + reg_index, 0);
968 969 970 971 972 973 974 975 976 977 978

}

static enum dvbfe_algo stv0900_frontend_algo(struct dvb_frontend *fe)
{
	return DVBFE_ALGO_CUSTOM;
}

static int stb0900_set_property(struct dvb_frontend *fe,
				struct dtv_property *tvp)
{
979
	dprintk("%s(..)\n", __func__);
980 981 982 983 984 985 986

	return 0;
}

static int stb0900_get_property(struct dvb_frontend *fe,
				struct dtv_property *tvp)
{
987
	dprintk("%s(..)\n", __func__);
988 989 990 991

	return 0;
}

992
void stv0900_start_search(struct stv0900_internal *intp,
993 994
				enum fe_stv0900_demod_num demod)
{
995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012
	u32 freq;
	s16 freq_s16 ;

	stv0900_write_bits(intp, DEMOD_MODE, 0x1f);
	if (intp->chip_id == 0x10)
		stv0900_write_reg(intp, CORRELEXP, 0xaa);

	if (intp->chip_id < 0x20)
		stv0900_write_reg(intp, CARHDR, 0x55);

	if (intp->chip_id <= 0x20) {
		if (intp->symbol_rate[0] <= 5000000) {
			stv0900_write_reg(intp, CARCFG, 0x44);
			stv0900_write_reg(intp, CFRUP1, 0x0f);
			stv0900_write_reg(intp, CFRUP0, 0xff);
			stv0900_write_reg(intp, CFRLOW1, 0xf0);
			stv0900_write_reg(intp, CFRLOW0, 0x00);
			stv0900_write_reg(intp, RTCS2, 0x68);
1013
		} else {
1014 1015
			stv0900_write_reg(intp, CARCFG, 0xc4);
			stv0900_write_reg(intp, RTCS2, 0x44);
1016 1017
		}

1018 1019 1020 1021 1022
	} else { /*cut 3.0 above*/
		if (intp->symbol_rate[demod] <= 5000000)
			stv0900_write_reg(intp, RTCS2, 0x68);
		else
			stv0900_write_reg(intp, RTCS2, 0x44);
1023

1024 1025 1026 1027 1028
		stv0900_write_reg(intp, CARCFG, 0x46);
		if (intp->srch_algo[demod] == STV0900_WARM_START) {
			freq = 1000 << 16;
			freq /= (intp->mclk / 1000);
			freq_s16 = (s16)freq;
1029
		} else {
1030 1031 1032
			freq = (intp->srch_range[demod] / 2000);
			if (intp->symbol_rate[demod] <= 5000000)
				freq += 80;
1033
			else
1034
				freq += 600;
1035

1036 1037 1038
			freq = freq << 16;
			freq /= (intp->mclk / 1000);
			freq_s16 = (s16)freq;
1039 1040
		}

1041 1042 1043 1044 1045 1046
		stv0900_write_bits(intp, CFR_UP1, MSB(freq_s16));
		stv0900_write_bits(intp, CFR_UP0, LSB(freq_s16));
		freq_s16 *= (-1);
		stv0900_write_bits(intp, CFR_LOW1, MSB(freq_s16));
		stv0900_write_bits(intp, CFR_LOW0, LSB(freq_s16));
	}
1047

1048 1049
	stv0900_write_reg(intp, CFRINIT1, 0);
	stv0900_write_reg(intp, CFRINIT0, 0);
1050

1051 1052 1053
	if (intp->chip_id >= 0x20) {
		stv0900_write_reg(intp, EQUALCFG, 0x41);
		stv0900_write_reg(intp, FFECFG, 0x41);
1054

1055 1056 1057 1058 1059 1060 1061 1062
		if ((intp->srch_standard[demod] == STV0900_SEARCH_DVBS1) ||
			(intp->srch_standard[demod] == STV0900_SEARCH_DSS) ||
			(intp->srch_standard[demod] == STV0900_AUTO_SEARCH)) {
			stv0900_write_reg(intp, VITSCALE,
								0x82);
			stv0900_write_reg(intp, VAVSRVIT, 0x0);
		}
	}
1063

1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081
	stv0900_write_reg(intp, SFRSTEP, 0x00);
	stv0900_write_reg(intp, TMGTHRISE, 0xe0);
	stv0900_write_reg(intp, TMGTHFALL, 0xc0);
	stv0900_write_bits(intp, SCAN_ENABLE, 0);
	stv0900_write_bits(intp, CFR_AUTOSCAN, 0);
	stv0900_write_bits(intp, S1S2_SEQUENTIAL, 0);
	stv0900_write_reg(intp, RTC, 0x88);
	if (intp->chip_id >= 0x20) {
		if (intp->symbol_rate[demod] < 2000000) {
			if (intp->chip_id <= 0x20)
				stv0900_write_reg(intp, CARFREQ, 0x39);
			else  /*cut 3.0*/
				stv0900_write_reg(intp, CARFREQ, 0x89);

			stv0900_write_reg(intp, CARHDR, 0x40);
		} else if (intp->symbol_rate[demod] < 10000000) {
			stv0900_write_reg(intp, CARFREQ, 0x4c);
			stv0900_write_reg(intp, CARHDR, 0x20);
1082
		} else {
1083 1084
			stv0900_write_reg(intp, CARFREQ, 0x4b);
			stv0900_write_reg(intp, CARHDR, 0x20);
1085 1086
		}

1087 1088 1089 1090 1091 1092
	} else {
		if (intp->symbol_rate[demod] < 10000000)
			stv0900_write_reg(intp, CARFREQ, 0xef);
		else
			stv0900_write_reg(intp, CARFREQ, 0xed);
	}
1093

1094 1095 1096 1097 1098 1099 1100 1101 1102 1103
	switch (intp->srch_algo[demod]) {
	case STV0900_WARM_START:
		stv0900_write_reg(intp, DMDISTATE, 0x1f);
		stv0900_write_reg(intp, DMDISTATE, 0x18);
		break;
	case STV0900_COLD_START:
		stv0900_write_reg(intp, DMDISTATE, 0x1f);
		stv0900_write_reg(intp, DMDISTATE, 0x15);
		break;
	default:
1104 1105 1106 1107 1108 1109 1110 1111
		break;
	}
}

u8 stv0900_get_optim_carr_loop(s32 srate, enum fe_stv0900_modcode modcode,
							s32 pilot, u8 chip_id)
{
	u8 aclc_value = 0x29;
1112 1113
	s32 i;
	const struct stv0900_car_loop_optim *cls2, *cllqs2, *cllas2;
1114

1115
	dprintk("%s\n", __func__);
1116

1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129
	if (chip_id <= 0x12) {
		cls2 = FE_STV0900_S2CarLoop;
		cllqs2 = FE_STV0900_S2LowQPCarLoopCut30;
		cllas2 = FE_STV0900_S2APSKCarLoopCut30;
	} else if (chip_id == 0x20) {
		cls2 = FE_STV0900_S2CarLoopCut20;
		cllqs2 = FE_STV0900_S2LowQPCarLoopCut20;
		cllas2 = FE_STV0900_S2APSKCarLoopCut20;
	} else {
		cls2 = FE_STV0900_S2CarLoopCut30;
		cllqs2 = FE_STV0900_S2LowQPCarLoopCut30;
		cllas2 = FE_STV0900_S2APSKCarLoopCut30;
	}
1130 1131 1132

	if (modcode < STV0900_QPSK_12) {
		i = 0;
1133
		while ((i < 3) && (modcode != cllqs2[i].modcode))
1134 1135 1136 1137 1138 1139
			i++;

		if (i >= 3)
			i = 2;
	} else {
		i = 0;
1140
		while ((i < 14) && (modcode != cls2[i].modcode))
1141 1142 1143 1144
			i++;

		if (i >= 14) {
			i = 0;
1145
			while ((i < 11) && (modcode != cllas2[i].modcode))
1146 1147 1148 1149 1150 1151 1152 1153 1154 1155
				i++;

			if (i >= 11)
				i = 10;
		}
	}

	if (modcode <= STV0900_QPSK_25) {
		if (pilot) {
			if (srate <= 3000000)
1156
				aclc_value = cllqs2[i].car_loop_pilots_on_2;
1157
			else if (srate <= 7000000)
1158
				aclc_value = cllqs2[i].car_loop_pilots_on_5;
1159
			else if (srate <= 15000000)
1160
				aclc_value = cllqs2[i].car_loop_pilots_on_10;
1161
			else if (srate <= 25000000)
1162
				aclc_value = cllqs2[i].car_loop_pilots_on_20;
1163
			else
1164
				aclc_value = cllqs2[i].car_loop_pilots_on_30;
1165 1166
		} else {
			if (srate <= 3000000)
1167
				aclc_value = cllqs2[i].car_loop_pilots_off_2;
1168
			else if (srate <= 7000000)
1169
				aclc_value = cllqs2[i].car_loop_pilots_off_5;
1170
			else if (srate <= 15000000)
1171
				aclc_value = cllqs2[i].car_loop_pilots_off_10;
1172
			else if (srate <= 25000000)
1173
				aclc_value = cllqs2[i].car_loop_pilots_off_20;
1174
			else
1175
				aclc_value = cllqs2[i].car_loop_pilots_off_30;
1176 1177 1178 1179 1180
		}

	} else if (modcode <= STV0900_8PSK_910) {
		if (pilot) {
			if (srate <= 3000000)
1181
				aclc_value = cls2[i].car_loop_pilots_on_2;
1182
			else if (srate <= 7000000)
1183
				aclc_value = cls2[i].car_loop_pilots_on_5;
1184
			else if (srate <= 15000000)
1185
				aclc_value = cls2[i].car_loop_pilots_on_10;
1186
			else if (srate <= 25000000)
1187
				aclc_value = cls2[i].car_loop_pilots_on_20;
1188
			else
1189
				aclc_value = cls2[i].car_loop_pilots_on_30;
1190 1191
		} else {
			if (srate <= 3000000)
1192
				aclc_value = cls2[i].car_loop_pilots_off_2;
1193
			else if (srate <= 7000000)
1194
				aclc_value = cls2[i].car_loop_pilots_off_5;
1195
			else if (srate <= 15000000)
1196
				aclc_value = cls2[i].car_loop_pilots_off_10;
1197
			else if (srate <= 25000000)
1198
				aclc_value = cls2[i].car_loop_pilots_off_20;
1199
			else
1200
				aclc_value = cls2[i].car_loop_pilots_off_30;
1201 1202 1203 1204
		}

	} else {
		if (srate <= 3000000)
1205
			aclc_value = cllas2[i].car_loop_pilots_on_2;
1206
		else if (srate <= 7000000)
1207
			aclc_value = cllas2[i].car_loop_pilots_on_5;
1208
		else if (srate <= 15000000)
1209
			aclc_value = cllas2[i].car_loop_pilots_on_10;
1210
		else if (srate <= 25000000)
1211
			aclc_value = cllas2[i].car_loop_pilots_on_20;
1212
		else
1213
			aclc_value = cllas2[i].car_loop_pilots_on_30;
1214 1215 1216 1217 1218
	}

	return aclc_value;
}

1219 1220 1221
u8 stv0900_get_optim_short_carr_loop(s32 srate,
				enum fe_stv0900_modulation modulation,
				u8 chip_id)
1222
{
1223 1224
	const struct stv0900_short_frames_car_loop_optim *s2scl;
	const struct stv0900_short_frames_car_loop_optim_vs_mod *s2sclc30;
1225 1226 1227
	s32 mod_index = 0;
	u8 aclc_value = 0x0b;

1228
	dprintk("%s\n", __func__);
1229

1230 1231 1232
	s2scl = FE_STV0900_S2ShortCarLoop;
	s2sclc30 = FE_STV0900_S2ShortCarLoopCut30;

1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248
	switch (modulation) {
	case STV0900_QPSK:
	default:
		mod_index = 0;
		break;
	case STV0900_8PSK:
		mod_index = 1;
		break;
	case STV0900_16APSK:
		mod_index = 2;
		break;
	case STV0900_32APSK:
		mod_index = 3;
		break;
	}

1249
	if (chip_id >= 0x30) {
1250
		if (srate <= 3000000)
1251
			aclc_value = s2sclc30[mod_index].car_loop_2;
1252
		else if (srate <= 7000000)
1253
			aclc_value = s2sclc30[mod_index].car_loop_5;
1254
		else if (srate <= 15000000)
1255
			aclc_value = s2sclc30[mod_index].car_loop_10;
1256
		else if (srate <= 25000000)
1257
			aclc_value = s2sclc30[mod_index].car_loop_20;
1258
		else
1259
			aclc_value = s2sclc30[mod_index].car_loop_30;
1260

1261
	} else if (chip_id >= 0x20) {
1262
		if (srate <= 3000000)
1263
			aclc_value = s2scl[mod_index].car_loop_cut20_2;
1264
		else if (srate <= 7000000)
1265
			aclc_value = s2scl[mod_index].car_loop_cut20_5;
1266
		else if (srate <= 15000000)
1267
			aclc_value = s2scl[mod_index].car_loop_cut20_10;
1268
		else if (srate <= 25000000)
1269
			aclc_value = s2scl[mod_index].car_loop_cut20_20;
1270
		else
1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283
			aclc_value = s2scl[mod_index].car_loop_cut20_30;

	} else {
		if (srate <= 3000000)
			aclc_value = s2scl[mod_index].car_loop_cut12_2;
		else if (srate <= 7000000)
			aclc_value = s2scl[mod_index].car_loop_cut12_5;
		else if (srate <= 15000000)
			aclc_value = s2scl[mod_index].car_loop_cut12_10;
		else if (srate <= 25000000)
			aclc_value = s2scl[mod_index].car_loop_cut12_20;
		else
			aclc_value = s2scl[mod_index].car_loop_cut12_30;
1284 1285 1286 1287 1288 1289

	}

	return aclc_value;
}

1290 1291
static
enum fe_stv0900_error stv0900_st_dvbs2_single(struct stv0900_internal *intp,
1292 1293 1294 1295
					enum fe_stv0900_demod_mode LDPC_Mode,
					enum fe_stv0900_demod_num demod)
{
	enum fe_stv0900_error error = STV0900_NO_ERROR;
1296
	s32 reg_ind;
1297

1298
	dprintk("%s\n", __func__);
1299 1300 1301 1302

	switch (LDPC_Mode) {
	case STV0900_DUAL:
	default:
1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334
		if ((intp->demod_mode != STV0900_DUAL)
			|| (stv0900_get_bits(intp, F0900_DDEMOD) != 1)) {
			stv0900_write_reg(intp, R0900_GENCFG, 0x1d);

			intp->demod_mode = STV0900_DUAL;

			stv0900_write_bits(intp, F0900_FRESFEC, 1);
			stv0900_write_bits(intp, F0900_FRESFEC, 0);

			for (reg_ind = 0; reg_ind < 7; reg_ind++)
				stv0900_write_reg(intp,
						R0900_P1_MODCODLST0 + reg_ind,
						0xff);
			for (reg_ind = 0; reg_ind < 8; reg_ind++)
				stv0900_write_reg(intp,
						R0900_P1_MODCODLST7 + reg_ind,
						0xcc);

			stv0900_write_reg(intp, R0900_P1_MODCODLSTE, 0xff);
			stv0900_write_reg(intp, R0900_P1_MODCODLSTF, 0xcf);

			for (reg_ind = 0; reg_ind < 7; reg_ind++)
				stv0900_write_reg(intp,
						R0900_P2_MODCODLST0 + reg_ind,
						0xff);
			for (reg_ind = 0; reg_ind < 8; reg_ind++)
				stv0900_write_reg(intp,
						R0900_P2_MODCODLST7 + reg_ind,
						0xcc);

			stv0900_write_reg(intp, R0900_P2_MODCODLSTE, 0xff);
			stv0900_write_reg(intp, R0900_P2_MODCODLSTF, 0xcf);
1335 1336 1337 1338
		}

		break;
	case STV0900_SINGLE:
1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349
		if (demod == STV0900_DEMOD_2) {
			stv0900_stop_all_s2_modcod(intp, STV0900_DEMOD_1);
			stv0900_activate_s2_modcod_single(intp,
							STV0900_DEMOD_2);
			stv0900_write_reg(intp, R0900_GENCFG, 0x06);
		} else {
			stv0900_stop_all_s2_modcod(intp, STV0900_DEMOD_2);
			stv0900_activate_s2_modcod_single(intp,
							STV0900_DEMOD_1);
			stv0900_write_reg(intp, R0900_GENCFG, 0x04);
		}
1350

1351
		intp->demod_mode = STV0900_SINGLE;
1352

1353 1354 1355 1356 1357 1358
		stv0900_write_bits(intp, F0900_FRESFEC, 1);
		stv0900_write_bits(intp, F0900_FRESFEC, 0);
		stv0900_write_bits(intp, F0900_P1_ALGOSWRST, 1);
		stv0900_write_bits(intp, F0900_P1_ALGOSWRST, 0);
		stv0900_write_bits(intp, F0900_P2_ALGOSWRST, 1);
		stv0900_write_bits(intp, F0900_P2_ALGOSWRST, 0);
1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370
		break;
	}

	return error;
}

static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
					struct stv0900_init_params *p_init)
{
	struct stv0900_state *state = fe->demodulator_priv;
	enum fe_stv0900_error error = STV0900_NO_ERROR;
	enum fe_stv0900_error demodError = STV0900_NO_ERROR;
1371
	struct stv0900_internal *intp = NULL;
1372
	int selosci, i;
1373 1374 1375 1376

	struct stv0900_inode *temp_int = find_inode(state->i2c_adap,
						state->config->demod_address);

1377
	dprintk("%s\n", __func__);
1378

1379
	if ((temp_int != NULL) && (p_init->demod_mode == STV0900_DUAL)) {
1380 1381
		state->internal = temp_int->internal;
		(state->internal->dmds_used)++;
1382
		dprintk("%s: Find Internal Structure!\n", __func__);
1383 1384
		return STV0900_NO_ERROR;
	} else {
1385 1386
		state->internal = kmalloc(sizeof(struct stv0900_internal),
								GFP_KERNEL);
1387 1388
		if (state->internal == NULL)
			return STV0900_INVALID_HANDLE;
1389
		temp_int = append_internal(state->internal);
1390 1391 1392 1393 1394
		if (temp_int == NULL) {
			kfree(state->internal);
			state->internal = NULL;
			return STV0900_INVALID_HANDLE;
		}
1395 1396 1397 1398 1399
		state->internal->dmds_used = 1;
		state->internal->i2c_adap = state->i2c_adap;
		state->internal->i2c_addr = state->config->demod_address;
		state->internal->clkmode = state->config->clkmode;
		state->internal->errs = STV0900_NO_ERROR;
1400
		dprintk("%s: Create New Internal Structure!\n", __func__);
1401 1402
	}

1403 1404 1405 1406
	if (state->internal == NULL) {
		error = STV0900_INVALID_HANDLE;
		return error;
	}
1407

1408 1409 1410 1411 1412 1413 1414 1415
	demodError = stv0900_initialize(state->internal);
	if (demodError == STV0900_NO_ERROR) {
			error = STV0900_NO_ERROR;
	} else {
		if (demodError == STV0900_INVALID_HANDLE)
			error = STV0900_INVALID_HANDLE;
		else
			error = STV0900_I2C_ERROR;
1416

1417 1418
		return error;
	}
1419

1420
	intp = state->internal;
1421

1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447
	intp->demod_mode = p_init->demod_mode;
	stv0900_st_dvbs2_single(intp, intp->demod_mode,	STV0900_DEMOD_1);
	intp->chip_id = stv0900_read_reg(intp, R0900_MID);
	intp->rolloff = p_init->rolloff;
	intp->quartz = p_init->dmd_ref_clk;

	stv0900_write_bits(intp, F0900_P1_ROLLOFF_CONTROL, p_init->rolloff);
	stv0900_write_bits(intp, F0900_P2_ROLLOFF_CONTROL, p_init->rolloff);

	intp->ts_config = p_init->ts_config;
	if (intp->ts_config == NULL)
		stv0900_set_ts_parallel_serial(intp,
				p_init->path1_ts_clock,
				p_init->path2_ts_clock);
	else {
		for (i = 0; intp->ts_config[i].addr != 0xffff; i++)
			stv0900_write_reg(intp,
					intp->ts_config[i].addr,
					intp->ts_config[i].val);

		stv0900_write_bits(intp, F0900_P2_RST_HWARE, 1);
		stv0900_write_bits(intp, F0900_P2_RST_HWARE, 0);
		stv0900_write_bits(intp, F0900_P1_RST_HWARE, 1);
		stv0900_write_bits(intp, F0900_P1_RST_HWARE, 0);
	}

1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468
	intp->tuner_type[0] = p_init->tuner1_type;
	intp->tuner_type[1] = p_init->tuner2_type;
	/* tuner init */
	switch (p_init->tuner1_type) {
	case 3: /*FE_AUTO_STB6100:*/
		stv0900_write_reg(intp, R0900_P1_TNRCFG, 0x3c);
		stv0900_write_reg(intp, R0900_P1_TNRCFG2, 0x86);
		stv0900_write_reg(intp, R0900_P1_TNRCFG3, 0x18);
		stv0900_write_reg(intp, R0900_P1_TNRXTAL, 27); /* 27MHz */
		stv0900_write_reg(intp, R0900_P1_TNRSTEPS, 0x05);
		stv0900_write_reg(intp, R0900_P1_TNRGAIN, 0x17);
		stv0900_write_reg(intp, R0900_P1_TNRADJ, 0x1f);
		stv0900_write_reg(intp, R0900_P1_TNRCTL2, 0x0);
		stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 3);
		break;
	/* case FE_SW_TUNER: */
	default:
		stv0900_write_bits(intp, F0900_P1_TUN_TYPE, 6);
		break;
	}

1469 1470 1471 1472 1473 1474 1475 1476 1477
	stv0900_write_bits(intp, F0900_P1_TUN_MADDRESS, p_init->tun1_maddress);
	switch (p_init->tuner1_adc) {
	case 1:
		stv0900_write_reg(intp, R0900_TSTTNR1, 0x26);
		break;
	default:
		break;
	}

1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498
	stv0900_write_reg(intp, R0900_P1_TNRLD, 1); /* hw tuner */

	/* tuner init */
	switch (p_init->tuner2_type) {
	case 3: /*FE_AUTO_STB6100:*/
		stv0900_write_reg(intp, R0900_P2_TNRCFG, 0x3c);
		stv0900_write_reg(intp, R0900_P2_TNRCFG2, 0x86);
		stv0900_write_reg(intp, R0900_P2_TNRCFG3, 0x18);
		stv0900_write_reg(intp, R0900_P2_TNRXTAL, 27); /* 27MHz */
		stv0900_write_reg(intp, R0900_P2_TNRSTEPS, 0x05);
		stv0900_write_reg(intp, R0900_P2_TNRGAIN, 0x17);
		stv0900_write_reg(intp, R0900_P2_TNRADJ, 0x1f);
		stv0900_write_reg(intp, R0900_P2_TNRCTL2, 0x0);
		stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 3);
		break;
	/* case FE_SW_TUNER: */
	default:
		stv0900_write_bits(intp, F0900_P2_TUN_TYPE, 6);
		break;
	}

1499 1500 1501 1502 1503 1504 1505
	stv0900_write_bits(intp, F0900_P2_TUN_MADDRESS, p_init->tun2_maddress);
	switch (p_init->tuner2_adc) {
	case 1:
		stv0900_write_reg(intp, R0900_TSTTNR3, 0x26);
		break;
	default:
		break;
1506 1507
	}

1508 1509
	stv0900_write_reg(intp, R0900_P2_TNRLD, 1); /* hw tuner */

1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530
	stv0900_write_bits(intp, F0900_P1_TUN_IQSWAP, p_init->tun1_iq_inv);
	stv0900_write_bits(intp, F0900_P2_TUN_IQSWAP, p_init->tun2_iq_inv);
	stv0900_set_mclk(intp, 135000000);
	msleep(3);

	switch (intp->clkmode) {
	case 0:
	case 2:
		stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 | intp->clkmode);
		break;
	default:
		selosci = 0x02 & stv0900_read_reg(intp, R0900_SYNTCTRL);
		stv0900_write_reg(intp, R0900_SYNTCTRL, 0x20 | selosci);
		break;
	}
	msleep(3);

	intp->mclk = stv0900_get_mclk_freq(intp, intp->quartz);
	if (intp->errs)
		error = STV0900_I2C_ERROR;

1531 1532 1533
	return error;
}

1534
static int stv0900_status(struct stv0900_internal *intp,
1535 1536 1537 1538
					enum fe_stv0900_demod_num demod)
{
	enum fe_stv0900_search_state demod_state;
	int locked = FALSE;
1539 1540
	u8 tsbitrate0_val, tsbitrate1_val;
	s32 bitrate;
1541

1542
	demod_state = stv0900_get_bits(intp, HEADER_MODE);
1543 1544 1545 1546 1547 1548 1549
	switch (demod_state) {
	case STV0900_SEARCH:
	case STV0900_PLH_DETECTED:
	default:
		locked = FALSE;
		break;
	case STV0900_DVBS2_FOUND:
1550 1551 1552
		locked = stv0900_get_bits(intp, LOCK_DEFINITIF) &&
				stv0900_get_bits(intp, PKTDELIN_LOCK) &&
				stv0900_get_bits(intp, TSFIFO_LINEOK);
1553 1554
		break;
	case STV0900_DVBS_FOUND:
1555 1556 1557
		locked = stv0900_get_bits(intp, LOCK_DEFINITIF) &&
				stv0900_get_bits(intp, LOCKEDVIT) &&
				stv0900_get_bits(intp, TSFIFO_LINEOK);
1558 1559 1560
		break;
	}

1561 1562
	dprintk("%s: locked = %d\n", __func__, locked);

1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573
	if (stvdebug) {
		/* Print TS bitrate */
		tsbitrate0_val = stv0900_read_reg(intp, TSBITRATE0);
		tsbitrate1_val = stv0900_read_reg(intp, TSBITRATE1);
		/* Formula Bit rate = Mclk * px_tsfifo_bitrate / 16384 */
		bitrate = (stv0900_get_mclk_freq(intp, intp->quartz)/1000000)
			* (tsbitrate1_val << 8 | tsbitrate0_val);
		bitrate /= 16384;
		dprintk("TS bitrate = %d Mbit/sec \n", bitrate);
	};

1574 1575 1576 1577 1578 1579 1580
	return locked;
}

static enum dvbfe_search stv0900_search(struct dvb_frontend *fe,
					struct dvb_frontend_parameters *params)
{
	struct stv0900_state *state = fe->demodulator_priv;
1581 1582
	struct stv0900_internal *intp = state->internal;
	enum fe_stv0900_demod_num demod = state->demod;
1583 1584 1585 1586 1587 1588 1589
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;

	struct stv0900_search_params p_search;
	struct stv0900_signal_info p_result;

	enum fe_stv0900_error error = STV0900_NO_ERROR;

1590
	dprintk("%s: ", __func__);
1591

1592 1593 1594
	if (!(INRANGE(100000, c->symbol_rate, 70000000)))
		return DVBFE_ALGO_SEARCH_FAILED;

1595 1596 1597
	if (state->config->set_ts_params)
		state->config->set_ts_params(fe, 0);

1598
	p_result.locked = FALSE;
1599
	p_search.path = demod;
1600 1601 1602 1603 1604 1605 1606 1607
	p_search.frequency = c->frequency;
	p_search.symbol_rate = c->symbol_rate;
	p_search.search_range = 10000000;
	p_search.fec = STV0900_FEC_UNKNOWN;
	p_search.standard = STV0900_AUTO_SEARCH;
	p_search.iq_inversion = STV0900_IQ_AUTO;
	p_search.search_algo = STV0900_BLIND_SEARCH;

1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632
	intp->srch_standard[demod] = p_search.standard;
	intp->symbol_rate[demod] = p_search.symbol_rate;
	intp->srch_range[demod] = p_search.search_range;
	intp->freq[demod] = p_search.frequency;
	intp->srch_algo[demod] = p_search.search_algo;
	intp->srch_iq_inv[demod] = p_search.iq_inversion;
	intp->fec[demod] = p_search.fec;
	if ((stv0900_algo(fe) == STV0900_RANGEOK) &&
				(intp->errs == STV0900_NO_ERROR)) {
		p_result.locked = intp->result[demod].locked;
		p_result.standard = intp->result[demod].standard;
		p_result.frequency = intp->result[demod].frequency;
		p_result.symbol_rate = intp->result[demod].symbol_rate;
		p_result.fec = intp->result[demod].fec;
		p_result.modcode = intp->result[demod].modcode;
		p_result.pilot = intp->result[demod].pilot;
		p_result.frame_len = intp->result[demod].frame_len;
		p_result.spectrum = intp->result[demod].spectrum;
		p_result.rolloff = intp->result[demod].rolloff;
		p_result.modulation = intp->result[demod].modulation;
	} else {
		p_result.locked = FALSE;
		switch (intp->err[demod]) {
		case STV0900_I2C_ERROR:
			error = STV0900_I2C_ERROR;
1633
			break;
1634 1635 1636
		case STV0900_NO_ERROR:
		default:
			error = STV0900_SEARCH_FAILED;
1637 1638
			break;
		}
1639
	}
1640 1641

	if ((p_result.locked == TRUE) && (error == STV0900_NO_ERROR)) {
1642
		dprintk("Search Success\n");
1643 1644
		return DVBFE_ALGO_SEARCH_SUCCESS;
	} else {
1645
		dprintk("Search Fail\n");
1646 1647 1648 1649 1650 1651 1652 1653 1654
		return DVBFE_ALGO_SEARCH_FAILED;
	}

}

static int stv0900_read_status(struct dvb_frontend *fe, enum fe_status *status)
{
	struct stv0900_state *state = fe->demodulator_priv;

1655
	dprintk("%s: ", __func__);
1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678

	if ((stv0900_status(state->internal, state->demod)) == TRUE) {
		dprintk("DEMOD LOCK OK\n");
		*status = FE_HAS_CARRIER
			| FE_HAS_VITERBI
			| FE_HAS_SYNC
			| FE_HAS_LOCK;
	} else
		dprintk("DEMOD LOCK FAIL\n");

	return 0;
}

static int stv0900_track(struct dvb_frontend *fe,
			struct dvb_frontend_parameters *p)
{
	return 0;
}

static int stv0900_stop_ts(struct dvb_frontend *fe, int stop_ts)
{

	struct stv0900_state *state = fe->demodulator_priv;
1679
	struct stv0900_internal *intp = state->internal;
1680 1681 1682
	enum fe_stv0900_demod_num demod = state->demod;

	if (stop_ts == TRUE)
1683
		stv0900_write_bits(intp, RST_HWARE, 1);
1684
	else
1685
		stv0900_write_bits(intp, RST_HWARE, 0);
1686 1687 1688 1689 1690 1691 1692

	return 0;
}

static int stv0900_diseqc_init(struct dvb_frontend *fe)
{
	struct stv0900_state *state = fe->demodulator_priv;
1693
	struct stv0900_internal *intp = state->internal;
1694 1695
	enum fe_stv0900_demod_num demod = state->demod;

1696 1697 1698
	stv0900_write_bits(intp, DISTX_MODE, state->config->diseqc_mode);
	stv0900_write_bits(intp, DISEQC_RESET, 1);
	stv0900_write_bits(intp, DISEQC_RESET, 0);
1699 1700 1701 1702 1703 1704

	return 0;
}

static int stv0900_init(struct dvb_frontend *fe)
{
1705
	dprintk("%s\n", __func__);
1706 1707 1708 1709 1710 1711 1712

	stv0900_stop_ts(fe, 1);
	stv0900_diseqc_init(fe);

	return 0;
}

1713
static int stv0900_diseqc_send(struct stv0900_internal *intp , u8 *data,
1714 1715 1716 1717
				u32 NbData, enum fe_stv0900_demod_num demod)
{
	s32 i = 0;

1718 1719 1720 1721 1722 1723 1724
	stv0900_write_bits(intp, DIS_PRECHARGE, 1);
	while (i < NbData) {
		while (stv0900_get_bits(intp, FIFO_FULL))
			;/* checkpatch complains */
		stv0900_write_reg(intp, DISTXDATA, data[i]);
		i++;
	}
1725

1726 1727 1728 1729 1730
	stv0900_write_bits(intp, DIS_PRECHARGE, 0);
	i = 0;
	while ((stv0900_get_bits(intp, TX_IDLE) != 1) && (i < 10)) {
		msleep(10);
		i++;
1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749
	}

	return 0;
}

static int stv0900_send_master_cmd(struct dvb_frontend *fe,
					struct dvb_diseqc_master_cmd *cmd)
{
	struct stv0900_state *state = fe->demodulator_priv;

	return stv0900_diseqc_send(state->internal,
				cmd->msg,
				cmd->msg_len,
				state->demod);
}

static int stv0900_send_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
{
	struct stv0900_state *state = fe->demodulator_priv;
1750
	struct stv0900_internal *intp = state->internal;
1751
	enum fe_stv0900_demod_num demod = state->demod;
1752
	u8 data;
1753 1754 1755 1756


	switch (burst) {
	case SEC_MINI_A:
1757
		stv0900_write_bits(intp, DISTX_MODE, 3);/* Unmodulated */
1758
		data = 0x00;
1759
		stv0900_diseqc_send(intp, &data, 1, state->demod);
1760 1761
		break;
	case SEC_MINI_B:
1762
		stv0900_write_bits(intp, DISTX_MODE, 2);/* Modulated */
1763
		data = 0xff;
1764
		stv0900_diseqc_send(intp, &data, 1, state->demod);
1765 1766 1767 1768 1769 1770 1771 1772 1773 1774
		break;
	}

	return 0;
}

static int stv0900_recv_slave_reply(struct dvb_frontend *fe,
				struct dvb_diseqc_slave_reply *reply)
{
	struct stv0900_state *state = fe->demodulator_priv;
1775 1776
	struct stv0900_internal *intp = state->internal;
	enum fe_stv0900_demod_num demod = state->demod;
1777 1778
	s32 i = 0;

1779
	reply->msg_len = 0;
1780

1781 1782 1783 1784
	while ((stv0900_get_bits(intp, RX_END) != 1) && (i < 10)) {
		msleep(10);
		i++;
	}
1785

1786 1787
	if (stv0900_get_bits(intp, RX_END)) {
		reply->msg_len = stv0900_get_bits(intp, FIFO_BYTENBR);
1788

1789 1790
		for (i = 0; i < reply->msg_len; i++)
			reply->msg[i] = stv0900_read_reg(intp, DISRXDATA);
1791 1792 1793 1794 1795
	}

	return 0;
}

1796
static int stv0900_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t toneoff)
1797 1798
{
	struct stv0900_state *state = fe->demodulator_priv;
1799
	struct stv0900_internal *intp = state->internal;
1800 1801
	enum fe_stv0900_demod_num demod = state->demod;

1802
	dprintk("%s: %s\n", __func__, ((toneoff == 0) ? "On" : "Off"));
1803

1804 1805 1806
	switch (toneoff) {
	case SEC_TONE_ON:
		/*Set the DiseqC mode to 22Khz _continues_ tone*/
1807 1808
		stv0900_write_bits(intp, DISTX_MODE, 0);
		stv0900_write_bits(intp, DISEQC_RESET, 1);
1809
		/*release DiseqC reset to enable the 22KHz tone*/
1810
		stv0900_write_bits(intp, DISEQC_RESET, 0);
1811 1812 1813 1814
		break;
	case SEC_TONE_OFF:
		/*return diseqc mode to config->diseqc_mode.
		Usually it's without _continues_ tone */
1815
		stv0900_write_bits(intp, DISTX_MODE,
1816
				state->config->diseqc_mode);
1817
		/*maintain the DiseqC reset to disable the 22KHz tone*/
1818 1819
		stv0900_write_bits(intp, DISEQC_RESET, 1);
		stv0900_write_bits(intp, DISEQC_RESET, 0);
1820 1821 1822
		break;
	default:
		return -EINVAL;
1823 1824 1825 1826 1827 1828 1829 1830 1831
	}

	return 0;
}

static void stv0900_release(struct dvb_frontend *fe)
{
	struct stv0900_state *state = fe->demodulator_priv;

1832
	dprintk("%s\n", __func__);
1833 1834 1835

	if ((--(state->internal->dmds_used)) <= 0) {

1836
		dprintk("%s: Actually removing\n", __func__);
1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878

		remove_inode(state->internal);
		kfree(state->internal);
	}

	kfree(state);
}

static struct dvb_frontend_ops stv0900_ops = {

	.info = {
		.name			= "STV0900 frontend",
		.type			= FE_QPSK,
		.frequency_min		= 950000,
		.frequency_max		= 2150000,
		.frequency_stepsize	= 125,
		.frequency_tolerance	= 0,
		.symbol_rate_min	= 1000000,
		.symbol_rate_max	= 45000000,
		.symbol_rate_tolerance	= 500,
		.caps			= FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
					  FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
					  FE_CAN_FEC_7_8 | FE_CAN_QPSK    |
					  FE_CAN_2G_MODULATION |
					  FE_CAN_FEC_AUTO
	},
	.release			= stv0900_release,
	.init				= stv0900_init,
	.get_frontend_algo		= stv0900_frontend_algo,
	.i2c_gate_ctrl			= stv0900_i2c_gate_ctrl,
	.diseqc_send_master_cmd		= stv0900_send_master_cmd,
	.diseqc_send_burst		= stv0900_send_burst,
	.diseqc_recv_slave_reply	= stv0900_recv_slave_reply,
	.set_tone			= stv0900_set_tone,
	.set_property			= stb0900_set_property,
	.get_property			= stb0900_get_property,
	.search				= stv0900_search,
	.track				= stv0900_track,
	.read_status			= stv0900_read_status,
	.read_ber			= stv0900_read_ber,
	.read_signal_strength		= stv0900_read_signal_strength,
	.read_snr			= stv0900_read_snr,
1879
	.read_ucblocks                  = stv0900_read_ucblocks,
1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905
};

struct dvb_frontend *stv0900_attach(const struct stv0900_config *config,
					struct i2c_adapter *i2c,
					int demod)
{
	struct stv0900_state *state = NULL;
	struct stv0900_init_params init_params;
	enum fe_stv0900_error err_stv0900;

	state = kzalloc(sizeof(struct stv0900_state), GFP_KERNEL);
	if (state == NULL)
		goto error;

	state->demod		= demod;
	state->config		= config;
	state->i2c_adap		= i2c;

	memcpy(&state->frontend.ops, &stv0900_ops,
			sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;

	switch (demod) {
	case 0:
	case 1:
		init_params.dmd_ref_clk  	= config->xtal;
1906
		init_params.demod_mode		= config->demod_mode;
1907 1908 1909
		init_params.rolloff		= STV0900_35;
		init_params.path1_ts_clock	= config->path1_mode;
		init_params.tun1_maddress	= config->tun1_maddress;
1910
		init_params.tun1_iq_inv		= STV0900_IQ_NORMAL;
1911
		init_params.tuner1_adc		= config->tun1_adc;
1912
		init_params.tuner1_type		= config->tun1_type;
1913
		init_params.path2_ts_clock	= config->path2_mode;
1914
		init_params.ts_config		= config->ts_config_regs;
1915 1916
		init_params.tun2_maddress	= config->tun2_maddress;
		init_params.tuner2_adc		= config->tun2_adc;
1917
		init_params.tuner2_type		= config->tun2_type;
1918
		init_params.tun2_iq_inv		= STV0900_IQ_SWAPPED;
1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947

		err_stv0900 = stv0900_init_internal(&state->frontend,
							&init_params);

		if (err_stv0900)
			goto error;

		break;
	default:
		goto error;
		break;
	}

	dprintk("%s: Attaching STV0900 demodulator(%d) \n", __func__, demod);
	return &state->frontend;

error:
	dprintk("%s: Failed to attach STV0900 demodulator(%d) \n",
		__func__, demod);
	kfree(state);
	return NULL;
}
EXPORT_SYMBOL(stv0900_attach);

MODULE_PARM_DESC(debug, "Set debug");

MODULE_AUTHOR("Igor M. Liplianin");
MODULE_DESCRIPTION("ST STV0900 frontend");
MODULE_LICENSE("GPL");