bfin_uart.c 39.1 KB
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/*
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 * Blackfin On-Chip Serial Driver
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 *
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 * Copyright 2006-2011 Analog Devices Inc.
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 *
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 * Enter bugs at http://blackfin.uclinux.org/
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 *
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 * Licensed under the GPL-2 or later.
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 */

#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif

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#define DRIVER_NAME "bfin-uart"
#define pr_fmt(fmt) DRIVER_NAME ": " fmt

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#include <linux/module.h>
#include <linux/ioport.h>
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#include <linux/gfp.h>
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#include <linux/io.h>
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#include <linux/init.h>
#include <linux/console.h>
#include <linux/sysrq.h>
#include <linux/platform_device.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial_core.h>
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#include <linux/gpio.h>
#include <linux/irq.h>
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#include <linux/kgdb.h>
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#include <linux/slab.h>
#include <linux/dma-mapping.h>
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#include <asm/portmux.h>
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#include <asm/cacheflush.h>
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#include <asm/dma.h>
#include <asm/bfin_serial.h>
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#ifdef CONFIG_SERIAL_BFIN_MODULE
# undef CONFIG_EARLY_PRINTK
#endif

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/* UART name and device definitions */
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#define BFIN_SERIAL_DEV_NAME	"ttyBF"
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#define BFIN_SERIAL_MAJOR	204
#define BFIN_SERIAL_MINOR	64

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static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
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#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
	defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)

# ifndef CONFIG_SERIAL_BFIN_PIO
#  error KGDB only support UART in PIO mode.
# endif

static int kgdboc_port_line;
static int kgdboc_break_enabled;
#endif
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/*
 * Setup for console. Argument comes from the menuconfig
 */
#define DMA_RX_XCOUNT		512
#define DMA_RX_YCOUNT		(PAGE_SIZE / DMA_RX_XCOUNT)

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#define DMA_RX_FLUSH_JIFFIES	(HZ / 50)
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#ifdef CONFIG_SERIAL_BFIN_DMA
static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
#else
static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
#endif

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static void bfin_serial_reset_irda(struct uart_port *port);

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#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
	defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
	if (uart->cts_pin < 0)
		return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;

	/* CTS PIN is negative assertive. */
	if (UART_GET_CTS(uart))
		return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
	else
		return TIOCM_DSR | TIOCM_CAR;
}

static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
	if (uart->rts_pin < 0)
		return;

	/* RTS PIN is negative assertive. */
	if (mctrl & TIOCM_RTS)
		UART_ENABLE_RTS(uart);
	else
		UART_DISABLE_RTS(uart);
}

/*
 * Handle any change of modem status signal.
 */
static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
{
	struct bfin_serial_port *uart = dev_id;
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	struct uart_port *uport = &uart->port;
	unsigned int status = bfin_serial_get_mctrl(uport);
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#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
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	UART_CLEAR_SCTS(uart);
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	if (uport->hw_stopped) {
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		if (status) {
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			uport->hw_stopped = 0;
			uart_write_wakeup(uport);
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		}
	} else {
		if (!status)
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			uport->hw_stopped = 1;
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	}
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#else
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	uart_handle_cts_change(uport, status & TIOCM_CTS);
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#endif
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	return IRQ_HANDLED;
}
#else
static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
{
	return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
}

static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
}
#endif

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/*
 * interrupts are disabled on entry
 */
static void bfin_serial_stop_tx(struct uart_port *port)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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#ifdef CONFIG_SERIAL_BFIN_DMA
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	struct circ_buf *xmit = &uart->port.state->xmit;
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#endif
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	while (!(UART_GET_LSR(uart) & TEMT))
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		cpu_relax();
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#ifdef CONFIG_SERIAL_BFIN_DMA
	disable_dma(uart->tx_dma_channel);
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	xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
	uart->port.icount.tx += uart->tx_count;
	uart->tx_count = 0;
	uart->tx_done = 1;
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#else
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#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
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	/* Clear TFI bit */
	UART_PUT_LSR(uart, TFI);
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#endif
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	UART_CLEAR_IER(uart, ETBEI);
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#endif
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}

/*
 * port is locked and interrupts are disabled
 */
static void bfin_serial_start_tx(struct uart_port *port)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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	struct tty_struct *tty = uart->port.state->port.tty;
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	/*
	 * To avoid losting RX interrupt, we reset IR function
	 * before sending data.
	 */
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	if (tty->termios.c_line == N_IRDA)
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		bfin_serial_reset_irda(port);
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#ifdef CONFIG_SERIAL_BFIN_DMA
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	if (uart->tx_done)
		bfin_serial_dma_tx_chars(uart);
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#else
	UART_SET_IER(uart, ETBEI);
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	bfin_serial_tx_chars(uart);
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#endif
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}

/*
 * Interrupts are enabled
 */
static void bfin_serial_stop_rx(struct uart_port *port)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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	UART_CLEAR_IER(uart, ERBFI);
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}

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#if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
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# define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
# define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
#else
# define UART_GET_ANOMALY_THRESHOLD(uart)    0
# define UART_SET_ANOMALY_THRESHOLD(uart, v)
#endif

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#ifdef CONFIG_SERIAL_BFIN_PIO
static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
{
	unsigned int status, ch, flg;
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	static struct timeval anomaly_start = { .tv_sec = 0 };
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	status = UART_GET_LSR(uart);
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	UART_CLEAR_LSR(uart);

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	ch = UART_GET_CHAR(uart);
	uart->port.icount.rx++;
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#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
	defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
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	if (kgdb_connected && kgdboc_port_line == uart->port.line
		&& kgdboc_break_enabled)
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		if (ch == 0x3) {/* Ctrl + C */
			kgdb_breakpoint();
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			return;
		}
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	if (!uart->port.state)
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		return;
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#endif
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	if (ANOMALY_05000363) {
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		/* The BF533 (and BF561) family of processors have a nice anomaly
		 * where they continuously generate characters for a "single" break.
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		 * We have to basically ignore this flood until the "next" valid
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		 * character comes across.  Due to the nature of the flood, it is
		 * not possible to reliably catch bytes that are sent too quickly
		 * after this break.  So application code talking to the Blackfin
		 * which sends a break signal must allow at least 1.5 character
		 * times after the end of the break for things to stabilize.  This
		 * timeout was picked as it must absolutely be larger than 1
		 * character time +/- some percent.  So 1.5 sounds good.  All other
		 * Blackfin families operate properly.  Woo.
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		 */
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		if (anomaly_start.tv_sec) {
			struct timeval curr;
			suseconds_t usecs;

			if ((~ch & (~ch + 1)) & 0xff)
				goto known_good_char;

			do_gettimeofday(&curr);
			if (curr.tv_sec - anomaly_start.tv_sec > 1)
				goto known_good_char;

			usecs = 0;
			if (curr.tv_sec != anomaly_start.tv_sec)
				usecs += USEC_PER_SEC;
			usecs += curr.tv_usec - anomaly_start.tv_usec;

			if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
				goto known_good_char;

			if (ch)
				anomaly_start.tv_sec = 0;
			else
				anomaly_start = curr;

			return;

 known_good_char:
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			status &= ~BI;
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			anomaly_start.tv_sec = 0;
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		}
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	}

	if (status & BI) {
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		if (ANOMALY_05000363)
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			if (bfin_revid() < 5)
				do_gettimeofday(&anomaly_start);
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		uart->port.icount.brk++;
		if (uart_handle_break(&uart->port))
			goto ignore_char;
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		status &= ~(PE | FE);
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	}
	if (status & PE)
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		uart->port.icount.parity++;
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	if (status & OE)
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		uart->port.icount.overrun++;
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	if (status & FE)
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		uart->port.icount.frame++;
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	status &= uart->port.read_status_mask;

	if (status & BI)
		flg = TTY_BREAK;
	else if (status & PE)
		flg = TTY_PARITY;
	else if (status & FE)
		flg = TTY_FRAME;
	else
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		flg = TTY_NORMAL;

	if (uart_handle_sysrq_char(&uart->port, ch))
		goto ignore_char;

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	uart_insert_char(&uart->port, status, OE, ch, flg);

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	tty_flip_buffer_push(&uart->port.state->port);
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}

static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
{
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	struct circ_buf *xmit = &uart->port.state->xmit;
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	if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
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#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
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		/* Clear TFI bit */
		UART_PUT_LSR(uart, TFI);
#endif
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		/* Anomaly notes:
		 *  05000215 -	we always clear ETBEI within last UART TX
		 *		interrupt to end a string. It is always set
		 *		when start a new tx.
		 */
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		UART_CLEAR_IER(uart, ETBEI);
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		return;
	}

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	if (uart->port.x_char) {
		UART_PUT_CHAR(uart, uart->port.x_char);
		uart->port.icount.tx++;
		uart->port.x_char = 0;
	}

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	while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
		UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		uart->port.icount.tx++;
	}
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	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(&uart->port);
}

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static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
{
	struct bfin_serial_port *uart = dev_id;

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	while (UART_GET_LSR(uart) & DR)
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		bfin_serial_rx_chars(uart);
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	return IRQ_HANDLED;
}

static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
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{
	struct bfin_serial_port *uart = dev_id;

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	spin_lock(&uart->port.lock);
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	if (UART_GET_LSR(uart) & THRE)
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		bfin_serial_tx_chars(uart);
	spin_unlock(&uart->port.lock);
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	return IRQ_HANDLED;
}
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#endif
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#ifdef CONFIG_SERIAL_BFIN_DMA
static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
{
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	struct circ_buf *xmit = &uart->port.state->xmit;
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	uart->tx_done = 0;

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	if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
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		uart->tx_count = 0;
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		uart->tx_done = 1;
		return;
	}

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	if (uart->port.x_char) {
		UART_PUT_CHAR(uart, uart->port.x_char);
		uart->port.icount.tx++;
		uart->port.x_char = 0;
	}
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	uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
	if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
		uart->tx_count = UART_XMIT_SIZE - xmit->tail;
	blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
					(unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
	set_dma_config(uart->tx_dma_channel,
		set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
			INTR_ON_BUF,
			DIMENSION_LINEAR,
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			DATA_SIZE_8,
			DMA_SYNC_RESTART));
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	set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
	set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
	set_dma_x_modify(uart->tx_dma_channel, 1);
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	SSYNC();
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	enable_dma(uart->tx_dma_channel);
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	UART_SET_IER(uart, ETBEI);
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}

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static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
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{
	int i, flg, status;

	status = UART_GET_LSR(uart);
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	UART_CLEAR_LSR(uart);

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	uart->port.icount.rx +=
		CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
		UART_XMIT_SIZE);
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	if (status & BI) {
		uart->port.icount.brk++;
		if (uart_handle_break(&uart->port))
			goto dma_ignore_char;
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		status &= ~(PE | FE);
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	}
	if (status & PE)
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		uart->port.icount.parity++;
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	if (status & OE)
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		uart->port.icount.overrun++;
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	if (status & FE)
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		uart->port.icount.frame++;
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	status &= uart->port.read_status_mask;

	if (status & BI)
		flg = TTY_BREAK;
	else if (status & PE)
		flg = TTY_PARITY;
	else if (status & FE)
		flg = TTY_FRAME;
	else
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		flg = TTY_NORMAL;

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	for (i = uart->rx_dma_buf.tail; ; i++) {
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		if (i >= UART_XMIT_SIZE)
			i = 0;
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		if (i == uart->rx_dma_buf.head)
			break;
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		if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
			uart_insert_char(&uart->port, status, OE,
				uart->rx_dma_buf.buf[i], flg);
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	}
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 dma_ignore_char:
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	tty_flip_buffer_push(&uart->port.state->port);
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}

void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
{
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	int x_pos, pos;
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	unsigned long flags;
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	spin_lock_irqsave(&uart->rx_lock, flags);
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	/* 2D DMA RX buffer ring is used. Because curr_y_count and
	 * curr_x_count can't be read as an atomic operation,
	 * curr_y_count should be read before curr_x_count. When
	 * curr_x_count is read, curr_y_count may already indicate
	 * next buffer line. But, the position calculated here is
	 * still indicate the old line. The wrong position data may
	 * be smaller than current buffer tail, which cause garbages
	 * are received if it is not prohibit.
	 */
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	uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
	x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
	uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
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	if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
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		uart->rx_dma_nrows = 0;
	x_pos = DMA_RX_XCOUNT - x_pos;
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	if (x_pos == DMA_RX_XCOUNT)
		x_pos = 0;

	pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
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	/* Ignore receiving data if new position is in the same line of
	 * current buffer tail and small.
	 */
	if (pos > uart->rx_dma_buf.tail ||
		uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
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		uart->rx_dma_buf.head = pos;
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		bfin_serial_dma_rx_chars(uart);
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		uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
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	}
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	spin_unlock_irqrestore(&uart->rx_lock, flags);
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	mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
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}

static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
{
	struct bfin_serial_port *uart = dev_id;
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	struct circ_buf *xmit = &uart->port.state->xmit;
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	spin_lock(&uart->port.lock);
	if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
		disable_dma(uart->tx_dma_channel);
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		clear_dma_irqstat(uart->tx_dma_channel);
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		/* Anomaly notes:
		 *  05000215 -	we always clear ETBEI within last UART TX
		 *		interrupt to end a string. It is always set
		 *		when start a new tx.
		 */
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		UART_CLEAR_IER(uart, ETBEI);
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		uart->port.icount.tx += uart->tx_count;
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		if (!(xmit->tail == 0 && xmit->head == 0)) {
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			xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
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			if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
				uart_write_wakeup(&uart->port);
		}
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		bfin_serial_dma_tx_chars(uart);
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	}

	spin_unlock(&uart->port.lock);
	return IRQ_HANDLED;
}

static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
{
	struct bfin_serial_port *uart = dev_id;
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	unsigned int irqstat;
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	int x_pos, pos;
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	spin_lock(&uart->rx_lock);
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	irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
	clear_dma_irqstat(uart->rx_dma_channel);
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	uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
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	x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
545
	uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
546
	if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
547 548 549 550 551 552 553 554 555 556
		uart->rx_dma_nrows = 0;

	pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
	if (pos > uart->rx_dma_buf.tail ||
		uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
		uart->rx_dma_buf.head = pos;
		bfin_serial_dma_rx_chars(uart);
		uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
	}

557
	spin_unlock(&uart->rx_lock);
558

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	return IRQ_HANDLED;
}
#endif

/*
 * Return TIOCSER_TEMT when transmitter is not busy.
 */
static unsigned int bfin_serial_tx_empty(struct uart_port *port)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
569
	unsigned int lsr;
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	lsr = UART_GET_LSR(uart);
	if (lsr & TEMT)
		return TIOCSER_TEMT;
	else
		return 0;
}

static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
{
580
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
581
	u32 lcr = UART_GET_LCR(uart);
582 583 584 585 586 587
	if (break_state)
		lcr |= SB;
	else
		lcr &= ~SB;
	UART_PUT_LCR(uart, lcr);
	SSYNC();
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}

static int bfin_serial_startup(struct uart_port *port)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;

#ifdef CONFIG_SERIAL_BFIN_DMA
	dma_addr_t dma_handle;

	if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
		printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
		return -EBUSY;
	}

	if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
		printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
		free_dma(uart->rx_dma_channel);
		return -EBUSY;
	}

	set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
	set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);

	uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
	uart->rx_dma_buf.head = 0;
	uart->rx_dma_buf.tail = 0;
	uart->rx_dma_nrows = 0;

	set_dma_config(uart->rx_dma_channel,
		set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
				INTR_ON_ROW, DIMENSION_2D,
619 620
				DATA_SIZE_8,
				DMA_SYNC_RESTART));
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	set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
	set_dma_x_modify(uart->rx_dma_channel, 1);
	set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
	set_dma_y_modify(uart->rx_dma_channel, 1);
	set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
	enable_dma(uart->rx_dma_channel);

	uart->rx_dma_timer.data = (unsigned long)(uart);
	uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
	uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
	add_timer(&(uart->rx_dma_timer));
#else
633
# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
634 635 636 637 638
	defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
	if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
		kgdboc_break_enabled = 0;
	else {
# endif
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	if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
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	     "BFIN_UART_RX", uart)) {
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		printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
		return -EBUSY;
	}

	if (request_irq
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	    (uart->tx_irq, bfin_serial_tx_int, 0,
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	     "BFIN_UART_TX", uart)) {
		printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
649
		free_irq(uart->rx_irq, uart);
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		return -EBUSY;
	}
652 653 654

# ifdef CONFIG_BF54x
	{
655 656 657 658 659 660 661
		/*
		 * UART2 and UART3 on BF548 share interrupt PINs and DMA
		 * controllers with SPORT2 and SPORT3. UART rx and tx
		 * interrupts are generated in PIO mode only when configure
		 * their peripheral mapping registers properly, which means
		 * request corresponding DMA channels in PIO mode as well.
		 */
662 663
		unsigned uart_dma_ch_rx, uart_dma_ch_tx;

664
		switch (uart->rx_irq) {
665 666 667 668 669 670 671 672 673 674 675
		case IRQ_UART3_RX:
			uart_dma_ch_rx = CH_UART3_RX;
			uart_dma_ch_tx = CH_UART3_TX;
			break;
		case IRQ_UART2_RX:
			uart_dma_ch_rx = CH_UART2_RX;
			uart_dma_ch_tx = CH_UART2_TX;
			break;
		default:
			uart_dma_ch_rx = uart_dma_ch_tx = 0;
			break;
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		}
677 678 679 680

		if (uart_dma_ch_rx &&
			request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
			printk(KERN_NOTICE"Fail to attach UART interrupt\n");
681 682
			free_irq(uart->rx_irq, uart);
			free_irq(uart->tx_irq, uart);
683 684 685 686 687 688
			return -EBUSY;
		}
		if (uart_dma_ch_tx &&
			request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
			printk(KERN_NOTICE "Fail to attach UART interrupt\n");
			free_dma(uart_dma_ch_rx);
689 690
			free_irq(uart->rx_irq, uart);
			free_irq(uart->tx_irq, uart);
691 692 693 694
			return -EBUSY;
		}
	}
# endif
695
# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
696 697 698
	defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
	}
# endif
699 700 701 702 703 704 705
#endif

#ifdef CONFIG_SERIAL_BFIN_CTSRTS
	if (uart->cts_pin >= 0) {
		if (request_irq(gpio_to_irq(uart->cts_pin),
			bfin_serial_mctrl_cts_int,
			IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
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			0, "BFIN_UART_CTS", uart)) {
707
			uart->cts_pin = -1;
708
			pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
709 710
		}
	}
711 712 713 714 715 716 717
	if (uart->rts_pin >= 0) {
		if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
			pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
			uart->rts_pin = -1;
		} else
			gpio_direction_output(uart->rts_pin, 0);
	}
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#endif
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#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
720 721
	if (uart->cts_pin >= 0) {
		if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
722
			0, "BFIN_UART_MODEM_STATUS", uart)) {
723 724 725
			uart->cts_pin = -1;
			dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
		}
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727
		/* CTS RTS PINs are negative assertive. */
728
		UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
729 730
		UART_SET_IER(uart, EDSSI);
	}
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#endif

733
	UART_SET_IER(uart, ERBFI);
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	return 0;
}

static void bfin_serial_shutdown(struct uart_port *port)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;

#ifdef CONFIG_SERIAL_BFIN_DMA
	disable_dma(uart->tx_dma_channel);
	free_dma(uart->tx_dma_channel);
	disable_dma(uart->rx_dma_channel);
	free_dma(uart->rx_dma_channel);
	del_timer(&(uart->rx_dma_timer));
747
	dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
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#else
749 750 751 752 753 754 755 756 757 758 759 760
#ifdef CONFIG_BF54x
	switch (uart->port.irq) {
	case IRQ_UART3_RX:
		free_dma(CH_UART3_RX);
		free_dma(CH_UART3_TX);
		break;
	case IRQ_UART2_RX:
		free_dma(CH_UART2_RX);
		free_dma(CH_UART2_TX);
		break;
	default:
		break;
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	}
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#endif
763 764
	free_irq(uart->rx_irq, uart);
	free_irq(uart->tx_irq, uart);
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
768 769
	if (uart->cts_pin >= 0)
		free_irq(gpio_to_irq(uart->cts_pin), uart);
770 771
	if (uart->rts_pin >= 0)
		gpio_free(uart->rts_pin);
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#endif
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
774
	if (uart->cts_pin >= 0)
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		free_irq(uart->status_irq, uart);
#endif
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}

static void
bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
		   struct ktermios *old)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
	unsigned long flags;
	unsigned int baud, quot;
786
	unsigned int ier, lcr = 0;
787
	unsigned long timeout;
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789 790 791 792 793 794 795
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
	if (old == NULL && uart->cts_pin != -1)
		termios->c_cflag |= CRTSCTS;
	else if (uart->cts_pin == -1)
		termios->c_cflag &= ~CRTSCTS;
#endif

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	switch (termios->c_cflag & CSIZE) {
	case CS8:
		lcr = WLS(8);
		break;
	case CS7:
		lcr = WLS(7);
		break;
	case CS6:
		lcr = WLS(6);
		break;
	case CS5:
		lcr = WLS(5);
		break;
	default:
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		printk(KERN_ERR "%s: word length not supported\n",
811
			__func__);
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	}

814 815 816 817 818 819 820 821 822 823
	/* Anomaly notes:
	 *  05000231 -  STOP bit is always set to 1 whatever the user is set.
	 */
	if (termios->c_cflag & CSTOPB) {
		if (ANOMALY_05000231)
			printk(KERN_WARNING "STOP bits other than 1 is not "
				"supported in case of anomaly 05000231.\n");
		else
			lcr |= STB;
	}
824
	if (termios->c_cflag & PARENB)
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		lcr |= PEN;
826 827 828 829
	if (!(termios->c_cflag & PARODD))
		lcr |= EPS;
	if (termios->c_cflag & CMSPAR)
		lcr |= STP;
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831 832
	spin_lock_irqsave(&uart->port.lock, flags);

833 834 835
	port->read_status_mask = OE;
	if (termios->c_iflag & INPCK)
		port->read_status_mask |= (FE | PE);
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	if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
837
		port->read_status_mask |= BI;
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839 840 841 842 843 844 845 846 847 848 849 850 851 852 853
	/*
	 * Characters to ignore
	 */
	port->ignore_status_mask = 0;
	if (termios->c_iflag & IGNPAR)
		port->ignore_status_mask |= FE | PE;
	if (termios->c_iflag & IGNBRK) {
		port->ignore_status_mask |= BI;
		/*
		 * If we're ignoring parity and break indicators,
		 * ignore overruns too (for real raw support).
		 */
		if (termios->c_iflag & IGNPAR)
			port->ignore_status_mask |= OE;
	}
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	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
856 857 858 859 860 861
	quot = uart_get_divisor(port, baud);

	/* If discipline is not IRDA, apply ANOMALY_05000230 */
	if (termios->c_line != N_IRDA)
		quot -= ANOMALY_05000230;

862 863
	UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);

864 865 866 867 868 869 870 871
	/* Wait till the transfer buffer is empty */
	timeout = jiffies + msecs_to_jiffies(10);
	while (UART_GET_GCTL(uart) & UCEN && !(UART_GET_LSR(uart) & TEMT))
		if (time_after(jiffies, timeout)) {
			dev_warn(port->dev, "timeout waiting for TX buffer empty\n");
			break;
		}

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	/* Disable UART */
	ier = UART_GET_IER(uart);
874
	UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
875
	UART_DISABLE_INTS(uart);
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877
	/* Set DLAB in LCR to Access CLK */
878
	UART_SET_DLAB(uart);
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880
	UART_PUT_CLK(uart, quot);
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	SSYNC();

	/* Clear DLAB in LCR to Access THR RBR IER */
884
	UART_CLEAR_DLAB(uart);
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886
	UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
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	/* Enable UART */
889
	UART_ENABLE_INTS(uart, ier);
890
	UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
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892 893 894
	/* Port speed changed, update the per-port timeout. */
	uart_update_timeout(port, termios->c_cflag, baud);

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	spin_unlock_irqrestore(&uart->port.lock, flags);
}

static const char *bfin_serial_type(struct uart_port *port)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;

	return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
}

/*
 * Release the memory region(s) being used by 'port'.
 */
static void bfin_serial_release_port(struct uart_port *port)
{
}

/*
 * Request the memory region(s) being used by 'port'.
 */
static int bfin_serial_request_port(struct uart_port *port)
{
	return 0;
}

/*
 * Configure/autoconfigure the port.
 */
static void bfin_serial_config_port(struct uart_port *port, int flags)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;

	if (flags & UART_CONFIG_TYPE &&
	    bfin_serial_request_port(&uart->port) == 0)
		uart->port.type = PORT_BFIN;
}

/*
 * Verify the new serial_struct (for TIOCSSERIAL).
 * The only change we allow are to the flags and type, and
 * even then only between PORT_BFIN and PORT_UNKNOWN
 */
static int
bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
{
	return 0;
}

943 944 945 946
/*
 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
 * In other cases, disable IrDA function.
 */
947 948
static void bfin_serial_set_ldisc(struct uart_port *port,
				  struct ktermios *termios)
949
{
950
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
951
	unsigned int val;
952

953
	switch (termios->c_line) {
954
	case N_IRDA:
955
		val = UART_GET_GCTL(uart);
956
		val |= (UMOD_IRDA | RPOLC);
957
		UART_PUT_GCTL(uart, val);
958 959
		break;
	default:
960
		val = UART_GET_GCTL(uart);
961
		val &= ~(UMOD_MASK | RPOLC);
962
		UART_PUT_GCTL(uart, val);
963 964 965
	}
}

966 967
static void bfin_serial_reset_irda(struct uart_port *port)
{
968
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
969
	unsigned int val;
970

971
	val = UART_GET_GCTL(uart);
972
	val &= ~(UMOD_MASK | RPOLC);
973
	UART_PUT_GCTL(uart, val);
974
	SSYNC();
975
	val |= (UMOD_IRDA | RPOLC);
976
	UART_PUT_GCTL(uart, val);
977 978 979
	SSYNC();
}

980
#ifdef CONFIG_CONSOLE_POLL
981 982 983 984
/* Anomaly notes:
 *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
 *		losing other bits of UART_LSR is not a problem here.
 */
985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010
static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;

	while (!(UART_GET_LSR(uart) & THRE))
		cpu_relax();

	UART_CLEAR_DLAB(uart);
	UART_PUT_CHAR(uart, (unsigned char)chr);
}

static int bfin_serial_poll_get_char(struct uart_port *port)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
	unsigned char chr;

	while (!(UART_GET_LSR(uart) & DR))
		cpu_relax();

	UART_CLEAR_DLAB(uart);
	chr = UART_GET_CHAR(uart);

	return chr;
}
#endif

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static struct uart_ops bfin_serial_pops = {
	.tx_empty	= bfin_serial_tx_empty,
	.set_mctrl	= bfin_serial_set_mctrl,
	.get_mctrl	= bfin_serial_get_mctrl,
	.stop_tx	= bfin_serial_stop_tx,
	.start_tx	= bfin_serial_start_tx,
	.stop_rx	= bfin_serial_stop_rx,
	.break_ctl	= bfin_serial_break_ctl,
	.startup	= bfin_serial_startup,
	.shutdown	= bfin_serial_shutdown,
	.set_termios	= bfin_serial_set_termios,
1022
	.set_ldisc	= bfin_serial_set_ldisc,
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	.type		= bfin_serial_type,
	.release_port	= bfin_serial_release_port,
	.request_port	= bfin_serial_request_port,
	.config_port	= bfin_serial_config_port,
	.verify_port	= bfin_serial_verify_port,
1028 1029 1030 1031
#ifdef CONFIG_CONSOLE_POLL
	.poll_put_char	= bfin_serial_poll_put_char,
	.poll_get_char	= bfin_serial_poll_get_char,
#endif
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};

1034
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
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/*
 * If the port was already initialised (eg, by a boot loader),
 * try to determine the current setup.
 */
static void __init
bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
			   int *parity, int *bits)
{
1043
	unsigned int status;
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	status = UART_GET_IER(uart) & (ERBFI | ETBEI);
	if (status == (ERBFI | ETBEI)) {
		/* ok, the port was enabled */
1048
		u32 lcr, clk;
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		lcr = UART_GET_LCR(uart);

		*parity = 'n';
		if (lcr & PEN) {
			if (lcr & EPS)
				*parity = 'e';
			else
				*parity = 'o';
		}
1059 1060
		*bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;

1061
		/* Set DLAB in LCR to Access CLK */
1062
		UART_SET_DLAB(uart);
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1064
		clk = UART_GET_CLK(uart);
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		/* Clear DLAB in LCR to Access THR RBR IER */
1067
		UART_CLEAR_DLAB(uart);
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1069
		*baud = get_sclk() / (16*clk);
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	}
1071
	pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
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}
1073 1074

static struct uart_driver bfin_serial_reg;
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1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103
static void bfin_serial_console_putchar(struct uart_port *port, int ch)
{
	struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
	while (!(UART_GET_LSR(uart) & THRE))
		barrier();
	UART_PUT_CHAR(uart, ch);
}

#endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
		 defined (CONFIG_EARLY_PRINTK) */

#ifdef CONFIG_SERIAL_BFIN_CONSOLE
#define CLASS_BFIN_CONSOLE	"bfin-console"
/*
 * Interrupts are disabled on entering
 */
static void
bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
{
	struct bfin_serial_port *uart = bfin_serial_ports[co->index];
	unsigned long flags;

	spin_lock_irqsave(&uart->port.lock, flags);
	uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
	spin_unlock_irqrestore(&uart->port.lock, flags);

}

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static int __init
bfin_serial_console_setup(struct console *co, char *options)
{
	struct bfin_serial_port *uart;
	int baud = 57600;
	int bits = 8;
	int parity = 'n';
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# if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
	defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
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	int flow = 'r';
1114
# else
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	int flow = 'n';
1116
# endif
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	/*
	 * Check whether an invalid uart number has been specified, and
	 * if so, search for the first available port that does have
	 * console support.
	 */
1123 1124 1125 1126 1127 1128
	if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
		return -ENODEV;

	uart = bfin_serial_ports[co->index];
	if (!uart)
		return -ENODEV;
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	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);
	else
		bfin_serial_console_get_options(uart, &baud, &parity, &bits);

	return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1136
}
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static struct console bfin_serial_console = {
1139
	.name		= BFIN_SERIAL_DEV_NAME,
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	.write		= bfin_serial_console_write,
	.device		= uart_console_device,
	.setup		= bfin_serial_console_setup,
	.flags		= CON_PRINTBUFFER,
	.index		= -1,
	.data		= &bfin_serial_reg,
};
1147
#define BFIN_SERIAL_CONSOLE	(&bfin_serial_console)
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#else
#define BFIN_SERIAL_CONSOLE	NULL
1150 1151
#endif /* CONFIG_SERIAL_BFIN_CONSOLE */

1152 1153 1154
#ifdef	CONFIG_EARLY_PRINTK
static struct bfin_serial_port bfin_earlyprintk_port;
#define CLASS_BFIN_EARLYPRINTK	"bfin-earlyprintk"
1155

1156 1157 1158 1159 1160
/*
 * Interrupts are disabled on entering
 */
static void
bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1161
{
1162
	unsigned long flags;
1163

1164 1165
	if (bfin_earlyprintk_port.port.line != co->index)
		return;
1166

1167 1168 1169 1170
	spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
	uart_console_write(&bfin_earlyprintk_port.port, s, count,
		bfin_serial_console_putchar);
	spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1171 1172
}

1173 1174 1175 1176 1177 1178
/*
 * This should have a .setup or .early_setup in it, but then things get called
 * without the command line options, and the baud rate gets messed up - so
 * don't let the common infrastructure play with things. (see calls to setup
 * & earlysetup in ./kernel/printk.c:register_console()
 */
1179
static struct console bfin_early_serial_console __initdata = {
1180
	.name = "early_BFuart",
1181
	.write = bfin_earlyprintk_console_write,
1182 1183 1184 1185 1186
	.device = uart_console_device,
	.flags = CON_PRINTBUFFER,
	.index = -1,
	.data  = &bfin_serial_reg,
};
1187 1188
#endif

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static struct uart_driver bfin_serial_reg = {
	.owner			= THIS_MODULE,
1191 1192
	.driver_name		= DRIVER_NAME,
	.dev_name		= BFIN_SERIAL_DEV_NAME,
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	.major			= BFIN_SERIAL_MAJOR,
	.minor			= BFIN_SERIAL_MINOR,
1195
	.nr			= BFIN_UART_NR_PORTS,
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	.cons			= BFIN_SERIAL_CONSOLE,
};

1199
static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
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{
1201
	struct bfin_serial_port *uart = platform_get_drvdata(pdev);
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1203 1204
	return uart_suspend_port(&bfin_serial_reg, &uart->port);
}
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1206 1207 1208 1209 1210
static int bfin_serial_resume(struct platform_device *pdev)
{
	struct bfin_serial_port *uart = platform_get_drvdata(pdev);

	return uart_resume_port(&bfin_serial_reg, &uart->port);
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}

1213
static int bfin_serial_probe(struct platform_device *pdev)
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1214
{
1215 1216 1217
	struct resource *res;
	struct bfin_serial_port *uart = NULL;
	int ret = 0;
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1219 1220 1221
	if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
		dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
		return -ENOENT;
1222
	}
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1224
	if (bfin_serial_ports[pdev->id] == NULL) {
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1226 1227 1228 1229 1230 1231 1232
		uart = kzalloc(sizeof(*uart), GFP_KERNEL);
		if (!uart) {
			dev_err(&pdev->dev,
				"fail to malloc bfin_serial_port\n");
			return -ENOMEM;
		}
		bfin_serial_ports[pdev->id] = uart;
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1234 1235 1236 1237 1238 1239 1240 1241 1242
#ifdef CONFIG_EARLY_PRINTK
		if (!(bfin_earlyprintk_port.port.membase
			&& bfin_earlyprintk_port.port.line == pdev->id)) {
			/*
			 * If the peripheral PINs of current port is allocated
			 * in earlyprintk probe stage, don't do it again.
			 */
#endif
		ret = peripheral_request_list(
1243
			dev_get_platdata(&pdev->dev),
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			DRIVER_NAME);
1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268
		if (ret) {
			dev_err(&pdev->dev,
				"fail to request bfin serial peripherals\n");
			goto out_error_free_mem;
		}
#ifdef CONFIG_EARLY_PRINTK
		}
#endif

		spin_lock_init(&uart->port.lock);
		uart->port.uartclk   = get_sclk();
		uart->port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
		uart->port.ops       = &bfin_serial_pops;
		uart->port.line      = pdev->id;
		uart->port.iotype    = UPIO_MEM;
		uart->port.flags     = UPF_BOOT_AUTOCONF;

		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
		if (res == NULL) {
			dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
			ret = -ENOENT;
			goto out_error_free_peripherals;
		}

1269
		uart->port.membase = ioremap(res->start, resource_size(res));
1270 1271 1272 1273 1274 1275
		if (!uart->port.membase) {
			dev_err(&pdev->dev, "Cannot map uart IO\n");
			ret = -ENXIO;
			goto out_error_free_peripherals;
		}
		uart->port.mapbase = res->start;
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1277 1278 1279
		uart->tx_irq = platform_get_irq(pdev, 0);
		if (uart->tx_irq < 0) {
			dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1280 1281
			ret = -ENOENT;
			goto out_error_unmap;
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1282
		}
1283

1284 1285 1286 1287 1288 1289 1290 1291 1292
		uart->rx_irq = platform_get_irq(pdev, 1);
		if (uart->rx_irq < 0) {
			dev_err(&pdev->dev, "No uart RX IRQ specified\n");
			ret = -ENOENT;
			goto out_error_unmap;
		}
		uart->port.irq = uart->rx_irq;

		uart->status_irq = platform_get_irq(pdev, 2);
1293 1294 1295 1296 1297 1298 1299
		if (uart->status_irq < 0) {
			dev_err(&pdev->dev, "No uart status IRQ specified\n");
			ret = -ENOENT;
			goto out_error_unmap;
		}

#ifdef CONFIG_SERIAL_BFIN_DMA
1300
		spin_lock_init(&uart->rx_lock);
1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327
		uart->tx_done	    = 1;
		uart->tx_count	    = 0;

		res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
		if (res == NULL) {
			dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
			ret = -ENOENT;
			goto out_error_unmap;
		}
		uart->tx_dma_channel = res->start;

		res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
		if (res == NULL) {
			dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
			ret = -ENOENT;
			goto out_error_unmap;
		}
		uart->rx_dma_channel = res->start;

		init_timer(&(uart->rx_dma_timer));
#endif

#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
	defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
		res = platform_get_resource(pdev, IORESOURCE_IO, 0);
		if (res == NULL)
			uart->cts_pin = -1;
1328
		else
1329 1330 1331 1332 1333 1334 1335 1336
			uart->cts_pin = res->start;

		res = platform_get_resource(pdev, IORESOURCE_IO, 1);
		if (res == NULL)
			uart->rts_pin = -1;
		else
			uart->rts_pin = res->start;
#endif
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	}

1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356
#ifdef CONFIG_SERIAL_BFIN_CONSOLE
	if (!is_early_platform_device(pdev)) {
#endif
		uart = bfin_serial_ports[pdev->id];
		uart->port.dev = &pdev->dev;
		dev_set_drvdata(&pdev->dev, uart);
		ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
#ifdef CONFIG_SERIAL_BFIN_CONSOLE
	}
#endif

	if (!ret)
		return 0;

	if (uart) {
out_error_unmap:
		iounmap(uart->port.membase);
out_error_free_peripherals:
1357
		peripheral_free_list(dev_get_platdata(&pdev->dev));
1358 1359 1360 1361 1362 1363
out_error_free_mem:
		kfree(uart);
		bfin_serial_ports[pdev->id] = NULL;
	}

	return ret;
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}

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static int bfin_serial_remove(struct platform_device *pdev)
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1367
{
1368 1369 1370 1371 1372 1373 1374
	struct bfin_serial_port *uart = platform_get_drvdata(pdev);

	dev_set_drvdata(&pdev->dev, NULL);

	if (uart) {
		uart_remove_one_port(&bfin_serial_reg, &uart->port);
		iounmap(uart->port.membase);
1375
		peripheral_free_list(dev_get_platdata(&pdev->dev));
1376 1377
		kfree(uart);
		bfin_serial_ports[pdev->id] = NULL;
1378
	}
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1379 1380 1381 1382 1383 1384

	return 0;
}

static struct platform_driver bfin_serial_driver = {
	.probe		= bfin_serial_probe,
1385
	.remove		= bfin_serial_remove,
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	.suspend	= bfin_serial_suspend,
	.resume		= bfin_serial_resume,
	.driver		= {
1389
		.name	= DRIVER_NAME,
1390
		.owner	= THIS_MODULE,
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	},
};

1394
#if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1395
static struct early_platform_driver early_bfin_serial_driver __initdata = {
1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419
	.class_str = CLASS_BFIN_CONSOLE,
	.pdrv = &bfin_serial_driver,
	.requested_id = EARLY_PLATFORM_ID_UNSET,
};

static int __init bfin_serial_rs_console_init(void)
{
	early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);

	early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);

	register_console(&bfin_serial_console);

	return 0;
}
console_initcall(bfin_serial_rs_console_init);
#endif

#ifdef CONFIG_EARLY_PRINTK
/*
 * Memory can't be allocated dynamically during earlyprink init stage.
 * So, do individual probe for earlyprink with a static uart port variable.
 */
static int bfin_earlyprintk_probe(struct platform_device *pdev)
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1420
{
1421
	struct resource *res;
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1422 1423
	int ret;

1424 1425 1426 1427 1428
	if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
		dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
		return -ENOENT;
	}

1429 1430
	ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
					DRIVER_NAME);
1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444
	if (ret) {
		dev_err(&pdev->dev,
				"fail to request bfin serial peripherals\n");
			return ret;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (res == NULL) {
		dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
		ret = -ENOENT;
		goto out_error_free_peripherals;
	}

	bfin_earlyprintk_port.port.membase = ioremap(res->start,
1445
						     resource_size(res));
1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459
	if (!bfin_earlyprintk_port.port.membase) {
		dev_err(&pdev->dev, "Cannot map uart IO\n");
		ret = -ENXIO;
		goto out_error_free_peripherals;
	}
	bfin_earlyprintk_port.port.mapbase = res->start;
	bfin_earlyprintk_port.port.line = pdev->id;
	bfin_earlyprintk_port.port.uartclk = get_sclk();
	bfin_earlyprintk_port.port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
	spin_lock_init(&bfin_earlyprintk_port.port.lock);

	return 0;

out_error_free_peripherals:
1460
	peripheral_free_list(dev_get_platdata(&pdev->dev));
1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472

	return ret;
}

static struct platform_driver bfin_earlyprintk_driver = {
	.probe		= bfin_earlyprintk_probe,
	.driver		= {
		.name	= DRIVER_NAME,
		.owner	= THIS_MODULE,
	},
};

1473
static struct early_platform_driver early_bfin_earlyprintk_driver __initdata = {
1474 1475 1476 1477 1478 1479 1480 1481 1482 1483
	.class_str = CLASS_BFIN_EARLYPRINTK,
	.pdrv = &bfin_earlyprintk_driver,
	.requested_id = EARLY_PLATFORM_ID_UNSET,
};

struct console __init *bfin_earlyserial_init(unsigned int port,
						unsigned int cflag)
{
	struct ktermios t;
	char port_name[20];
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1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524
	if (port < 0 || port >= BFIN_UART_NR_PORTS)
		return NULL;

	/*
	 * Only probe resource of the given port in earlyprintk boot arg.
	 * The expected port id should be indicated in port name string.
	 */
	snprintf(port_name, 20, DRIVER_NAME ".%d", port);
	early_platform_driver_register(&early_bfin_earlyprintk_driver,
		port_name);
	early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);

	if (!bfin_earlyprintk_port.port.membase)
		return NULL;

#ifdef CONFIG_SERIAL_BFIN_CONSOLE
	/*
	 * If we are using early serial, don't let the normal console rewind
	 * log buffer, since that causes things to be printed multiple times
	 */
	bfin_serial_console.flags &= ~CON_PRINTBUFFER;
#endif

	bfin_early_serial_console.index = port;
	t.c_cflag = cflag;
	t.c_iflag = 0;
	t.c_oflag = 0;
	t.c_lflag = ICANON;
	t.c_line = port;
	bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);

	return &bfin_early_serial_console;
}
#endif /* CONFIG_EARLY_PRINTK */

static int __init bfin_serial_init(void)
{
	int ret;

	pr_info("Blackfin serial driver\n");
B
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1525 1526

	ret = uart_register_driver(&bfin_serial_reg);
1527 1528 1529 1530 1531 1532 1533 1534 1535
	if (ret) {
		pr_err("failed to register %s:%d\n",
			bfin_serial_reg.driver_name, ret);
	}

	ret = platform_driver_register(&bfin_serial_driver);
	if (ret) {
		pr_err("fail to register bfin uart\n");
		uart_unregister_driver(&bfin_serial_reg);
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1536
	}
1537

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1538 1539 1540 1541 1542 1543 1544 1545 1546
	return ret;
}

static void __exit bfin_serial_exit(void)
{
	platform_driver_unregister(&bfin_serial_driver);
	uart_unregister_driver(&bfin_serial_reg);
}

1547

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module_init(bfin_serial_init);
module_exit(bfin_serial_exit);

1551
MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
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1552 1553 1554
MODULE_DESCRIPTION("Blackfin generic serial port driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1555
MODULE_ALIAS("platform:bfin-uart");