mr.c 45.4 KB
Newer Older
1
/*
2
 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */


#include <linux/kref.h>
#include <linux/random.h>
#include <linux/debugfs.h>
#include <linux/export.h>
E
Eli Cohen 已提交
38
#include <linux/delay.h>
39
#include <rdma/ib_umem.h>
40
#include <rdma/ib_umem_odp.h>
41
#include <rdma/ib_verbs.h>
42 43 44
#include "mlx5_ib.h"

enum {
E
Eli Cohen 已提交
45
	MAX_PENDING_REG_MR = 8,
46 47
};

48
#define MLX5_UMR_ALIGN 2048
49

50 51
static int clean_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr);
static int dereg_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr);
52
static int mr_cache_max_order(struct mlx5_ib_dev *dev);
53
static int unreg_umr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr);
54

55 56
static int destroy_mkey(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
{
57
	int err = mlx5_core_destroy_mkey(dev->mdev, &mr->mmkey);
58 59 60 61 62 63 64 65 66

#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
	/* Wait until all page fault handlers using the mr complete. */
	synchronize_srcu(&dev->mr_srcu);
#endif

	return err;
}

67 68 69 70 71 72 73 74 75 76
static int order2idx(struct mlx5_ib_dev *dev, int order)
{
	struct mlx5_mr_cache *cache = &dev->cache;

	if (order < cache->ent[0].order)
		return 0;
	else
		return order - cache->ent[0].order;
}

77 78 79 80 81 82
static bool use_umr_mtt_update(struct mlx5_ib_mr *mr, u64 start, u64 length)
{
	return ((u64)1 << mr->order) * MLX5_ADAPTER_PAGE_SIZE >=
		length + (start & (MLX5_ADAPTER_PAGE_SIZE - 1));
}

83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110
#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
static void update_odp_mr(struct mlx5_ib_mr *mr)
{
	if (mr->umem->odp_data) {
		/*
		 * This barrier prevents the compiler from moving the
		 * setting of umem->odp_data->private to point to our
		 * MR, before reg_umr finished, to ensure that the MR
		 * initialization have finished before starting to
		 * handle invalidations.
		 */
		smp_wmb();
		mr->umem->odp_data->private = mr;
		/*
		 * Make sure we will see the new
		 * umem->odp_data->private value in the invalidation
		 * routines, before we can get page faults on the
		 * MR. Page faults can happen once we put the MR in
		 * the tree, below this line. Without the barrier,
		 * there can be a fault handling and an invalidation
		 * before umem->odp_data->private == mr is visible to
		 * the invalidation handler.
		 */
		smp_wmb();
	}
}
#endif

E
Eli Cohen 已提交
111 112 113 114 115 116 117 118 119
static void reg_mr_callback(int status, void *context)
{
	struct mlx5_ib_mr *mr = context;
	struct mlx5_ib_dev *dev = mr->dev;
	struct mlx5_mr_cache *cache = &dev->cache;
	int c = order2idx(dev, mr->order);
	struct mlx5_cache_ent *ent = &cache->ent[c];
	u8 key;
	unsigned long flags;
120
	struct mlx5_mkey_table *table = &dev->mdev->priv.mkey_table;
121
	int err;
E
Eli Cohen 已提交
122 123 124 125 126 127 128 129 130 131 132 133

	spin_lock_irqsave(&ent->lock, flags);
	ent->pending--;
	spin_unlock_irqrestore(&ent->lock, flags);
	if (status) {
		mlx5_ib_warn(dev, "async reg mr failed. status %d\n", status);
		kfree(mr);
		dev->fill_delay = 1;
		mod_timer(&dev->delay_timer, jiffies + HZ);
		return;
	}

A
Artemy Kovalyov 已提交
134
	mr->mmkey.type = MLX5_MKEY_MR;
135 136 137
	spin_lock_irqsave(&dev->mdev->priv.mkey_lock, flags);
	key = dev->mdev->priv.mkey_key++;
	spin_unlock_irqrestore(&dev->mdev->priv.mkey_lock, flags);
138
	mr->mmkey.key = mlx5_idx_to_mkey(MLX5_GET(create_mkey_out, mr->out, mkey_index)) | key;
E
Eli Cohen 已提交
139 140 141 142 143 144 145 146

	cache->last_add = jiffies;

	spin_lock_irqsave(&ent->lock, flags);
	list_add_tail(&mr->list, &ent->head);
	ent->cur++;
	ent->size++;
	spin_unlock_irqrestore(&ent->lock, flags);
147 148

	write_lock_irqsave(&table->lock, flags);
149 150
	err = radix_tree_insert(&table->tree, mlx5_base_mkey(mr->mmkey.key),
				&mr->mmkey);
151
	if (err)
152
		pr_err("Error inserting to mkey tree. 0x%x\n", -err);
153
	write_unlock_irqrestore(&table->lock, flags);
154 155 156

	if (!completion_done(&ent->compl))
		complete(&ent->compl);
E
Eli Cohen 已提交
157 158
}

159 160 161 162
static int add_keys(struct mlx5_ib_dev *dev, int c, int num)
{
	struct mlx5_mr_cache *cache = &dev->cache;
	struct mlx5_cache_ent *ent = &cache->ent[c];
163
	int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
164
	struct mlx5_ib_mr *mr;
165 166
	void *mkc;
	u32 *in;
167 168 169
	int err = 0;
	int i;

170
	in = kzalloc(inlen, GFP_KERNEL);
171 172 173
	if (!in)
		return -ENOMEM;

174
	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
175
	for (i = 0; i < num; i++) {
E
Eli Cohen 已提交
176 177 178 179 180
		if (ent->pending >= MAX_PENDING_REG_MR) {
			err = -EAGAIN;
			break;
		}

181 182 183
		mr = kzalloc(sizeof(*mr), GFP_KERNEL);
		if (!mr) {
			err = -ENOMEM;
E
Eli Cohen 已提交
184
			break;
185 186
		}
		mr->order = ent->order;
187
		mr->allocated_from_cache = 1;
E
Eli Cohen 已提交
188
		mr->dev = dev;
189 190 191

		MLX5_SET(mkc, mkc, free, 1);
		MLX5_SET(mkc, mkc, umr_en, 1);
192
		MLX5_SET(mkc, mkc, access_mode, ent->access_mode);
193 194

		MLX5_SET(mkc, mkc, qpn, 0xffffff);
195 196
		MLX5_SET(mkc, mkc, translations_octword_size, ent->xlt);
		MLX5_SET(mkc, mkc, log_page_size, ent->page);
197

E
Eli Cohen 已提交
198 199 200
		spin_lock_irq(&ent->lock);
		ent->pending++;
		spin_unlock_irq(&ent->lock);
201 202 203 204
		err = mlx5_core_create_mkey_cb(dev->mdev, &mr->mmkey,
					       in, inlen,
					       mr->out, sizeof(mr->out),
					       reg_mr_callback, mr);
205
		if (err) {
E
Eli Cohen 已提交
206 207 208
			spin_lock_irq(&ent->lock);
			ent->pending--;
			spin_unlock_irq(&ent->lock);
209 210
			mlx5_ib_warn(dev, "create mkey failed %d\n", err);
			kfree(mr);
E
Eli Cohen 已提交
211
			break;
212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227
		}
	}

	kfree(in);
	return err;
}

static void remove_keys(struct mlx5_ib_dev *dev, int c, int num)
{
	struct mlx5_mr_cache *cache = &dev->cache;
	struct mlx5_cache_ent *ent = &cache->ent[c];
	struct mlx5_ib_mr *mr;
	int err;
	int i;

	for (i = 0; i < num; i++) {
E
Eli Cohen 已提交
228
		spin_lock_irq(&ent->lock);
229
		if (list_empty(&ent->head)) {
E
Eli Cohen 已提交
230
			spin_unlock_irq(&ent->lock);
231 232 233 234 235 236
			return;
		}
		mr = list_first_entry(&ent->head, struct mlx5_ib_mr, list);
		list_del(&mr->list);
		ent->cur--;
		ent->size--;
E
Eli Cohen 已提交
237
		spin_unlock_irq(&ent->lock);
238
		err = destroy_mkey(dev, mr);
239
		if (err)
240
			mlx5_ib_warn(dev, "failed destroy mkey\n");
241
		else
242 243 244 245 246 247 248 249 250 251 252 253 254 255 256
			kfree(mr);
	}
}

static ssize_t size_write(struct file *filp, const char __user *buf,
			  size_t count, loff_t *pos)
{
	struct mlx5_cache_ent *ent = filp->private_data;
	struct mlx5_ib_dev *dev = ent->dev;
	char lbuf[20];
	u32 var;
	int err;
	int c;

	if (copy_from_user(lbuf, buf, sizeof(lbuf)))
257
		return -EFAULT;
258 259 260 261 262 263 264 265 266 267 268

	c = order2idx(dev, ent->order);
	lbuf[sizeof(lbuf) - 1] = 0;

	if (sscanf(lbuf, "%u", &var) != 1)
		return -EINVAL;

	if (var < ent->limit)
		return -EINVAL;

	if (var > ent->size) {
E
Eli Cohen 已提交
269 270 271 272 273 274 275
		do {
			err = add_keys(dev, c, var - ent->size);
			if (err && err != -EAGAIN)
				return err;

			usleep_range(3000, 5000);
		} while (err);
276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297
	} else if (var < ent->size) {
		remove_keys(dev, c, ent->size - var);
	}

	return count;
}

static ssize_t size_read(struct file *filp, char __user *buf, size_t count,
			 loff_t *pos)
{
	struct mlx5_cache_ent *ent = filp->private_data;
	char lbuf[20];
	int err;

	if (*pos)
		return 0;

	err = snprintf(lbuf, sizeof(lbuf), "%d\n", ent->size);
	if (err < 0)
		return err;

	if (copy_to_user(buf, lbuf, err))
298
		return -EFAULT;
299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322

	*pos += err;

	return err;
}

static const struct file_operations size_fops = {
	.owner	= THIS_MODULE,
	.open	= simple_open,
	.write	= size_write,
	.read	= size_read,
};

static ssize_t limit_write(struct file *filp, const char __user *buf,
			   size_t count, loff_t *pos)
{
	struct mlx5_cache_ent *ent = filp->private_data;
	struct mlx5_ib_dev *dev = ent->dev;
	char lbuf[20];
	u32 var;
	int err;
	int c;

	if (copy_from_user(lbuf, buf, sizeof(lbuf)))
323
		return -EFAULT;
324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359

	c = order2idx(dev, ent->order);
	lbuf[sizeof(lbuf) - 1] = 0;

	if (sscanf(lbuf, "%u", &var) != 1)
		return -EINVAL;

	if (var > ent->size)
		return -EINVAL;

	ent->limit = var;

	if (ent->cur < ent->limit) {
		err = add_keys(dev, c, 2 * ent->limit - ent->cur);
		if (err)
			return err;
	}

	return count;
}

static ssize_t limit_read(struct file *filp, char __user *buf, size_t count,
			  loff_t *pos)
{
	struct mlx5_cache_ent *ent = filp->private_data;
	char lbuf[20];
	int err;

	if (*pos)
		return 0;

	err = snprintf(lbuf, sizeof(lbuf), "%d\n", ent->limit);
	if (err < 0)
		return err;

	if (copy_to_user(buf, lbuf, err))
360
		return -EFAULT;
361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390

	*pos += err;

	return err;
}

static const struct file_operations limit_fops = {
	.owner	= THIS_MODULE,
	.open	= simple_open,
	.write	= limit_write,
	.read	= limit_read,
};

static int someone_adding(struct mlx5_mr_cache *cache)
{
	int i;

	for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
		if (cache->ent[i].cur < cache->ent[i].limit)
			return 1;
	}

	return 0;
}

static void __cache_work_func(struct mlx5_cache_ent *ent)
{
	struct mlx5_ib_dev *dev = ent->dev;
	struct mlx5_mr_cache *cache = &dev->cache;
	int i = order2idx(dev, ent->order);
E
Eli Cohen 已提交
391
	int err;
392 393 394 395 396

	if (cache->stopped)
		return;

	ent = &dev->cache.ent[i];
E
Eli Cohen 已提交
397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413
	if (ent->cur < 2 * ent->limit && !dev->fill_delay) {
		err = add_keys(dev, i, 1);
		if (ent->cur < 2 * ent->limit) {
			if (err == -EAGAIN) {
				mlx5_ib_dbg(dev, "returned eagain, order %d\n",
					    i + 2);
				queue_delayed_work(cache->wq, &ent->dwork,
						   msecs_to_jiffies(3));
			} else if (err) {
				mlx5_ib_warn(dev, "command failed order %d, err %d\n",
					     i + 2, err);
				queue_delayed_work(cache->wq, &ent->dwork,
						   msecs_to_jiffies(1000));
			} else {
				queue_work(cache->wq, &ent->work);
			}
		}
414
	} else if (ent->cur > 2 * ent->limit) {
415 416 417 418 419 420 421 422 423 424 425 426 427
		/*
		 * The remove_keys() logic is performed as garbage collection
		 * task. Such task is intended to be run when no other active
		 * processes are running.
		 *
		 * The need_resched() will return TRUE if there are user tasks
		 * to be activated in near future.
		 *
		 * In such case, we don't execute remove_keys() and postpone
		 * the garbage collection work to try to run in next cycle,
		 * in order to free CPU resources to other tasks.
		 */
		if (!need_resched() && !someone_adding(cache) &&
E
Eli Cohen 已提交
428
		    time_after(jiffies, cache->last_add + 300 * HZ)) {
429 430 431 432
			remove_keys(dev, i, 1);
			if (ent->cur > ent->limit)
				queue_work(cache->wq, &ent->work);
		} else {
E
Eli Cohen 已提交
433
			queue_delayed_work(cache->wq, &ent->dwork, 300 * HZ);
434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453
		}
	}
}

static void delayed_cache_work_func(struct work_struct *work)
{
	struct mlx5_cache_ent *ent;

	ent = container_of(work, struct mlx5_cache_ent, dwork.work);
	__cache_work_func(ent);
}

static void cache_work_func(struct work_struct *work)
{
	struct mlx5_cache_ent *ent;

	ent = container_of(work, struct mlx5_cache_ent, work);
	__cache_work_func(ent);
}

454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472
struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev, int entry)
{
	struct mlx5_mr_cache *cache = &dev->cache;
	struct mlx5_cache_ent *ent;
	struct mlx5_ib_mr *mr;
	int err;

	if (entry < 0 || entry >= MAX_MR_CACHE_ENTRIES) {
		mlx5_ib_err(dev, "cache entry %d is out of range\n", entry);
		return NULL;
	}

	ent = &cache->ent[entry];
	while (1) {
		spin_lock_irq(&ent->lock);
		if (list_empty(&ent->head)) {
			spin_unlock_irq(&ent->lock);

			err = add_keys(dev, entry, 1);
473
			if (err && err != -EAGAIN)
474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489
				return ERR_PTR(err);

			wait_for_completion(&ent->compl);
		} else {
			mr = list_first_entry(&ent->head, struct mlx5_ib_mr,
					      list);
			list_del(&mr->list);
			ent->cur--;
			spin_unlock_irq(&ent->lock);
			if (ent->cur < ent->limit)
				queue_work(cache->wq, &ent->work);
			return mr;
		}
	}
}

490 491 492 493 494
static struct mlx5_ib_mr *alloc_cached_mr(struct mlx5_ib_dev *dev, int order)
{
	struct mlx5_mr_cache *cache = &dev->cache;
	struct mlx5_ib_mr *mr = NULL;
	struct mlx5_cache_ent *ent;
495
	int last_umr_cache_entry;
496 497 498 499
	int c;
	int i;

	c = order2idx(dev, order);
500
	last_umr_cache_entry = order2idx(dev, mr_cache_max_order(dev));
501
	if (c < 0 || c > last_umr_cache_entry) {
502 503 504 505
		mlx5_ib_warn(dev, "order %d, cache index %d\n", order, c);
		return NULL;
	}

506
	for (i = c; i <= last_umr_cache_entry; i++) {
507 508 509 510
		ent = &cache->ent[i];

		mlx5_ib_dbg(dev, "order %d, cache index %d\n", ent->order, i);

E
Eli Cohen 已提交
511
		spin_lock_irq(&ent->lock);
512 513 514 515 516
		if (!list_empty(&ent->head)) {
			mr = list_first_entry(&ent->head, struct mlx5_ib_mr,
					      list);
			list_del(&mr->list);
			ent->cur--;
E
Eli Cohen 已提交
517
			spin_unlock_irq(&ent->lock);
518 519 520 521
			if (ent->cur < ent->limit)
				queue_work(cache->wq, &ent->work);
			break;
		}
E
Eli Cohen 已提交
522
		spin_unlock_irq(&ent->lock);
523 524 525 526 527 528 529 530 531 532

		queue_work(cache->wq, &ent->work);
	}

	if (!mr)
		cache->ent[c].miss++;

	return mr;
}

533
void mlx5_mr_cache_free(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
534 535 536 537 538 539 540 541 542 543 544
{
	struct mlx5_mr_cache *cache = &dev->cache;
	struct mlx5_cache_ent *ent;
	int shrink = 0;
	int c;

	c = order2idx(dev, mr->order);
	if (c < 0 || c >= MAX_MR_CACHE_ENTRIES) {
		mlx5_ib_warn(dev, "order %d, cache index %d\n", mr->order, c);
		return;
	}
545 546 547 548

	if (unreg_umr(dev, mr))
		return;

549
	ent = &cache->ent[c];
E
Eli Cohen 已提交
550
	spin_lock_irq(&ent->lock);
551 552 553 554
	list_add_tail(&mr->list, &ent->head);
	ent->cur++;
	if (ent->cur > 2 * ent->limit)
		shrink = 1;
E
Eli Cohen 已提交
555
	spin_unlock_irq(&ent->lock);
556 557 558 559 560 561 562 563 564 565 566 567

	if (shrink)
		queue_work(cache->wq, &ent->work);
}

static void clean_keys(struct mlx5_ib_dev *dev, int c)
{
	struct mlx5_mr_cache *cache = &dev->cache;
	struct mlx5_cache_ent *ent = &cache->ent[c];
	struct mlx5_ib_mr *mr;
	int err;

568
	cancel_delayed_work(&ent->dwork);
569
	while (1) {
E
Eli Cohen 已提交
570
		spin_lock_irq(&ent->lock);
571
		if (list_empty(&ent->head)) {
E
Eli Cohen 已提交
572
			spin_unlock_irq(&ent->lock);
573 574 575 576 577 578
			return;
		}
		mr = list_first_entry(&ent->head, struct mlx5_ib_mr, list);
		list_del(&mr->list);
		ent->cur--;
		ent->size--;
E
Eli Cohen 已提交
579
		spin_unlock_irq(&ent->lock);
580
		err = destroy_mkey(dev, mr);
581
		if (err)
582
			mlx5_ib_warn(dev, "failed destroy mkey\n");
583
		else
584 585 586 587
			kfree(mr);
	}
}

588 589
static void mlx5_mr_cache_debugfs_cleanup(struct mlx5_ib_dev *dev)
{
590
	if (!mlx5_debugfs_root || dev->rep)
591 592 593 594 595 596
		return;

	debugfs_remove_recursive(dev->cache.root);
	dev->cache.root = NULL;
}

597 598 599 600 601 602
static int mlx5_mr_cache_debugfs_init(struct mlx5_ib_dev *dev)
{
	struct mlx5_mr_cache *cache = &dev->cache;
	struct mlx5_cache_ent *ent;
	int i;

603
	if (!mlx5_debugfs_root || dev->rep)
604 605
		return 0;

606
	cache->root = debugfs_create_dir("mr_cache", dev->mdev->priv.dbg_root);
607 608 609 610 611 612 613 614
	if (!cache->root)
		return -ENOMEM;

	for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
		ent = &cache->ent[i];
		sprintf(ent->name, "%d", ent->order);
		ent->dir = debugfs_create_dir(ent->name,  cache->root);
		if (!ent->dir)
615
			goto err;
616 617 618 619

		ent->fsize = debugfs_create_file("size", 0600, ent->dir, ent,
						 &size_fops);
		if (!ent->fsize)
620
			goto err;
621 622 623 624

		ent->flimit = debugfs_create_file("limit", 0600, ent->dir, ent,
						  &limit_fops);
		if (!ent->flimit)
625
			goto err;
626 627 628 629

		ent->fcur = debugfs_create_u32("cur", 0400, ent->dir,
					       &ent->cur);
		if (!ent->fcur)
630
			goto err;
631 632 633 634

		ent->fmiss = debugfs_create_u32("miss", 0600, ent->dir,
						&ent->miss);
		if (!ent->fmiss)
635
			goto err;
636 637 638
	}

	return 0;
639 640
err:
	mlx5_mr_cache_debugfs_cleanup(dev);
641

642
	return -ENOMEM;
643 644
}

645
static void delay_time_func(struct timer_list *t)
E
Eli Cohen 已提交
646
{
647
	struct mlx5_ib_dev *dev = from_timer(dev, t, delay_timer);
E
Eli Cohen 已提交
648 649 650 651

	dev->fill_delay = 0;
}

652 653 654 655 656 657 658
int mlx5_mr_cache_init(struct mlx5_ib_dev *dev)
{
	struct mlx5_mr_cache *cache = &dev->cache;
	struct mlx5_cache_ent *ent;
	int err;
	int i;

659
	mutex_init(&dev->slow_path_mutex);
660
	cache->wq = alloc_ordered_workqueue("mkey_cache", WQ_MEM_RECLAIM);
661 662 663 664 665
	if (!cache->wq) {
		mlx5_ib_warn(dev, "failed to create work queue\n");
		return -ENOMEM;
	}

666
	timer_setup(&dev->delay_timer, delay_time_func, 0);
667 668 669 670 671 672
	for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
		ent = &cache->ent[i];
		INIT_LIST_HEAD(&ent->head);
		spin_lock_init(&ent->lock);
		ent->order = i + 2;
		ent->dev = dev;
673
		ent->limit = 0;
674

675
		init_completion(&ent->compl);
676 677 678
		INIT_WORK(&ent->work, cache_work_func);
		INIT_DELAYED_WORK(&ent->dwork, delayed_cache_work_func);
		queue_work(cache->wq, &ent->work);
679

680
		if (i > MR_CACHE_LAST_STD_ENTRY) {
681
			mlx5_odp_init_mr_cache_entry(ent);
682
			continue;
683
		}
684

685
		if (ent->order > mr_cache_max_order(dev))
686 687 688 689 690 691 692
			continue;

		ent->page = PAGE_SHIFT;
		ent->xlt = (1 << ent->order) * sizeof(struct mlx5_mtt) /
			   MLX5_IB_UMR_OCTOWORD;
		ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
		if ((dev->mdev->profile->mask & MLX5_PROF_MASK_MR_CACHE) &&
693
		    !dev->rep &&
694 695 696 697
		    mlx5_core_is_pf(dev->mdev))
			ent->limit = dev->mdev->profile->mr_cache[i].limit;
		else
			ent->limit = 0;
698 699 700 701 702 703
	}

	err = mlx5_mr_cache_debugfs_init(dev);
	if (err)
		mlx5_ib_warn(dev, "cache debugfs failure\n");

704 705 706 707 708
	/*
	 * We don't want to fail driver if debugfs failed to initialize,
	 * so we are not forwarding error to the user.
	 */

709 710 711
	return 0;
}

712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738
static void wait_for_async_commands(struct mlx5_ib_dev *dev)
{
	struct mlx5_mr_cache *cache = &dev->cache;
	struct mlx5_cache_ent *ent;
	int total = 0;
	int i;
	int j;

	for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
		ent = &cache->ent[i];
		for (j = 0 ; j < 1000; j++) {
			if (!ent->pending)
				break;
			msleep(50);
		}
	}
	for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++) {
		ent = &cache->ent[i];
		total += ent->pending;
	}

	if (total)
		mlx5_ib_warn(dev, "aborted while there are %d pending mr requests\n", total);
	else
		mlx5_ib_warn(dev, "done with all pending requests\n");
}

739 740 741 742 743
int mlx5_mr_cache_cleanup(struct mlx5_ib_dev *dev)
{
	int i;

	dev->cache.stopped = 1;
744
	flush_workqueue(dev->cache.wq);
745 746 747 748 749 750

	mlx5_mr_cache_debugfs_cleanup(dev);

	for (i = 0; i < MAX_MR_CACHE_ENTRIES; i++)
		clean_keys(dev, i);

751
	destroy_workqueue(dev->cache.wq);
752
	wait_for_async_commands(dev);
E
Eli Cohen 已提交
753
	del_timer_sync(&dev->delay_timer);
754

755 756 757 758 759 760
	return 0;
}

struct ib_mr *mlx5_ib_get_dma_mr(struct ib_pd *pd, int acc)
{
	struct mlx5_ib_dev *dev = to_mdev(pd->device);
761
	int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
762
	struct mlx5_core_dev *mdev = dev->mdev;
763
	struct mlx5_ib_mr *mr;
764 765
	void *mkc;
	u32 *in;
766 767 768 769 770 771
	int err;

	mr = kzalloc(sizeof(*mr), GFP_KERNEL);
	if (!mr)
		return ERR_PTR(-ENOMEM);

772
	in = kzalloc(inlen, GFP_KERNEL);
773 774 775 776 777
	if (!in) {
		err = -ENOMEM;
		goto err_free;
	}

778 779 780 781 782 783 784 785
	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);

	MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_PA);
	MLX5_SET(mkc, mkc, a, !!(acc & IB_ACCESS_REMOTE_ATOMIC));
	MLX5_SET(mkc, mkc, rw, !!(acc & IB_ACCESS_REMOTE_WRITE));
	MLX5_SET(mkc, mkc, rr, !!(acc & IB_ACCESS_REMOTE_READ));
	MLX5_SET(mkc, mkc, lw, !!(acc & IB_ACCESS_LOCAL_WRITE));
	MLX5_SET(mkc, mkc, lr, 1);
786

787 788 789 790 791 792
	MLX5_SET(mkc, mkc, length64, 1);
	MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
	MLX5_SET(mkc, mkc, qpn, 0xffffff);
	MLX5_SET64(mkc, mkc, start_addr, 0);

	err = mlx5_core_create_mkey(mdev, &mr->mmkey, in, inlen);
793 794 795 796
	if (err)
		goto err_in;

	kfree(in);
A
Artemy Kovalyov 已提交
797
	mr->mmkey.type = MLX5_MKEY_MR;
798 799
	mr->ibmr.lkey = mr->mmkey.key;
	mr->ibmr.rkey = mr->mmkey.key;
800 801 802 803 804 805 806 807 808 809 810 811 812
	mr->umem = NULL;

	return &mr->ibmr;

err_in:
	kfree(in);

err_free:
	kfree(mr);

	return ERR_PTR(err);
}

813
static int get_octo_len(u64 addr, u64 len, int page_shift)
814
{
815
	u64 page_size = 1ULL << page_shift;
816 817 818 819
	u64 offset;
	int npages;

	offset = addr & (page_size - 1);
820
	npages = ALIGN(len + offset, page_size) >> page_shift;
821 822 823
	return (npages + 1) / 2;
}

824
static int mr_cache_max_order(struct mlx5_ib_dev *dev)
825
{
826
	if (MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset))
827
		return MR_CACHE_LAST_STD_ENTRY + 2;
828 829 830
	return MLX5_MAX_UMR_SHIFT;
}

831 832 833 834
static int mr_umem_get(struct ib_pd *pd, u64 start, u64 length,
		       int access_flags, struct ib_umem **umem,
		       int *npages, int *page_shift, int *ncont,
		       int *order)
835 836
{
	struct mlx5_ib_dev *dev = to_mdev(pd->device);
837 838 839 840 841 842
	int err;

	*umem = ib_umem_get(pd->uobject->context, start, length,
			    access_flags, 0);
	err = PTR_ERR_OR_ZERO(*umem);
	if (err < 0) {
D
Dan Carpenter 已提交
843
		mlx5_ib_err(dev, "umem get failed (%d)\n", err);
844
		return err;
845 846
	}

847
	mlx5_ib_cont_pages(*umem, start, MLX5_MKEY_PAGE_SHIFT_MASK, npages,
848
			   page_shift, ncont, order);
849 850
	if (!*npages) {
		mlx5_ib_warn(dev, "avoid zero region\n");
851 852
		ib_umem_release(*umem);
		return -EINVAL;
853 854 855 856 857
	}

	mlx5_ib_dbg(dev, "npages %d, ncont %d, order %d, page_shift %d\n",
		    *npages, *ncont, *order, *page_shift);

858
	return 0;
859 860
}

861
static void mlx5_ib_umr_done(struct ib_cq *cq, struct ib_wc *wc)
862
{
863 864
	struct mlx5_ib_umr_context *context =
		container_of(wc->wr_cqe, struct mlx5_ib_umr_context, cqe);
865

866 867 868
	context->status = wc->status;
	complete(&context->done);
}
869

870 871 872 873 874
static inline void mlx5_ib_init_umr_context(struct mlx5_ib_umr_context *context)
{
	context->cqe.done = mlx5_ib_umr_done;
	context->status = -1;
	init_completion(&context->done);
875 876
}

877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903
static int mlx5_ib_post_send_wait(struct mlx5_ib_dev *dev,
				  struct mlx5_umr_wr *umrwr)
{
	struct umr_common *umrc = &dev->umrc;
	struct ib_send_wr *bad;
	int err;
	struct mlx5_ib_umr_context umr_context;

	mlx5_ib_init_umr_context(&umr_context);
	umrwr->wr.wr_cqe = &umr_context.cqe;

	down(&umrc->sem);
	err = ib_post_send(umrc->qp, &umrwr->wr, &bad);
	if (err) {
		mlx5_ib_warn(dev, "UMR post send failed, err %d\n", err);
	} else {
		wait_for_completion(&umr_context.done);
		if (umr_context.status != IB_WC_SUCCESS) {
			mlx5_ib_warn(dev, "reg umr failed (%u)\n",
				     umr_context.status);
			err = -EFAULT;
		}
	}
	up(&umrc->sem);
	return err;
}

904 905
static struct mlx5_ib_mr *alloc_mr_from_cache(
				  struct ib_pd *pd, struct ib_umem *umem,
906 907 908 909 910
				  u64 virt_addr, u64 len, int npages,
				  int page_shift, int order, int access_flags)
{
	struct mlx5_ib_dev *dev = to_mdev(pd->device);
	struct mlx5_ib_mr *mr;
911
	int err = 0;
912 913
	int i;

E
Eli Cohen 已提交
914
	for (i = 0; i < 1; i++) {
915 916 917 918 919
		mr = alloc_cached_mr(dev, order);
		if (mr)
			break;

		err = add_keys(dev, order2idx(dev, order), 1);
E
Eli Cohen 已提交
920 921
		if (err && err != -EAGAIN) {
			mlx5_ib_warn(dev, "add_keys failed, err %d\n", err);
922 923 924 925 926 927 928
			break;
		}
	}

	if (!mr)
		return ERR_PTR(-EAGAIN);

929 930 931 932
	mr->ibmr.pd = pd;
	mr->umem = umem;
	mr->access_flags = access_flags;
	mr->desc_size = sizeof(struct mlx5_mtt);
933 934 935
	mr->mmkey.iova = virt_addr;
	mr->mmkey.size = len;
	mr->mmkey.pd = to_mpd(pd)->pdn;
936

937 938 939
	return mr;
}

940 941 942
static inline int populate_xlt(struct mlx5_ib_mr *mr, int idx, int npages,
			       void *xlt, int page_shift, size_t size,
			       int flags)
943 944 945
{
	struct mlx5_ib_dev *dev = mr->dev;
	struct ib_umem *umem = mr->umem;
946 947 948 949
	if (flags & MLX5_IB_UPD_XLT_INDIRECT) {
		mlx5_odp_populate_klm(xlt, idx, npages, mr, flags);
		return npages;
	}
950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974

	npages = min_t(size_t, npages, ib_umem_num_pages(umem) - idx);

	if (!(flags & MLX5_IB_UPD_XLT_ZAP)) {
		__mlx5_ib_populate_pas(dev, umem, page_shift,
				       idx, npages, xlt,
				       MLX5_IB_MTT_PRESENT);
		/* Clear padding after the pages
		 * brought from the umem.
		 */
		memset(xlt + (npages * sizeof(struct mlx5_mtt)), 0,
		       size - npages * sizeof(struct mlx5_mtt));
	}

	return npages;
}

#define MLX5_MAX_UMR_CHUNK ((1 << (MLX5_MAX_UMR_SHIFT + 4)) - \
			    MLX5_UMR_MTT_ALIGNMENT)
#define MLX5_SPARE_UMR_CHUNK 0x10000

int mlx5_ib_update_xlt(struct mlx5_ib_mr *mr, u64 idx, int npages,
		       int page_shift, int flags)
{
	struct mlx5_ib_dev *dev = mr->dev;
975
	struct device *ddev = dev->ib_dev.dev.parent;
976
	struct mlx5_ib_ucontext *uctx = NULL;
977
	int size;
978
	void *xlt;
979
	dma_addr_t dma;
C
Christoph Hellwig 已提交
980
	struct mlx5_umr_wr wr;
981 982
	struct ib_sge sg;
	int err = 0;
983 984 985
	int desc_size = (flags & MLX5_IB_UPD_XLT_INDIRECT)
			       ? sizeof(struct mlx5_klm)
			       : sizeof(struct mlx5_mtt);
986 987
	const int page_align = MLX5_UMR_MTT_ALIGNMENT / desc_size;
	const int page_mask = page_align - 1;
988 989 990
	size_t pages_mapped = 0;
	size_t pages_to_map = 0;
	size_t pages_iter = 0;
991
	gfp_t gfp;
992 993

	/* UMR copies MTTs in units of MLX5_UMR_MTT_ALIGNMENT bytes,
994 995 996 997 998
	 * so we need to align the offset and length accordingly
	 */
	if (idx & page_mask) {
		npages += idx & page_mask;
		idx &= ~page_mask;
999 1000
	}

1001 1002
	gfp = flags & MLX5_IB_UPD_XLT_ATOMIC ? GFP_ATOMIC : GFP_KERNEL;
	gfp |= __GFP_ZERO | __GFP_NOWARN;
1003

1004 1005 1006
	pages_to_map = ALIGN(npages, page_align);
	size = desc_size * pages_to_map;
	size = min_t(int, size, MLX5_MAX_UMR_CHUNK);
1007

1008 1009 1010 1011 1012 1013 1014
	xlt = (void *)__get_free_pages(gfp, get_order(size));
	if (!xlt && size > MLX5_SPARE_UMR_CHUNK) {
		mlx5_ib_dbg(dev, "Failed to allocate %d bytes of order %d. fallback to spare UMR allocation od %d bytes\n",
			    size, get_order(size), MLX5_SPARE_UMR_CHUNK);

		size = MLX5_SPARE_UMR_CHUNK;
		xlt = (void *)__get_free_pages(gfp, get_order(size));
1015
	}
1016 1017

	if (!xlt) {
1018
		uctx = to_mucontext(mr->ibmr.pd->uobject->context);
1019 1020 1021 1022 1023 1024 1025 1026
		mlx5_ib_warn(dev, "Using XLT emergency buffer\n");
		size = PAGE_SIZE;
		xlt = (void *)uctx->upd_xlt_page;
		mutex_lock(&uctx->upd_xlt_page_mutex);
		memset(xlt, 0, size);
	}
	pages_iter = size / desc_size;
	dma = dma_map_single(ddev, xlt, size, DMA_TO_DEVICE);
1027
	if (dma_mapping_error(ddev, dma)) {
1028
		mlx5_ib_err(dev, "unable to map DMA during XLT update.\n");
1029
		err = -ENOMEM;
1030
		goto free_xlt;
1031 1032
	}

1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050
	sg.addr = dma;
	sg.lkey = dev->umrc.pd->local_dma_lkey;

	memset(&wr, 0, sizeof(wr));
	wr.wr.send_flags = MLX5_IB_SEND_UMR_UPDATE_XLT;
	if (!(flags & MLX5_IB_UPD_XLT_ENABLE))
		wr.wr.send_flags |= MLX5_IB_SEND_UMR_FAIL_IF_FREE;
	wr.wr.sg_list = &sg;
	wr.wr.num_sge = 1;
	wr.wr.opcode = MLX5_IB_WR_UMR;

	wr.pd = mr->ibmr.pd;
	wr.mkey = mr->mmkey.key;
	wr.length = mr->mmkey.size;
	wr.virt_addr = mr->mmkey.iova;
	wr.access_flags = mr->access_flags;
	wr.page_shift = page_shift;

1051 1052
	for (pages_mapped = 0;
	     pages_mapped < pages_to_map && !err;
1053
	     pages_mapped += pages_iter, idx += pages_iter) {
1054
		npages = min_t(int, pages_iter, pages_to_map - pages_mapped);
1055
		dma_sync_single_for_cpu(ddev, dma, size, DMA_TO_DEVICE);
1056
		npages = populate_xlt(mr, idx, npages, xlt,
1057
				      page_shift, size, flags);
1058 1059 1060

		dma_sync_single_for_device(ddev, dma, size, DMA_TO_DEVICE);

1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077
		sg.length = ALIGN(npages * desc_size,
				  MLX5_UMR_MTT_ALIGNMENT);

		if (pages_mapped + pages_iter >= pages_to_map) {
			if (flags & MLX5_IB_UPD_XLT_ENABLE)
				wr.wr.send_flags |=
					MLX5_IB_SEND_UMR_ENABLE_MR |
					MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS |
					MLX5_IB_SEND_UMR_UPDATE_TRANSLATION;
			if (flags & MLX5_IB_UPD_XLT_PD ||
			    flags & MLX5_IB_UPD_XLT_ACCESS)
				wr.wr.send_flags |=
					MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;
			if (flags & MLX5_IB_UPD_XLT_ADDR)
				wr.wr.send_flags |=
					MLX5_IB_SEND_UMR_UPDATE_TRANSLATION;
		}
1078

1079
		wr.offset = idx * desc_size;
1080
		wr.xlt_size = sg.length;
1081

1082
		err = mlx5_ib_post_send_wait(dev, &wr);
1083 1084 1085
	}
	dma_unmap_single(ddev, dma, size, DMA_TO_DEVICE);

1086 1087 1088
free_xlt:
	if (uctx)
		mutex_unlock(&uctx->upd_xlt_page_mutex);
1089
	else
1090
		free_pages((unsigned long)xlt, get_order(size));
1091 1092 1093 1094

	return err;
}

1095 1096 1097 1098 1099 1100 1101
/*
 * If ibmr is NULL it will be allocated by reg_create.
 * Else, the given ibmr will be used.
 */
static struct mlx5_ib_mr *reg_create(struct ib_mr *ibmr, struct ib_pd *pd,
				     u64 virt_addr, u64 length,
				     struct ib_umem *umem, int npages,
1102 1103
				     int page_shift, int access_flags,
				     bool populate)
1104 1105 1106
{
	struct mlx5_ib_dev *dev = to_mdev(pd->device);
	struct mlx5_ib_mr *mr;
1107 1108
	__be64 *pas;
	void *mkc;
1109
	int inlen;
1110
	u32 *in;
1111
	int err;
1112
	bool pg_cap = !!(MLX5_CAP_GEN(dev->mdev, pg));
1113

1114
	mr = ibmr ? to_mmr(ibmr) : kzalloc(sizeof(*mr), GFP_KERNEL);
1115 1116 1117
	if (!mr)
		return ERR_PTR(-ENOMEM);

1118 1119 1120 1121 1122 1123
	mr->ibmr.pd = pd;
	mr->access_flags = access_flags;

	inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
	if (populate)
		inlen += sizeof(*pas) * roundup(npages, 2);
1124
	in = kvzalloc(inlen, GFP_KERNEL);
1125 1126 1127 1128
	if (!in) {
		err = -ENOMEM;
		goto err_1;
	}
1129
	pas = (__be64 *)MLX5_ADDR_OF(create_mkey_in, in, klm_pas_mtt);
1130
	if (populate && !(access_flags & IB_ACCESS_ON_DEMAND))
1131 1132
		mlx5_ib_populate_pas(dev, umem, page_shift, pas,
				     pg_cap ? MLX5_IB_MTT_PRESENT : 0);
1133

1134
	/* The pg_access bit allows setting the access flags
1135
	 * in the page list submitted with the command. */
1136 1137 1138
	MLX5_SET(create_mkey_in, in, pg_access, !!(pg_cap));

	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1139
	MLX5_SET(mkc, mkc, free, !populate);
1140 1141 1142 1143 1144 1145
	MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_MTT);
	MLX5_SET(mkc, mkc, a, !!(access_flags & IB_ACCESS_REMOTE_ATOMIC));
	MLX5_SET(mkc, mkc, rw, !!(access_flags & IB_ACCESS_REMOTE_WRITE));
	MLX5_SET(mkc, mkc, rr, !!(access_flags & IB_ACCESS_REMOTE_READ));
	MLX5_SET(mkc, mkc, lw, !!(access_flags & IB_ACCESS_LOCAL_WRITE));
	MLX5_SET(mkc, mkc, lr, 1);
1146
	MLX5_SET(mkc, mkc, umr_en, 1);
1147 1148 1149 1150 1151 1152

	MLX5_SET64(mkc, mkc, start_addr, virt_addr);
	MLX5_SET64(mkc, mkc, len, length);
	MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
	MLX5_SET(mkc, mkc, bsf_octword_size, 0);
	MLX5_SET(mkc, mkc, translations_octword_size,
1153
		 get_octo_len(virt_addr, length, page_shift));
1154 1155
	MLX5_SET(mkc, mkc, log_page_size, page_shift);
	MLX5_SET(mkc, mkc, qpn, 0xffffff);
1156 1157
	if (populate) {
		MLX5_SET(create_mkey_in, in, translations_octword_actual_size,
1158
			 get_octo_len(virt_addr, length, page_shift));
1159
	}
1160 1161

	err = mlx5_core_create_mkey(dev->mdev, &mr->mmkey, in, inlen);
1162 1163 1164 1165
	if (err) {
		mlx5_ib_warn(dev, "create mkey failed\n");
		goto err_2;
	}
A
Artemy Kovalyov 已提交
1166
	mr->mmkey.type = MLX5_MKEY_MR;
1167
	mr->desc_size = sizeof(struct mlx5_mtt);
1168
	mr->dev = dev;
A
Al Viro 已提交
1169
	kvfree(in);
1170

1171
	mlx5_ib_dbg(dev, "mkey = 0x%x\n", mr->mmkey.key);
1172 1173 1174 1175

	return mr;

err_2:
A
Al Viro 已提交
1176
	kvfree(in);
1177 1178

err_1:
1179 1180
	if (!ibmr)
		kfree(mr);
1181 1182 1183 1184

	return ERR_PTR(err);
}

1185 1186 1187 1188 1189
static void set_mr_fileds(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr,
			  int npages, u64 length, int access_flags)
{
	mr->npages = npages;
	atomic_add(npages, &dev->mdev->priv.reg_pages);
1190 1191
	mr->ibmr.lkey = mr->mmkey.key;
	mr->ibmr.rkey = mr->mmkey.key;
1192
	mr->ibmr.length = length;
1193
	mr->access_flags = access_flags;
1194 1195
}

1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207
struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
				  u64 virt_addr, int access_flags,
				  struct ib_udata *udata)
{
	struct mlx5_ib_dev *dev = to_mdev(pd->device);
	struct mlx5_ib_mr *mr = NULL;
	struct ib_umem *umem;
	int page_shift;
	int npages;
	int ncont;
	int order;
	int err;
1208
	bool use_umr = true;
1209

1210 1211 1212
	if (!IS_ENABLED(CONFIG_INFINIBAND_USER_MEM))
		return ERR_PTR(-EINVAL);

1213 1214
	mlx5_ib_dbg(dev, "start 0x%llx, virt_addr 0x%llx, length 0x%llx, access_flags 0x%x\n",
		    start, virt_addr, length, access_flags);
1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226

#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
	if (!start && length == U64_MAX) {
		if (!(access_flags & IB_ACCESS_ON_DEMAND) ||
		    !(dev->odp_caps.general_caps & IB_ODP_SUPPORT_IMPLICIT))
			return ERR_PTR(-EINVAL);

		mr = mlx5_ib_alloc_implicit_mr(to_mpd(pd), access_flags);
		return &mr->ibmr;
	}
#endif

1227
	err = mr_umem_get(pd, start, length, access_flags, &umem, &npages,
1228
			   &page_shift, &ncont, &order);
1229

1230
	if (err < 0)
1231
		return ERR_PTR(err);
1232

1233
	if (order <= mr_cache_max_order(dev)) {
1234 1235
		mr = alloc_mr_from_cache(pd, umem, virt_addr, length, ncont,
					 page_shift, order, access_flags);
1236
		if (PTR_ERR(mr) == -EAGAIN) {
1237
			mlx5_ib_dbg(dev, "cache empty for order %d\n", order);
1238 1239
			mr = NULL;
		}
1240 1241 1242
	} else if (!MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset)) {
		if (access_flags & IB_ACCESS_ON_DEMAND) {
			err = -EINVAL;
1243
			pr_err("Got MR registration for ODP MR > 512MB, not supported for Connect-IB\n");
1244 1245 1246
			goto error;
		}
		use_umr = false;
1247 1248
	}

1249 1250
	if (!mr) {
		mutex_lock(&dev->slow_path_mutex);
1251
		mr = reg_create(NULL, pd, virt_addr, length, umem, ncont,
1252
				page_shift, access_flags, !use_umr);
1253 1254
		mutex_unlock(&dev->slow_path_mutex);
	}
1255 1256 1257 1258 1259 1260

	if (IS_ERR(mr)) {
		err = PTR_ERR(mr);
		goto error;
	}

1261
	mlx5_ib_dbg(dev, "mkey 0x%x\n", mr->mmkey.key);
1262 1263

	mr->umem = umem;
1264
	set_mr_fileds(dev, mr, npages, length, access_flags);
1265

1266
#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
1267
	update_odp_mr(mr);
1268 1269
#endif

1270 1271 1272 1273 1274
	if (use_umr) {
		int update_xlt_flags = MLX5_IB_UPD_XLT_ENABLE;

		if (access_flags & IB_ACCESS_ON_DEMAND)
			update_xlt_flags |= MLX5_IB_UPD_XLT_ZAP;
1275

1276 1277
		err = mlx5_ib_update_xlt(mr, 0, ncont, page_shift,
					 update_xlt_flags);
1278

1279
		if (err) {
1280
			dereg_mr(dev, mr);
1281 1282 1283 1284 1285 1286
			return ERR_PTR(err);
		}
	}

	mr->live = 1;
	return &mr->ibmr;
1287 1288 1289 1290 1291 1292 1293
error:
	ib_umem_release(umem);
	return ERR_PTR(err);
}

static int unreg_umr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
{
1294
	struct mlx5_core_dev *mdev = dev->mdev;
1295
	struct mlx5_umr_wr umrwr = {};
1296

1297 1298 1299
	if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
		return 0;

1300 1301 1302 1303
	umrwr.wr.send_flags = MLX5_IB_SEND_UMR_DISABLE_MR |
			      MLX5_IB_SEND_UMR_FAIL_IF_FREE;
	umrwr.wr.opcode = MLX5_IB_WR_UMR;
	umrwr.mkey = mr->mmkey.key;
1304

1305
	return mlx5_ib_post_send_wait(dev, &umrwr);
1306 1307
}

1308
static int rereg_umr(struct ib_pd *pd, struct mlx5_ib_mr *mr,
1309 1310 1311 1312 1313 1314 1315 1316
		     int access_flags, int flags)
{
	struct mlx5_ib_dev *dev = to_mdev(pd->device);
	struct mlx5_umr_wr umrwr = {};
	int err;

	umrwr.wr.send_flags = MLX5_IB_SEND_UMR_FAIL_IF_FREE;

1317 1318
	umrwr.wr.opcode = MLX5_IB_WR_UMR;
	umrwr.mkey = mr->mmkey.key;
1319

1320
	if (flags & IB_MR_REREG_PD || flags & IB_MR_REREG_ACCESS) {
1321 1322
		umrwr.pd = pd;
		umrwr.access_flags = access_flags;
1323
		umrwr.wr.send_flags |= MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;
1324 1325
	}

1326
	err = mlx5_ib_post_send_wait(dev, &umrwr);
1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343

	return err;
}

int mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start,
			  u64 length, u64 virt_addr, int new_access_flags,
			  struct ib_pd *new_pd, struct ib_udata *udata)
{
	struct mlx5_ib_dev *dev = to_mdev(ib_mr->device);
	struct mlx5_ib_mr *mr = to_mmr(ib_mr);
	struct ib_pd *pd = (flags & IB_MR_REREG_PD) ? new_pd : ib_mr->pd;
	int access_flags = flags & IB_MR_REREG_ACCESS ?
			    new_access_flags :
			    mr->access_flags;
	u64 addr = (flags & IB_MR_REREG_TRANS) ? virt_addr : mr->umem->address;
	u64 len = (flags & IB_MR_REREG_TRANS) ? length : mr->umem->length;
	int page_shift = 0;
1344
	int upd_flags = 0;
1345 1346 1347 1348 1349 1350 1351 1352
	int npages = 0;
	int ncont = 0;
	int order = 0;
	int err;

	mlx5_ib_dbg(dev, "start 0x%llx, virt_addr 0x%llx, length 0x%llx, access_flags 0x%x\n",
		    start, virt_addr, length, access_flags);

1353 1354
	atomic_sub(mr->npages, &dev->mdev->priv.reg_pages);

1355 1356 1357 1358 1359 1360 1361
	if (flags != IB_MR_REREG_PD) {
		/*
		 * Replace umem. This needs to be done whether or not UMR is
		 * used.
		 */
		flags |= IB_MR_REREG_TRANS;
		ib_umem_release(mr->umem);
1362 1363 1364
		err = mr_umem_get(pd, addr, len, access_flags, &mr->umem,
				  &npages, &page_shift, &ncont, &order);
		if (err < 0) {
1365
			clean_mr(dev, mr);
1366 1367 1368 1369 1370 1371 1372 1373
			return err;
		}
	}

	if (flags & IB_MR_REREG_TRANS && !use_umr_mtt_update(mr, addr, len)) {
		/*
		 * UMR can't be used - MKey needs to be replaced.
		 */
1374
		if (mr->allocated_from_cache) {
1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386
			err = unreg_umr(dev, mr);
			if (err)
				mlx5_ib_warn(dev, "Failed to unregister MR\n");
		} else {
			err = destroy_mkey(dev, mr);
			if (err)
				mlx5_ib_warn(dev, "Failed to destroy MKey\n");
		}
		if (err)
			return err;

		mr = reg_create(ib_mr, pd, addr, len, mr->umem, ncont,
1387
				page_shift, access_flags, true);
1388 1389 1390 1391

		if (IS_ERR(mr))
			return PTR_ERR(mr);

1392
		mr->allocated_from_cache = 0;
1393
		mr->live = 1;
1394 1395 1396 1397
	} else {
		/*
		 * Send a UMR WQE
		 */
1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415
		mr->ibmr.pd = pd;
		mr->access_flags = access_flags;
		mr->mmkey.iova = addr;
		mr->mmkey.size = len;
		mr->mmkey.pd = to_mpd(pd)->pdn;

		if (flags & IB_MR_REREG_TRANS) {
			upd_flags = MLX5_IB_UPD_XLT_ADDR;
			if (flags & IB_MR_REREG_PD)
				upd_flags |= MLX5_IB_UPD_XLT_PD;
			if (flags & IB_MR_REREG_ACCESS)
				upd_flags |= MLX5_IB_UPD_XLT_ACCESS;
			err = mlx5_ib_update_xlt(mr, 0, npages, page_shift,
						 upd_flags);
		} else {
			err = rereg_umr(pd, mr, access_flags, flags);
		}

1416 1417
		if (err) {
			mlx5_ib_warn(dev, "Failed to rereg UMR\n");
1418
			ib_umem_release(mr->umem);
1419
			clean_mr(dev, mr);
1420 1421 1422 1423
			return err;
		}
	}

1424
	set_mr_fileds(dev, mr, npages, len, access_flags);
1425 1426 1427 1428 1429 1430 1431

#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
	update_odp_mr(mr);
#endif
	return 0;
}

1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449
static int
mlx5_alloc_priv_descs(struct ib_device *device,
		      struct mlx5_ib_mr *mr,
		      int ndescs,
		      int desc_size)
{
	int size = ndescs * desc_size;
	int add_size;
	int ret;

	add_size = max_t(int, MLX5_UMR_ALIGN - ARCH_KMALLOC_MINALIGN, 0);

	mr->descs_alloc = kzalloc(size + add_size, GFP_KERNEL);
	if (!mr->descs_alloc)
		return -ENOMEM;

	mr->descs = PTR_ALIGN(mr->descs_alloc, MLX5_UMR_ALIGN);

1450
	mr->desc_map = dma_map_single(device->dev.parent, mr->descs,
1451
				      size, DMA_TO_DEVICE);
1452
	if (dma_mapping_error(device->dev.parent, mr->desc_map)) {
1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470
		ret = -ENOMEM;
		goto err;
	}

	return 0;
err:
	kfree(mr->descs_alloc);

	return ret;
}

static void
mlx5_free_priv_descs(struct mlx5_ib_mr *mr)
{
	if (mr->descs) {
		struct ib_device *device = mr->ibmr.device;
		int size = mr->max_descs * mr->desc_size;

1471
		dma_unmap_single(device->dev.parent, mr->desc_map,
1472 1473 1474 1475 1476 1477
				 size, DMA_TO_DEVICE);
		kfree(mr->descs_alloc);
		mr->descs = NULL;
	}
}

1478
static int clean_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
1479
{
1480
	int allocated_from_cache = mr->allocated_from_cache;
1481 1482
	int err;

1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495
	if (mr->sig) {
		if (mlx5_core_destroy_psv(dev->mdev,
					  mr->sig->psv_memory.psv_idx))
			mlx5_ib_warn(dev, "failed to destroy mem psv %d\n",
				     mr->sig->psv_memory.psv_idx);
		if (mlx5_core_destroy_psv(dev->mdev,
					  mr->sig->psv_wire.psv_idx))
			mlx5_ib_warn(dev, "failed to destroy wire psv %d\n",
				     mr->sig->psv_wire.psv_idx);
		kfree(mr->sig);
		mr->sig = NULL;
	}

1496 1497
	mlx5_free_priv_descs(mr);

1498
	if (!allocated_from_cache) {
1499 1500
		u32 key = mr->mmkey.key;

1501
		err = destroy_mkey(dev, mr);
1502
		kfree(mr);
1503 1504
		if (err) {
			mlx5_ib_warn(dev, "failed to destroy mkey 0x%x (%d)\n",
1505
				     key, err);
1506 1507 1508
			return err;
		}
	} else {
1509
		mlx5_mr_cache_free(dev, mr);
1510 1511
	}

1512 1513 1514
	return 0;
}

1515
static int dereg_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
1516 1517 1518 1519 1520
{
	int npages = mr->npages;
	struct ib_umem *umem = mr->umem;

#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
1521 1522 1523
	if (umem && umem->odp_data) {
		/* Prevent new page faults from succeeding */
		mr->live = 0;
1524 1525
		/* Wait for all running page-fault handlers to finish. */
		synchronize_srcu(&dev->mr_srcu);
1526
		/* Destroy all page mappings */
1527 1528 1529 1530 1531
		if (umem->odp_data->page_list)
			mlx5_ib_invalidate_range(umem, ib_umem_start(umem),
						 ib_umem_end(umem));
		else
			mlx5_ib_free_implicit_mr(mr);
1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542
		/*
		 * We kill the umem before the MR for ODP,
		 * so that there will not be any invalidations in
		 * flight, looking at the *mr struct.
		 */
		ib_umem_release(umem);
		atomic_sub(npages, &dev->mdev->priv.reg_pages);

		/* Avoid double-freeing the umem. */
		umem = NULL;
	}
1543 1544
#endif

1545
	clean_mr(dev, mr);
1546

1547 1548
	if (umem) {
		ib_umem_release(umem);
1549
		atomic_sub(npages, &dev->mdev->priv.reg_pages);
1550 1551 1552 1553 1554
	}

	return 0;
}

1555 1556 1557 1558 1559 1560 1561 1562
int mlx5_ib_dereg_mr(struct ib_mr *ibmr)
{
	struct mlx5_ib_dev *dev = to_mdev(ibmr->device);
	struct mlx5_ib_mr *mr = to_mmr(ibmr);

	return dereg_mr(dev, mr);
}

S
Sagi Grimberg 已提交
1563 1564 1565
struct ib_mr *mlx5_ib_alloc_mr(struct ib_pd *pd,
			       enum ib_mr_type mr_type,
			       u32 max_num_sg)
1566 1567
{
	struct mlx5_ib_dev *dev = to_mdev(pd->device);
1568
	int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
1569
	int ndescs = ALIGN(max_num_sg, 4);
1570 1571 1572
	struct mlx5_ib_mr *mr;
	void *mkc;
	u32 *in;
1573
	int err;
1574 1575 1576 1577 1578

	mr = kzalloc(sizeof(*mr), GFP_KERNEL);
	if (!mr)
		return ERR_PTR(-ENOMEM);

1579
	in = kzalloc(inlen, GFP_KERNEL);
1580 1581 1582 1583 1584
	if (!in) {
		err = -ENOMEM;
		goto err_free;
	}

1585 1586 1587 1588 1589
	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
	MLX5_SET(mkc, mkc, free, 1);
	MLX5_SET(mkc, mkc, translations_octword_size, ndescs);
	MLX5_SET(mkc, mkc, qpn, 0xffffff);
	MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
1590

S
Sagi Grimberg 已提交
1591
	if (mr_type == IB_MR_TYPE_MEM_REG) {
1592 1593
		mr->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
		MLX5_SET(mkc, mkc, log_page_size, PAGE_SHIFT);
1594
		err = mlx5_alloc_priv_descs(pd->device, mr,
1595
					    ndescs, sizeof(struct mlx5_mtt));
1596 1597 1598
		if (err)
			goto err_free_in;

1599
		mr->desc_size = sizeof(struct mlx5_mtt);
1600
		mr->max_descs = ndescs;
1601
	} else if (mr_type == IB_MR_TYPE_SG_GAPS) {
1602
		mr->access_mode = MLX5_MKC_ACCESS_MODE_KLMS;
1603 1604 1605 1606 1607 1608 1609

		err = mlx5_alloc_priv_descs(pd->device, mr,
					    ndescs, sizeof(struct mlx5_klm));
		if (err)
			goto err_free_in;
		mr->desc_size = sizeof(struct mlx5_klm);
		mr->max_descs = ndescs;
S
Sagi Grimberg 已提交
1610
	} else if (mr_type == IB_MR_TYPE_SIGNATURE) {
1611 1612
		u32 psv_index[2];

1613 1614
		MLX5_SET(mkc, mkc, bsf_en, 1);
		MLX5_SET(mkc, mkc, bsf_octword_size, MLX5_MKEY_BSF_OCTO_SIZE);
1615 1616 1617 1618 1619 1620 1621
		mr->sig = kzalloc(sizeof(*mr->sig), GFP_KERNEL);
		if (!mr->sig) {
			err = -ENOMEM;
			goto err_free_in;
		}

		/* create mem & wire PSVs */
1622
		err = mlx5_core_create_psv(dev->mdev, to_mpd(pd)->pdn,
1623 1624 1625 1626
					   2, psv_index);
		if (err)
			goto err_free_sig;

1627
		mr->access_mode = MLX5_MKC_ACCESS_MODE_KLMS;
1628 1629
		mr->sig->psv_memory.psv_idx = psv_index[0];
		mr->sig->psv_wire.psv_idx = psv_index[1];
1630 1631 1632 1633 1634

		mr->sig->sig_status_checked = true;
		mr->sig->sig_err_exists = false;
		/* Next UMR, Arm SIGERR */
		++mr->sig->sigerr_count;
S
Sagi Grimberg 已提交
1635 1636 1637 1638
	} else {
		mlx5_ib_warn(dev, "Invalid mr type %d\n", mr_type);
		err = -EINVAL;
		goto err_free_in;
1639 1640
	}

1641 1642 1643
	MLX5_SET(mkc, mkc, access_mode, mr->access_mode);
	MLX5_SET(mkc, mkc, umr_en, 1);

1644
	mr->ibmr.device = pd->device;
1645
	err = mlx5_core_create_mkey(dev->mdev, &mr->mmkey, in, inlen);
1646 1647 1648
	if (err)
		goto err_destroy_psv;

A
Artemy Kovalyov 已提交
1649
	mr->mmkey.type = MLX5_MKEY_MR;
1650 1651
	mr->ibmr.lkey = mr->mmkey.key;
	mr->ibmr.rkey = mr->mmkey.key;
1652 1653 1654 1655 1656 1657 1658
	mr->umem = NULL;
	kfree(in);

	return &mr->ibmr;

err_destroy_psv:
	if (mr->sig) {
1659
		if (mlx5_core_destroy_psv(dev->mdev,
1660 1661 1662
					  mr->sig->psv_memory.psv_idx))
			mlx5_ib_warn(dev, "failed to destroy mem psv %d\n",
				     mr->sig->psv_memory.psv_idx);
1663
		if (mlx5_core_destroy_psv(dev->mdev,
1664 1665 1666 1667
					  mr->sig->psv_wire.psv_idx))
			mlx5_ib_warn(dev, "failed to destroy wire psv %d\n",
				     mr->sig->psv_wire.psv_idx);
	}
1668
	mlx5_free_priv_descs(mr);
1669 1670 1671 1672 1673 1674 1675 1676 1677
err_free_sig:
	kfree(mr->sig);
err_free_in:
	kfree(in);
err_free:
	kfree(mr);
	return ERR_PTR(err);
}

1678 1679 1680 1681
struct ib_mw *mlx5_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type,
			       struct ib_udata *udata)
{
	struct mlx5_ib_dev *dev = to_mdev(pd->device);
1682
	int inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
1683
	struct mlx5_ib_mw *mw = NULL;
1684 1685
	u32 *in = NULL;
	void *mkc;
1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708
	int ndescs;
	int err;
	struct mlx5_ib_alloc_mw req = {};
	struct {
		__u32	comp_mask;
		__u32	response_length;
	} resp = {};

	err = ib_copy_from_udata(&req, udata, min(udata->inlen, sizeof(req)));
	if (err)
		return ERR_PTR(err);

	if (req.comp_mask || req.reserved1 || req.reserved2)
		return ERR_PTR(-EOPNOTSUPP);

	if (udata->inlen > sizeof(req) &&
	    !ib_is_udata_cleared(udata, sizeof(req),
				 udata->inlen - sizeof(req)))
		return ERR_PTR(-EOPNOTSUPP);

	ndescs = req.num_klms ? roundup(req.num_klms, 4) : roundup(1, 4);

	mw = kzalloc(sizeof(*mw), GFP_KERNEL);
1709
	in = kzalloc(inlen, GFP_KERNEL);
1710 1711 1712 1713 1714
	if (!mw || !in) {
		err = -ENOMEM;
		goto free;
	}

1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726
	mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);

	MLX5_SET(mkc, mkc, free, 1);
	MLX5_SET(mkc, mkc, translations_octword_size, ndescs);
	MLX5_SET(mkc, mkc, pd, to_mpd(pd)->pdn);
	MLX5_SET(mkc, mkc, umr_en, 1);
	MLX5_SET(mkc, mkc, lr, 1);
	MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_KLMS);
	MLX5_SET(mkc, mkc, en_rinval, !!((type == IB_MW_TYPE_2)));
	MLX5_SET(mkc, mkc, qpn, 0xffffff);

	err = mlx5_core_create_mkey(dev->mdev, &mw->mmkey, in, inlen);
1727 1728 1729
	if (err)
		goto free;

A
Artemy Kovalyov 已提交
1730
	mw->mmkey.type = MLX5_MKEY_MW;
1731
	mw->ibmw.rkey = mw->mmkey.key;
A
Artemy Kovalyov 已提交
1732
	mw->ndescs = ndescs;
1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764

	resp.response_length = min(offsetof(typeof(resp), response_length) +
				   sizeof(resp.response_length), udata->outlen);
	if (resp.response_length) {
		err = ib_copy_to_udata(udata, &resp, resp.response_length);
		if (err) {
			mlx5_core_destroy_mkey(dev->mdev, &mw->mmkey);
			goto free;
		}
	}

	kfree(in);
	return &mw->ibmw;

free:
	kfree(mw);
	kfree(in);
	return ERR_PTR(err);
}

int mlx5_ib_dealloc_mw(struct ib_mw *mw)
{
	struct mlx5_ib_mw *mmw = to_mmw(mw);
	int err;

	err =  mlx5_core_destroy_mkey((to_mdev(mw->device))->mdev,
				      &mmw->mmkey);
	if (!err)
		kfree(mmw);
	return err;
}

1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804
int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask,
			    struct ib_mr_status *mr_status)
{
	struct mlx5_ib_mr *mmr = to_mmr(ibmr);
	int ret = 0;

	if (check_mask & ~IB_MR_CHECK_SIG_STATUS) {
		pr_err("Invalid status check mask\n");
		ret = -EINVAL;
		goto done;
	}

	mr_status->fail_status = 0;
	if (check_mask & IB_MR_CHECK_SIG_STATUS) {
		if (!mmr->sig) {
			ret = -EINVAL;
			pr_err("signature status check requested on a non-signature enabled MR\n");
			goto done;
		}

		mmr->sig->sig_status_checked = true;
		if (!mmr->sig->sig_err_exists)
			goto done;

		if (ibmr->lkey == mmr->sig->err_item.key)
			memcpy(&mr_status->sig_err, &mmr->sig->err_item,
			       sizeof(mr_status->sig_err));
		else {
			mr_status->sig_err.err_type = IB_SIG_BAD_GUARD;
			mr_status->sig_err.sig_err_offset = 0;
			mr_status->sig_err.key = mmr->sig->err_item.key;
		}

		mmr->sig->sig_err_exists = false;
		mr_status->fail_status |= IB_MR_CHECK_SIG_STATUS;
	}

done:
	return ret;
}
1805

1806 1807 1808
static int
mlx5_ib_sg_to_klms(struct mlx5_ib_mr *mr,
		   struct scatterlist *sgl,
1809
		   unsigned short sg_nents,
1810
		   unsigned int *sg_offset_p)
1811 1812 1813
{
	struct scatterlist *sg = sgl;
	struct mlx5_klm *klms = mr->descs;
1814
	unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0;
1815 1816 1817
	u32 lkey = mr->ibmr.pd->local_dma_lkey;
	int i;

1818
	mr->ibmr.iova = sg_dma_address(sg) + sg_offset;
1819 1820 1821 1822
	mr->ibmr.length = 0;
	mr->ndescs = sg_nents;

	for_each_sg(sgl, sg, sg_nents, i) {
1823
		if (unlikely(i >= mr->max_descs))
1824
			break;
1825 1826
		klms[i].va = cpu_to_be64(sg_dma_address(sg) + sg_offset);
		klms[i].bcount = cpu_to_be32(sg_dma_len(sg) - sg_offset);
1827
		klms[i].key = cpu_to_be32(lkey);
1828
		mr->ibmr.length += sg_dma_len(sg) - sg_offset;
1829 1830

		sg_offset = 0;
1831 1832
	}

1833 1834 1835
	if (sg_offset_p)
		*sg_offset_p = sg_offset;

1836 1837 1838
	return i;
}

1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852
static int mlx5_set_page(struct ib_mr *ibmr, u64 addr)
{
	struct mlx5_ib_mr *mr = to_mmr(ibmr);
	__be64 *descs;

	if (unlikely(mr->ndescs == mr->max_descs))
		return -ENOMEM;

	descs = mr->descs;
	descs[mr->ndescs++] = cpu_to_be64(addr | MLX5_EN_RD | MLX5_EN_WR);

	return 0;
}

1853
int mlx5_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
1854
		      unsigned int *sg_offset)
1855 1856 1857 1858 1859 1860 1861 1862 1863 1864
{
	struct mlx5_ib_mr *mr = to_mmr(ibmr);
	int n;

	mr->ndescs = 0;

	ib_dma_sync_single_for_cpu(ibmr->device, mr->desc_map,
				   mr->desc_size * mr->max_descs,
				   DMA_TO_DEVICE);

1865
	if (mr->access_mode == MLX5_MKC_ACCESS_MODE_KLMS)
1866
		n = mlx5_ib_sg_to_klms(mr, sg, sg_nents, sg_offset);
1867
	else
1868 1869
		n = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset,
				mlx5_set_page);
1870 1871 1872 1873 1874 1875 1876

	ib_dma_sync_single_for_device(ibmr->device, mr->desc_map,
				      mr->desc_size * mr->max_descs,
				      DMA_TO_DEVICE);

	return n;
}