Kconfig 5.7 KB
Newer Older
1 2
if (BF54x)

3 4
source "arch/blackfin/mach-bf548/boards/Kconfig"

5 6
menu "BF548 Specific Configuration"

7 8 9
config DEB_DMA_URGENT
	bool "DMA has priority over core for ext. accesses"
	depends on BF54x
10
	default y
11 12 13
	help
	  Treat any DEB1, DEB2 and DEB3 request as Urgent

14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252
comment "Interrupt Priority Assignment"
menu "Priority"

config IRQ_PLL_WAKEUP
	int "IRQ_PLL_WAKEUP"
	default 7
config IRQ_DMAC0_ERR
	int "IRQ_DMAC0_ERR"
	default 7
config IRQ_EPPI0_ERR
	int "IRQ_EPPI0_ERR"
	default 7
config IRQ_SPORT0_ERR
	int "IRQ_SPORT0_ERR"
	default 7
config IRQ_SPORT1_ERR
	int "IRQ_SPORT1_ERR"
	default 7
config IRQ_SPI0_ERR
	int "IRQ_SPI0_ERR"
	default 7
config IRQ_UART0_ERR
	int "IRQ_UART0_ERR"
	default 7
config IRQ_RTC
	int "IRQ_RTC"
	default 8
config IRQ_EPPI0
	int "IRQ_EPPI0"
	default 8
config IRQ_SPORT0_RX
	int "IRQ_SPORT0_RX"
	default 9
config IRQ_SPORT0_TX
	int "IRQ_SPORT0_TX"
	default 9
config IRQ_SPORT1_RX
	int "IRQ_SPORT1_RX"
	default 9
config IRQ_SPORT1_TX
	int "IRQ_SPORT1_TX"
	default 9
config IRQ_SPI0
	int "IRQ_SPI0"
	default 10
config IRQ_UART0_RX
	int "IRQ_UART0_RX"
	default 10
config IRQ_UART0_TX
	int "IRQ_UART0_TX"
	default 10
config IRQ_TIMER8
	int "IRQ_TIMER8"
	default 11
config IRQ_TIMER9
	int "IRQ_TIMER9"
	default 11
config IRQ_TIMER10
	int "IRQ_TIMER10"
	default 11
config IRQ_PINT0
	int "IRQ_PINT0"
	default 12
config IRQ_PINT1
	int "IRQ_PINT0"
	default 12
config IRQ_MDMAS0
	int "IRQ_MDMAS0"
	default 13
config IRQ_MDMAS1
	int "IRQ_DMDMAS1"
	default 13
config IRQ_WATCHDOG
	int "IRQ_WATCHDOG"
	default 13
config IRQ_DMAC1_ERR
	int "IRQ_DMAC1_ERR"
	default 7
config IRQ_SPORT2_ERR
	int "IRQ_SPORT2_ERR"
	default 7
config IRQ_SPORT3_ERR
	int "IRQ_SPORT3_ERR"
	default 7
config IRQ_MXVR_DATA
	int "IRQ MXVR Data"
	default 7
config IRQ_SPI1_ERR
	int "IRQ_SPI1_ERR"
	default 7
config IRQ_SPI2_ERR
	int "IRQ_SPI2_ERR"
	default 7
config IRQ_UART1_ERR
	int "IRQ_UART1_ERR"
	default 7
config IRQ_UART2_ERR
	int "IRQ_UART2_ERR"
	default 7
config IRQ_CAN0_ERR
	int "IRQ_CAN0_ERR"
	default 7
config IRQ_SPORT2_RX
	int "IRQ_SPORT2_RX"
	default 9
config IRQ_SPORT2_TX
	int "IRQ_SPORT2_TX"
	default 9
config IRQ_SPORT3_RX
	int "IRQ_SPORT3_RX"
	default 9
config IRQ_SPORT3_TX
	int "IRQ_SPORT3_TX"
	default 9
config IRQ_EPPI1
	int "IRQ_EPPI1"
	default 9
config IRQ_EPPI2
	int "IRQ_EPPI2"
	default 9
config IRQ_SPI1
	int "IRQ_SPI1"
	default 10
config IRQ_SPI2
	int "IRQ_SPI2"
	default 10
config IRQ_UART1_RX
	int "IRQ_UART1_RX"
	default 10
config IRQ_UART1_TX
	int "IRQ_UART1_TX"
	default 10
config IRQ_ATAPI_RX
	int "IRQ_ATAPI_RX"
	default 10
config IRQ_ATAPI_TX
	int "IRQ_ATAPI_TX"
	default 10
config IRQ_TWI0
	int "IRQ_TWI0"
	default 11
config IRQ_TWI1
	int "IRQ_TWI1"
	default 11
config IRQ_CAN0_RX
	int "IRQ_CAN_RX"
	default 11
config IRQ_CAN0_TX
	int "IRQ_CAN_TX"
	default 11
config IRQ_MDMAS2
	int "IRQ_MDMAS2"
	default 13
config IRQ_MDMAS3
	int "IRQ_DMMAS3"
	default 13
config IRQ_MXVR_ERR
	int "IRQ_MXVR_ERR"
	default 11
config IRQ_MXVR_MSG
	int "IRQ_MXVR_MSG"
	default 11
config IRQ_MXVR_PKT
	int "IRQ_MXVR_PKT"
	default 11
config IRQ_EPPI1_ERR
	int "IRQ_EPPI1_ERR"
	default 7
config IRQ_EPPI2_ERR
	int "IRQ_EPPI2_ERR"
	default 7
config IRQ_UART3_ERR
	int "IRQ_UART3_ERR"
	default 7
config IRQ_HOST_ERR
	int "IRQ_HOST_ERR"
	default 7
config IRQ_PIXC_ERR
	int "IRQ_PIXC_ERR"
	default 7
config IRQ_NFC_ERR
	int "IRQ_NFC_ERR"
	default 7
config IRQ_ATAPI_ERR
	int "IRQ_ATAPI_ERR"
	default 7
config IRQ_CAN1_ERR
	int "IRQ_CAN1_ERR"
	default 7
config IRQ_HS_DMA_ERR
	int "IRQ Handshake DMA Status"
	default 7
config IRQ_PIXC_IN0
	int "IRQ PIXC IN0"
	default 8
config IRQ_PIXC_IN1
	int "IRQ PIXC IN1"
	default 8
config IRQ_PIXC_OUT
	int "IRQ PIXC OUT"
	default 8
config IRQ_SDH
	int "IRQ SDH"
	default 8
config IRQ_CNT
	int "IRQ CNT"
	default 8
config IRQ_KEY
	int "IRQ KEY"
	default 8
config IRQ_CAN1_RX
	int "IRQ CAN1 RX"
	default 11
config IRQ_CAN1_TX
	int "IRQ_CAN1_TX"
	default 11
config IRQ_SDH_MASK0
	int "IRQ_SDH_MASK0"
	default 11
config IRQ_SDH_MASK1
	int "IRQ_SDH_MASK1"
	default 11
config IRQ_USB_INT0
	int "IRQ USB INT0"
	default 11
config IRQ_USB_INT1
	int "IRQ USB INT1"
	default 11
config IRQ_USB_INT2
	int "IRQ USB INT2"
	default 11
config IRQ_USB_DMA
	int "IRQ USB DMA"
	default 11
config IRQ_OTPSEC
	int "IRQ OPTSEC"
	default 11
config IRQ_TIMER0
	int "IRQ_TIMER0"
253
	default 8
254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288
config IRQ_TIMER1
	int "IRQ_TIMER1"
	default 11
config IRQ_TIMER2
	int "IRQ_TIMER2"
	default 11
config IRQ_TIMER3
	int "IRQ_TIMER3"
	default 11
config IRQ_TIMER4
	int "IRQ_TIMER4"
	default 11
config IRQ_TIMER5
	int "IRQ_TIMER5"
	default 11
config IRQ_TIMER6
	int "IRQ_TIMER6"
	default 11
config IRQ_TIMER7
	int "IRQ_TIMER7"
	default 11
config IRQ_PINT2
	int "IRQ_PIN2"
	default 11
config IRQ_PINT3
	int "IRQ_PIN3"
	default 11

	help
	  Enter the priority numbers between 7-13 ONLY.  Others are Reserved.
	  This applies to all the above.  It is not recommended to assign the
	  highest priority number 7 to UART or any other device.

endmenu

289 290 291 292 293
comment "Pin Interrupt to Port Assignment"
menu "Assignment"

config PINTx_REASSIGN
	bool "Reprogram PINT Assignment"
294
	default y
295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314
	help
	  The interrupt assignment registers controls the pin-to-interrupt
	  assignment in a byte-wide manner. Each option allows you to select
	  a set of pins (High/Low Byte) of an specific Port being mapped
	  to one of the four PIN Interrupts IRQ_PINTx.

	  You shouldn't change any of these unless you know exactly what you're doing.
	  Please consult the Blackfin BF54x Processor Hardware Reference Manual.

config PINT0_ASSIGN
	hex "PINT0_ASSIGN"
	depends on PINTx_REASSIGN
	default 0x00000101
config PINT1_ASSIGN
	hex "PINT1_ASSIGN"
	depends on PINTx_REASSIGN
	default 0x01010000
config PINT2_ASSIGN
	hex "PINT2_ASSIGN"
	depends on PINTx_REASSIGN
315
	default 0x07000101
316 317 318 319 320 321 322
config PINT3_ASSIGN
	hex "PINT3_ASSIGN"
	depends on PINTx_REASSIGN
	default 0x02020303

endmenu

323 324 325
endmenu

endif