asix_devices.c 29.0 KB
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/*
 * ASIX AX8817X based USB 2.0 Ethernet Devices
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 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
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 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
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 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
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 * Copyright (c) 2002-2003 TiVo Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

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#include "asix.h"
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#define PHY_MODE_MARVELL	0x0000
#define MII_MARVELL_LED_CTRL	0x0018
#define MII_MARVELL_STATUS	0x001b
#define MII_MARVELL_CTRL	0x0014

#define MARVELL_LED_MANUAL	0x0019

#define MARVELL_STATUS_HWCFG	0x0004

#define MARVELL_CTRL_TXDELAY	0x0002
#define MARVELL_CTRL_RXDELAY	0x0080
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#define	PHY_MODE_RTL8211CL	0x000C
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struct ax88172_int_data {
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	__le16 res1;
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	u8 link;
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	__le16 res2;
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	u8 status;
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	__le16 res3;
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} __packed;
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static void asix_status(struct usbnet *dev, struct urb *urb)
{
	struct ax88172_int_data *event;
	int link;

	if (urb->actual_length < 8)
		return;

	event = urb->transfer_buffer;
	link = event->link & 0x01;
	if (netif_carrier_ok(dev->net) != link) {
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		usbnet_link_change(dev, link, 1);
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		netdev_dbg(dev->net, "Link Status is: %d\n", link);
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	}
}

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static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
{
	if (is_valid_ether_addr(addr)) {
		memcpy(dev->net->dev_addr, addr, ETH_ALEN);
	} else {
		netdev_info(dev->net, "invalid hw address, using random\n");
		eth_hw_addr_random(dev->net);
	}
}

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/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
static u32 asix_get_phyid(struct usbnet *dev)
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{
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	int phy_reg;
	u32 phy_id;
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	int i;
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	/* Poll for the rare case the FW or phy isn't ready yet.  */
	for (i = 0; i < 100; i++) {
		phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
		if (phy_reg != 0 && phy_reg != 0xFFFF)
			break;
		mdelay(1);
	}

	if (phy_reg <= 0 || phy_reg == 0xFFFF)
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		return 0;
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	phy_id = (phy_reg & 0xffff) << 16;
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	phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
	if (phy_reg < 0)
		return 0;

	phy_id |= (phy_reg & 0xffff);

	return phy_id;
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}

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static u32 asix_get_link(struct net_device *net)
{
	struct usbnet *dev = netdev_priv(net);

	return mii_link_ok(&dev->mii);
}

static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
{
	struct usbnet *dev = netdev_priv(net);

	return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
}

/* We need to override some ethtool_ops so we require our
   own structure so we don't interfere with other usbnet
   devices that may be connected at the same time. */
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static const struct ethtool_ops ax88172_ethtool_ops = {
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	.get_drvinfo		= asix_get_drvinfo,
	.get_link		= asix_get_link,
	.get_msglevel		= usbnet_get_msglevel,
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	.set_msglevel		= usbnet_set_msglevel,
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	.get_wol		= asix_get_wol,
	.set_wol		= asix_set_wol,
	.get_eeprom_len		= asix_get_eeprom_len,
	.get_eeprom		= asix_get_eeprom,
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	.set_eeprom		= asix_set_eeprom,
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	.get_settings		= usbnet_get_settings,
	.set_settings		= usbnet_set_settings,
	.nway_reset		= usbnet_nway_reset,
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};

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static void ax88172_set_multicast(struct net_device *net)
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{
	struct usbnet *dev = netdev_priv(net);
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	struct asix_data *data = (struct asix_data *)&dev->data;
	u8 rx_ctl = 0x8c;
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	if (net->flags & IFF_PROMISC) {
		rx_ctl |= 0x01;
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	} else if (net->flags & IFF_ALLMULTI ||
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		   netdev_mc_count(net) > AX_MAX_MCAST) {
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		rx_ctl |= 0x02;
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	} else if (netdev_mc_empty(net)) {
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		/* just broadcast and directed */
	} else {
		/* We use the 20 byte dev->data
		 * for our 8 byte filter buffer
		 * to avoid allocating memory that
		 * is tricky to free later */
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		struct netdev_hw_addr *ha;
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		u32 crc_bits;

		memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);

		/* Build the multicast hash filter. */
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		netdev_for_each_mc_addr(ha, net) {
			crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
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			data->multi_filter[crc_bits >> 3] |=
			    1 << (crc_bits & 7);
		}

		asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
				   AX_MCAST_FILTER_SIZE, data->multi_filter);

		rx_ctl |= 0x10;
	}

	asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
}

static int ax88172_link_reset(struct usbnet *dev)
{
	u8 mode;
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	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
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	mii_check_media(&dev->mii, 1, 1);
	mii_ethtool_gset(&dev->mii, &ecmd);
	mode = AX88172_MEDIUM_DEFAULT;

	if (ecmd.duplex != DUPLEX_FULL)
		mode |= ~AX88172_MEDIUM_FD;

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	netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
		   ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
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	asix_write_medium_mode(dev, mode);

	return 0;
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}

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static const struct net_device_ops ax88172_netdev_ops = {
	.ndo_open		= usbnet_open,
	.ndo_stop		= usbnet_stop,
	.ndo_start_xmit		= usbnet_start_xmit,
	.ndo_tx_timeout		= usbnet_tx_timeout,
	.ndo_change_mtu		= usbnet_change_mtu,
	.ndo_set_mac_address 	= eth_mac_addr,
	.ndo_validate_addr	= eth_validate_addr,
	.ndo_do_ioctl		= asix_ioctl,
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	.ndo_set_rx_mode	= ax88172_set_multicast,
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};

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static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
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{
	int ret = 0;
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	u8 buf[ETH_ALEN];
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	int i;
	unsigned long gpio_bits = dev->driver_info->data;

	usbnet_get_endpoints(dev,intf);

	/* Toggle the GPIOs in a manufacturer/model specific way */
	for (i = 2; i >= 0; i--) {
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		ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
				(gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
		if (ret < 0)
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			goto out;
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		msleep(5);
	}

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	ret = asix_write_rx_ctl(dev, 0x80);
	if (ret < 0)
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		goto out;
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	/* Get the MAC address */
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	ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
	if (ret < 0) {
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		netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
			   ret);
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		goto out;
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	}
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	asix_set_netdev_dev_addr(dev, buf);
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	/* Initialize MII structure */
	dev->mii.dev = dev->net;
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	dev->mii.mdio_read = asix_mdio_read;
	dev->mii.mdio_write = asix_mdio_write;
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	dev->mii.phy_id_mask = 0x3f;
	dev->mii.reg_num_mask = 0x1f;
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	dev->mii.phy_id = asix_get_phy_addr(dev);
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	dev->net->netdev_ops = &ax88172_netdev_ops;
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	dev->net->ethtool_ops = &ax88172_ethtool_ops;
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	dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
	dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
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	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
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		ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
	mii_nway_restart(&dev->mii);

	return 0;
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out:
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	return ret;
}

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static const struct ethtool_ops ax88772_ethtool_ops = {
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	.get_drvinfo		= asix_get_drvinfo,
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	.get_link		= asix_get_link,
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	.get_msglevel		= usbnet_get_msglevel,
	.set_msglevel		= usbnet_set_msglevel,
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	.get_wol		= asix_get_wol,
	.set_wol		= asix_set_wol,
	.get_eeprom_len		= asix_get_eeprom_len,
	.get_eeprom		= asix_get_eeprom,
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	.set_eeprom		= asix_set_eeprom,
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	.get_settings		= usbnet_get_settings,
	.set_settings		= usbnet_set_settings,
	.nway_reset		= usbnet_nway_reset,
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};

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static int ax88772_link_reset(struct usbnet *dev)
{
	u16 mode;
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	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
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	mii_check_media(&dev->mii, 1, 1);
	mii_ethtool_gset(&dev->mii, &ecmd);
	mode = AX88772_MEDIUM_DEFAULT;

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	if (ethtool_cmd_speed(&ecmd) != SPEED_100)
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		mode &= ~AX_MEDIUM_PS;

	if (ecmd.duplex != DUPLEX_FULL)
		mode &= ~AX_MEDIUM_FD;

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	netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
		   ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
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	asix_write_medium_mode(dev, mode);

	return 0;
}

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static int ax88772_reset(struct usbnet *dev)
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{
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	struct asix_data *data = (struct asix_data *)&dev->data;
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	int ret, embd_phy;
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	u16 rx_ctl;
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	ret = asix_write_gpio(dev,
			AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
	if (ret < 0)
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		goto out;
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	embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
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	ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
	if (ret < 0) {
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		netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
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		goto out;
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	}

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	ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
	if (ret < 0)
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		goto out;
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	msleep(150);
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	ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
	if (ret < 0)
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		goto out;
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	msleep(150);
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	if (embd_phy) {
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		ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
		if (ret < 0)
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			goto out;
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	} else {
		ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
		if (ret < 0)
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			goto out;
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	}
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	msleep(150);
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	rx_ctl = asix_read_rx_ctl(dev);
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	netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
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	ret = asix_write_rx_ctl(dev, 0x0000);
	if (ret < 0)
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		goto out;
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	rx_ctl = asix_read_rx_ctl(dev);
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	netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
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	ret = asix_sw_reset(dev, AX_SWRESET_PRL);
	if (ret < 0)
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		goto out;
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	msleep(150);
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	ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
	if (ret < 0)
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		goto out;
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	msleep(150);
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	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
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			ADVERTISE_ALL | ADVERTISE_CSMA);
	mii_nway_restart(&dev->mii);

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	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
	if (ret < 0)
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		goto out;
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	ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
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				AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
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				AX88772_IPG2_DEFAULT, 0, NULL);
	if (ret < 0) {
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		netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
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		goto out;
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	}

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	/* Rewrite MAC address */
	memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
							data->mac_addr);
	if (ret < 0)
		goto out;

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	/* Set RX_CTL to default values with 2k buffer, and enable cactus */
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	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
	if (ret < 0)
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		goto out;
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	rx_ctl = asix_read_rx_ctl(dev);
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	netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
		   rx_ctl);
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	rx_ctl = asix_read_medium_status(dev);
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	netdev_dbg(dev->net,
		   "Medium Status is 0x%04x after all initializations\n",
		   rx_ctl);
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	return 0;

out:
	return ret;

}

static const struct net_device_ops ax88772_netdev_ops = {
	.ndo_open		= usbnet_open,
	.ndo_stop		= usbnet_stop,
	.ndo_start_xmit		= usbnet_start_xmit,
	.ndo_tx_timeout		= usbnet_tx_timeout,
	.ndo_change_mtu		= usbnet_change_mtu,
	.ndo_set_mac_address 	= asix_set_mac_address,
	.ndo_validate_addr	= eth_validate_addr,
	.ndo_do_ioctl		= asix_ioctl,
	.ndo_set_rx_mode        = asix_set_multicast,
};

static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
{
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	int ret, embd_phy, i;
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	u8 buf[ETH_ALEN];
	u32 phyid;

	usbnet_get_endpoints(dev,intf);

	/* Get the MAC address */
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	if (dev->driver_info->data & FLAG_EEPROM_MAC) {
		for (i = 0; i < (ETH_ALEN >> 1); i++) {
			ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
					0, 2, buf + i * 2);
			if (ret < 0)
				break;
		}
	} else {
		ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
				0, 0, ETH_ALEN, buf);
	}

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	if (ret < 0) {
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		netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
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		return ret;
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	}
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	asix_set_netdev_dev_addr(dev, buf);
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	/* Initialize MII structure */
	dev->mii.dev = dev->net;
	dev->mii.mdio_read = asix_mdio_read;
	dev->mii.mdio_write = asix_mdio_write;
	dev->mii.phy_id_mask = 0x1f;
	dev->mii.reg_num_mask = 0x1f;
	dev->mii.phy_id = asix_get_phy_addr(dev);

	dev->net->netdev_ops = &ax88772_netdev_ops;
	dev->net->ethtool_ops = &ax88772_ethtool_ops;
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	dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
	dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
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	embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);

	/* Reset the PHY to normal operation mode */
	ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
	if (ret < 0) {
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		netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
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		return ret;
	}

	ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
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	if (ret < 0)
		return ret;
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	msleep(150);

	ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
	if (ret < 0)
		return ret;

	msleep(150);

	ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);

	/* Read PHYID register *AFTER* the PHY was reset properly */
	phyid = asix_get_phyid(dev);
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	netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
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	/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
	if (dev->driver_info->flags & FLAG_FRAMING_AX) {
		/* hard_mtu  is still the default - the device does not support
		   jumbo eth frames */
		dev->rx_urb_size = 2048;
	}
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	dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
	if (!dev->driver_priv)
		return -ENOMEM;

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	return 0;
}

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static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
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{
	if (dev->driver_priv)
		kfree(dev->driver_priv);
}

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static const struct ethtool_ops ax88178_ethtool_ops = {
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	.get_drvinfo		= asix_get_drvinfo,
	.get_link		= asix_get_link,
	.get_msglevel		= usbnet_get_msglevel,
	.set_msglevel		= usbnet_set_msglevel,
	.get_wol		= asix_get_wol,
	.set_wol		= asix_set_wol,
	.get_eeprom_len		= asix_get_eeprom_len,
	.get_eeprom		= asix_get_eeprom,
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	.set_eeprom		= asix_set_eeprom,
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	.get_settings		= usbnet_get_settings,
	.set_settings		= usbnet_set_settings,
	.nway_reset		= usbnet_nway_reset,
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};

static int marvell_phy_init(struct usbnet *dev)
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{
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	struct asix_data *data = (struct asix_data *)&dev->data;
	u16 reg;
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527
	netdev_dbg(dev->net, "marvell_phy_init()\n");
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529
	reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
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	netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
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	asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
			MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
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	if (data->ledmode) {
		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
			MII_MARVELL_LED_CTRL);
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		netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
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		reg &= 0xf8ff;
		reg |= (1 + 0x0100);
		asix_mdio_write(dev->net, dev->mii.phy_id,
			MII_MARVELL_LED_CTRL, reg);
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		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
			MII_MARVELL_LED_CTRL);
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		netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
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		reg &= 0xfc0f;
	}
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551 552 553
	return 0;
}

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static int rtl8211cl_phy_init(struct usbnet *dev)
{
	struct asix_data *data = (struct asix_data *)&dev->data;

	netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");

	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
	asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
	asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
		asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);

	if (data->ledmode == 12) {
		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
	}

	return 0;
}

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static int marvell_led_status(struct usbnet *dev, u16 speed)
{
	u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);

579
	netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
580 581 582 583 584 585 586 587 588 589 590 591 592

	/* Clear out the center LED bits - 0x03F0 */
	reg &= 0xfc0f;

	switch (speed) {
		case SPEED_1000:
			reg |= 0x03e0;
			break;
		case SPEED_100:
			reg |= 0x03b0;
			break;
		default:
			reg |= 0x02f0;
593 594
	}

595
	netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
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	asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);

	return 0;
}

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static int ax88178_reset(struct usbnet *dev)
{
	struct asix_data *data = (struct asix_data *)&dev->data;
	int ret;
	__le16 eeprom;
	u8 status;
	int gpio0 = 0;
608
	u32 phyid;
609 610

	asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
611
	netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
612 613 614 615 616

	asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
	asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
	asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);

617
	netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
618 619 620 621 622 623

	if (eeprom == cpu_to_le16(0xffff)) {
		data->phymode = PHY_MODE_MARVELL;
		data->ledmode = 0;
		gpio0 = 1;
	} else {
624
		data->phymode = le16_to_cpu(eeprom) & 0x7F;
625 626 627
		data->ledmode = le16_to_cpu(eeprom) >> 8;
		gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
	}
628
	netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
629

630
	/* Power up external GigaPHY through AX88178 GPIO pin */
631 632 633 634 635 636
	asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
	if ((le16_to_cpu(eeprom) >> 8) != 1) {
		asix_write_gpio(dev, 0x003c, 30);
		asix_write_gpio(dev, 0x001c, 300);
		asix_write_gpio(dev, 0x003c, 30);
	} else {
637
		netdev_dbg(dev->net, "gpio phymode == 1 path\n");
638 639 640 641
		asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
		asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
	}

642 643
	/* Read PHYID register *AFTER* powering up PHY */
	phyid = asix_get_phyid(dev);
644
	netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
645 646 647 648

	/* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
	asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);

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	asix_sw_reset(dev, 0);
	msleep(150);

	asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
	msleep(150);

	asix_write_rx_ctl(dev, 0);

	if (data->phymode == PHY_MODE_MARVELL) {
		marvell_phy_init(dev);
		msleep(60);
	} else if (data->phymode == PHY_MODE_RTL8211CL)
		rtl8211cl_phy_init(dev);

	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
			BMCR_RESET | BMCR_ANENABLE);
	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
			ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
	asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
			ADVERTISE_1000FULL);

	mii_nway_restart(&dev->mii);

672 673 674
	ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
	if (ret < 0)
		return ret;
675

676 677 678 679 680 681 682
	/* Rewrite MAC address */
	memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
							data->mac_addr);
	if (ret < 0)
		return ret;

683 684 685
	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
	if (ret < 0)
		return ret;
686 687 688 689

	return 0;
}

690 691 692
static int ax88178_link_reset(struct usbnet *dev)
{
	u16 mode;
693
	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
694
	struct asix_data *data = (struct asix_data *)&dev->data;
695
	u32 speed;
696

697
	netdev_dbg(dev->net, "ax88178_link_reset()\n");
698 699 700 701

	mii_check_media(&dev->mii, 1, 1);
	mii_ethtool_gset(&dev->mii, &ecmd);
	mode = AX88178_MEDIUM_DEFAULT;
702
	speed = ethtool_cmd_speed(&ecmd);
703

704
	if (speed == SPEED_1000)
705
		mode |= AX_MEDIUM_GM;
706
	else if (speed == SPEED_100)
707 708 709 710
		mode |= AX_MEDIUM_PS;
	else
		mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);

711 712
	mode |= AX_MEDIUM_ENCK;

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	if (ecmd.duplex == DUPLEX_FULL)
		mode |= AX_MEDIUM_FD;
	else
		mode &= ~AX_MEDIUM_FD;

718 719
	netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
		   speed, ecmd.duplex, mode);
720 721 722 723

	asix_write_medium_mode(dev, mode);

	if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
724
		marvell_led_status(dev, speed);
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	return 0;
}

static void ax88178_set_mfb(struct usbnet *dev)
{
	u16 mfb = AX_RX_CTL_MFB_16384;
	u16 rxctl;
	u16 medium;
	int old_rx_urb_size = dev->rx_urb_size;

	if (dev->hard_mtu < 2048) {
		dev->rx_urb_size = 2048;
		mfb = AX_RX_CTL_MFB_2048;
	} else if (dev->hard_mtu < 4096) {
		dev->rx_urb_size = 4096;
		mfb = AX_RX_CTL_MFB_4096;
	} else if (dev->hard_mtu < 8192) {
		dev->rx_urb_size = 8192;
		mfb = AX_RX_CTL_MFB_8192;
	} else if (dev->hard_mtu < 16384) {
		dev->rx_urb_size = 16384;
		mfb = AX_RX_CTL_MFB_16384;
748
	}
749 750 751 752 753 754 755 756 757 758 759 760 761

	rxctl = asix_read_rx_ctl(dev);
	asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);

	medium = asix_read_medium_status(dev);
	if (dev->net->mtu > 1500)
		medium |= AX_MEDIUM_JFE;
	else
		medium &= ~AX_MEDIUM_JFE;
	asix_write_medium_mode(dev, medium);

	if (dev->rx_urb_size > old_rx_urb_size)
		usbnet_unlink_rx_urbs(dev);
762 763
}

764
static int ax88178_change_mtu(struct net_device *net, int new_mtu)
765
{
766 767
	struct usbnet *dev = netdev_priv(net);
	int ll_mtu = new_mtu + net->hard_header_len + 4;
768

769
	netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
770

771 772 773 774 775 776 777 778 779 780 781 782 783
	if (new_mtu <= 0 || ll_mtu > 16384)
		return -EINVAL;

	if ((ll_mtu % dev->maxpacket) == 0)
		return -EDOM;

	net->mtu = new_mtu;
	dev->hard_mtu = net->mtu + net->hard_header_len;
	ax88178_set_mfb(dev);

	return 0;
}

784 785 786 787 788
static const struct net_device_ops ax88178_netdev_ops = {
	.ndo_open		= usbnet_open,
	.ndo_stop		= usbnet_stop,
	.ndo_start_xmit		= usbnet_start_xmit,
	.ndo_tx_timeout		= usbnet_tx_timeout,
789
	.ndo_set_mac_address 	= asix_set_mac_address,
790
	.ndo_validate_addr	= eth_validate_addr,
791
	.ndo_set_rx_mode	= asix_set_multicast,
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	.ndo_do_ioctl 		= asix_ioctl,
	.ndo_change_mtu 	= ax88178_change_mtu,
};

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static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
{
	int ret;
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	u8 buf[ETH_ALEN];
800 801 802 803

	usbnet_get_endpoints(dev,intf);

	/* Get the MAC address */
804 805
	ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
	if (ret < 0) {
806
		netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
807
		return ret;
808
	}
809 810

	asix_set_netdev_dev_addr(dev, buf);
811

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	/* Initialize MII structure */
	dev->mii.dev = dev->net;
	dev->mii.mdio_read = asix_mdio_read;
	dev->mii.mdio_write = asix_mdio_write;
	dev->mii.phy_id_mask = 0x1f;
	dev->mii.reg_num_mask = 0xff;
	dev->mii.supports_gmii = 1;
	dev->mii.phy_id = asix_get_phy_addr(dev);
820 821

	dev->net->netdev_ops = &ax88178_netdev_ops;
822
	dev->net->ethtool_ops = &ax88178_ethtool_ops;
823

824 825 826
	/* Blink LEDS so users know driver saw dongle */
	asix_sw_reset(dev, 0);
	msleep(150);
827

828 829
	asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
	msleep(150);
830 831 832 833 834 835 836 837

	/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
	if (dev->driver_info->flags & FLAG_FRAMING_AX) {
		/* hard_mtu  is still the default - the device does not support
		   jumbo eth frames */
		dev->rx_urb_size = 2048;
	}

838 839 840 841
	dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
	if (!dev->driver_priv)
			return -ENOMEM;

842
	return 0;
843 844 845 846
}

static const struct driver_info ax8817x_info = {
	.description = "ASIX AX8817x USB 2.0 Ethernet",
847 848
	.bind = ax88172_bind,
	.status = asix_status,
849 850
	.link_reset = ax88172_link_reset,
	.reset = ax88172_link_reset,
851
	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
852 853 854 855 856
	.data = 0x00130103,
};

static const struct driver_info dlink_dub_e100_info = {
	.description = "DLink DUB-E100 USB Ethernet",
857 858
	.bind = ax88172_bind,
	.status = asix_status,
859 860
	.link_reset = ax88172_link_reset,
	.reset = ax88172_link_reset,
861
	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
862 863 864 865 866
	.data = 0x009f9d9f,
};

static const struct driver_info netgear_fa120_info = {
	.description = "Netgear FA-120 USB Ethernet",
867 868
	.bind = ax88172_bind,
	.status = asix_status,
869 870
	.link_reset = ax88172_link_reset,
	.reset = ax88172_link_reset,
871
	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
872 873 874 875 876
	.data = 0x00130103,
};

static const struct driver_info hawking_uf200_info = {
	.description = "Hawking UF200 USB Ethernet",
877 878
	.bind = ax88172_bind,
	.status = asix_status,
879 880
	.link_reset = ax88172_link_reset,
	.reset = ax88172_link_reset,
881
	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
882 883 884 885 886 887
	.data = 0x001f1d1f,
};

static const struct driver_info ax88772_info = {
	.description = "ASIX AX88772 USB 2.0 Ethernet",
	.bind = ax88772_bind,
888
	.unbind = ax88772_unbind,
889
	.status = asix_status,
890
	.link_reset = ax88772_link_reset,
891
	.reset = ax88772_reset,
892
	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
893
	.rx_fixup = asix_rx_fixup_common,
894 895 896
	.tx_fixup = asix_tx_fixup,
};

897 898 899
static const struct driver_info ax88772b_info = {
	.description = "ASIX AX88772B USB 2.0 Ethernet",
	.bind = ax88772_bind,
900
	.unbind = ax88772_unbind,
901 902 903 904 905
	.status = asix_status,
	.link_reset = ax88772_link_reset,
	.reset = ax88772_reset,
	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
	         FLAG_MULTI_PACKET,
906
	.rx_fixup = asix_rx_fixup_common,
907 908 909 910
	.tx_fixup = asix_tx_fixup,
	.data = FLAG_EEPROM_MAC,
};

911 912 913
static const struct driver_info ax88178_info = {
	.description = "ASIX AX88178 USB 2.0 Ethernet",
	.bind = ax88178_bind,
914
	.unbind = ax88772_unbind,
915 916
	.status = asix_status,
	.link_reset = ax88178_link_reset,
917
	.reset = ax88178_reset,
918
	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
919
	.rx_fixup = asix_rx_fixup_common,
920
	.tx_fixup = asix_tx_fixup,
921 922
};

923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945
/*
 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
 * no-name packaging.
 * USB device strings are:
 *   1: Manufacturer: USBLINK
 *   2: Product: HG20F9 USB2.0
 *   3: Serial: 000003
 * Appears to be compatible with Asix 88772B.
 */
static const struct driver_info hg20f9_info = {
	.description = "HG20F9 USB 2.0 Ethernet",
	.bind = ax88772_bind,
	.unbind = ax88772_unbind,
	.status = asix_status,
	.link_reset = ax88772_link_reset,
	.reset = ax88772_reset,
	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
	         FLAG_MULTI_PACKET,
	.rx_fixup = asix_rx_fixup_common,
	.tx_fixup = asix_tx_fixup,
	.data = FLAG_EEPROM_MAC,
};

946 947
extern const struct driver_info ax88172a_info;

948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969
static const struct usb_device_id	products [] = {
{
	// Linksys USB200M
	USB_DEVICE (0x077b, 0x2226),
	.driver_info =	(unsigned long) &ax8817x_info,
}, {
	// Netgear FA120
	USB_DEVICE (0x0846, 0x1040),
	.driver_info =  (unsigned long) &netgear_fa120_info,
}, {
	// DLink DUB-E100
	USB_DEVICE (0x2001, 0x1a00),
	.driver_info =  (unsigned long) &dlink_dub_e100_info,
}, {
	// Intellinet, ST Lab USB Ethernet
	USB_DEVICE (0x0b95, 0x1720),
	.driver_info =  (unsigned long) &ax8817x_info,
}, {
	// Hawking UF200, TrendNet TU2-ET100
	USB_DEVICE (0x07b8, 0x420a),
	.driver_info =  (unsigned long) &hawking_uf200_info,
}, {
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	// Billionton Systems, USB2AR
	USB_DEVICE (0x08dd, 0x90ff),
	.driver_info =  (unsigned long) &ax8817x_info,
973 974 975 976 977 978 979 980
}, {
	// ATEN UC210T
	USB_DEVICE (0x0557, 0x2009),
	.driver_info =  (unsigned long) &ax8817x_info,
}, {
	// Buffalo LUA-U2-KTX
	USB_DEVICE (0x0411, 0x003d),
	.driver_info =  (unsigned long) &ax8817x_info,
981 982 983 984
}, {
	// Buffalo LUA-U2-GT 10/100/1000
	USB_DEVICE (0x0411, 0x006e),
	.driver_info =  (unsigned long) &ax88178_info,
985 986 987 988
}, {
	// Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
	USB_DEVICE (0x6189, 0x182d),
	.driver_info =  (unsigned long) &ax8817x_info,
989 990 991 992
}, {
	// Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
	USB_DEVICE (0x0df6, 0x0056),
	.driver_info =  (unsigned long) &ax88178_info,
993 994 995 996 997 998 999 1000 1001 1002 1003 1004
}, {
	// corega FEther USB2-TX
	USB_DEVICE (0x07aa, 0x0017),
	.driver_info =  (unsigned long) &ax8817x_info,
}, {
	// Surecom EP-1427X-2
	USB_DEVICE (0x1189, 0x0893),
	.driver_info = (unsigned long) &ax8817x_info,
}, {
	// goodway corp usb gwusb2e
	USB_DEVICE (0x1631, 0x6200),
	.driver_info = (unsigned long) &ax8817x_info,
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}, {
	// JVC MP-PRX1 Port Replicator
	USB_DEVICE (0x04f1, 0x3008),
	.driver_info = (unsigned long) &ax8817x_info,
1009 1010 1011 1012
}, {
	// Lenovo U2L100P 10/100
	USB_DEVICE (0x17ef, 0x7203),
	.driver_info = (unsigned long) &ax88772_info,
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}, {
	// ASIX AX88772B 10/100
	USB_DEVICE (0x0b95, 0x772b),
1016
	.driver_info = (unsigned long) &ax88772b_info,
1017 1018
}, {
	// ASIX AX88772 10/100
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	USB_DEVICE (0x0b95, 0x7720),
	.driver_info = (unsigned long) &ax88772_info,
1021 1022 1023
}, {
	// ASIX AX88178 10/100/1000
	USB_DEVICE (0x0b95, 0x1780),
1024
	.driver_info = (unsigned long) &ax88178_info,
1025 1026 1027 1028
}, {
	// Logitec LAN-GTJ/U2A
	USB_DEVICE (0x0789, 0x0160),
	.driver_info = (unsigned long) &ax88178_info,
1029 1030 1031 1032
}, {
	// Linksys USB200M Rev 2
	USB_DEVICE (0x13b1, 0x0018),
	.driver_info = (unsigned long) &ax88772_info,
1033 1034 1035 1036
}, {
	// 0Q0 cable ethernet
	USB_DEVICE (0x1557, 0x7720),
	.driver_info = (unsigned long) &ax88772_info,
1037 1038 1039 1040
}, {
	// DLink DUB-E100 H/W Ver B1
	USB_DEVICE (0x07d1, 0x3c05),
	.driver_info = (unsigned long) &ax88772_info,
1041 1042 1043 1044
}, {
	// DLink DUB-E100 H/W Ver B1 Alternate
	USB_DEVICE (0x2001, 0x3c05),
	.driver_info = (unsigned long) &ax88772_info,
1045 1046 1047 1048
}, {
       // DLink DUB-E100 H/W Ver C1
       USB_DEVICE (0x2001, 0x1a02),
       .driver_info = (unsigned long) &ax88772_info,
1049 1050 1051 1052
}, {
	// Linksys USB1000
	USB_DEVICE (0x1737, 0x0039),
	.driver_info = (unsigned long) &ax88178_info,
1053 1054 1055 1056
}, {
	// IO-DATA ETG-US2
	USB_DEVICE (0x04bb, 0x0930),
	.driver_info = (unsigned long) &ax88178_info,
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}, {
	// Belkin F5D5055
	USB_DEVICE(0x050d, 0x5055),
	.driver_info = (unsigned long) &ax88178_info,
1061 1062 1063 1064
}, {
	// Apple USB Ethernet Adapter
	USB_DEVICE(0x05ac, 0x1402),
	.driver_info = (unsigned long) &ax88772_info,
1065 1066 1067 1068
}, {
	// Cables-to-Go USB Ethernet Adapter
	USB_DEVICE(0x0b95, 0x772a),
	.driver_info = (unsigned long) &ax88772_info,
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}, {
	// ABOCOM for pci
	USB_DEVICE(0x14ea, 0xab11),
	.driver_info = (unsigned long) &ax88178_info,
}, {
	// ASIX 88772a
	USB_DEVICE(0x0db0, 0xa877),
	.driver_info = (unsigned long) &ax88772_info,
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Aurelien Jacobs 已提交
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}, {
	// Asus USB Ethernet Adapter
	USB_DEVICE (0x0b95, 0x7e2b),
	.driver_info = (unsigned long) &ax88772_info,
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}, {
	/* ASIX 88172a demo board */
	USB_DEVICE(0x0b95, 0x172a),
	.driver_info = (unsigned long) &ax88172a_info,
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}, {
	/*
	 * USBLINK HG20F9 "USB 2.0 LAN"
	 * Appears to have gazumped Linksys's manufacturer ID but
	 * doesn't (yet) conflict with any known Linksys product.
	 */
	USB_DEVICE(0x066b, 0x20f9),
	.driver_info = (unsigned long) &hg20f9_info,
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},
	{ },		// END
};
MODULE_DEVICE_TABLE(usb, products);

static struct usb_driver asix_driver = {
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	.name =		DRIVER_NAME,
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	.id_table =	products,
	.probe =	usbnet_probe,
	.suspend =	usbnet_suspend,
	.resume =	usbnet_resume,
	.disconnect =	usbnet_disconnect,
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	.supports_autosuspend = 1,
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	.disable_hub_initiated_lpm = 1,
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};

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module_usb_driver(asix_driver);
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MODULE_AUTHOR("David Hollis");
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MODULE_VERSION(DRIVER_VERSION);
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MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
MODULE_LICENSE("GPL");