marvell.c 53.1 KB
Newer Older
1 2 3 4 5 6 7 8 9
/*
 * drivers/net/phy/marvell.c
 *
 * Driver for Marvell PHYs
 *
 * Author: Andy Fleming
 *
 * Copyright (c) 2004 Freescale Semiconductor, Inc.
 *
10 11
 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
 *
12 13 14 15 16 17 18 19
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */
#include <linux/kernel.h>
#include <linux/string.h>
20
#include <linux/ctype.h>
21 22
#include <linux/errno.h>
#include <linux/unistd.h>
23
#include <linux/hwmon.h>
24 25 26 27 28 29 30 31 32 33 34 35
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
36
#include <linux/marvell_phy.h>
37
#include <linux/of.h>
38

39
#include <linux/io.h>
40
#include <asm/irq.h>
41
#include <linux/uaccess.h>
42

43 44
#define MII_MARVELL_PHY_PAGE		22

45 46 47 48 49 50 51
#define MII_M1011_IEVENT		0x13
#define MII_M1011_IEVENT_CLEAR		0x0000

#define MII_M1011_IMASK			0x12
#define MII_M1011_IMASK_INIT		0x6400
#define MII_M1011_IMASK_CLEAR		0x0000

52
#define MII_M1011_PHY_SCR		0x10
53 54
#define MII_M1011_PHY_SCR_MDI		0x0000
#define MII_M1011_PHY_SCR_MDI_X		0x0020
55 56
#define MII_M1011_PHY_SCR_AUTO_CROSS	0x0060

57
#define MII_M1145_PHY_EXT_ADDR_PAGE	0x16
58
#define MII_M1145_PHY_EXT_SR		0x1b
59 60 61
#define MII_M1145_PHY_EXT_CR		0x14
#define MII_M1145_RGMII_RX_DELAY	0x0080
#define MII_M1145_RGMII_TX_DELAY	0x0002
62 63 64
#define MII_M1145_HWCFG_MODE_SGMII_NO_CLK	0x4
#define MII_M1145_HWCFG_MODE_MASK		0xf
#define MII_M1145_HWCFG_FIBER_COPPER_AUTO	0x8000
65

66 67 68 69
#define MII_M1145_HWCFG_MODE_SGMII_NO_CLK	0x4
#define MII_M1145_HWCFG_MODE_MASK		0xf
#define MII_M1145_HWCFG_FIBER_COPPER_AUTO	0x8000

70 71 72
#define MII_M1111_PHY_LED_CONTROL	0x18
#define MII_M1111_PHY_LED_DIRECT	0x4100
#define MII_M1111_PHY_LED_COMBINE	0x411c
73 74 75 76
#define MII_M1111_PHY_EXT_CR		0x14
#define MII_M1111_RX_DELAY		0x80
#define MII_M1111_TX_DELAY		0x2
#define MII_M1111_PHY_EXT_SR		0x1b
77 78 79 80

#define MII_M1111_HWCFG_MODE_MASK		0xf
#define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
#define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
81
#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
L
Liu Yu-B13201 已提交
82
#define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
83 84 85 86 87 88
#define MII_M1111_HWCFG_FIBER_COPPER_AUTO	0x8000
#define MII_M1111_HWCFG_FIBER_COPPER_RES	0x2000

#define MII_M1111_COPPER		0
#define MII_M1111_FIBER			1

89 90 91 92 93 94
#define MII_88E1121_PHY_MSCR_PAGE	2
#define MII_88E1121_PHY_MSCR_REG	21
#define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
#define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
#define MII_88E1121_PHY_MSCR_DELAY_MASK	(~(0x3 << 4))

95 96 97 98 99 100 101 102 103 104 105
#define MII_88E1121_MISC_TEST				0x1a
#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
#define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
#define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f

#define MII_88E1510_TEMP_SENSOR		0x1b
#define MII_88E1510_TEMP_SENSOR_MASK	0xff

106 107
#define MII_88E1318S_PHY_MSCR1_REG	16
#define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
108

109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130
/* Copper Specific Interrupt Enable Register */
#define MII_88E1318S_PHY_CSIER                              0x12
/* WOL Event Interrupt Enable */
#define MII_88E1318S_PHY_CSIER_WOL_EIE                      BIT(7)

/* LED Timer Control Register */
#define MII_88E1318S_PHY_LED_PAGE                           0x03
#define MII_88E1318S_PHY_LED_TCR                            0x12
#define MII_88E1318S_PHY_LED_TCR_FORCE_INT                  BIT(15)
#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE                BIT(7)
#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW             BIT(11)

/* Magic Packet MAC address registers */
#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2                 0x17
#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1                 0x18
#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0                 0x19

#define MII_88E1318S_PHY_WOL_PAGE                           0x11
#define MII_88E1318S_PHY_WOL_CTRL                           0x10
#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS          BIT(12)
#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)

131 132 133 134
#define MII_88E1121_PHY_LED_CTRL	16
#define MII_88E1121_PHY_LED_PAGE	3
#define MII_88E1121_PHY_LED_DEF		0x0030

135 136 137 138 139 140 141 142
#define MII_M1011_PHY_STATUS		0x11
#define MII_M1011_PHY_STATUS_1000	0x8000
#define MII_M1011_PHY_STATUS_100	0x4000
#define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
#define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
#define MII_M1011_PHY_STATUS_RESOLVED	0x0800
#define MII_M1011_PHY_STATUS_LINK	0x0400

M
Michal Simek 已提交
143 144
#define MII_M1116R_CONTROL_REG_MAC	21

145 146 147
#define MII_88E3016_PHY_SPEC_CTRL	0x10
#define MII_88E3016_DISABLE_SCRAMBLER	0x0200
#define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
148

149 150 151 152 153
#define MII_88E1510_GEN_CTRL_REG_1		0x14
#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
#define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */

154 155 156 157 158 159 160 161 162 163 164 165 166
#define LPA_FIBER_1000HALF	0x40
#define LPA_FIBER_1000FULL	0x20

#define LPA_PAUSE_FIBER	0x180
#define LPA_PAUSE_ASYM_FIBER	0x100

#define ADVERTISE_FIBER_1000HALF	0x40
#define ADVERTISE_FIBER_1000FULL	0x20

#define ADVERTISE_PAUSE_FIBER		0x180
#define ADVERTISE_PAUSE_ASYM_FIBER	0x100

#define REGISTER_LINK_STATUS	0x400
167
#define NB_FIBER_STATS	1
168

169 170 171 172
MODULE_DESCRIPTION("Marvell PHY driver");
MODULE_AUTHOR("Andy Fleming");
MODULE_LICENSE("GPL");

173 174 175 176 177 178 179 180
struct marvell_hw_stat {
	const char *string;
	u8 page;
	u8 reg;
	u8 bits;
};

static struct marvell_hw_stat marvell_hw_stats[] = {
181
	{ "phy_receive_errors_copper", 0, 21, 16},
182
	{ "phy_idle_errors", 0, 10, 8 },
183
	{ "phy_receive_errors_fiber", 1, 21, 16},
184 185 186 187
};

struct marvell_priv {
	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
188 189
	char *hwmon_name;
	struct device *hwmon_dev;
190 191
};

192 193 194 195 196 197 198 199 200 201
static int marvell_get_page(struct phy_device *phydev)
{
	return phy_read(phydev, MII_MARVELL_PHY_PAGE);
}

static int marvell_set_page(struct phy_device *phydev, int page)
{
	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
}

202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218
static int marvell_ack_interrupt(struct phy_device *phydev)
{
	int err;

	/* Clear the interrupts by reading the reg */
	err = phy_read(phydev, MII_M1011_IEVENT);

	if (err < 0)
		return err;

	return 0;
}

static int marvell_config_intr(struct phy_device *phydev)
{
	int err;

219
	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
220 221 222 223 224 225 226
		err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
	else
		err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);

	return err;
}

227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263
static int marvell_set_polarity(struct phy_device *phydev, int polarity)
{
	int reg;
	int err;
	int val;

	/* get the current settings */
	reg = phy_read(phydev, MII_M1011_PHY_SCR);
	if (reg < 0)
		return reg;

	val = reg;
	val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
	switch (polarity) {
	case ETH_TP_MDI:
		val |= MII_M1011_PHY_SCR_MDI;
		break;
	case ETH_TP_MDI_X:
		val |= MII_M1011_PHY_SCR_MDI_X;
		break;
	case ETH_TP_MDI_AUTO:
	case ETH_TP_MDI_INVALID:
	default:
		val |= MII_M1011_PHY_SCR_AUTO_CROSS;
		break;
	}

	if (val != reg) {
		/* Set the new polarity value in the register */
		err = phy_write(phydev, MII_M1011_PHY_SCR, val);
		if (err)
			return err;
	}

	return 0;
}

264 265 266 267 268 269
static int marvell_config_aneg(struct phy_device *phydev)
{
	int err;

	/* The Marvell PHY has an errata which requires
	 * that certain registers get written in order
270 271
	 * to restart autonegotiation
	 */
272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296
	err = phy_write(phydev, MII_BMCR, BMCR_RESET);

	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1d, 0x1f);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0x200c);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1d, 0x5);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0x100);
	if (err < 0)
		return err;

297
	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
298 299 300 301 302 303 304
	if (err < 0)
		return err;

	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
			MII_M1111_PHY_LED_DIRECT);
	if (err < 0)
		return err;
305 306

	err = genphy_config_aneg(phydev);
307 308
	if (err < 0)
		return err;
309

310 311 312
	if (phydev->autoneg != AUTONEG_ENABLE) {
		int bmcr;

313
		/* A write to speed/duplex bits (that is performed by
314 315 316 317 318 319 320 321 322 323 324 325 326
		 * genphy_config_aneg() call above) must be followed by
		 * a software reset. Otherwise, the write has no effect.
		 */
		bmcr = phy_read(phydev, MII_BMCR);
		if (bmcr < 0)
			return bmcr;

		err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
		if (err < 0)
			return err;
	}

	return 0;
327 328
}

329 330 331 332 333 334 335 336 337 338
static int m88e1111_config_aneg(struct phy_device *phydev)
{
	int err;

	/* The Marvell PHY has an errata which requires
	 * that certain registers get written in order
	 * to restart autonegotiation
	 */
	err = phy_write(phydev, MII_BMCR, BMCR_RESET);

339
	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370
	if (err < 0)
		return err;

	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
			MII_M1111_PHY_LED_DIRECT);
	if (err < 0)
		return err;

	err = genphy_config_aneg(phydev);
	if (err < 0)
		return err;

	if (phydev->autoneg != AUTONEG_ENABLE) {
		int bmcr;

		/* A write to speed/duplex bits (that is performed by
		 * genphy_config_aneg() call above) must be followed by
		 * a software reset. Otherwise, the write has no effect.
		 */
		bmcr = phy_read(phydev, MII_BMCR);
		if (bmcr < 0)
			return bmcr;

		err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
		if (err < 0)
			return err;
	}

	return 0;
}

371
#ifdef CONFIG_OF_MDIO
372
/* Set and/or override some configuration registers based on the
373 374 375 376 377 378 379 380 381 382 383 384 385 386 387
 * marvell,reg-init property stored in the of_node for the phydev.
 *
 * marvell,reg-init = <reg-page reg mask value>,...;
 *
 * There may be one or more sets of <reg-page reg mask value>:
 *
 * reg-page: which register bank to use.
 * reg: the register.
 * mask: if non-zero, ANDed with existing register value.
 * value: ORed with the masked value and written to the regiser.
 *
 */
static int marvell_of_reg_init(struct phy_device *phydev)
{
	const __be32 *paddr;
388
	int len, i, saved_page, current_page, ret;
389

A
Andrew Lunn 已提交
390
	if (!phydev->mdio.dev.of_node)
391 392
		return 0;

A
Andrew Lunn 已提交
393 394
	paddr = of_get_property(phydev->mdio.dev.of_node,
				"marvell,reg-init", &len);
395 396 397
	if (!paddr || len < (4 * sizeof(*paddr)))
		return 0;

398
	saved_page = marvell_get_page(phydev);
399 400 401 402 403 404 405
	if (saved_page < 0)
		return saved_page;
	current_page = saved_page;

	ret = 0;
	len /= sizeof(*paddr);
	for (i = 0; i < len - 3; i += 4) {
406
		u16 page = be32_to_cpup(paddr + i);
407 408 409 410 411
		u16 reg = be32_to_cpup(paddr + i + 1);
		u16 mask = be32_to_cpup(paddr + i + 2);
		u16 val_bits = be32_to_cpup(paddr + i + 3);
		int val;

412 413 414
		if (page != current_page) {
			current_page = page;
			ret = marvell_set_page(phydev, page);
415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434
			if (ret < 0)
				goto err;
		}

		val = 0;
		if (mask) {
			val = phy_read(phydev, reg);
			if (val < 0) {
				ret = val;
				goto err;
			}
			val &= mask;
		}
		val |= val_bits;

		ret = phy_write(phydev, reg, val);
		if (ret < 0)
			goto err;
	}
err:
435
	if (current_page != saved_page) {
436
		i = marvell_set_page(phydev, saved_page);
437 438 439 440 441 442 443 444 445 446 447 448
		if (ret == 0)
			ret = i;
	}
	return ret;
}
#else
static int marvell_of_reg_init(struct phy_device *phydev)
{
	return 0;
}
#endif /* CONFIG_OF_MDIO */

449 450
static int m88e1121_config_aneg(struct phy_device *phydev)
{
451 452
	int err, oldpage, mscr;

453
	oldpage = marvell_get_page(phydev);
454

455
	err = marvell_set_page(phydev, MII_88E1121_PHY_MSCR_PAGE);
456 457
	if (err < 0)
		return err;
A
Arnaud Patard 已提交
458

459
	if (phy_interface_is_rgmii(phydev)) {
A
Arnaud Patard 已提交
460 461 462 463 464 465 466 467 468 469 470 471 472 473 474
		mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
			MII_88E1121_PHY_MSCR_DELAY_MASK;

		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
			mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
				 MII_88E1121_PHY_MSCR_TX_DELAY);
		else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
			mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
		else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
			mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;

		err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
		if (err < 0)
			return err;
	}
475

476
	marvell_set_page(phydev, oldpage);
477 478 479 480 481 482 483 484 485 486

	err = phy_write(phydev, MII_BMCR, BMCR_RESET);
	if (err < 0)
		return err;

	err = phy_write(phydev, MII_M1011_PHY_SCR,
			MII_M1011_PHY_SCR_AUTO_CROSS);
	if (err < 0)
		return err;

487
	return genphy_config_aneg(phydev);
488 489
}

490
static int m88e1318_config_aneg(struct phy_device *phydev)
491 492 493
{
	int err, oldpage, mscr;

494
	oldpage = marvell_get_page(phydev);
495

496
	err = marvell_set_page(phydev, MII_88E1121_PHY_MSCR_PAGE);
497 498 499
	if (err < 0)
		return err;

500 501
	mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
	mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
502

503
	err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
504 505 506
	if (err < 0)
		return err;

507
	err = marvell_set_page(phydev, oldpage);
508 509 510 511 512 513
	if (err < 0)
		return err;

	return m88e1121_config_aneg(phydev);
}

514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602
/**
 * ethtool_adv_to_fiber_adv_t
 * @ethadv: the ethtool advertisement settings
 *
 * A small helper function that translates ethtool advertisement
 * settings to phy autonegotiation advertisements for the
 * MII_ADV register for fiber link.
 */
static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
{
	u32 result = 0;

	if (ethadv & ADVERTISED_1000baseT_Half)
		result |= ADVERTISE_FIBER_1000HALF;
	if (ethadv & ADVERTISED_1000baseT_Full)
		result |= ADVERTISE_FIBER_1000FULL;

	if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
		result |= LPA_PAUSE_ASYM_FIBER;
	else if (ethadv & ADVERTISE_PAUSE_CAP)
		result |= (ADVERTISE_PAUSE_FIBER
			   & (~ADVERTISE_PAUSE_ASYM_FIBER));

	return result;
}

/**
 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
 * @phydev: target phy_device struct
 *
 * Description: If auto-negotiation is enabled, we configure the
 *   advertising, and then restart auto-negotiation.  If it is not
 *   enabled, then we write the BMCR. Adapted for fiber link in
 *   some Marvell's devices.
 */
static int marvell_config_aneg_fiber(struct phy_device *phydev)
{
	int changed = 0;
	int err;
	int adv, oldadv;
	u32 advertise;

	if (phydev->autoneg != AUTONEG_ENABLE)
		return genphy_setup_forced(phydev);

	/* Only allow advertising what this PHY supports */
	phydev->advertising &= phydev->supported;
	advertise = phydev->advertising;

	/* Setup fiber advertisement */
	adv = phy_read(phydev, MII_ADVERTISE);
	if (adv < 0)
		return adv;

	oldadv = adv;
	adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
		| LPA_PAUSE_FIBER);
	adv |= ethtool_adv_to_fiber_adv_t(advertise);

	if (adv != oldadv) {
		err = phy_write(phydev, MII_ADVERTISE, adv);
		if (err < 0)
			return err;

		changed = 1;
	}

	if (changed == 0) {
		/* Advertisement hasn't changed, but maybe aneg was never on to
		 * begin with?  Or maybe phy was isolated?
		 */
		int ctl = phy_read(phydev, MII_BMCR);

		if (ctl < 0)
			return ctl;

		if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
			changed = 1; /* do restart aneg */
	}

	/* Only restart aneg if we are advertising something different
	 * than we were before.
	 */
	if (changed > 0)
		changed = genphy_restart_aneg(phydev);

	return changed;
}

M
Michal Simek 已提交
603 604 605 606
static int m88e1510_config_aneg(struct phy_device *phydev)
{
	int err;

607
	err = marvell_set_page(phydev, MII_M1111_COPPER);
608 609 610 611
	if (err < 0)
		goto error;

	/* Configure the copper link first */
M
Michal Simek 已提交
612 613
	err = m88e1318_config_aneg(phydev);
	if (err < 0)
614
		goto error;
M
Michal Simek 已提交
615

616
	/* Then the fiber link */
617
	err = marvell_set_page(phydev, MII_M1111_FIBER);
618 619 620 621 622 623 624
	if (err < 0)
		goto error;

	err = marvell_config_aneg_fiber(phydev);
	if (err < 0)
		goto error;

625
	return marvell_set_page(phydev, MII_M1111_COPPER);
626 627

error:
628
	marvell_set_page(phydev, MII_M1111_COPPER);
629
	return err;
630 631 632 633 634
}

static int marvell_config_init(struct phy_device *phydev)
{
	/* Set registers from marvell,reg-init DT property */
M
Michal Simek 已提交
635 636 637
	return marvell_of_reg_init(phydev);
}

M
Michal Simek 已提交
638 639 640 641 642 643 644 645 646 647 648 649 650
static int m88e1116r_config_init(struct phy_device *phydev)
{
	int temp;
	int err;

	temp = phy_read(phydev, MII_BMCR);
	temp |= BMCR_RESET;
	err = phy_write(phydev, MII_BMCR, temp);
	if (err < 0)
		return err;

	mdelay(500);

651
	err = marvell_set_page(phydev, 0);
M
Michal Simek 已提交
652 653 654 655 656 657 658 659 660 661 662
	if (err < 0)
		return err;

	temp = phy_read(phydev, MII_M1011_PHY_SCR);
	temp |= (7 << 12);	/* max number of gigabit attempts */
	temp |= (1 << 11);	/* enable downshift */
	temp |= MII_M1011_PHY_SCR_AUTO_CROSS;
	err = phy_write(phydev, MII_M1011_PHY_SCR, temp);
	if (err < 0)
		return err;

663
	err = marvell_set_page(phydev, 2);
M
Michal Simek 已提交
664 665 666 667 668 669 670 671
	if (err < 0)
		return err;
	temp = phy_read(phydev, MII_M1116R_CONTROL_REG_MAC);
	temp |= (1 << 5);
	temp |= (1 << 4);
	err = phy_write(phydev, MII_M1116R_CONTROL_REG_MAC, temp);
	if (err < 0)
		return err;
672
	err = marvell_set_page(phydev, 0);
M
Michal Simek 已提交
673 674 675 676 677 678 679 680 681 682 683
	if (err < 0)
		return err;

	temp = phy_read(phydev, MII_BMCR);
	temp |= BMCR_RESET;
	err = phy_write(phydev, MII_BMCR, temp);
	if (err < 0)
		return err;

	mdelay(500);

684
	return marvell_config_init(phydev);
M
Michal Simek 已提交
685 686
}

687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702
static int m88e3016_config_init(struct phy_device *phydev)
{
	int reg;

	/* Enable Scrambler and Auto-Crossover */
	reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
	if (reg < 0)
		return reg;

	reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
	reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;

	reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
	if (reg < 0)
		return reg;

703
	return marvell_config_init(phydev);
704 705
}

706
static int m88e1111_config_init_rgmii(struct phy_device *phydev)
707 708
{
	int err;
709 710
	int temp;

711 712 713
	temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
	if (temp < 0)
		return temp;
714

715 716 717 718 719 720 721 722 723
	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
		temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
		temp &= ~MII_M1111_TX_DELAY;
		temp |= MII_M1111_RX_DELAY;
	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
		temp &= ~MII_M1111_RX_DELAY;
		temp |= MII_M1111_TX_DELAY;
	}
724

725 726 727
	err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
	if (err < 0)
		return err;
728

729 730 731
	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
	if (temp < 0)
		return temp;
732

733
	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
734

735 736 737 738
	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
	else
		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
739

740 741
	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
}
742

743 744 745 746
static int m88e1111_config_init_sgmii(struct phy_device *phydev)
{
	int err;
	int temp;
747

748 749 750
	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
	if (temp < 0)
		return temp;
751

752 753 754
	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
	temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
	temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
755

756 757 758
	err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
	if (err < 0)
		return err;
759

760 761 762 763
	/* make sure copper is selected */
	err = phy_read(phydev, MII_M1145_PHY_EXT_ADDR_PAGE);
	if (err < 0)
		return err;
764

765 766
	return phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, err & (~0xff));
}
L
Liu Yu-B13201 已提交
767

768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821
static int m88e1111_config_init_rtbi(struct phy_device *phydev)
{
	int err;
	int temp;

	temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
	if (temp < 0)
		return temp;

	temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
	err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
	if (err < 0)
		return err;

	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
	if (temp < 0)
		return temp;

	temp &= ~(MII_M1111_HWCFG_MODE_MASK |
		  MII_M1111_HWCFG_FIBER_COPPER_RES);
	temp |= 0x7 | MII_M1111_HWCFG_FIBER_COPPER_AUTO;

	err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
	if (err < 0)
		return err;

	/* soft reset */
	err = phy_write(phydev, MII_BMCR, BMCR_RESET);
	if (err < 0)
		return err;

	do
		temp = phy_read(phydev, MII_BMCR);
	while (temp & BMCR_RESET);

	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
	if (temp < 0)
		return temp;

	temp &= ~(MII_M1111_HWCFG_MODE_MASK |
		  MII_M1111_HWCFG_FIBER_COPPER_RES);
	temp |= MII_M1111_HWCFG_MODE_COPPER_RTBI |
		MII_M1111_HWCFG_FIBER_COPPER_AUTO;

	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
}

static int m88e1111_config_init(struct phy_device *phydev)
{
	int err;

	if (phy_interface_is_rgmii(phydev)) {
		err = m88e1111_config_init_rgmii(phydev);
		if (err)
L
Liu Yu-B13201 已提交
822
			return err;
823
	}
L
Liu Yu-B13201 已提交
824

825 826
	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
		err = m88e1111_config_init_sgmii(phydev);
L
Liu Yu-B13201 已提交
827 828
		if (err < 0)
			return err;
829
	}
L
Liu Yu-B13201 已提交
830

831 832
	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
		err = m88e1111_config_init_rtbi(phydev);
L
Liu Yu-B13201 已提交
833 834 835 836
		if (err < 0)
			return err;
	}

837 838 839
	err = marvell_of_reg_init(phydev);
	if (err < 0)
		return err;
L
Liu Yu-B13201 已提交
840

841
	return phy_write(phydev, MII_BMCR, BMCR_RESET);
842 843
}

844 845 846 847
static int m88e1121_config_init(struct phy_device *phydev)
{
	int err, oldpage;

848
	oldpage = marvell_get_page(phydev);
849

850
	err = marvell_set_page(phydev, MII_88E1121_PHY_LED_PAGE);
851 852 853 854 855 856 857 858 859
	if (err < 0)
		return err;

	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
	err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
			MII_88E1121_PHY_LED_DEF);
	if (err < 0)
		return err;

860
	marvell_set_page(phydev, oldpage);
861 862 863 864 865

	/* Set marvell,reg-init configuration from device tree */
	return marvell_config_init(phydev);
}

866 867 868 869 870 871 872 873
static int m88e1510_config_init(struct phy_device *phydev)
{
	int err;
	int temp;

	/* SGMII-to-Copper mode initialization */
	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
		/* Select page 18 */
874
		err = marvell_set_page(phydev, 18);
875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892
		if (err < 0)
			return err;

		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
		temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
		temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
		temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
		err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
		if (err < 0)
			return err;

		/* PHY reset is necessary after changing MODE[2:0] */
		temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
		err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
		if (err < 0)
			return err;

		/* Reset page selection */
893
		err = marvell_set_page(phydev, 0);
894 895 896 897
		if (err < 0)
			return err;
	}

898
	return m88e1121_config_init(phydev);
899 900
}

901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922
static int m88e1118_config_aneg(struct phy_device *phydev)
{
	int err;

	err = phy_write(phydev, MII_BMCR, BMCR_RESET);
	if (err < 0)
		return err;

	err = phy_write(phydev, MII_M1011_PHY_SCR,
			MII_M1011_PHY_SCR_AUTO_CROSS);
	if (err < 0)
		return err;

	err = genphy_config_aneg(phydev);
	return 0;
}

static int m88e1118_config_init(struct phy_device *phydev)
{
	int err;

	/* Change address */
923
	err = marvell_set_page(phydev, 2);
924 925 926 927 928 929 930 931 932
	if (err < 0)
		return err;

	/* Enable 1000 Mbit */
	err = phy_write(phydev, 0x15, 0x1070);
	if (err < 0)
		return err;

	/* Change address */
933
	err = marvell_set_page(phydev, 3);
934 935 936 937
	if (err < 0)
		return err;

	/* Adjust LED Control */
938 939 940 941
	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
		err = phy_write(phydev, 0x10, 0x1100);
	else
		err = phy_write(phydev, 0x10, 0x021e);
942 943 944
	if (err < 0)
		return err;

945 946 947 948
	err = marvell_of_reg_init(phydev);
	if (err < 0)
		return err;

949
	/* Reset address */
950
	err = marvell_set_page(phydev, 0);
951 952 953
	if (err < 0)
		return err;

954
	return phy_write(phydev, MII_BMCR, BMCR_RESET);
955 956
}

957 958 959 960 961
static int m88e1149_config_init(struct phy_device *phydev)
{
	int err;

	/* Change address */
962
	err = marvell_set_page(phydev, 2);
963 964 965 966 967 968 969 970
	if (err < 0)
		return err;

	/* Enable 1000 Mbit */
	err = phy_write(phydev, 0x15, 0x1048);
	if (err < 0)
		return err;

971 972 973 974
	err = marvell_of_reg_init(phydev);
	if (err < 0)
		return err;

975
	/* Reset address */
976
	err = marvell_set_page(phydev, 0);
977 978 979
	if (err < 0)
		return err;

980
	return phy_write(phydev, MII_BMCR, BMCR_RESET);
981 982
}

983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036
static int m88e1145_config_init_rgmii(struct phy_device *phydev)
{
	int err;
	int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);

	if (temp < 0)
		return temp;

	temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);

	err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
	if (err < 0)
		return err;

	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
		err = phy_write(phydev, 0x1d, 0x0012);
		if (err < 0)
			return err;

		temp = phy_read(phydev, 0x1e);
		if (temp < 0)
			return temp;

		temp &= 0xf03f;
		temp |= 2 << 9;	/* 36 ohm */
		temp |= 2 << 6;	/* 39 ohm */

		err = phy_write(phydev, 0x1e, temp);
		if (err < 0)
			return err;

		err = phy_write(phydev, 0x1d, 0x3);
		if (err < 0)
			return err;

		err = phy_write(phydev, 0x1e, 0x8000);
	}
	return err;
}

static int m88e1145_config_init_sgmii(struct phy_device *phydev)
{
	int temp = phy_read(phydev, MII_M1145_PHY_EXT_SR);

	if (temp < 0)
		return temp;

	temp &= ~MII_M1145_HWCFG_MODE_MASK;
	temp |= MII_M1145_HWCFG_MODE_SGMII_NO_CLK;
	temp |= MII_M1145_HWCFG_FIBER_COPPER_AUTO;

	return phy_write(phydev, MII_M1145_PHY_EXT_SR, temp);
}

1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057
static int m88e1145_config_init(struct phy_device *phydev)
{
	int err;

	/* Take care of errata E0 & E1 */
	err = phy_write(phydev, 0x1d, 0x001b);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0x418f);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1d, 0x0016);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0xa2da);
	if (err < 0)
		return err;

1058
	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1059
		err = m88e1145_config_init_rgmii(phydev);
1060 1061 1062 1063
		if (err < 0)
			return err;
	}

1064
	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1065
		err = m88e1145_config_init_sgmii(phydev);
1066 1067 1068 1069
		if (err < 0)
			return err;
	}

1070 1071 1072 1073
	err = marvell_of_reg_init(phydev);
	if (err < 0)
		return err;

1074 1075
	return 0;
}
1076

1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107
/**
 * fiber_lpa_to_ethtool_lpa_t
 * @lpa: value of the MII_LPA register for fiber link
 *
 * A small helper function that translates MII_LPA
 * bits to ethtool LP advertisement settings.
 */
static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
{
	u32 result = 0;

	if (lpa & LPA_FIBER_1000HALF)
		result |= ADVERTISED_1000baseT_Half;
	if (lpa & LPA_FIBER_1000FULL)
		result |= ADVERTISED_1000baseT_Full;

	return result;
}

/**
 * marvell_update_link - update link status in real time in @phydev
 * @phydev: target phy_device struct
 *
 * Description: Update the value in phydev->link to reflect the
 *   current link value.
 */
static int marvell_update_link(struct phy_device *phydev, int fiber)
{
	int status;

	/* Use the generic register for copper link, or specific
1108 1109
	 * register for fiber case
	 */
1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125
	if (fiber) {
		status = phy_read(phydev, MII_M1011_PHY_STATUS);
		if (status < 0)
			return status;

		if ((status & REGISTER_LINK_STATUS) == 0)
			phydev->link = 0;
		else
			phydev->link = 1;
	} else {
		return genphy_update_link(phydev);
	}

	return 0;
}

1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229
static int marvell_read_status_page_an(struct phy_device *phydev,
				       int fiber)
{
	int status;
	int lpa;
	int lpagb;
	int adv;

	status = phy_read(phydev, MII_M1011_PHY_STATUS);
	if (status < 0)
		return status;

	lpa = phy_read(phydev, MII_LPA);
	if (lpa < 0)
		return lpa;

	lpagb = phy_read(phydev, MII_STAT1000);
	if (lpagb < 0)
		return lpagb;

	adv = phy_read(phydev, MII_ADVERTISE);
	if (adv < 0)
		return adv;

	lpa &= adv;

	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
		phydev->duplex = DUPLEX_FULL;
	else
		phydev->duplex = DUPLEX_HALF;

	status = status & MII_M1011_PHY_STATUS_SPD_MASK;
	phydev->pause = 0;
	phydev->asym_pause = 0;

	switch (status) {
	case MII_M1011_PHY_STATUS_1000:
		phydev->speed = SPEED_1000;
		break;

	case MII_M1011_PHY_STATUS_100:
		phydev->speed = SPEED_100;
		break;

	default:
		phydev->speed = SPEED_10;
		break;
	}

	if (!fiber) {
		phydev->lp_advertising =
			mii_stat1000_to_ethtool_lpa_t(lpagb) |
			mii_lpa_to_ethtool_lpa_t(lpa);

		if (phydev->duplex == DUPLEX_FULL) {
			phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
			phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
		}
	} else {
		/* The fiber link is only 1000M capable */
		phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);

		if (phydev->duplex == DUPLEX_FULL) {
			if (!(lpa & LPA_PAUSE_FIBER)) {
				phydev->pause = 0;
				phydev->asym_pause = 0;
			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
				phydev->pause = 1;
				phydev->asym_pause = 1;
			} else {
				phydev->pause = 1;
				phydev->asym_pause = 0;
			}
		}
	}
	return 0;
}

static int marvell_read_status_page_fixed(struct phy_device *phydev)
{
	int bmcr = phy_read(phydev, MII_BMCR);

	if (bmcr < 0)
		return bmcr;

	if (bmcr & BMCR_FULLDPLX)
		phydev->duplex = DUPLEX_FULL;
	else
		phydev->duplex = DUPLEX_HALF;

	if (bmcr & BMCR_SPEED1000)
		phydev->speed = SPEED_1000;
	else if (bmcr & BMCR_SPEED100)
		phydev->speed = SPEED_100;
	else
		phydev->speed = SPEED_10;

	phydev->pause = 0;
	phydev->asym_pause = 0;
	phydev->lp_advertising = 0;

	return 0;
}

1230
/* marvell_read_status_page
1231
 *
1232
 * Description:
1233 1234 1235 1236 1237
 *   Check the link, then figure out the current state
 *   by comparing what we advertise with what the link partner
 *   advertises.  Start by checking the gigabit possibilities,
 *   then move on to 10/100.
 */
1238
static int marvell_read_status_page(struct phy_device *phydev, int page)
1239
{
1240
	int fiber;
1241
	int err;
1242

1243
	/* Detect and update the link, but return if there
1244 1245
	 * was an error
	 */
1246 1247 1248 1249 1250 1251
	if (page == MII_M1111_FIBER)
		fiber = 1;
	else
		fiber = 0;

	err = marvell_update_link(phydev, fiber);
1252 1253 1254
	if (err)
		return err;

1255 1256 1257 1258
	if (phydev->autoneg == AUTONEG_ENABLE)
		err = marvell_read_status_page_an(phydev, fiber);
	else
		err = marvell_read_status_page_fixed(phydev);
1259

1260
	return err;
1261 1262
}

1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276
/* marvell_read_status
 *
 * Some Marvell's phys have two modes: fiber and copper.
 * Both need status checked.
 * Description:
 *   First, check the fiber link and status.
 *   If the fiber link is down, check the copper link and status which
 *   will be the default value if both link are down.
 */
static int marvell_read_status(struct phy_device *phydev)
{
	int err;

	/* Check the fiber mode first */
1277 1278
	if (phydev->supported & SUPPORTED_FIBRE &&
	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1279
		err = marvell_set_page(phydev, MII_M1111_FIBER);
1280 1281 1282 1283 1284 1285 1286
		if (err < 0)
			goto error;

		err = marvell_read_status_page(phydev, MII_M1111_FIBER);
		if (err < 0)
			goto error;

1287 1288 1289 1290 1291 1292 1293
		/* If the fiber link is up, it is the selected and
		 * used link. In this case, we need to stay in the
		 * fiber page. Please to be careful about that, avoid
		 * to restore Copper page in other functions which
		 * could break the behaviour for some fiber phy like
		 * 88E1512.
		 */
1294 1295 1296 1297
		if (phydev->link)
			return 0;

		/* If fiber link is down, check and save copper mode state */
1298
		err = marvell_set_page(phydev, MII_M1111_COPPER);
1299 1300 1301 1302 1303 1304 1305
		if (err < 0)
			goto error;
	}

	return marvell_read_status_page(phydev, MII_M1111_COPPER);

error:
1306
	marvell_set_page(phydev, MII_M1111_COPPER);
1307 1308
	return err;
}
1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320

/* marvell_suspend
 *
 * Some Marvell's phys have two modes: fiber and copper.
 * Both need to be suspended
 */
static int marvell_suspend(struct phy_device *phydev)
{
	int err;

	/* Suspend the fiber mode first */
	if (!(phydev->supported & SUPPORTED_FIBRE)) {
1321
		err = marvell_set_page(phydev, MII_M1111_FIBER);
1322 1323 1324 1325 1326 1327 1328 1329 1330
		if (err < 0)
			goto error;

		/* With the page set, use the generic suspend */
		err = genphy_suspend(phydev);
		if (err < 0)
			goto error;

		/* Then, the copper link */
1331
		err = marvell_set_page(phydev, MII_M1111_COPPER);
1332 1333 1334 1335 1336 1337 1338 1339
		if (err < 0)
			goto error;
	}

	/* With the page set, use the generic suspend */
	return genphy_suspend(phydev);

error:
1340
	marvell_set_page(phydev, MII_M1111_COPPER);
1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354
	return err;
}

/* marvell_resume
 *
 * Some Marvell's phys have two modes: fiber and copper.
 * Both need to be resumed
 */
static int marvell_resume(struct phy_device *phydev)
{
	int err;

	/* Resume the fiber mode first */
	if (!(phydev->supported & SUPPORTED_FIBRE)) {
1355
		err = marvell_set_page(phydev, MII_M1111_FIBER);
1356 1357 1358 1359 1360 1361 1362 1363 1364
		if (err < 0)
			goto error;

		/* With the page set, use the generic resume */
		err = genphy_resume(phydev);
		if (err < 0)
			goto error;

		/* Then, the copper link */
1365
		err = marvell_set_page(phydev, MII_M1111_COPPER);
1366 1367 1368 1369 1370 1371 1372 1373
		if (err < 0)
			goto error;
	}

	/* With the page set, use the generic resume */
	return genphy_resume(phydev);

error:
1374
	marvell_set_page(phydev, MII_M1111_COPPER);
1375 1376 1377
	return err;
}

1378 1379 1380
static int marvell_aneg_done(struct phy_device *phydev)
{
	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1381

1382 1383 1384
	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
}

1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396
static int m88e1121_did_interrupt(struct phy_device *phydev)
{
	int imask;

	imask = phy_read(phydev, MII_M1011_IEVENT);

	if (imask & MII_M1011_IMASK_INIT)
		return 1;

	return 0;
}

1397 1398 1399 1400 1401
static void m88e1318_get_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
{
	wol->supported = WAKE_MAGIC;
	wol->wolopts = 0;

1402
	if (marvell_set_page(phydev, MII_88E1318S_PHY_WOL_PAGE) < 0)
1403 1404 1405 1406 1407 1408
		return;

	if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
	    MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
		wol->wolopts |= WAKE_MAGIC;

1409
	if (marvell_set_page(phydev, 0x00) < 0)
1410 1411 1412 1413 1414 1415 1416
		return;
}

static int m88e1318_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol)
{
	int err, oldpage, temp;

1417
	oldpage = marvell_get_page(phydev);
1418 1419 1420

	if (wol->wolopts & WAKE_MAGIC) {
		/* Explicitly switch to page 0x00, just to be sure */
1421
		err = marvell_set_page(phydev, 0x00);
1422 1423 1424 1425 1426 1427 1428 1429 1430 1431
		if (err < 0)
			return err;

		/* Enable the WOL interrupt */
		temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
		temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
		err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
		if (err < 0)
			return err;

1432
		err = marvell_set_page(phydev, MII_88E1318S_PHY_LED_PAGE);
1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444
		if (err < 0)
			return err;

		/* Setup LED[2] as interrupt pin (active low) */
		temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
		temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
		temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
		temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
		err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
		if (err < 0)
			return err;

1445
		err = marvell_set_page(phydev, MII_88E1318S_PHY_WOL_PAGE);
1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473
		if (err < 0)
			return err;

		/* Store the device address for the magic packet */
		err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
				((phydev->attached_dev->dev_addr[5] << 8) |
				 phydev->attached_dev->dev_addr[4]));
		if (err < 0)
			return err;
		err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
				((phydev->attached_dev->dev_addr[3] << 8) |
				 phydev->attached_dev->dev_addr[2]));
		if (err < 0)
			return err;
		err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
				((phydev->attached_dev->dev_addr[1] << 8) |
				 phydev->attached_dev->dev_addr[0]));
		if (err < 0)
			return err;

		/* Clear WOL status and enable magic packet matching */
		temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
		temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
		temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
		err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
		if (err < 0)
			return err;
	} else {
1474
		err = marvell_set_page(phydev, MII_88E1318S_PHY_WOL_PAGE);
1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486
		if (err < 0)
			return err;

		/* Clear WOL status and disable magic packet matching */
		temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
		temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
		temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
		err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
		if (err < 0)
			return err;
	}

1487
	err = marvell_set_page(phydev, oldpage);
1488 1489 1490 1491 1492 1493
	if (err < 0)
		return err;

	return 0;
}

1494 1495
static int marvell_get_sset_count(struct phy_device *phydev)
{
1496 1497 1498 1499
	if (phydev->supported & SUPPORTED_FIBRE)
		return ARRAY_SIZE(marvell_hw_stats);
	else
		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518
}

static void marvell_get_strings(struct phy_device *phydev, u8 *data)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
		memcpy(data + i * ETH_GSTRING_LEN,
		       marvell_hw_stats[i].string, ETH_GSTRING_LEN);
	}
}

#ifndef UINT64_MAX
#define UINT64_MAX              (u64)(~((u64)0))
#endif
static u64 marvell_get_stat(struct phy_device *phydev, int i)
{
	struct marvell_hw_stat stat = marvell_hw_stats[i];
	struct marvell_priv *priv = phydev->priv;
1519 1520
	int err, oldpage, val;
	u64 ret;
1521

1522 1523
	oldpage = marvell_get_page(phydev);
	err = marvell_set_page(phydev, stat.page);
1524 1525 1526 1527 1528
	if (err < 0)
		return UINT64_MAX;

	val = phy_read(phydev, stat.reg);
	if (val < 0) {
1529
		ret = UINT64_MAX;
1530 1531 1532
	} else {
		val = val & ((1 << stat.bits) - 1);
		priv->stats[i] += val;
1533
		ret = priv->stats[i];
1534 1535
	}

1536
	marvell_set_page(phydev, oldpage);
1537

1538
	return ret;
1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549
}

static void marvell_get_stats(struct phy_device *phydev,
			      struct ethtool_stats *stats, u64 *data)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
		data[i] = marvell_get_stat(phydev, i);
}

1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914
#ifdef CONFIG_HWMON
static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
{
	int ret;
	int val;

	*temp = 0;

	mutex_lock(&phydev->lock);

	ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
	if (ret < 0)
		goto error;

	/* Enable temperature sensor */
	ret = phy_read(phydev, MII_88E1121_MISC_TEST);
	if (ret < 0)
		goto error;

	ret = phy_write(phydev, MII_88E1121_MISC_TEST,
			ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
	if (ret < 0)
		goto error;

	/* Wait for temperature to stabilize */
	usleep_range(10000, 12000);

	val = phy_read(phydev, MII_88E1121_MISC_TEST);
	if (val < 0) {
		ret = val;
		goto error;
	}

	/* Disable temperature sensor */
	ret = phy_write(phydev, MII_88E1121_MISC_TEST,
			ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
	if (ret < 0)
		goto error;

	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;

error:
	phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
	mutex_unlock(&phydev->lock);

	return ret;
}

static int m88e1121_hwmon_read(struct device *dev,
			       enum hwmon_sensor_types type,
			       u32 attr, int channel, long *temp)
{
	struct phy_device *phydev = dev_get_drvdata(dev);
	int err;

	switch (attr) {
	case hwmon_temp_input:
		err = m88e1121_get_temp(phydev, temp);
		break;
	default:
		return -EOPNOTSUPP;
	}

	return err;
}

static umode_t m88e1121_hwmon_is_visible(const void *data,
					 enum hwmon_sensor_types type,
					 u32 attr, int channel)
{
	if (type != hwmon_temp)
		return 0;

	switch (attr) {
	case hwmon_temp_input:
		return 0444;
	default:
		return 0;
	}
}

static u32 m88e1121_hwmon_chip_config[] = {
	HWMON_C_REGISTER_TZ,
	0
};

static const struct hwmon_channel_info m88e1121_hwmon_chip = {
	.type = hwmon_chip,
	.config = m88e1121_hwmon_chip_config,
};

static u32 m88e1121_hwmon_temp_config[] = {
	HWMON_T_INPUT,
	0
};

static const struct hwmon_channel_info m88e1121_hwmon_temp = {
	.type = hwmon_temp,
	.config = m88e1121_hwmon_temp_config,
};

static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
	&m88e1121_hwmon_chip,
	&m88e1121_hwmon_temp,
	NULL
};

static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
	.is_visible = m88e1121_hwmon_is_visible,
	.read = m88e1121_hwmon_read,
};

static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
	.ops = &m88e1121_hwmon_hwmon_ops,
	.info = m88e1121_hwmon_info,
};

static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
{
	int ret;

	*temp = 0;

	mutex_lock(&phydev->lock);

	ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
	if (ret < 0)
		goto error;

	ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
	if (ret < 0)
		goto error;

	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;

error:
	phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
	mutex_unlock(&phydev->lock);

	return ret;
}

int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
{
	int ret;

	*temp = 0;

	mutex_lock(&phydev->lock);

	ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
	if (ret < 0)
		goto error;

	ret = phy_read(phydev, MII_88E1121_MISC_TEST);
	if (ret < 0)
		goto error;

	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
	/* convert to mC */
	*temp *= 1000;

error:
	phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
	mutex_unlock(&phydev->lock);

	return ret;
}

int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
{
	int ret;

	mutex_lock(&phydev->lock);

	ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
	if (ret < 0)
		goto error;

	ret = phy_read(phydev, MII_88E1121_MISC_TEST);
	if (ret < 0)
		goto error;

	temp = temp / 1000;
	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
	ret = phy_write(phydev, MII_88E1121_MISC_TEST,
			(ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
			(temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));

error:
	phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
	mutex_unlock(&phydev->lock);

	return ret;
}

int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
{
	int ret;

	*alarm = false;

	mutex_lock(&phydev->lock);

	ret = phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x6);
	if (ret < 0)
		goto error;

	ret = phy_read(phydev, MII_88E1121_MISC_TEST);
	if (ret < 0)
		goto error;
	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);

error:
	phy_write(phydev, MII_M1145_PHY_EXT_ADDR_PAGE, 0x0);
	mutex_unlock(&phydev->lock);

	return ret;
}

static int m88e1510_hwmon_read(struct device *dev,
			       enum hwmon_sensor_types type,
			       u32 attr, int channel, long *temp)
{
	struct phy_device *phydev = dev_get_drvdata(dev);
	int err;

	switch (attr) {
	case hwmon_temp_input:
		err = m88e1510_get_temp(phydev, temp);
		break;
	case hwmon_temp_crit:
		err = m88e1510_get_temp_critical(phydev, temp);
		break;
	case hwmon_temp_max_alarm:
		err = m88e1510_get_temp_alarm(phydev, temp);
		break;
	default:
		return -EOPNOTSUPP;
	}

	return err;
}

static int m88e1510_hwmon_write(struct device *dev,
				enum hwmon_sensor_types type,
				u32 attr, int channel, long temp)
{
	struct phy_device *phydev = dev_get_drvdata(dev);
	int err;

	switch (attr) {
	case hwmon_temp_crit:
		err = m88e1510_set_temp_critical(phydev, temp);
		break;
	default:
		return -EOPNOTSUPP;
	}
	return err;
}

static umode_t m88e1510_hwmon_is_visible(const void *data,
					 enum hwmon_sensor_types type,
					 u32 attr, int channel)
{
	if (type != hwmon_temp)
		return 0;

	switch (attr) {
	case hwmon_temp_input:
	case hwmon_temp_max_alarm:
		return 0444;
	case hwmon_temp_crit:
		return 0644;
	default:
		return 0;
	}
}

static u32 m88e1510_hwmon_temp_config[] = {
	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
	0
};

static const struct hwmon_channel_info m88e1510_hwmon_temp = {
	.type = hwmon_temp,
	.config = m88e1510_hwmon_temp_config,
};

static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
	&m88e1121_hwmon_chip,
	&m88e1510_hwmon_temp,
	NULL
};

static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
	.is_visible = m88e1510_hwmon_is_visible,
	.read = m88e1510_hwmon_read,
	.write = m88e1510_hwmon_write,
};

static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
	.ops = &m88e1510_hwmon_hwmon_ops,
	.info = m88e1510_hwmon_info,
};

static int marvell_hwmon_name(struct phy_device *phydev)
{
	struct marvell_priv *priv = phydev->priv;
	struct device *dev = &phydev->mdio.dev;
	const char *devname = dev_name(dev);
	size_t len = strlen(devname);
	int i, j;

	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
	if (!priv->hwmon_name)
		return -ENOMEM;

	for (i = j = 0; i < len && devname[i]; i++) {
		if (isalnum(devname[i]))
			priv->hwmon_name[j++] = devname[i];
	}

	return 0;
}

static int marvell_hwmon_probe(struct phy_device *phydev,
			       const struct hwmon_chip_info *chip)
{
	struct marvell_priv *priv = phydev->priv;
	struct device *dev = &phydev->mdio.dev;
	int err;

	err = marvell_hwmon_name(phydev);
	if (err)
		return err;

	priv->hwmon_dev = devm_hwmon_device_register_with_info(
		dev, priv->hwmon_name, phydev, chip, NULL);

	return PTR_ERR_OR_ZERO(priv->hwmon_dev);
}

static int m88e1121_hwmon_probe(struct phy_device *phydev)
{
	return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
}

static int m88e1510_hwmon_probe(struct phy_device *phydev)
{
	return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
}
#else
static int m88e1121_hwmon_probe(struct phy_device *phydev)
{
	return 0;
}

static int m88e1510_hwmon_probe(struct phy_device *phydev)
{
	return 0;
}
#endif

1915 1916 1917 1918
static int marvell_probe(struct phy_device *phydev)
{
	struct marvell_priv *priv;

A
Andrew Lunn 已提交
1919
	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1920 1921 1922 1923 1924 1925 1926 1927
	if (!priv)
		return -ENOMEM;

	phydev->priv = priv;

	return 0;
}

1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949
static int m88e1121_probe(struct phy_device *phydev)
{
	int err;

	err = marvell_probe(phydev);
	if (err)
		return err;

	return m88e1121_hwmon_probe(phydev);
}

static int m88e1510_probe(struct phy_device *phydev)
{
	int err;

	err = marvell_probe(phydev);
	if (err)
		return err;

	return m88e1510_hwmon_probe(phydev);
}

O
Olof Johansson 已提交
1950 1951
static struct phy_driver marvell_drivers[] = {
	{
1952 1953
		.phy_id = MARVELL_PHY_ID_88E1101,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
O
Olof Johansson 已提交
1954 1955 1956
		.name = "Marvell 88E1101",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
1957
		.probe = marvell_probe,
1958
		.config_init = &marvell_config_init,
O
Olof Johansson 已提交
1959 1960 1961 1962
		.config_aneg = &marvell_config_aneg,
		.read_status = &genphy_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
1963 1964
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
1965 1966 1967
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
O
Olof Johansson 已提交
1968
	},
1969
	{
1970 1971
		.phy_id = MARVELL_PHY_ID_88E1112,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
1972 1973 1974
		.name = "Marvell 88E1112",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
1975
		.probe = marvell_probe,
1976 1977 1978 1979 1980
		.config_init = &m88e1111_config_init,
		.config_aneg = &marvell_config_aneg,
		.read_status = &genphy_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
1981 1982
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
1983 1984 1985
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
1986
	},
O
Olof Johansson 已提交
1987
	{
1988 1989
		.phy_id = MARVELL_PHY_ID_88E1111,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
O
Olof Johansson 已提交
1990 1991 1992
		.name = "Marvell 88E1111",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
1993
		.probe = marvell_probe,
O
Olof Johansson 已提交
1994
		.config_init = &m88e1111_config_init,
1995
		.config_aneg = &m88e1111_config_aneg,
1996
		.read_status = &marvell_read_status,
O
Olof Johansson 已提交
1997 1998
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
1999 2000
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2001 2002 2003
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
O
Olof Johansson 已提交
2004
	},
2005
	{
2006 2007
		.phy_id = MARVELL_PHY_ID_88E1118,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2008 2009 2010
		.name = "Marvell 88E1118",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
2011
		.probe = marvell_probe,
2012 2013 2014 2015 2016
		.config_init = &m88e1118_config_init,
		.config_aneg = &m88e1118_config_aneg,
		.read_status = &genphy_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2017 2018
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2019 2020 2021
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2022
	},
2023
	{
2024 2025
		.phy_id = MARVELL_PHY_ID_88E1121R,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2026 2027 2028
		.name = "Marvell 88E1121R",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
2029
		.probe = &m88e1121_probe,
2030
		.config_init = &m88e1121_config_init,
2031 2032 2033 2034
		.config_aneg = &m88e1121_config_aneg,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2035
		.did_interrupt = &m88e1121_did_interrupt,
2036 2037
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2038 2039 2040
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2041
	},
2042
	{
2043
		.phy_id = MARVELL_PHY_ID_88E1318S,
2044
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2045
		.name = "Marvell 88E1318S",
2046 2047
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
2048
		.probe = marvell_probe,
2049
		.config_init = &m88e1121_config_init,
2050
		.config_aneg = &m88e1318_config_aneg,
2051 2052 2053 2054
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
2055 2056
		.get_wol = &m88e1318_get_wol,
		.set_wol = &m88e1318_set_wol,
2057 2058
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2059 2060 2061
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2062
	},
O
Olof Johansson 已提交
2063
	{
2064 2065
		.phy_id = MARVELL_PHY_ID_88E1145,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
O
Olof Johansson 已提交
2066 2067 2068
		.name = "Marvell 88E1145",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
2069
		.probe = marvell_probe,
O
Olof Johansson 已提交
2070 2071 2072 2073 2074
		.config_init = &m88e1145_config_init,
		.config_aneg = &marvell_config_aneg,
		.read_status = &genphy_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2075 2076
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2077 2078 2079
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2080
	},
2081 2082 2083 2084 2085 2086
	{
		.phy_id = MARVELL_PHY_ID_88E1149R,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1149R",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
2087
		.probe = marvell_probe,
2088 2089 2090 2091 2092
		.config_init = &m88e1149_config_init,
		.config_aneg = &m88e1118_config_aneg,
		.read_status = &genphy_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2093 2094
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2095 2096 2097
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2098
	},
2099
	{
2100 2101
		.phy_id = MARVELL_PHY_ID_88E1240,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2102 2103 2104
		.name = "Marvell 88E1240",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
2105
		.probe = marvell_probe,
2106 2107 2108 2109 2110
		.config_init = &m88e1111_config_init,
		.config_aneg = &marvell_config_aneg,
		.read_status = &genphy_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2111 2112
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2113 2114 2115
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2116
	},
M
Michal Simek 已提交
2117 2118 2119 2120 2121 2122
	{
		.phy_id = MARVELL_PHY_ID_88E1116R,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1116R",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
2123
		.probe = marvell_probe,
M
Michal Simek 已提交
2124 2125 2126 2127 2128
		.config_init = &m88e1116r_config_init,
		.config_aneg = &genphy_config_aneg,
		.read_status = &genphy_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2129 2130
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2131 2132 2133
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
M
Michal Simek 已提交
2134
	},
M
Michal Simek 已提交
2135 2136 2137 2138
	{
		.phy_id = MARVELL_PHY_ID_88E1510,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1510",
2139
		.features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
2140
		.flags = PHY_HAS_INTERRUPT,
2141
		.probe = &m88e1510_probe,
2142
		.config_init = &m88e1510_config_init,
M
Michal Simek 已提交
2143 2144 2145 2146 2147
		.config_aneg = &m88e1510_config_aneg,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
2148 2149
		.get_wol = &m88e1318_get_wol,
		.set_wol = &m88e1318_set_wol,
2150 2151
		.resume = &marvell_resume,
		.suspend = &marvell_suspend,
2152 2153 2154
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
M
Michal Simek 已提交
2155
	},
2156 2157 2158 2159 2160 2161
	{
		.phy_id = MARVELL_PHY_ID_88E1540,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1540",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
2162
		.probe = m88e1510_probe,
2163
		.config_init = &marvell_config_init,
2164 2165 2166 2167 2168 2169 2170
		.config_aneg = &m88e1510_config_aneg,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2171 2172 2173
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2174
	},
2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193
	{
		.phy_id = MARVELL_PHY_ID_88E1545,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1545",
		.probe = m88e1510_probe,
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
		.config_init = &marvell_config_init,
		.config_aneg = &m88e1510_config_aneg,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
	},
2194 2195 2196 2197 2198 2199
	{
		.phy_id = MARVELL_PHY_ID_88E3016,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E3016",
		.features = PHY_BASIC_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
2200
		.probe = marvell_probe,
2201 2202 2203 2204 2205 2206 2207 2208 2209
		.config_aneg = &genphy_config_aneg,
		.config_init = &m88e3016_config_init,
		.aneg_done = &marvell_aneg_done,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2210 2211 2212
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2213
	},
2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232
	{
		.phy_id = MARVELL_PHY_ID_88E6390,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E6390",
		.features = PHY_GBIT_FEATURES,
		.flags = PHY_HAS_INTERRUPT,
		.probe = m88e1510_probe,
		.config_init = &marvell_config_init,
		.config_aneg = &m88e1510_config_aneg,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
	},
2233 2234
};

2235
module_phy_driver(marvell_drivers);
2236

2237
static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2238 2239 2240 2241 2242 2243 2244 2245 2246
	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
M
Michal Simek 已提交
2247
	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
M
Michal Simek 已提交
2248
	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2249
	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2250
	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2251
	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2252
	{ MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2253 2254 2255 2256
	{ }
};

MODULE_DEVICE_TABLE(mdio, marvell_tbl);