imx53.dtsi 14.6 KB
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/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

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#include "skeleton.dtsi"
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#include "imx53-pinfunc.h"
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/ {
	aliases {
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		gpio0 = &gpio1;
		gpio1 = &gpio2;
		gpio2 = &gpio3;
		gpio3 = &gpio4;
		gpio4 = &gpio5;
		gpio5 = &gpio6;
		gpio6 = &gpio7;
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		i2c0 = &i2c1;
		i2c1 = &i2c2;
		i2c2 = &i2c3;
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		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
		spi0 = &ecspi1;
		spi1 = &ecspi2;
		spi2 = &cspi;
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	};

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	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a8";
			reg = <0x0>;
		};
	};

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	tzic: tz-interrupt-controller@0fffc000 {
		compatible = "fsl,imx53-tzic", "fsl,tzic";
		interrupt-controller;
		#interrupt-cells = <1>;
		reg = <0x0fffc000 0x4000>;
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <0>;

		ckil {
			compatible = "fsl,imx-ckil", "fixed-clock";
			clock-frequency = <32768>;
		};

		ckih1 {
			compatible = "fsl,imx-ckih1", "fixed-clock";
			clock-frequency = <22579200>;
		};

		ckih2 {
			compatible = "fsl,imx-ckih2", "fixed-clock";
			clock-frequency = <0>;
		};

		osc {
			compatible = "fsl,imx-osc", "fixed-clock";
			clock-frequency = <24000000>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&tzic>;
		ranges;

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		ipu: ipu@18000000 {
			#crtc-cells = <1>;
			compatible = "fsl,imx53-ipu";
			reg = <0x18000000 0x080000000>;
			interrupts = <11 10>;
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			clocks = <&clks 59>, <&clks 110>, <&clks 61>;
			clock-names = "bus", "di0", "di1";
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			resets = <&src 2>;
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		};

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		aips@50000000 { /* AIPS1 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x50000000 0x10000000>;
			ranges;

			spba@50000000 {
				compatible = "fsl,spba-bus", "simple-bus";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x50000000 0x40000>;
				ranges;

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				esdhc1: esdhc@50004000 {
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					compatible = "fsl,imx53-esdhc";
					reg = <0x50004000 0x4000>;
					interrupts = <1>;
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					clocks = <&clks 44>, <&clks 0>, <&clks 71>;
					clock-names = "ipg", "ahb", "per";
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					bus-width = <4>;
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					status = "disabled";
				};

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				esdhc2: esdhc@50008000 {
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					compatible = "fsl,imx53-esdhc";
					reg = <0x50008000 0x4000>;
					interrupts = <2>;
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					clocks = <&clks 45>, <&clks 0>, <&clks 72>;
					clock-names = "ipg", "ahb", "per";
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					bus-width = <4>;
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					status = "disabled";
				};

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				uart3: serial@5000c000 {
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					compatible = "fsl,imx53-uart", "fsl,imx21-uart";
					reg = <0x5000c000 0x4000>;
					interrupts = <33>;
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					clocks = <&clks 32>, <&clks 33>;
					clock-names = "ipg", "per";
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					status = "disabled";
				};

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				ecspi1: ecspi@50010000 {
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					#address-cells = <1>;
					#size-cells = <0>;
					compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
					reg = <0x50010000 0x4000>;
					interrupts = <36>;
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					clocks = <&clks 51>, <&clks 52>;
					clock-names = "ipg", "per";
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					status = "disabled";
				};

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				ssi2: ssi@50014000 {
					compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
					reg = <0x50014000 0x4000>;
					interrupts = <30>;
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					clocks = <&clks 49>;
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					dmas = <&sdma 24 1 0>,
					       <&sdma 25 1 0>;
					dma-names = "rx", "tx";
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					fsl,fifo-depth = <15>;
					fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
					status = "disabled";
				};

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				esdhc3: esdhc@50020000 {
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					compatible = "fsl,imx53-esdhc";
					reg = <0x50020000 0x4000>;
					interrupts = <3>;
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					clocks = <&clks 46>, <&clks 0>, <&clks 73>;
					clock-names = "ipg", "ahb", "per";
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					bus-width = <4>;
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					status = "disabled";
				};

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				esdhc4: esdhc@50024000 {
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					compatible = "fsl,imx53-esdhc";
					reg = <0x50024000 0x4000>;
					interrupts = <4>;
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					clocks = <&clks 47>, <&clks 0>, <&clks 74>;
					clock-names = "ipg", "ahb", "per";
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					bus-width = <4>;
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					status = "disabled";
				};
			};

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			usbphy0: usbphy@0 {
				compatible = "usb-nop-xceiv";
				clocks = <&clks 124>;
				clock-names = "main_clk";
				status = "okay";
			};

			usbphy1: usbphy@1 {
				compatible = "usb-nop-xceiv";
				clocks = <&clks 125>;
				clock-names = "main_clk";
				status = "okay";
			};

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			usbotg: usb@53f80000 {
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				compatible = "fsl,imx53-usb", "fsl,imx27-usb";
				reg = <0x53f80000 0x0200>;
				interrupts = <18>;
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				clocks = <&clks 108>;
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				fsl,usbmisc = <&usbmisc 0>;
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				fsl,usbphy = <&usbphy0>;
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				status = "disabled";
			};

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			usbh1: usb@53f80200 {
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				compatible = "fsl,imx53-usb", "fsl,imx27-usb";
				reg = <0x53f80200 0x0200>;
				interrupts = <14>;
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				clocks = <&clks 108>;
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				fsl,usbmisc = <&usbmisc 1>;
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				fsl,usbphy = <&usbphy1>;
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				status = "disabled";
			};

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			usbh2: usb@53f80400 {
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				compatible = "fsl,imx53-usb", "fsl,imx27-usb";
				reg = <0x53f80400 0x0200>;
				interrupts = <16>;
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				clocks = <&clks 108>;
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				fsl,usbmisc = <&usbmisc 2>;
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				status = "disabled";
			};

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			usbh3: usb@53f80600 {
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				compatible = "fsl,imx53-usb", "fsl,imx27-usb";
				reg = <0x53f80600 0x0200>;
				interrupts = <17>;
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				clocks = <&clks 108>;
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				fsl,usbmisc = <&usbmisc 3>;
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				status = "disabled";
			};

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			usbmisc: usbmisc@53f80800 {
				#index-cells = <1>;
				compatible = "fsl,imx53-usbmisc";
				reg = <0x53f80800 0x200>;
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				clocks = <&clks 108>;
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			};

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			gpio1: gpio@53f84000 {
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				compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
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				reg = <0x53f84000 0x4000>;
				interrupts = <50 51>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
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				#interrupt-cells = <2>;
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			};

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			gpio2: gpio@53f88000 {
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				compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
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				reg = <0x53f88000 0x4000>;
				interrupts = <52 53>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
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				#interrupt-cells = <2>;
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			};

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			gpio3: gpio@53f8c000 {
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				compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
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				reg = <0x53f8c000 0x4000>;
				interrupts = <54 55>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
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				#interrupt-cells = <2>;
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			};

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			gpio4: gpio@53f90000 {
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				compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
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				reg = <0x53f90000 0x4000>;
				interrupts = <56 57>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
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				#interrupt-cells = <2>;
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			};

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			kpp: kpp@53f94000 {
				compatible = "fsl,imx53-kpp", "fsl,imx21-kpp";
				reg = <0x53f94000 0x4000>;
				interrupts = <60>;
				clocks = <&clks 0>;
				status = "disabled";
			};

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			wdog1: wdog@53f98000 {
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				compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
				reg = <0x53f98000 0x4000>;
				interrupts = <58>;
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				clocks = <&clks 0>;
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			};

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			wdog2: wdog@53f9c000 {
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				compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
				reg = <0x53f9c000 0x4000>;
				interrupts = <59>;
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				clocks = <&clks 0>;
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				status = "disabled";
			};

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			gpt: timer@53fa0000 {
				compatible = "fsl,imx53-gpt", "fsl,imx31-gpt";
				reg = <0x53fa0000 0x4000>;
				interrupts = <39>;
				clocks = <&clks 36>, <&clks 41>;
				clock-names = "ipg", "per";
			};

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			iomuxc: iomuxc@53fa8000 {
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				compatible = "fsl,imx53-iomuxc";
				reg = <0x53fa8000 0x4000>;
			};

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			gpr: iomuxc-gpr@53fa8000 {
				compatible = "fsl,imx53-iomuxc-gpr", "syscon";
				reg = <0x53fa8000 0xc>;
			};

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			ldb: ldb@53fa8008 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx53-ldb";
				reg = <0x53fa8008 0x4>;
				gpr = <&gpr>;
				clocks = <&clks 122>, <&clks 120>,
					 <&clks 115>, <&clks 116>,
					 <&clks 123>, <&clks 85>;
				clock-names = "di0_pll", "di1_pll",
					      "di0_sel", "di1_sel",
					      "di0", "di1";
				status = "disabled";

				lvds-channel@0 {
					reg = <0>;
					crtcs = <&ipu 0>;
					status = "disabled";
				};

				lvds-channel@1 {
					reg = <1>;
					crtcs = <&ipu 1>;
					status = "disabled";
				};
			};

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			pwm1: pwm@53fb4000 {
				#pwm-cells = <2>;
				compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
				reg = <0x53fb4000 0x4000>;
				clocks = <&clks 37>, <&clks 38>;
				clock-names = "ipg", "per";
				interrupts = <61>;
			};

			pwm2: pwm@53fb8000 {
				#pwm-cells = <2>;
				compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
				reg = <0x53fb8000 0x4000>;
				clocks = <&clks 39>, <&clks 40>;
				clock-names = "ipg", "per";
				interrupts = <94>;
			};

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			uart1: serial@53fbc000 {
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				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
				reg = <0x53fbc000 0x4000>;
				interrupts = <31>;
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				clocks = <&clks 28>, <&clks 29>;
				clock-names = "ipg", "per";
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				status = "disabled";
			};

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			uart2: serial@53fc0000 {
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				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
				reg = <0x53fc0000 0x4000>;
				interrupts = <32>;
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				clocks = <&clks 30>, <&clks 31>;
				clock-names = "ipg", "per";
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				status = "disabled";
			};

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			can1: can@53fc8000 {
				compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
				reg = <0x53fc8000 0x4000>;
				interrupts = <82>;
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				clocks = <&clks 158>, <&clks 157>;
				clock-names = "ipg", "per";
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				status = "disabled";
			};

			can2: can@53fcc000 {
				compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
				reg = <0x53fcc000 0x4000>;
				interrupts = <83>;
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				clocks = <&clks 87>, <&clks 86>;
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				clock-names = "ipg", "per";
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				status = "disabled";
			};

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			src: src@53fd0000 {
				compatible = "fsl,imx53-src", "fsl,imx51-src";
				reg = <0x53fd0000 0x4000>;
				#reset-cells = <1>;
			};

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			clks: ccm@53fd4000{
				compatible = "fsl,imx53-ccm";
				reg = <0x53fd4000 0x4000>;
				interrupts = <0 71 0x04 0 72 0x04>;
				#clock-cells = <1>;
			};

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			gpio5: gpio@53fdc000 {
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				compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
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				reg = <0x53fdc000 0x4000>;
				interrupts = <103 104>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
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				#interrupt-cells = <2>;
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			};

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			gpio6: gpio@53fe0000 {
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				compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
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				reg = <0x53fe0000 0x4000>;
				interrupts = <105 106>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
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				#interrupt-cells = <2>;
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			};

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			gpio7: gpio@53fe4000 {
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				compatible = "fsl,imx53-gpio", "fsl,imx35-gpio";
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				reg = <0x53fe4000 0x4000>;
				interrupts = <107 108>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
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				#interrupt-cells = <2>;
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			};

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			i2c3: i2c@53fec000 {
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				#address-cells = <1>;
				#size-cells = <0>;
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				compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
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				reg = <0x53fec000 0x4000>;
				interrupts = <64>;
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				clocks = <&clks 88>;
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				status = "disabled";
			};

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			uart4: serial@53ff0000 {
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				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
				reg = <0x53ff0000 0x4000>;
				interrupts = <13>;
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				clocks = <&clks 65>, <&clks 66>;
				clock-names = "ipg", "per";
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				status = "disabled";
			};
		};

		aips@60000000 {	/* AIPS2 */
			compatible = "fsl,aips-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x60000000 0x10000000>;
			ranges;

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			iim: iim@63f98000 {
				compatible = "fsl,imx53-iim", "fsl,imx27-iim";
				reg = <0x63f98000 0x4000>;
				interrupts = <69>;
				clocks = <&clks 107>;
			};

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			uart5: serial@63f90000 {
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				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
				reg = <0x63f90000 0x4000>;
				interrupts = <86>;
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				clocks = <&clks 67>, <&clks 68>;
				clock-names = "ipg", "per";
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				status = "disabled";
			};

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			owire: owire@63fa4000 {
				compatible = "fsl,imx53-owire", "fsl,imx21-owire";
				reg = <0x63fa4000 0x4000>;
				clocks = <&clks 159>;
				status = "disabled";
			};

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			ecspi2: ecspi@63fac000 {
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				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
				reg = <0x63fac000 0x4000>;
				interrupts = <37>;
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				clocks = <&clks 53>, <&clks 54>;
				clock-names = "ipg", "per";
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				status = "disabled";
			};

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			sdma: sdma@63fb0000 {
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				compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
				reg = <0x63fb0000 0x4000>;
				interrupts = <6>;
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				clocks = <&clks 56>, <&clks 56>;
				clock-names = "ipg", "ahb";
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				#dma-cells = <3>;
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				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
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			};

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			cspi: cspi@63fc0000 {
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				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
				reg = <0x63fc0000 0x4000>;
				interrupts = <38>;
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				clocks = <&clks 55>, <&clks 55>;
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				clock-names = "ipg", "per";
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				status = "disabled";
			};

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			i2c2: i2c@63fc4000 {
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				#address-cells = <1>;
				#size-cells = <0>;
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				compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
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				reg = <0x63fc4000 0x4000>;
				interrupts = <63>;
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				clocks = <&clks 35>;
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				status = "disabled";
			};

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			i2c1: i2c@63fc8000 {
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				#address-cells = <1>;
				#size-cells = <0>;
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				compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
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				reg = <0x63fc8000 0x4000>;
				interrupts = <62>;
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				clocks = <&clks 34>;
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				status = "disabled";
			};

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			ssi1: ssi@63fcc000 {
				compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
				reg = <0x63fcc000 0x4000>;
				interrupts = <29>;
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				clocks = <&clks 48>;
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				dmas = <&sdma 28 0 0>,
				       <&sdma 29 0 0>;
				dma-names = "rx", "tx";
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				fsl,fifo-depth = <15>;
				fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */
				status = "disabled";
			};

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			audmux: audmux@63fd0000 {
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				compatible = "fsl,imx53-audmux", "fsl,imx31-audmux";
				reg = <0x63fd0000 0x4000>;
				status = "disabled";
			};

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			nfc: nand@63fdb000 {
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				compatible = "fsl,imx53-nand";
				reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>;
				interrupts = <8>;
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				clocks = <&clks 60>;
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				status = "disabled";
			};

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			ssi3: ssi@63fe8000 {
				compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
				reg = <0x63fe8000 0x4000>;
				interrupts = <96>;
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				clocks = <&clks 50>;
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				dmas = <&sdma 46 0 0>,
				       <&sdma 47 0 0>;
				dma-names = "rx", "tx";
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				fsl,fifo-depth = <15>;
				fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */
				status = "disabled";
			};

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			fec: ethernet@63fec000 {
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				compatible = "fsl,imx53-fec", "fsl,imx25-fec";
				reg = <0x63fec000 0x4000>;
				interrupts = <87>;
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				clocks = <&clks 42>, <&clks 42>, <&clks 42>;
				clock-names = "ipg", "ahb", "ptp";
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				status = "disabled";
			};
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			tve: tve@63ff0000 {
				compatible = "fsl,imx53-tve";
				reg = <0x63ff0000 0x1000>;
				interrupts = <92>;
				clocks = <&clks 69>, <&clks 116>;
				clock-names = "tve", "di_sel";
				crtcs = <&ipu 1>;
				status = "disabled";
			};
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			vpu: vpu@63ff4000 {
				compatible = "fsl,imx53-vpu";
				reg = <0x63ff4000 0x1000>;
				interrupts = <9>;
				clocks = <&clks 63>, <&clks 63>;
				clock-names = "per", "ahb";
				iram = <&ocram>;
				status = "disabled";
			};
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		};
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		ocram: sram@f8000000 {
			compatible = "mmio-sram";
			reg = <0xf8000000 0x20000>;
S
Shawn Guo 已提交
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			clocks = <&clks 186>;
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		};
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	};
};