amd_nb.h 1.4 KB
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#ifndef _ASM_X86_AMD_NB_H
#define _ASM_X86_AMD_NB_H
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#include <linux/pci.h>

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struct amd_nb_bus_dev_range {
	u8 bus;
	u8 dev_base;
	u8 dev_limit;
};

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extern struct pci_device_id amd_nb_misc_ids[];
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extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
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struct bootnode;
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extern int early_is_amd_nb(u32 value);
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extern int amd_cache_northbridges(void);
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extern void amd_flush_garts(void);
extern int amd_numa_init(unsigned long start_pfn, unsigned long end_pfn);
extern int amd_scan_nodes(void);
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#ifdef CONFIG_NUMA_EMU
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extern void amd_fake_nodes(const struct bootnode *nodes, int nr_nodes);
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extern void amd_get_nodes(struct bootnode *nodes);
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#endif

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struct amd_northbridge {
	struct pci_dev *misc;
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	struct pci_dev *link;
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};

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struct amd_northbridge_info {
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	u16 num;
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	u64 flags;
	struct amd_northbridge *nb;
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};
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extern struct amd_northbridge_info amd_northbridges;
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#define AMD_NB_GART			0x1
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#define AMD_NB_L3_INDEX_DISABLE		0x2
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#ifdef CONFIG_AMD_NB
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static inline int amd_nb_num(void)
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{
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	return amd_northbridges.num;
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}
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static inline int amd_nb_has_feature(int feature)
{
	return ((amd_northbridges.flags & feature) == feature);
}
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static inline struct amd_northbridge *node_to_amd_nb(int node)
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{
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	return (node < amd_northbridges.num) ? &amd_northbridges.nb[node] : NULL;
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}
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#else

#define amd_nb_num(x)		0
#define amd_nb_has_feature(x)	false
#define node_to_amd_nb(x)	NULL

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#endif


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#endif /* _ASM_X86_AMD_NB_H */