nfit.h 7.9 KB
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/*
 * NVDIMM Firmware Interface Table - NFIT
 *
 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 */
#ifndef __NFIT_H__
#define __NFIT_H__
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#include <linux/workqueue.h>
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#include <linux/libnvdimm.h>
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#include <linux/ndctl.h>
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#include <linux/types.h>
#include <linux/acpi.h>
#include <acpi/acuuid.h>

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/* ACPI 6.1 */
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#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
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/* http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
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#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
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/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"

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/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"

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#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
		| ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
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		| ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED)
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#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_MSFT

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#define NVDIMM_STANDARD_CMDMASK \
(1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \
 | 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \
 | 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
 | 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR)

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/*
 * Command numbers that the kernel needs to know about to handle
 * non-default DSM revision ids
 */
enum nvdimm_family_cmds {
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	NVDIMM_INTEL_LATCH_SHUTDOWN = 10,
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	NVDIMM_INTEL_GET_MODES = 11,
	NVDIMM_INTEL_GET_FWINFO = 12,
	NVDIMM_INTEL_START_FWUPDATE = 13,
	NVDIMM_INTEL_SEND_FWUPDATE = 14,
	NVDIMM_INTEL_FINISH_FWUPDATE = 15,
	NVDIMM_INTEL_QUERY_FWUPDATE = 16,
	NVDIMM_INTEL_SET_THRESHOLD = 17,
	NVDIMM_INTEL_INJECT_ERROR = 18,
};

#define NVDIMM_INTEL_CMDMASK \
(NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \
 | 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \
 | 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
 | 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \
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 | 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN)
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enum nfit_uuids {
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	/* for simplicity alias the uuid index with the family id */
	NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
	NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
	NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
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	NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
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	NFIT_SPA_VOLATILE,
	NFIT_SPA_PM,
	NFIT_SPA_DCR,
	NFIT_SPA_BDW,
	NFIT_SPA_VDISK,
	NFIT_SPA_VCD,
	NFIT_SPA_PDISK,
	NFIT_SPA_PCD,
	NFIT_DEV_BUS,
	NFIT_UUID_MAX,
};

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/*
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 * Region format interface codes are stored with the interface as the
 * LSB and the function as the MSB.
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 */
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#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */
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enum {
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	NFIT_BLK_READ_FLUSH = 1,
	NFIT_BLK_DCR_LATCH = 2,
	NFIT_ARS_STATUS_DONE = 0,
	NFIT_ARS_STATUS_BUSY = 1 << 16,
	NFIT_ARS_STATUS_NONE = 2 << 16,
	NFIT_ARS_STATUS_INTR = 3 << 16,
	NFIT_ARS_START_BUSY = 6,
	NFIT_ARS_CAP_NONE = 1,
	NFIT_ARS_F_OVERFLOW = 1,
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	NFIT_ARS_TIMEOUT = 90,
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};

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enum nfit_root_notifiers {
	NFIT_NOTIFY_UPDATE = 0x80,
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	NFIT_NOTIFY_UC_MEMORY_ERROR = 0x81,
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};

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enum nfit_dimm_notifiers {
	NFIT_NOTIFY_DIMM_HEALTH = 0x81,
};

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enum nfit_ars_state {
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	ARS_REQ_SHORT,
	ARS_REQ_LONG,
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	ARS_FAILED,
};

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struct nfit_spa {
	struct list_head list;
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	struct nd_region *nd_region;
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	unsigned long ars_state;
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	u32 clear_err_unit;
	u32 max_ars;
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	struct acpi_nfit_system_address spa[0];
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};

struct nfit_dcr {
	struct list_head list;
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	struct acpi_nfit_control_region dcr[0];
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};

struct nfit_bdw {
	struct list_head list;
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	struct acpi_nfit_data_region bdw[0];
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};

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struct nfit_idt {
	struct list_head list;
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	struct acpi_nfit_interleave idt[0];
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};

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struct nfit_flush {
	struct list_head list;
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	struct acpi_nfit_flush_address flush[0];
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};

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struct nfit_memdev {
	struct list_head list;
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	struct acpi_nfit_memory_map memdev[0];
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};

/* assembled tables for a given dimm/memory-device */
struct nfit_mem {
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	struct nvdimm *nvdimm;
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	struct acpi_nfit_memory_map *memdev_dcr;
	struct acpi_nfit_memory_map *memdev_pmem;
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	struct acpi_nfit_memory_map *memdev_bdw;
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	struct acpi_nfit_control_region *dcr;
	struct acpi_nfit_data_region *bdw;
	struct acpi_nfit_system_address *spa_dcr;
	struct acpi_nfit_system_address *spa_bdw;
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	struct acpi_nfit_interleave *idt_dcr;
	struct acpi_nfit_interleave *idt_bdw;
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	struct kernfs_node *flags_attr;
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	struct nfit_flush *nfit_flush;
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	struct list_head list;
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	struct acpi_device *adev;
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	struct acpi_nfit_desc *acpi_desc;
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	struct resource *flush_wpq;
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	unsigned long dsm_mask;
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	int family;
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	bool has_lsr;
	bool has_lsw;
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};

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enum scrub_flags {
	ARS_BUSY,
	ARS_CANCEL,
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	ARS_POLL,
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};

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struct acpi_nfit_desc {
	struct nvdimm_bus_descriptor nd_desc;
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	struct acpi_table_header acpi_header;
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	struct mutex init_mutex;
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	struct list_head memdevs;
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	struct list_head flushes;
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	struct list_head dimms;
	struct list_head spas;
	struct list_head dcrs;
	struct list_head bdws;
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	struct list_head idts;
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	struct nvdimm_bus *nvdimm_bus;
	struct device *dev;
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	struct nd_cmd_ars_status *ars_status;
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	struct nfit_spa *scrub_spa;
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	struct delayed_work dwork;
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	struct list_head list;
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	struct kernfs_node *scrub_count_state;
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	unsigned int max_ars;
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	unsigned int scrub_count;
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	unsigned int scrub_mode;
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	unsigned long scrub_flags;
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	unsigned long dimm_cmd_force_en;
	unsigned long bus_cmd_force_en;
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	unsigned long bus_nfit_cmd_force_en;
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	unsigned int platform_cap;
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	unsigned int scrub_tmo;
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	int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
			void *iobuf, u64 len, int rw);
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};

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enum scrub_mode {
	HW_ERROR_SCRUB_OFF,
	HW_ERROR_SCRUB_ON,
};

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enum nd_blk_mmio_selector {
	BDW,
	DCR,
};

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struct nd_blk_addr {
	union {
		void __iomem *base;
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		void *aperture;
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	};
};

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struct nfit_blk {
	struct nfit_blk_mmio {
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		struct nd_blk_addr addr;
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		u64 size;
		u64 base_offset;
		u32 line_size;
		u32 num_lines;
		u32 table_size;
		struct acpi_nfit_interleave *idt;
		struct acpi_nfit_system_address *spa;
	} mmio[2];
	struct nd_region *nd_region;
	u64 bdw_offset; /* post interleave offset */
	u64 stat_offset;
	u64 cmd_offset;
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	u32 dimm_flags;
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};

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extern struct list_head acpi_descs;
extern struct mutex acpi_desc_lock;
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int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc,
		enum nfit_ars_state req_type);
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#ifdef CONFIG_X86_MCE
void nfit_mce_register(void);
void nfit_mce_unregister(void);
#else
static inline void nfit_mce_register(void)
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{
}
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static inline void nfit_mce_unregister(void)
{
}
#endif

int nfit_spa_type(struct acpi_nfit_system_address *spa);
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static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
		struct nfit_mem *nfit_mem)
{
	if (nfit_mem->memdev_dcr)
		return nfit_mem->memdev_dcr;
	return nfit_mem->memdev_pmem;
}
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static inline struct acpi_nfit_desc *to_acpi_desc(
		struct nvdimm_bus_descriptor *nd_desc)
{
	return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
}
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const guid_t *to_nfit_uuid(enum nfit_uuids id);
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int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz);
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void acpi_nfit_shutdown(void *data);
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void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
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void __acpi_nvdimm_notify(struct device *dev, u32 event);
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int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
		unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc);
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void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
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#endif /* __NFIT_H__ */