migration.c 1.4 KB
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#include <linux/irq.h>
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void set_pending_irq(unsigned int irq, cpumask_t mask)
{
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	struct irq_desc *desc = irq_desc + irq;
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	unsigned long flags;

	spin_lock_irqsave(&desc->lock, flags);
	desc->move_irq = 1;
	pending_irq_cpumask[irq] = mask;
	spin_unlock_irqrestore(&desc->lock, flags);
}

void move_native_irq(int irq)
{
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	struct irq_desc *desc = irq_desc + irq;
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	cpumask_t tmp;

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	if (likely(!desc->move_irq))
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		return;

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	/*
	 * Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
	 */
	if (CHECK_IRQ_PER_CPU(desc->status)) {
		WARN_ON(1);
		return;
	}

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	desc->move_irq = 0;

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	if (unlikely(cpus_empty(pending_irq_cpumask[irq])))
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		return;

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	if (!desc->chip->set_affinity)
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		return;

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	assert_spin_locked(&desc->lock);

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	cpus_and(tmp, pending_irq_cpumask[irq], cpu_online_map);

	/*
	 * If there was a valid mask to work with, please
	 * do the disable, re-program, enable sequence.
	 * This is *not* particularly important for level triggered
	 * but in a edge trigger case, we might be setting rte
	 * when an active trigger is comming in. This could
	 * cause some ioapics to mal-function.
	 * Being paranoid i guess!
	 */
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	if (likely(!cpus_empty(tmp))) {
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		if (likely(!(desc->status & IRQ_DISABLED)))
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			desc->chip->disable(irq);
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		desc->chip->set_affinity(irq,tmp);
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		if (likely(!(desc->status & IRQ_DISABLED)))
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			desc->chip->enable(irq);
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	}
	cpus_clear(pending_irq_cpumask[irq]);
}