i387.c 14.1 KB
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/*
 *  Copyright (C) 1994 Linus Torvalds
 *
 *  Pentium III FXSR, SSE support
 *  General FPU state handling cleanups
 *	Gareth Hughes <gareth@valinux.com>, May 2000
 */
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#include <linux/module.h>
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#include <linux/regset.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <asm/sigcontext.h>
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#include <asm/processor.h>
#include <asm/math_emu.h>
#include <asm/uaccess.h>
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#include <asm/ptrace.h>
#include <asm/i387.h>
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#include <asm/fpu-internal.h>
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#include <asm/user.h>
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/*
 * Were we in an interrupt that interrupted kernel mode?
 *
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 * For now, on xsave platforms we will return interrupted
 * kernel FPU as not-idle. TBD: As we use non-lazy FPU restore
 * for xsave platforms, ideally we can change the return value
 * to something like __thread_has_fpu(current). But we need to
 * be careful of doing __thread_clear_has_fpu() before saving
 * the FPU etc for supporting nested uses etc. For now, take
 * the simple route!
 *
 * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
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 * pair does nothing at all: the thread must not have fpu (so
 * that we don't try to save the FPU state), and TS must
 * be set (so that the clts/stts pair does nothing that is
 * visible in the interrupted kernel thread).
 */
static inline bool interrupted_kernel_fpu_idle(void)
{
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	if (use_xsave())
		return 0;

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	return !__thread_has_fpu(current) &&
		(read_cr0() & X86_CR0_TS);
}

/*
 * Were we in user mode (or vm86 mode) when we were
 * interrupted?
 *
 * Doing kernel_fpu_begin/end() is ok if we are running
 * in an interrupt context from user mode - we'll just
 * save the FPU state as required.
 */
static inline bool interrupted_user_mode(void)
{
	struct pt_regs *regs = get_irq_regs();
	return regs && user_mode_vm(regs);
}

/*
 * Can we use the FPU in kernel mode with the
 * whole "kernel_fpu_begin/end()" sequence?
 *
 * It's always ok in process context (ie "not interrupt")
 * but it is sometimes ok even from an irq.
 */
bool irq_fpu_usable(void)
{
	return !in_interrupt() ||
		interrupted_user_mode() ||
		interrupted_kernel_fpu_idle();
}
EXPORT_SYMBOL(irq_fpu_usable);

void kernel_fpu_begin(void)
{
	struct task_struct *me = current;

	WARN_ON_ONCE(!irq_fpu_usable());
	preempt_disable();
	if (__thread_has_fpu(me)) {
		__save_init_fpu(me);
		__thread_clear_has_fpu(me);
		/* We do 'stts()' in kernel_fpu_end() */
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	} else if (!use_xsave()) {
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		this_cpu_write(fpu_owner_task, NULL);
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		clts();
	}
}
EXPORT_SYMBOL(kernel_fpu_begin);

void kernel_fpu_end(void)
{
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	if (use_xsave())
		math_state_restore();
	else
		stts();
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	preempt_enable();
}
EXPORT_SYMBOL(kernel_fpu_end);

void unlazy_fpu(struct task_struct *tsk)
{
	preempt_disable();
	if (__thread_has_fpu(tsk)) {
		__save_init_fpu(tsk);
		__thread_fpu_end(tsk);
	} else
		tsk->fpu_counter = 0;
	preempt_enable();
}
EXPORT_SYMBOL(unlazy_fpu);

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unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
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unsigned int xstate_size;
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EXPORT_SYMBOL_GPL(xstate_size);
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static struct i387_fxsave_struct fx_scratch __cpuinitdata;
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static void __cpuinit mxcsr_feature_mask_init(void)
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{
	unsigned long mask = 0;
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	clts();
	if (cpu_has_fxsr) {
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		memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
		asm volatile("fxsave %0" : : "m" (fx_scratch));
		mask = fx_scratch.mxcsr_mask;
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		if (mask == 0)
			mask = 0x0000ffbf;
	}
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	mxcsr_feature_mask &= mask;
	stts();
}

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static void __cpuinit init_thread_xstate(void)
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{
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	/*
	 * Note that xstate_size might be overwriten later during
	 * xsave_init().
	 */

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	if (!HAVE_HWFP) {
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		/*
		 * Disable xsave as we do not support it if i387
		 * emulation is enabled.
		 */
		setup_clear_cpu_cap(X86_FEATURE_XSAVE);
		setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
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		xstate_size = sizeof(struct i387_soft_struct);
		return;
	}

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	if (cpu_has_fxsr)
		xstate_size = sizeof(struct i387_fxsave_struct);
	else
		xstate_size = sizeof(struct i387_fsave_struct);
}

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/*
 * Called at bootup to set up the initial FPU state that is later cloned
 * into all processes.
 */
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void __cpuinit fpu_init(void)
{
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	unsigned long cr0;
	unsigned long cr4_mask = 0;
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	if (cpu_has_fxsr)
		cr4_mask |= X86_CR4_OSFXSR;
	if (cpu_has_xmm)
		cr4_mask |= X86_CR4_OSXMMEXCPT;
	if (cr4_mask)
		set_in_cr4(cr4_mask);

	cr0 = read_cr0();
	cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
	if (!HAVE_HWFP)
		cr0 |= X86_CR0_EM;
	write_cr0(cr0);
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	if (!smp_processor_id())
		init_thread_xstate();

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	mxcsr_feature_mask_init();
	/* clean state in init */
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	current_thread_info()->status = 0;
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	clear_used_math();
}
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void fpu_finit(struct fpu *fpu)
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{
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	if (!HAVE_HWFP) {
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		finit_soft_fpu(&fpu->state->soft);
		return;
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	}

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	if (cpu_has_fxsr) {
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		struct i387_fxsave_struct *fx = &fpu->state->fxsave;
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		memset(fx, 0, xstate_size);
		fx->cwd = 0x37f;
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		if (cpu_has_xmm)
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			fx->mxcsr = MXCSR_DEFAULT;
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	} else {
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		struct i387_fsave_struct *fp = &fpu->state->fsave;
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		memset(fp, 0, xstate_size);
		fp->cwd = 0xffff037fu;
		fp->swd = 0xffff0000u;
		fp->twd = 0xffffffffu;
		fp->fos = 0xffff0000u;
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	}
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}
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EXPORT_SYMBOL_GPL(fpu_finit);
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/*
 * The _current_ task is using the FPU for the first time
 * so initialize it and set the mxcsr to its default
 * value at reset if we support XMM instructions and then
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 * remember the current task has used the FPU.
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 */
int init_fpu(struct task_struct *tsk)
{
	int ret;

	if (tsk_used_math(tsk)) {
		if (HAVE_HWFP && tsk == current)
			unlazy_fpu(tsk);
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		tsk->thread.fpu.last_cpu = ~0;
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		return 0;
	}

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	/*
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	 * Memory allocation at the first usage of the FPU and other state.
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	 */
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	ret = fpu_alloc(&tsk->thread.fpu);
	if (ret)
		return ret;

	fpu_finit(&tsk->thread.fpu);

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	set_stopped_child_used_math(tsk);
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	return 0;
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}
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EXPORT_SYMBOL_GPL(init_fpu);
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/*
 * The xstateregs_active() routine is the same as the fpregs_active() routine,
 * as the "regset->n" for the xstate regset will be updated based on the feature
 * capabilites supported by the xsave.
 */
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int fpregs_active(struct task_struct *target, const struct user_regset *regset)
{
	return tsk_used_math(target) ? regset->n : 0;
}
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int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
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{
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	return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
}
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int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
		unsigned int pos, unsigned int count,
		void *kbuf, void __user *ubuf)
{
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	int ret;

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	if (!cpu_has_fxsr)
		return -ENODEV;

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	ret = init_fpu(target);
	if (ret)
		return ret;
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	sanitize_i387_state(target);

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	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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				   &target->thread.fpu.state->fxsave, 0, -1);
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}
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int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
		unsigned int pos, unsigned int count,
		const void *kbuf, const void __user *ubuf)
{
	int ret;

	if (!cpu_has_fxsr)
		return -ENODEV;

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	ret = init_fpu(target);
	if (ret)
		return ret;

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	sanitize_i387_state(target);

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	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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				 &target->thread.fpu.state->fxsave, 0, -1);
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	/*
	 * mxcsr reserved bits must be masked to zero for security reasons.
	 */
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	target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
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	/*
	 * update the header bits in the xsave header, indicating the
	 * presence of FP and SSE state.
	 */
	if (cpu_has_xsave)
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		target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
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	return ret;
}

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int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
		unsigned int pos, unsigned int count,
		void *kbuf, void __user *ubuf)
{
	int ret;

	if (!cpu_has_xsave)
		return -ENODEV;

	ret = init_fpu(target);
	if (ret)
		return ret;

	/*
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	 * Copy the 48bytes defined by the software first into the xstate
	 * memory layout in the thread struct, so that we can copy the entire
	 * xstateregs to the user using one user_regset_copyout().
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	 */
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	memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
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	       xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
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	/*
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	 * Copy the xstate memory layout.
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	 */
	ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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				  &target->thread.fpu.state->xsave, 0, -1);
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	return ret;
}

int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
		  unsigned int pos, unsigned int count,
		  const void *kbuf, const void __user *ubuf)
{
	int ret;
	struct xsave_hdr_struct *xsave_hdr;

	if (!cpu_has_xsave)
		return -ENODEV;

	ret = init_fpu(target);
	if (ret)
		return ret;

	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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				 &target->thread.fpu.state->xsave, 0, -1);
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	/*
	 * mxcsr reserved bits must be masked to zero for security reasons.
	 */
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	target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
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	xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
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	xsave_hdr->xstate_bv &= pcntxt_mask;
	/*
	 * These bits must be zero.
	 */
	xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;

	return ret;
}

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#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
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/*
 * FPU tag word conversions.
 */

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static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
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{
	unsigned int tmp; /* to avoid 16 bit prefixes in the code */
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	/* Transform each pair of bits into 01 (valid) or 00 (empty) */
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	tmp = ~twd;
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	tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
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	/* and move the valid bits to the lower byte. */
	tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
	tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
	tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
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	return tmp;
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}

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#define FPREG_ADDR(f, n)	((void *)&(f)->st_space + (n) * 16)
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#define FP_EXP_TAG_VALID	0
#define FP_EXP_TAG_ZERO		1
#define FP_EXP_TAG_SPECIAL	2
#define FP_EXP_TAG_EMPTY	3

static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
{
	struct _fpxreg *st;
	u32 tos = (fxsave->swd >> 11) & 7;
	u32 twd = (unsigned long) fxsave->twd;
	u32 tag;
	u32 ret = 0xffff0000u;
	int i;
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	for (i = 0; i < 8; i++, twd >>= 1) {
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		if (twd & 0x1) {
			st = FPREG_ADDR(fxsave, (i - tos) & 7);
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			switch (st->exponent & 0x7fff) {
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			case 0x7fff:
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				tag = FP_EXP_TAG_SPECIAL;
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				break;
			case 0x0000:
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				if (!st->significand[0] &&
				    !st->significand[1] &&
				    !st->significand[2] &&
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				    !st->significand[3])
					tag = FP_EXP_TAG_ZERO;
				else
					tag = FP_EXP_TAG_SPECIAL;
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				break;
			default:
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				if (st->significand[3] & 0x8000)
					tag = FP_EXP_TAG_VALID;
				else
					tag = FP_EXP_TAG_SPECIAL;
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				break;
			}
		} else {
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			tag = FP_EXP_TAG_EMPTY;
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		}
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		ret |= tag << (2 * i);
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	}
	return ret;
}

/*
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 * FXSR floating point environment conversions.
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 */

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void
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convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
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{
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	struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
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	struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
	struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
	int i;
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	env->cwd = fxsave->cwd | 0xffff0000u;
	env->swd = fxsave->swd | 0xffff0000u;
	env->twd = twd_fxsr_to_i387(fxsave);

#ifdef CONFIG_X86_64
	env->fip = fxsave->rip;
	env->foo = fxsave->rdp;
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	/*
	 * should be actually ds/cs at fpu exception time, but
	 * that information is not available in 64bit mode.
	 */
	env->fcs = task_pt_regs(tsk)->cs;
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	if (tsk == current) {
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		savesegment(ds, env->fos);
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	} else {
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		env->fos = tsk->thread.ds;
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	}
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	env->fos |= 0xffff0000;
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#else
	env->fip = fxsave->fip;
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	env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
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	env->foo = fxsave->foo;
	env->fos = fxsave->fos;
#endif
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	for (i = 0; i < 8; ++i)
		memcpy(&to[i], &from[i], sizeof(to[0]));
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}

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void convert_to_fxsr(struct task_struct *tsk,
		     const struct user_i387_ia32_struct *env)
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{
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	struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
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	struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
	struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
	int i;
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	fxsave->cwd = env->cwd;
	fxsave->swd = env->swd;
	fxsave->twd = twd_i387_to_fxsr(env->twd);
	fxsave->fop = (u16) ((u32) env->fcs >> 16);
#ifdef CONFIG_X86_64
	fxsave->rip = env->fip;
	fxsave->rdp = env->foo;
	/* cs and ds ignored */
#else
	fxsave->fip = env->fip;
	fxsave->fcs = (env->fcs & 0xffff);
	fxsave->foo = env->foo;
	fxsave->fos = env->fos;
#endif
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	for (i = 0; i < 8; ++i)
		memcpy(&to[i], &from[i], sizeof(from[0]));
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}

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int fpregs_get(struct task_struct *target, const struct user_regset *regset,
	       unsigned int pos, unsigned int count,
	       void *kbuf, void __user *ubuf)
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{
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	struct user_i387_ia32_struct env;
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	int ret;
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	ret = init_fpu(target);
	if (ret)
		return ret;
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	if (!HAVE_HWFP)
		return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);

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	if (!cpu_has_fxsr) {
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		return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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					   &target->thread.fpu.state->fsave, 0,
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					   -1);
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	}
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	sanitize_i387_state(target);

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	if (kbuf && pos == 0 && count == sizeof(env)) {
		convert_from_fxsr(kbuf, target);
		return 0;
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	}
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	convert_from_fxsr(&env, target);
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	return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
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}

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int fpregs_set(struct task_struct *target, const struct user_regset *regset,
	       unsigned int pos, unsigned int count,
	       const void *kbuf, const void __user *ubuf)
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{
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	struct user_i387_ia32_struct env;
	int ret;
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	ret = init_fpu(target);
	if (ret)
		return ret;

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	sanitize_i387_state(target);

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	if (!HAVE_HWFP)
		return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);

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	if (!cpu_has_fxsr) {
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		return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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					  &target->thread.fpu.state->fsave, 0, -1);
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	}
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	if (pos > 0 || count < sizeof(env))
		convert_from_fxsr(&env, target);

	ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
	if (!ret)
		convert_to_fxsr(target, &env);

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	/*
	 * update the header bit in the xsave header, indicating the
	 * presence of FP.
	 */
	if (cpu_has_xsave)
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		target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
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	return ret;
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}

/*
 * FPU state for core dumps.
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 * This is only used for a.out dumps now.
 * It is declared generically using elf_fpregset_t (which is
 * struct user_i387_struct) but is in fact only used for 32-bit
 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
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 */
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int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
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{
	struct task_struct *tsk = current;
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	int fpvalid;
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	fpvalid = !!used_math();
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	if (fpvalid)
		fpvalid = !fpregs_get(tsk, NULL,
				      0, sizeof(struct user_i387_ia32_struct),
				      fpu, NULL);
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	return fpvalid;
}
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EXPORT_SYMBOL(dump_fpu);
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#endif	/* CONFIG_X86_32 || CONFIG_IA32_EMULATION */