i915_dma.c 44.0 KB
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/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
 */
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/*
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 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
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 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
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 */
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#include "drmP.h"
#include "drm.h"
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#include "drm_crtc_helper.h"
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#include "drm_fb_helper.h"
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#include "intel_drv.h"
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#include "i915_drm.h"
#include "i915_drv.h"
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#include "i915_trace.h"
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#include <linux/vgaarb.h>
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/* Really want an OS-independent resettable timer.  Would like to have
 * this loop run for (eg) 3 sec, but have the timer reset every time
 * the head pointer changes, so that EBUSY only happens if the ring
 * actually stalls for (eg) 3 seconds.
 */
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int i915_wait_ring(struct drm_device * dev, int n, const char *caller)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
	drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
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	u32 acthd_reg = IS_I965G(dev) ? ACTHD_I965 : ACTHD;
	u32 last_acthd = I915_READ(acthd_reg);
	u32 acthd;
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	u32 last_head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
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	int i;

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	trace_i915_ring_wait_begin (dev);

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	for (i = 0; i < 100000; i++) {
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		ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
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		acthd = I915_READ(acthd_reg);
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		ring->space = ring->head - (ring->tail + 8);
		if (ring->space < 0)
			ring->space += ring->Size;
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		if (ring->space >= n) {
			trace_i915_ring_wait_end (dev);
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			return 0;
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		}
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		if (dev->primary->master) {
			struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
			if (master_priv->sarea_priv)
				master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
		}

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		if (ring->head != last_head)
			i = 0;
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		if (acthd != last_acthd)
			i = 0;
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		last_head = ring->head;
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		last_acthd = acthd;
		msleep_interruptible(10);

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	}

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	trace_i915_ring_wait_end (dev);
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	return -EBUSY;
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}

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/* As a ringbuffer is only allowed to wrap between instructions, fill
 * the tail with NOOPs.
 */
int i915_wrap_ring(struct drm_device *dev)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	volatile unsigned int *virt;
	int rem;

	rem = dev_priv->ring.Size - dev_priv->ring.tail;
	if (dev_priv->ring.space < rem) {
		int ret = i915_wait_ring(dev, rem, __func__);
		if (ret)
			return ret;
	}
	dev_priv->ring.space -= rem;

	virt = (unsigned int *)
		(dev_priv->ring.virtual_start + dev_priv->ring.tail);
	rem /= 4;
	while (rem--)
		*virt++ = MI_NOOP;

	dev_priv->ring.tail = 0;

	return 0;
}

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/**
 * Sets up the hardware status page for devices that need a physical address
 * in the register.
 */
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static int i915_init_phys_hws(struct drm_device *dev)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
	/* Program Hardware Status Page */
	dev_priv->status_page_dmah =
		drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);

	if (!dev_priv->status_page_dmah) {
		DRM_ERROR("Can not allocate hardware status page\n");
		return -ENOMEM;
	}
	dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
	dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;

	memset(dev_priv->hw_status_page, 0, PAGE_SIZE);

	I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
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	DRM_DEBUG_DRIVER("Enabled hardware status page\n");
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	return 0;
}

/**
 * Frees the hardware status page, whether it's a physical address or a virtual
 * address set up by the X Server.
 */
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static void i915_free_hws(struct drm_device *dev)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
	if (dev_priv->status_page_dmah) {
		drm_pci_free(dev, dev_priv->status_page_dmah);
		dev_priv->status_page_dmah = NULL;
	}

	if (dev_priv->status_gfx_addr) {
		dev_priv->status_gfx_addr = 0;
		drm_core_ioremapfree(&dev_priv->hws_map, dev);
	}

	/* Need to rewrite hardware status page */
	I915_WRITE(HWS_PGA, 0x1ffff000);
}

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void i915_kernel_lost_context(struct drm_device * dev)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct drm_i915_master_private *master_priv;
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	drm_i915_ring_buffer_t *ring = &(dev_priv->ring);

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	/*
	 * We should never lose context on the ring with modesetting
	 * as we don't expose it to userspace
	 */
	if (drm_core_check_feature(dev, DRIVER_MODESET))
		return;

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	ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
	ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
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	ring->space = ring->head - (ring->tail + 8);
	if (ring->space < 0)
		ring->space += ring->Size;

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	if (!dev->primary->master)
		return;

	master_priv = dev->primary->master->driver_priv;
	if (ring->head == ring->tail && master_priv->sarea_priv)
		master_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
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}

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static int i915_dma_cleanup(struct drm_device * dev)
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{
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	drm_i915_private_t *dev_priv = dev->dev_private;
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	/* Make sure interrupts are disabled here because the uninstall ioctl
	 * may not have been called from userspace and after dev_private
	 * is freed, it's too late.
	 */
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	if (dev->irq_enabled)
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		drm_irq_uninstall(dev);
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	if (dev_priv->ring.virtual_start) {
		drm_core_ioremapfree(&dev_priv->ring.map, dev);
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		dev_priv->ring.virtual_start = NULL;
		dev_priv->ring.map.handle = NULL;
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		dev_priv->ring.map.size = 0;
	}
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	/* Clear the HWS virtual address at teardown */
	if (I915_NEED_GFX_HWS(dev))
		i915_free_hws(dev);
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	return 0;
}

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static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
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{
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	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
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	master_priv->sarea = drm_getsarea(dev);
	if (master_priv->sarea) {
		master_priv->sarea_priv = (drm_i915_sarea_t *)
			((u8 *)master_priv->sarea->handle + init->sarea_priv_offset);
	} else {
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		DRM_DEBUG_DRIVER("sarea not found assuming DRI2 userspace\n");
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	}

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	if (init->ring_size != 0) {
		if (dev_priv->ring.ring_obj != NULL) {
			i915_dma_cleanup(dev);
			DRM_ERROR("Client tried to initialize ringbuffer in "
				  "GEM mode\n");
			return -EINVAL;
		}
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		dev_priv->ring.Size = init->ring_size;
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		dev_priv->ring.map.offset = init->ring_start;
		dev_priv->ring.map.size = init->ring_size;
		dev_priv->ring.map.type = 0;
		dev_priv->ring.map.flags = 0;
		dev_priv->ring.map.mtrr = 0;
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		drm_core_ioremap_wc(&dev_priv->ring.map, dev);
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		if (dev_priv->ring.map.handle == NULL) {
			i915_dma_cleanup(dev);
			DRM_ERROR("can not ioremap virtual address for"
				  " ring buffer\n");
			return -ENOMEM;
		}
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	}

	dev_priv->ring.virtual_start = dev_priv->ring.map.handle;

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	dev_priv->cpp = init->cpp;
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	dev_priv->back_offset = init->back_offset;
	dev_priv->front_offset = init->front_offset;
	dev_priv->current_page = 0;
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	if (master_priv->sarea_priv)
		master_priv->sarea_priv->pf_current_page = 0;
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	/* Allow hardware batchbuffers unless told otherwise.
	 */
	dev_priv->allow_batchbuffer = 1;

	return 0;
}

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static int i915_dma_resume(struct drm_device * dev)
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{
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;

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	DRM_DEBUG_DRIVER("%s\n", __func__);
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	if (dev_priv->ring.map.handle == NULL) {
		DRM_ERROR("can not ioremap virtual address for"
			  " ring buffer\n");
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		return -ENOMEM;
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	}

	/* Program Hardware Status Page */
	if (!dev_priv->hw_status_page) {
		DRM_ERROR("Can not find hardware status page\n");
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		return -EINVAL;
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	}
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	DRM_DEBUG_DRIVER("hw status page @ %p\n",
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				dev_priv->hw_status_page);
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	if (dev_priv->status_gfx_addr != 0)
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		I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
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	else
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		I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
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	DRM_DEBUG_DRIVER("Enabled hardware status page\n");
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	return 0;
}

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static int i915_dma_init(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
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{
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	drm_i915_init_t *init = data;
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	int retcode = 0;

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	switch (init->func) {
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	case I915_INIT_DMA:
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		retcode = i915_initialize(dev, init);
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		break;
	case I915_CLEANUP_DMA:
		retcode = i915_dma_cleanup(dev);
		break;
	case I915_RESUME_DMA:
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		retcode = i915_dma_resume(dev);
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		break;
	default:
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		retcode = -EINVAL;
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		break;
	}

	return retcode;
}

/* Implement basically the same security restrictions as hardware does
 * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
 *
 * Most of the calculations below involve calculating the size of a
 * particular instruction.  It's important to get the size right as
 * that tells us where the next instruction to check is.  Any illegal
 * instruction detected will be given a size of zero, which is a
 * signal to abort the rest of the buffer.
 */
static int do_validate_cmd(int cmd)
{
	switch (((cmd >> 29) & 0x7)) {
	case 0x0:
		switch ((cmd >> 23) & 0x3f) {
		case 0x0:
			return 1;	/* MI_NOOP */
		case 0x4:
			return 1;	/* MI_FLUSH */
		default:
			return 0;	/* disallow everything else */
		}
		break;
	case 0x1:
		return 0;	/* reserved */
	case 0x2:
		return (cmd & 0xff) + 2;	/* 2d commands */
	case 0x3:
		if (((cmd >> 24) & 0x1f) <= 0x18)
			return 1;

		switch ((cmd >> 24) & 0x1f) {
		case 0x1c:
			return 1;
		case 0x1d:
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			switch ((cmd >> 16) & 0xff) {
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			case 0x3:
				return (cmd & 0x1f) + 2;
			case 0x4:
				return (cmd & 0xf) + 2;
			default:
				return (cmd & 0xffff) + 2;
			}
		case 0x1e:
			if (cmd & (1 << 23))
				return (cmd & 0xffff) + 1;
			else
				return 1;
		case 0x1f:
			if ((cmd & (1 << 23)) == 0)	/* inline vertices */
				return (cmd & 0x1ffff) + 2;
			else if (cmd & (1 << 17))	/* indirect random */
				if ((cmd & 0xffff) == 0)
					return 0;	/* unknown length, too hard */
				else
					return (((cmd & 0xffff) + 1) / 2) + 1;
			else
				return 2;	/* indirect sequential */
		default:
			return 0;
		}
	default:
		return 0;
	}

	return 0;
}

static int validate_cmd(int cmd)
{
	int ret = do_validate_cmd(cmd);

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/*	printk("validate_cmd( %x ): %d\n", cmd, ret); */
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	return ret;
}

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static int i915_emit_cmds(struct drm_device * dev, int *buffer, int dwords)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
	int i;
	RING_LOCALS;

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	if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
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		return -EINVAL;
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	BEGIN_LP_RING((dwords+1)&~1);
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	for (i = 0; i < dwords;) {
		int cmd, sz;

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		cmd = buffer[i];
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		if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
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			return -EINVAL;
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		OUT_RING(cmd);

		while (++i, --sz) {
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			OUT_RING(buffer[i]);
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		}
	}

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	if (dwords & 1)
		OUT_RING(0);

	ADVANCE_LP_RING();

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	return 0;
}

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int
i915_emit_box(struct drm_device *dev,
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	      struct drm_clip_rect *boxes,
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	      int i, int DR1, int DR4)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct drm_clip_rect box = boxes[i];
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	RING_LOCALS;

	if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
		DRM_ERROR("Bad box %d,%d..%d,%d\n",
			  box.x1, box.y1, box.x2, box.y2);
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		return -EINVAL;
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	}

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	if (IS_I965G(dev)) {
		BEGIN_LP_RING(4);
		OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
		OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
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		OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
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		OUT_RING(DR4);
		ADVANCE_LP_RING();
	} else {
		BEGIN_LP_RING(6);
		OUT_RING(GFX_OP_DRAWRECT_INFO);
		OUT_RING(DR1);
		OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
		OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
		OUT_RING(DR4);
		OUT_RING(0);
		ADVANCE_LP_RING();
	}
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	return 0;
}

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/* XXX: Emitting the counter should really be moved to part of the IRQ
 * emit. For now, do it in both places:
 */

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static void i915_emit_breadcrumb(struct drm_device *dev)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
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	RING_LOCALS;

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	dev_priv->counter++;
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	if (dev_priv->counter > 0x7FFFFFFFUL)
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		dev_priv->counter = 0;
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	if (master_priv->sarea_priv)
		master_priv->sarea_priv->last_enqueue = dev_priv->counter;
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	BEGIN_LP_RING(4);
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	OUT_RING(MI_STORE_DWORD_INDEX);
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	OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
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	OUT_RING(dev_priv->counter);
	OUT_RING(0);
	ADVANCE_LP_RING();
}

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static int i915_dispatch_cmdbuffer(struct drm_device * dev,
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				   drm_i915_cmdbuffer_t *cmd,
				   struct drm_clip_rect *cliprects,
				   void *cmdbuf)
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{
	int nbox = cmd->num_cliprects;
	int i = 0, count, ret;

	if (cmd->sz & 0x3) {
		DRM_ERROR("alignment");
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		return -EINVAL;
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	}

	i915_kernel_lost_context(dev);

	count = nbox ? nbox : 1;

	for (i = 0; i < count; i++) {
		if (i < nbox) {
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			ret = i915_emit_box(dev, cliprects, i,
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					    cmd->DR1, cmd->DR4);
			if (ret)
				return ret;
		}

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		ret = i915_emit_cmds(dev, cmdbuf, cmd->sz / 4);
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		if (ret)
			return ret;
	}

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	i915_emit_breadcrumb(dev);
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	return 0;
}

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static int i915_dispatch_batchbuffer(struct drm_device * dev,
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				     drm_i915_batchbuffer_t * batch,
				     struct drm_clip_rect *cliprects)
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{
	drm_i915_private_t *dev_priv = dev->dev_private;
	int nbox = batch->num_cliprects;
	int i = 0, count;
	RING_LOCALS;

	if ((batch->start | batch->used) & 0x7) {
		DRM_ERROR("alignment");
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		return -EINVAL;
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	}

	i915_kernel_lost_context(dev);

	count = nbox ? nbox : 1;

	for (i = 0; i < count; i++) {
		if (i < nbox) {
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			int ret = i915_emit_box(dev, cliprects, i,
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						batch->DR1, batch->DR4);
			if (ret)
				return ret;
		}

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		if (!IS_I830(dev) && !IS_845G(dev)) {
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			BEGIN_LP_RING(2);
554 555 556 557 558 559 560
			if (IS_I965G(dev)) {
				OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
				OUT_RING(batch->start);
			} else {
				OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
				OUT_RING(batch->start | MI_BATCH_NON_SECURE);
			}
L
Linus Torvalds 已提交
561 562 563 564 565 566 567 568 569 570 571
			ADVANCE_LP_RING();
		} else {
			BEGIN_LP_RING(4);
			OUT_RING(MI_BATCH_BUFFER);
			OUT_RING(batch->start | MI_BATCH_NON_SECURE);
			OUT_RING(batch->start + batch->used - 4);
			OUT_RING(0);
			ADVANCE_LP_RING();
		}
	}

572
	i915_emit_breadcrumb(dev);
L
Linus Torvalds 已提交
573 574 575 576

	return 0;
}

577
static int i915_dispatch_flip(struct drm_device * dev)
L
Linus Torvalds 已提交
578 579
{
	drm_i915_private_t *dev_priv = dev->dev_private;
580 581
	struct drm_i915_master_private *master_priv =
		dev->primary->master->driver_priv;
L
Linus Torvalds 已提交
582 583
	RING_LOCALS;

584
	if (!master_priv->sarea_priv)
585 586
		return -EINVAL;

587
	DRM_DEBUG_DRIVER("%s: page=%d pfCurrentPage=%d\n",
588 589 590
			  __func__,
			 dev_priv->current_page,
			 master_priv->sarea_priv->pf_current_page);
L
Linus Torvalds 已提交
591

592 593 594
	i915_kernel_lost_context(dev);

	BEGIN_LP_RING(2);
595
	OUT_RING(MI_FLUSH | MI_READ_FLUSH);
596 597
	OUT_RING(0);
	ADVANCE_LP_RING();
L
Linus Torvalds 已提交
598

599 600 601 602 603 604
	BEGIN_LP_RING(6);
	OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
	OUT_RING(0);
	if (dev_priv->current_page == 0) {
		OUT_RING(dev_priv->back_offset);
		dev_priv->current_page = 1;
L
Linus Torvalds 已提交
605
	} else {
606 607
		OUT_RING(dev_priv->front_offset);
		dev_priv->current_page = 0;
L
Linus Torvalds 已提交
608
	}
609 610
	OUT_RING(0);
	ADVANCE_LP_RING();
L
Linus Torvalds 已提交
611

612 613 614 615
	BEGIN_LP_RING(2);
	OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
	OUT_RING(0);
	ADVANCE_LP_RING();
L
Linus Torvalds 已提交
616

617
	master_priv->sarea_priv->last_enqueue = dev_priv->counter++;
L
Linus Torvalds 已提交
618 619

	BEGIN_LP_RING(4);
620
	OUT_RING(MI_STORE_DWORD_INDEX);
621
	OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
622 623
	OUT_RING(dev_priv->counter);
	OUT_RING(0);
L
Linus Torvalds 已提交
624 625
	ADVANCE_LP_RING();

626
	master_priv->sarea_priv->pf_current_page = dev_priv->current_page;
627
	return 0;
L
Linus Torvalds 已提交
628 629
}

630
static int i915_quiescent(struct drm_device * dev)
L
Linus Torvalds 已提交
631 632 633 634
{
	drm_i915_private_t *dev_priv = dev->dev_private;

	i915_kernel_lost_context(dev);
635
	return i915_wait_ring(dev, dev_priv->ring.Size - 8, __func__);
L
Linus Torvalds 已提交
636 637
}

638 639
static int i915_flush_ioctl(struct drm_device *dev, void *data,
			    struct drm_file *file_priv)
L
Linus Torvalds 已提交
640
{
641 642 643
	int ret;

	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
L
Linus Torvalds 已提交
644

645 646 647 648 649
	mutex_lock(&dev->struct_mutex);
	ret = i915_quiescent(dev);
	mutex_unlock(&dev->struct_mutex);

	return ret;
L
Linus Torvalds 已提交
650 651
}

652 653
static int i915_batchbuffer(struct drm_device *dev, void *data,
			    struct drm_file *file_priv)
L
Linus Torvalds 已提交
654 655
{
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
656
	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
L
Linus Torvalds 已提交
657
	drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
658
	    master_priv->sarea_priv;
659
	drm_i915_batchbuffer_t *batch = data;
L
Linus Torvalds 已提交
660
	int ret;
661
	struct drm_clip_rect *cliprects = NULL;
L
Linus Torvalds 已提交
662 663 664

	if (!dev_priv->allow_batchbuffer) {
		DRM_ERROR("Batchbuffer ioctl disabled\n");
E
Eric Anholt 已提交
665
		return -EINVAL;
L
Linus Torvalds 已提交
666 667
	}

668
	DRM_DEBUG_DRIVER("i915 batchbuffer, start %x used %d cliprects %d\n",
669
			batch->start, batch->used, batch->num_cliprects);
L
Linus Torvalds 已提交
670

671
	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
L
Linus Torvalds 已提交
672

673 674 675 676
	if (batch->num_cliprects < 0)
		return -EINVAL;

	if (batch->num_cliprects) {
677 678 679
		cliprects = kcalloc(batch->num_cliprects,
				    sizeof(struct drm_clip_rect),
				    GFP_KERNEL);
680 681 682 683 684 685 686 687 688
		if (cliprects == NULL)
			return -ENOMEM;

		ret = copy_from_user(cliprects, batch->cliprects,
				     batch->num_cliprects *
				     sizeof(struct drm_clip_rect));
		if (ret != 0)
			goto fail_free;
	}
L
Linus Torvalds 已提交
689

690
	mutex_lock(&dev->struct_mutex);
691
	ret = i915_dispatch_batchbuffer(dev, batch, cliprects);
692
	mutex_unlock(&dev->struct_mutex);
L
Linus Torvalds 已提交
693

694
	if (sarea_priv)
695
		sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
696 697

fail_free:
698
	kfree(cliprects);
699

L
Linus Torvalds 已提交
700 701 702
	return ret;
}

703 704
static int i915_cmdbuffer(struct drm_device *dev, void *data,
			  struct drm_file *file_priv)
L
Linus Torvalds 已提交
705 706
{
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
707
	struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
L
Linus Torvalds 已提交
708
	drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
709
	    master_priv->sarea_priv;
710
	drm_i915_cmdbuffer_t *cmdbuf = data;
711 712
	struct drm_clip_rect *cliprects = NULL;
	void *batch_data;
L
Linus Torvalds 已提交
713 714
	int ret;

715
	DRM_DEBUG_DRIVER("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
716
			cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
L
Linus Torvalds 已提交
717

718
	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
L
Linus Torvalds 已提交
719

720 721 722
	if (cmdbuf->num_cliprects < 0)
		return -EINVAL;

723
	batch_data = kmalloc(cmdbuf->sz, GFP_KERNEL);
724 725 726 727 728 729 730 731
	if (batch_data == NULL)
		return -ENOMEM;

	ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz);
	if (ret != 0)
		goto fail_batch_free;

	if (cmdbuf->num_cliprects) {
732 733
		cliprects = kcalloc(cmdbuf->num_cliprects,
				    sizeof(struct drm_clip_rect), GFP_KERNEL);
734 735 736 737 738 739 740 741
		if (cliprects == NULL)
			goto fail_batch_free;

		ret = copy_from_user(cliprects, cmdbuf->cliprects,
				     cmdbuf->num_cliprects *
				     sizeof(struct drm_clip_rect));
		if (ret != 0)
			goto fail_clip_free;
L
Linus Torvalds 已提交
742 743
	}

744
	mutex_lock(&dev->struct_mutex);
745
	ret = i915_dispatch_cmdbuffer(dev, cmdbuf, cliprects, batch_data);
746
	mutex_unlock(&dev->struct_mutex);
L
Linus Torvalds 已提交
747 748
	if (ret) {
		DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
749
		goto fail_clip_free;
L
Linus Torvalds 已提交
750 751
	}

752
	if (sarea_priv)
753
		sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
754 755

fail_clip_free:
756
	kfree(cliprects);
757
fail_batch_free:
758
	kfree(batch_data);
759 760

	return ret;
L
Linus Torvalds 已提交
761 762
}

763 764
static int i915_flip_bufs(struct drm_device *dev, void *data,
			  struct drm_file *file_priv)
L
Linus Torvalds 已提交
765
{
766 767
	int ret;

768
	DRM_DEBUG_DRIVER("%s\n", __func__);
L
Linus Torvalds 已提交
769

770
	RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
L
Linus Torvalds 已提交
771

772 773 774 775 776
	mutex_lock(&dev->struct_mutex);
	ret = i915_dispatch_flip(dev);
	mutex_unlock(&dev->struct_mutex);

	return ret;
L
Linus Torvalds 已提交
777 778
}

779 780
static int i915_getparam(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
L
Linus Torvalds 已提交
781 782
{
	drm_i915_private_t *dev_priv = dev->dev_private;
783
	drm_i915_getparam_t *param = data;
L
Linus Torvalds 已提交
784 785 786
	int value;

	if (!dev_priv) {
787
		DRM_ERROR("called with no initialization\n");
E
Eric Anholt 已提交
788
		return -EINVAL;
L
Linus Torvalds 已提交
789 790
	}

791
	switch (param->param) {
L
Linus Torvalds 已提交
792
	case I915_PARAM_IRQ_ACTIVE:
793
		value = dev->pdev->irq ? 1 : 0;
L
Linus Torvalds 已提交
794 795 796 797
		break;
	case I915_PARAM_ALLOW_BATCHBUFFER:
		value = dev_priv->allow_batchbuffer ? 1 : 0;
		break;
D
Dave Airlie 已提交
798 799 800
	case I915_PARAM_LAST_DISPATCH:
		value = READ_BREADCRUMB(dev_priv);
		break;
K
Kristian Høgsberg 已提交
801 802 803
	case I915_PARAM_CHIPSET_ID:
		value = dev->pci_device;
		break;
804
	case I915_PARAM_HAS_GEM:
805
		value = dev_priv->has_gem;
806
		break;
807 808 809
	case I915_PARAM_NUM_FENCES_AVAIL:
		value = dev_priv->num_fence_regs - dev_priv->fence_reg_start;
		break;
810 811 812
	case I915_PARAM_HAS_OVERLAY:
		value = dev_priv->overlay ? 1 : 0;
		break;
813 814 815
	case I915_PARAM_HAS_PAGEFLIPPING:
		value = 1;
		break;
L
Linus Torvalds 已提交
816
	default:
817
		DRM_DEBUG_DRIVER("Unknown parameter %d\n",
818
					param->param);
E
Eric Anholt 已提交
819
		return -EINVAL;
L
Linus Torvalds 已提交
820 821
	}

822
	if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
L
Linus Torvalds 已提交
823
		DRM_ERROR("DRM_COPY_TO_USER failed\n");
E
Eric Anholt 已提交
824
		return -EFAULT;
L
Linus Torvalds 已提交
825 826 827 828 829
	}

	return 0;
}

830 831
static int i915_setparam(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
L
Linus Torvalds 已提交
832 833
{
	drm_i915_private_t *dev_priv = dev->dev_private;
834
	drm_i915_setparam_t *param = data;
L
Linus Torvalds 已提交
835 836

	if (!dev_priv) {
837
		DRM_ERROR("called with no initialization\n");
E
Eric Anholt 已提交
838
		return -EINVAL;
L
Linus Torvalds 已提交
839 840
	}

841
	switch (param->param) {
L
Linus Torvalds 已提交
842 843 844
	case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
		break;
	case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
845
		dev_priv->tex_lru_log_granularity = param->value;
L
Linus Torvalds 已提交
846 847
		break;
	case I915_SETPARAM_ALLOW_BATCHBUFFER:
848
		dev_priv->allow_batchbuffer = param->value;
L
Linus Torvalds 已提交
849
		break;
850 851 852 853 854 855 856
	case I915_SETPARAM_NUM_USED_FENCES:
		if (param->value > dev_priv->num_fence_regs ||
		    param->value < 0)
			return -EINVAL;
		/* Userspace can use first N regs */
		dev_priv->fence_reg_start = param->value;
		break;
L
Linus Torvalds 已提交
857
	default:
858
		DRM_DEBUG_DRIVER("unknown parameter %d\n",
859
					param->param);
E
Eric Anholt 已提交
860
		return -EINVAL;
L
Linus Torvalds 已提交
861 862 863 864 865
	}

	return 0;
}

866 867
static int i915_set_status_page(struct drm_device *dev, void *data,
				struct drm_file *file_priv)
868 869
{
	drm_i915_private_t *dev_priv = dev->dev_private;
870
	drm_i915_hws_addr_t *hws = data;
871 872 873

	if (!I915_NEED_GFX_HWS(dev))
		return -EINVAL;
874 875

	if (!dev_priv) {
876
		DRM_ERROR("called with no initialization\n");
E
Eric Anholt 已提交
877
		return -EINVAL;
878 879
	}

J
Jesse Barnes 已提交
880 881 882 883 884
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		WARN(1, "tried to set status page when mode setting active\n");
		return 0;
	}

885
	DRM_DEBUG_DRIVER("set status page addr 0x%08x\n", (u32)hws->addr);
886 887

	dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
888

889
	dev_priv->hws_map.offset = dev->agp->base + hws->addr;
890 891 892 893 894
	dev_priv->hws_map.size = 4*1024;
	dev_priv->hws_map.type = 0;
	dev_priv->hws_map.flags = 0;
	dev_priv->hws_map.mtrr = 0;

895
	drm_core_ioremap_wc(&dev_priv->hws_map, dev);
896 897 898 899 900
	if (dev_priv->hws_map.handle == NULL) {
		i915_dma_cleanup(dev);
		dev_priv->status_gfx_addr = 0;
		DRM_ERROR("can not ioremap virtual address for"
				" G33 hw status page\n");
E
Eric Anholt 已提交
901
		return -ENOMEM;
902 903 904 905
	}
	dev_priv->hw_status_page = dev_priv->hws_map.handle;

	memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
906
	I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
907
	DRM_DEBUG_DRIVER("load hws HWS_PGA with gfx mem 0x%x\n",
908
				dev_priv->status_gfx_addr);
909
	DRM_DEBUG_DRIVER("load hws at %p\n",
910
				dev_priv->hw_status_page);
911 912 913
	return 0;
}

914 915 916 917 918 919 920 921 922 923 924 925
static int i915_get_bridge_dev(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	dev_priv->bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
	if (!dev_priv->bridge_dev) {
		DRM_ERROR("bridge device not found\n");
		return -1;
	}
	return 0;
}

J
Jesse Barnes 已提交
926 927 928 929 930 931 932 933 934 935
/**
 * i915_probe_agp - get AGP bootup configuration
 * @pdev: PCI device
 * @aperture_size: returns AGP aperture configured size
 * @preallocated_size: returns size of BIOS preallocated AGP space
 *
 * Since Intel integrated graphics are UMA, the BIOS has to set aside
 * some RAM for the framebuffer at early boot.  This code figures out
 * how much was set aside so we can use it for our own purposes.
 */
936
static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size,
937 938
			  uint32_t *preallocated_size,
			  uint32_t *start)
J
Jesse Barnes 已提交
939
{
940
	struct drm_i915_private *dev_priv = dev->dev_private;
J
Jesse Barnes 已提交
941 942
	u16 tmp = 0;
	unsigned long overhead;
943
	unsigned long stolen;
J
Jesse Barnes 已提交
944 945

	/* Get the fb aperture size and "stolen" memory amount. */
946
	pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &tmp);
J
Jesse Barnes 已提交
947 948 949 950

	*aperture_size = 1024 * 1024;
	*preallocated_size = 1024 * 1024;

951
	switch (dev->pdev->device) {
J
Jesse Barnes 已提交
952 953 954 955 956 957 958 959 960 961 962
	case PCI_DEVICE_ID_INTEL_82830_CGC:
	case PCI_DEVICE_ID_INTEL_82845G_IG:
	case PCI_DEVICE_ID_INTEL_82855GM_IG:
	case PCI_DEVICE_ID_INTEL_82865_IG:
		if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M)
			*aperture_size *= 64;
		else
			*aperture_size *= 128;
		break;
	default:
		/* 9xx supports large sizes, just look at the length */
963
		*aperture_size = pci_resource_len(dev->pdev, 2);
J
Jesse Barnes 已提交
964 965 966 967 968 969 970
		break;
	}

	/*
	 * Some of the preallocated space is taken by the GTT
	 * and popup.  GTT is 1K per MB of aperture size, and popup is 4K.
	 */
971
	if (IS_G4X(dev) || IS_PINEVIEW(dev) || IS_IRONLAKE(dev))
972 973 974 975
		overhead = 4096;
	else
		overhead = (*aperture_size / 1024) + 4096;

976 977 978 979
	switch (tmp & INTEL_GMCH_GMS_MASK) {
	case INTEL_855_GMCH_GMS_DISABLED:
		DRM_ERROR("video memory is disabled\n");
		return -1;
J
Jesse Barnes 已提交
980
	case INTEL_855_GMCH_GMS_STOLEN_1M:
981 982
		stolen = 1 * 1024 * 1024;
		break;
J
Jesse Barnes 已提交
983
	case INTEL_855_GMCH_GMS_STOLEN_4M:
984
		stolen = 4 * 1024 * 1024;
J
Jesse Barnes 已提交
985 986
		break;
	case INTEL_855_GMCH_GMS_STOLEN_8M:
987
		stolen = 8 * 1024 * 1024;
J
Jesse Barnes 已提交
988 989
		break;
	case INTEL_855_GMCH_GMS_STOLEN_16M:
990
		stolen = 16 * 1024 * 1024;
J
Jesse Barnes 已提交
991 992
		break;
	case INTEL_855_GMCH_GMS_STOLEN_32M:
993
		stolen = 32 * 1024 * 1024;
J
Jesse Barnes 已提交
994 995
		break;
	case INTEL_915G_GMCH_GMS_STOLEN_48M:
996
		stolen = 48 * 1024 * 1024;
J
Jesse Barnes 已提交
997 998
		break;
	case INTEL_915G_GMCH_GMS_STOLEN_64M:
999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017
		stolen = 64 * 1024 * 1024;
		break;
	case INTEL_GMCH_GMS_STOLEN_128M:
		stolen = 128 * 1024 * 1024;
		break;
	case INTEL_GMCH_GMS_STOLEN_256M:
		stolen = 256 * 1024 * 1024;
		break;
	case INTEL_GMCH_GMS_STOLEN_96M:
		stolen = 96 * 1024 * 1024;
		break;
	case INTEL_GMCH_GMS_STOLEN_160M:
		stolen = 160 * 1024 * 1024;
		break;
	case INTEL_GMCH_GMS_STOLEN_224M:
		stolen = 224 * 1024 * 1024;
		break;
	case INTEL_GMCH_GMS_STOLEN_352M:
		stolen = 352 * 1024 * 1024;
J
Jesse Barnes 已提交
1018 1019 1020
		break;
	default:
		DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
1021
			tmp & INTEL_GMCH_GMS_MASK);
J
Jesse Barnes 已提交
1022 1023
		return -1;
	}
1024
	*preallocated_size = stolen - overhead;
1025
	*start = overhead;
J
Jesse Barnes 已提交
1026 1027 1028 1029

	return 0;
}

1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056
#define PTE_ADDRESS_MASK		0xfffff000
#define PTE_ADDRESS_MASK_HIGH		0x000000f0 /* i915+ */
#define PTE_MAPPING_TYPE_UNCACHED	(0 << 1)
#define PTE_MAPPING_TYPE_DCACHE		(1 << 1) /* i830 only */
#define PTE_MAPPING_TYPE_CACHED		(3 << 1)
#define PTE_MAPPING_TYPE_MASK		(3 << 1)
#define PTE_VALID			(1 << 0)

/**
 * i915_gtt_to_phys - take a GTT address and turn it into a physical one
 * @dev: drm device
 * @gtt_addr: address to translate
 *
 * Some chip functions require allocations from stolen space but need the
 * physical address of the memory in question.  We use this routine
 * to get a physical address suitable for register programming from a given
 * GTT address.
 */
static unsigned long i915_gtt_to_phys(struct drm_device *dev,
				      unsigned long gtt_addr)
{
	unsigned long *gtt;
	unsigned long entry, phys;
	int gtt_bar = IS_I9XX(dev) ? 0 : 1;
	int gtt_offset, gtt_size;

	if (IS_I965G(dev)) {
1057
		if (IS_G4X(dev) || IS_IRONLAKE(dev)) {
1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078
			gtt_offset = 2*1024*1024;
			gtt_size = 2*1024*1024;
		} else {
			gtt_offset = 512*1024;
			gtt_size = 512*1024;
		}
	} else {
		gtt_bar = 3;
		gtt_offset = 0;
		gtt_size = pci_resource_len(dev->pdev, gtt_bar);
	}

	gtt = ioremap_wc(pci_resource_start(dev->pdev, gtt_bar) + gtt_offset,
			 gtt_size);
	if (!gtt) {
		DRM_ERROR("ioremap of GTT failed\n");
		return 0;
	}

	entry = *(volatile u32 *)(gtt + (gtt_addr / 1024));

1079
	DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry);
1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104

	/* Mask out these reserved bits on this hardware. */
	if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev) ||
	    IS_I945G(dev) || IS_I945GM(dev)) {
		entry &= ~PTE_ADDRESS_MASK_HIGH;
	}

	/* If it's not a mapping type we know, then bail. */
	if ((entry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_UNCACHED &&
	    (entry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_CACHED)	{
		iounmap(gtt);
		return 0;
	}

	if (!(entry & PTE_VALID)) {
		DRM_ERROR("bad GTT entry in stolen space\n");
		iounmap(gtt);
		return 0;
	}

	iounmap(gtt);

	phys =(entry & PTE_ADDRESS_MASK) |
		((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4));

1105
	DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys);
1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134

	return phys;
}

static void i915_warn_stolen(struct drm_device *dev)
{
	DRM_ERROR("not enough stolen space for compressed buffer, disabling\n");
	DRM_ERROR("hint: you may be able to increase stolen memory size in the BIOS to avoid this\n");
}

static void i915_setup_compression(struct drm_device *dev, int size)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_mm_node *compressed_fb, *compressed_llb;
	unsigned long cfb_base, ll_base;

	/* Leave 1M for line length buffer & misc. */
	compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0);
	if (!compressed_fb) {
		i915_warn_stolen(dev);
		return;
	}

	compressed_fb = drm_mm_get_block(compressed_fb, size, 4096);
	if (!compressed_fb) {
		i915_warn_stolen(dev);
		return;
	}

1135 1136 1137 1138
	cfb_base = i915_gtt_to_phys(dev, compressed_fb->start);
	if (!cfb_base) {
		DRM_ERROR("failed to get stolen phys addr, disabling FBC\n");
		drm_mm_put_block(compressed_fb);
1139 1140
	}

1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160
	if (!IS_GM45(dev)) {
		compressed_llb = drm_mm_search_free(&dev_priv->vram, 4096,
						    4096, 0);
		if (!compressed_llb) {
			i915_warn_stolen(dev);
			return;
		}

		compressed_llb = drm_mm_get_block(compressed_llb, 4096, 4096);
		if (!compressed_llb) {
			i915_warn_stolen(dev);
			return;
		}

		ll_base = i915_gtt_to_phys(dev, compressed_llb->start);
		if (!ll_base) {
			DRM_ERROR("failed to get stolen phys addr, disabling FBC\n");
			drm_mm_put_block(compressed_fb);
			drm_mm_put_block(compressed_llb);
		}
1161 1162 1163 1164
	}

	dev_priv->cfb_size = size;

1165 1166 1167 1168 1169 1170 1171
	if (IS_GM45(dev)) {
		g4x_disable_fbc(dev);
		I915_WRITE(DPFC_CB_BASE, compressed_fb->start);
	} else {
		i8xx_disable_fbc(dev);
		I915_WRITE(FBC_CFB_BASE, cfb_base);
		I915_WRITE(FBC_LL_BASE, ll_base);
1172 1173 1174 1175 1176 1177
	}

	DRM_DEBUG("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n", cfb_base,
		  ll_base, size >> 20);
}

1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190
/* true = enable decode, false = disable decoder */
static unsigned int i915_vga_set_decode(void *cookie, bool state)
{
	struct drm_device *dev = cookie;

	intel_modeset_vga_set_state(dev, state);
	if (state)
		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
		       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
	else
		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
}

1191
static int i915_load_modeset_init(struct drm_device *dev,
1192
				  unsigned long prealloc_start,
1193 1194
				  unsigned long prealloc_size,
				  unsigned long agp_size)
J
Jesse Barnes 已提交
1195 1196 1197 1198 1199 1200 1201 1202
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	int fb_bar = IS_I9XX(dev) ? 2 : 0;
	int ret = 0;

	dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) &
		0xff000000;

1203
	if (IS_MOBILE(dev) || IS_I9XX(dev))
J
Jesse Barnes 已提交
1204 1205 1206 1207
		dev_priv->cursor_needs_physical = true;
	else
		dev_priv->cursor_needs_physical = false;

1208 1209 1210
	if (IS_I965G(dev) || IS_G33(dev))
		dev_priv->cursor_needs_physical = false;

J
Jesse Barnes 已提交
1211 1212
	/* Basic memrange allocator for stolen space (aka vram) */
	drm_mm_init(&dev_priv->vram, 0, prealloc_size);
1213
	DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024));
J
Jesse Barnes 已提交
1214

1215 1216
	/* We're off and running w/KMS */
	dev_priv->mm.suspended = 0;
J
Jesse Barnes 已提交
1217

1218 1219 1220 1221 1222 1223 1224 1225 1226 1227
	/* Let GEM Manage from end of prealloc space to end of aperture.
	 *
	 * However, leave one page at the end still bound to the scratch page.
	 * There are a number of places where the hardware apparently
	 * prefetches past the end of the object, and we've seen multiple
	 * hangs with the GPU head pointer stuck in a batchbuffer bound
	 * at the last page of the aperture.  One page should be enough to
	 * keep any prefetching inside of the aperture.
	 */
	i915_gem_do_init(dev, prealloc_size, agp_size - 4096);
J
Jesse Barnes 已提交
1228

1229
	mutex_lock(&dev->struct_mutex);
J
Jesse Barnes 已提交
1230
	ret = i915_gem_init_ringbuffer(dev);
1231
	mutex_unlock(&dev->struct_mutex);
J
Jesse Barnes 已提交
1232
	if (ret)
1233
		goto out;
J
Jesse Barnes 已提交
1234

1235
	/* Try to set up FBC with a reasonable compressed buffer size */
1236
	if (I915_HAS_FBC(dev) && i915_powersave) {
1237 1238 1239 1240 1241 1242 1243 1244 1245 1246
		int cfb_size;

		/* Try to get an 8M buffer... */
		if (prealloc_size > (9*1024*1024))
			cfb_size = 8*1024*1024;
		else /* fall back to 7/8 of the stolen space */
			cfb_size = prealloc_size * 7 / 8;
		i915_setup_compression(dev, cfb_size);
	}

J
Jesse Barnes 已提交
1247 1248 1249 1250 1251 1252 1253 1254
	/* Allow hardware batchbuffers unless told otherwise.
	 */
	dev_priv->allow_batchbuffer = 1;

	ret = intel_init_bios(dev);
	if (ret)
		DRM_INFO("failed to find VBIOS tables\n");

1255 1256 1257 1258 1259
	/* if we have > 1 VGA cards, then disable the radeon VGA resources */
	ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
	if (ret)
		goto destroy_ringbuffer;

J
Jesse Barnes 已提交
1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275
	ret = drm_irq_install(dev);
	if (ret)
		goto destroy_ringbuffer;

	/* Always safe in the mode setting case. */
	/* FIXME: do pre/post-mode set stuff in core KMS code */
	dev->vblank_disable_allowed = 1;

	/*
	 * Initialize the hardware status page IRQ location.
	 */

	I915_WRITE(INSTPM, (1 << 5) | (1 << 21));

	intel_modeset_init(dev);

1276
	drm_helper_initial_config(dev);
J
Jesse Barnes 已提交
1277 1278 1279 1280 1281 1282 1283 1284 1285

	return 0;

destroy_ringbuffer:
	i915_gem_cleanup_ringbuffer(dev);
out:
	return ret;
}

1286 1287 1288 1289
int i915_master_create(struct drm_device *dev, struct drm_master *master)
{
	struct drm_i915_master_private *master_priv;

1290
	master_priv = kzalloc(sizeof(*master_priv), GFP_KERNEL);
1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304
	if (!master_priv)
		return -ENOMEM;

	master->driver_priv = master_priv;
	return 0;
}

void i915_master_destroy(struct drm_device *dev, struct drm_master *master)
{
	struct drm_i915_master_private *master_priv = master->driver_priv;

	if (!master_priv)
		return;

1305
	kfree(master_priv);
1306 1307 1308 1309

	master->driver_priv = NULL;
}

1310 1311 1312 1313 1314
static void i915_get_mem_freq(struct drm_device *dev)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	u32 tmp;

1315
	if (!IS_PINEVIEW(dev))
1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347
		return;

	tmp = I915_READ(CLKCFG);

	switch (tmp & CLKCFG_FSB_MASK) {
	case CLKCFG_FSB_533:
		dev_priv->fsb_freq = 533; /* 133*4 */
		break;
	case CLKCFG_FSB_800:
		dev_priv->fsb_freq = 800; /* 200*4 */
		break;
	case CLKCFG_FSB_667:
		dev_priv->fsb_freq =  667; /* 167*4 */
		break;
	case CLKCFG_FSB_400:
		dev_priv->fsb_freq = 400; /* 100*4 */
		break;
	}

	switch (tmp & CLKCFG_MEM_MASK) {
	case CLKCFG_MEM_533:
		dev_priv->mem_freq = 533;
		break;
	case CLKCFG_MEM_667:
		dev_priv->mem_freq = 667;
		break;
	case CLKCFG_MEM_800:
		dev_priv->mem_freq = 800;
		break;
	}
}

J
Jesse Barnes 已提交
1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358
/**
 * i915_driver_load - setup chip and create an initial config
 * @dev: DRM device
 * @flags: startup flags
 *
 * The driver load routine has to do several things:
 *   - drive output discovery via intel_modeset_init()
 *   - initialize the memory manager
 *   - allocate initial config memory
 *   - setup the DRM framebuffer with the allocated memory
 */
1359
int i915_driver_load(struct drm_device *dev, unsigned long flags)
1360
{
J
Jesse Barnes 已提交
1361
	struct drm_i915_private *dev_priv = dev->dev_private;
1362
	resource_size_t base, size;
J
Jesse Barnes 已提交
1363
	int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
1364
	uint32_t agp_size, prealloc_size, prealloc_start;
J
Jesse Barnes 已提交
1365

1366 1367 1368 1369 1370 1371 1372
	/* i915 has 4 more counters */
	dev->counters += 4;
	dev->types[6] = _DRM_STAT_IRQ;
	dev->types[7] = _DRM_STAT_PRIMARY;
	dev->types[8] = _DRM_STAT_SECONDARY;
	dev->types[9] = _DRM_STAT_DMA;

1373
	dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL);
J
Jesse Barnes 已提交
1374 1375 1376 1377
	if (dev_priv == NULL)
		return -ENOMEM;

	dev->dev_private = (void *)dev_priv;
1378
	dev_priv->dev = dev;
J
Jesse Barnes 已提交
1379 1380 1381 1382 1383

	/* Add register map (needed for suspend/resume) */
	base = drm_get_resource_start(dev, mmio_bar);
	size = drm_get_resource_len(dev, mmio_bar);

1384 1385 1386 1387 1388
	if (i915_get_bridge_dev(dev)) {
		ret = -EIO;
		goto free_priv;
	}

1389
	dev_priv->regs = ioremap(base, size);
J
Jesse Barnes 已提交
1390 1391 1392
	if (!dev_priv->regs) {
		DRM_ERROR("failed to map registers\n");
		ret = -EIO;
1393
		goto put_bridge;
J
Jesse Barnes 已提交
1394
	}
1395

1396 1397 1398
        dev_priv->mm.gtt_mapping =
		io_mapping_create_wc(dev->agp->base,
				     dev->agp->agp_info.aper_size * 1024*1024);
1399 1400 1401 1402 1403
	if (dev_priv->mm.gtt_mapping == NULL) {
		ret = -EIO;
		goto out_rmmap;
	}

1404 1405 1406 1407 1408 1409 1410 1411 1412 1413
	/* Set up a WC MTRR for non-PAT systems.  This is more common than
	 * one would think, because the kernel disables PAT on first
	 * generation Core chips because WC PAT gets overridden by a UC
	 * MTRR if present.  Even if a UC MTRR isn't present.
	 */
	dev_priv->mm.gtt_mtrr = mtrr_add(dev->agp->base,
					 dev->agp->agp_info.aper_size *
					 1024 * 1024,
					 MTRR_TYPE_WRCOMB, 1);
	if (dev_priv->mm.gtt_mtrr < 0) {
1414
		DRM_INFO("MTRR allocation failed.  Graphics "
1415 1416 1417
			 "performance may suffer.\n");
	}

1418
	ret = i915_probe_agp(dev, &agp_size, &prealloc_size, &prealloc_start);
1419 1420 1421
	if (ret)
		goto out_iomapfree;

1422
	dev_priv->wq = create_singlethread_workqueue("i915");
1423 1424 1425 1426 1427 1428
	if (dev_priv->wq == NULL) {
		DRM_ERROR("Failed to create our workqueue.\n");
		ret = -ENOMEM;
		goto out_iomapfree;
	}

1429 1430 1431
	/* enable GEM by default */
	dev_priv->has_gem = 1;

1432 1433 1434 1435 1436 1437 1438 1439 1440
	if (prealloc_size > agp_size * 3 / 4) {
		DRM_ERROR("Detected broken video BIOS with %d/%dkB of video "
			  "memory stolen.\n",
			  prealloc_size / 1024, agp_size / 1024);
		DRM_ERROR("Disabling GEM. (try reducing stolen memory or "
			  "updating the BIOS to fix).\n");
		dev_priv->has_gem = 0;
	}

1441
	dev->driver->get_vblank_counter = i915_get_vblank_counter;
1442
	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
1443
	if (IS_G4X(dev) || IS_IRONLAKE(dev)) {
1444
		dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
1445
		dev->driver->get_vblank_counter = gm45_get_vblank_counter;
1446
	}
1447

1448 1449
	i915_gem_load(dev);

1450 1451 1452 1453
	/* Init HWS */
	if (!I915_NEED_GFX_HWS(dev)) {
		ret = i915_init_phys_hws(dev);
		if (ret != 0)
1454
			goto out_workqueue_free;
1455
	}
1456

1457 1458
	i915_get_mem_freq(dev);

1459 1460 1461 1462 1463 1464
	/* On the 945G/GM, the chipset reports the MSI capability on the
	 * integrated graphics even though the support isn't actually there
	 * according to the published specs.  It doesn't appear to function
	 * correctly in testing on 945G.
	 * This may be a side effect of MSI having been made available for PEG
	 * and the registers being closely associated.
1465 1466
	 *
	 * According to chipset errata, on the 965GM, MSI interrupts may
1467 1468
	 * be lost or delayed, but we use them anyways to avoid
	 * stuck interrupts on some machines.
1469
	 */
1470
	if (!IS_I945G(dev) && !IS_I945GM(dev))
1471
		pci_enable_msi(dev->pdev);
1472 1473

	spin_lock_init(&dev_priv->user_irq_lock);
1474
	spin_lock_init(&dev_priv->error_lock);
J
Jesse Barnes 已提交
1475
	dev_priv->user_irq_refcount = 0;
1476
	dev_priv->trace_irq_seqno = 0;
1477

1478 1479 1480 1481 1482 1483 1484
	ret = drm_vblank_init(dev, I915_NUM_PIPE);

	if (ret) {
		(void) i915_driver_unload(dev);
		return ret;
	}

1485 1486 1487
	/* Start out suspended */
	dev_priv->mm.suspended = 1;

J
Jesse Barnes 已提交
1488
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1489 1490
		ret = i915_load_modeset_init(dev, prealloc_start,
					     prealloc_size, agp_size);
J
Jesse Barnes 已提交
1491 1492
		if (ret < 0) {
			DRM_ERROR("failed to init modeset\n");
1493
			goto out_workqueue_free;
J
Jesse Barnes 已提交
1494 1495 1496
		}
	}

1497
	/* Must be done after probing outputs */
1498
	intel_opregion_init(dev, 0);
1499

B
Ben Gamari 已提交
1500 1501
	setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed,
		    (unsigned long) dev);
J
Jesse Barnes 已提交
1502 1503
	return 0;

1504 1505
out_workqueue_free:
	destroy_workqueue(dev_priv->wq);
1506 1507
out_iomapfree:
	io_mapping_free(dev_priv->mm.gtt_mapping);
J
Jesse Barnes 已提交
1508 1509
out_rmmap:
	iounmap(dev_priv->regs);
1510 1511
put_bridge:
	pci_dev_put(dev_priv->bridge_dev);
J
Jesse Barnes 已提交
1512
free_priv:
1513
	kfree(dev_priv);
J
Jesse Barnes 已提交
1514 1515 1516 1517 1518 1519 1520
	return ret;
}

int i915_driver_unload(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

1521
	destroy_workqueue(dev_priv->wq);
B
Ben Gamari 已提交
1522
	del_timer_sync(&dev_priv->hangcheck_timer);
1523

1524 1525 1526 1527 1528 1529 1530
	io_mapping_free(dev_priv->mm.gtt_mapping);
	if (dev_priv->mm.gtt_mtrr >= 0) {
		mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base,
			 dev->agp->agp_info.aper_size * 1024 * 1024);
		dev_priv->mm.gtt_mtrr = -1;
	}

J
Jesse Barnes 已提交
1531
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
Z
Zhao Yakui 已提交
1532 1533 1534 1535 1536 1537 1538 1539 1540
		/*
		 * free the memory space allocated for the child device
		 * config parsed from VBT
		 */
		if (dev_priv->child_dev && dev_priv->child_dev_num) {
			kfree(dev_priv->child_dev);
			dev_priv->child_dev = NULL;
			dev_priv->child_dev_num = 0;
		}
J
Jesse Barnes 已提交
1541
		drm_irq_uninstall(dev);
1542
		vga_client_register(dev->pdev, NULL, NULL, NULL);
J
Jesse Barnes 已提交
1543 1544
	}

1545 1546 1547
	if (dev->pdev->msi_enabled)
		pci_disable_msi(dev->pdev);

1548 1549
	if (dev_priv->regs != NULL)
		iounmap(dev_priv->regs);
J
Jesse Barnes 已提交
1550

1551
	intel_opregion_free(dev, 0);
1552

J
Jesse Barnes 已提交
1553 1554 1555
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		intel_modeset_cleanup(dev);

1556 1557
		i915_gem_free_all_phys_object(dev);

J
Jesse Barnes 已提交
1558 1559 1560 1561 1562
		mutex_lock(&dev->struct_mutex);
		i915_gem_cleanup_ringbuffer(dev);
		mutex_unlock(&dev->struct_mutex);
		drm_mm_takedown(&dev_priv->vram);
		i915_gem_lastclose(dev);
1563 1564

		intel_cleanup_overlay(dev);
J
Jesse Barnes 已提交
1565 1566
	}

1567
	pci_dev_put(dev_priv->bridge_dev);
1568
	kfree(dev->dev_private);
J
Jesse Barnes 已提交
1569

1570 1571 1572
	return 0;
}

1573 1574 1575 1576
int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv)
{
	struct drm_i915_file_private *i915_file_priv;

1577
	DRM_DEBUG_DRIVER("\n");
1578
	i915_file_priv = (struct drm_i915_file_private *)
1579
	    kmalloc(sizeof(*i915_file_priv), GFP_KERNEL);
1580 1581 1582 1583 1584 1585

	if (!i915_file_priv)
		return -ENOMEM;

	file_priv->driver_priv = i915_file_priv;

1586
	INIT_LIST_HEAD(&i915_file_priv->mm.request_list);
1587 1588 1589 1590

	return 0;
}

J
Jesse Barnes 已提交
1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602
/**
 * i915_driver_lastclose - clean up after all DRM clients have exited
 * @dev: DRM device
 *
 * Take care of cleaning up after all DRM clients have exited.  In the
 * mode setting case, we want to restore the kernel's initial mode (just
 * in case the last client left us in a bad state).
 *
 * Additionally, in the non-mode setting case, we'll tear down the AGP
 * and DMA structures, since the kernel won't be using them, and clea
 * up any GEM state.
 */
1603
void i915_driver_lastclose(struct drm_device * dev)
L
Linus Torvalds 已提交
1604
{
J
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	drm_i915_private_t *dev_priv = dev->dev_private;

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	if (!dev_priv || drm_core_check_feature(dev, DRIVER_MODESET)) {
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		drm_fb_helper_restore();
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		return;
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	}
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	i915_gem_lastclose(dev);

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	if (dev_priv->agp_heap)
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		i915_mem_takedown(&(dev_priv->agp_heap));
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	i915_dma_cleanup(dev);
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}

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void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
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{
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	drm_i915_private_t *dev_priv = dev->dev_private;
1623
	i915_gem_release(dev, file_priv);
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	if (!drm_core_check_feature(dev, DRIVER_MODESET))
		i915_mem_release(dev, file_priv, dev_priv->agp_heap);
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}

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void i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv)
{
	struct drm_i915_file_private *i915_file_priv = file_priv->driver_priv;

1632
	kfree(i915_file_priv);
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}

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struct drm_ioctl_desc i915_ioctls[] = {
	DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP,  i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
	DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE,  i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ),
	DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH ),
	DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
1652
	DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
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	DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
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	DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH),
	DRM_IOCTL_DEF(DRM_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH),
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	DRM_IOCTL_DEF(DRM_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF(DRM_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
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	DRM_IOCTL_DEF(DRM_I915_GEM_CREATE, i915_gem_create_ioctl, 0),
	DRM_IOCTL_DEF(DRM_I915_GEM_PREAD, i915_gem_pread_ioctl, 0),
	DRM_IOCTL_DEF(DRM_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, 0),
	DRM_IOCTL_DEF(DRM_I915_GEM_MMAP, i915_gem_mmap_ioctl, 0),
1665
	DRM_IOCTL_DEF(DRM_I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, 0),
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	DRM_IOCTL_DEF(DRM_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, 0),
	DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0),
	DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0),
	DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
1670
	DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0),
1671
	DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0),
1672
	DRM_IOCTL_DEF(DRM_I915_GEM_MADVISE, i915_gem_madvise_ioctl, 0),
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	DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW),
	DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW),
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};

int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
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/**
 * Determine if the device really is AGP or not.
 *
 * All Intel graphics chipsets are treated as AGP, even if they are really
 * PCI-e.
 *
 * \param dev   The device to be tested.
 *
 * \returns
 * A value of 1 is always retured to indictate every i9x5 is AGP.
 */
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int i915_driver_device_is_agp(struct drm_device * dev)
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{
	return 1;
}