vt8500_serial.c 18.7 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
/*
 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
 *
 * Based on msm_serial.c, which is:
 * Copyright (C) 2007 Google, Inc.
 * Author: Robert Love <rlove@google.com>
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#if defined(CONFIG_SERIAL_VT8500_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
# define SUPPORT_SYSRQ
#endif

#include <linux/hrtimer.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/irq.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/slab.h>
#include <linux/clk.h>
35
#include <linux/of.h>
36
#include <linux/of_device.h>
37
#include <linux/err.h>
38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

/*
 * UART Register offsets
 */

#define VT8500_URTDR		0x0000	/* Transmit data */
#define VT8500_URRDR		0x0004	/* Receive data */
#define VT8500_URDIV		0x0008	/* Clock/Baud rate divisor */
#define VT8500_URLCR		0x000C	/* Line control */
#define VT8500_URICR		0x0010	/* IrDA control */
#define VT8500_URIER		0x0014	/* Interrupt enable */
#define VT8500_URISR		0x0018	/* Interrupt status */
#define VT8500_URUSR		0x001c	/* UART status */
#define VT8500_URFCR		0x0020	/* FIFO control */
#define VT8500_URFIDX		0x0024	/* FIFO index */
#define VT8500_URBKR		0x0028	/* Break signal count */
#define VT8500_URTOD		0x002c	/* Time out divisor */
#define VT8500_TXFIFO		0x1000	/* Transmit FIFO (16x8) */
#define VT8500_RXFIFO		0x1020	/* Receive FIFO (16x10) */

/*
 * Interrupt enable and status bits
 */

#define TXDE	(1 << 0)	/* Tx Data empty */
#define RXDF	(1 << 1)	/* Rx Data full */
#define TXFAE	(1 << 2)	/* Tx FIFO almost empty */
#define TXFE	(1 << 3)	/* Tx FIFO empty */
#define RXFAF	(1 << 4)	/* Rx FIFO almost full */
#define RXFF	(1 << 5)	/* Rx FIFO full */
#define TXUDR	(1 << 6)	/* Tx underrun */
#define RXOVER	(1 << 7)	/* Rx overrun */
#define PER	(1 << 8)	/* Parity error */
#define FER	(1 << 9)	/* Frame error */
#define TCTS	(1 << 10)	/* Toggle of CTS */
#define RXTOUT	(1 << 11)	/* Rx timeout */
#define BKDONE	(1 << 12)	/* Break signal done */
#define ERR	(1 << 13)	/* AHB error response */

#define RX_FIFO_INTS	(RXFAF | RXFF | RXOVER | PER | FER | RXTOUT)
#define TX_FIFO_INTS	(TXFAE | TXFE | TXUDR)

80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102
/*
 * Line control bits
 */

#define VT8500_TXEN	(1 << 0)	/* Enable transmit logic */
#define VT8500_RXEN	(1 << 1)	/* Enable receive logic */
#define VT8500_CS8	(1 << 2)	/* 8-bit data length (vs. 7-bit) */
#define VT8500_CSTOPB	(1 << 3)	/* 2 stop bits (vs. 1) */
#define VT8500_PARENB	(1 << 4)	/* Enable parity */
#define VT8500_PARODD	(1 << 5)	/* Odd parity (vs. even) */
#define VT8500_RTS	(1 << 6)	/* Ready to send */
#define VT8500_LOOPBK	(1 << 7)	/* Enable internal loopback */
#define VT8500_DMA	(1 << 8)	/* Enable DMA mode (needs FIFO) */
#define VT8500_BREAK	(1 << 9)	/* Initiate break signal */
#define VT8500_PSLVERR	(1 << 10)	/* APB error upon empty RX FIFO read */
#define VT8500_SWRTSCTS	(1 << 11)	/* Software-controlled RTS/CTS */

/*
 * Capability flags (driver-internal)
 */

#define VT8500_HAS_SWRTSCTS_SWITCH	(1 << 1)

103 104
#define VT8500_RECOMMENDED_CLK		12000000
#define VT8500_OVERSAMPLING_DIVISOR	13
105 106
#define VT8500_MAX_PORTS	6

107 108 109 110
struct vt8500_port {
	struct uart_port	uart;
	char			name[16];
	struct clk		*clk;
111
	unsigned int		clk_predivisor;
112
	unsigned int		ier;
113
	unsigned int		vt8500_uart_flags;
114 115
};

116 117 118 119 120
/*
 * we use this variable to keep track of which ports
 * have been allocated as we can't use pdev->id in
 * devicetree
 */
121
static DECLARE_BITMAP(vt8500_ports_in_use, VT8500_MAX_PORTS);
122

123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165
static inline void vt8500_write(struct uart_port *port, unsigned int val,
			     unsigned int off)
{
	writel(val, port->membase + off);
}

static inline unsigned int vt8500_read(struct uart_port *port, unsigned int off)
{
	return readl(port->membase + off);
}

static void vt8500_stop_tx(struct uart_port *port)
{
	struct vt8500_port *vt8500_port = container_of(port,
						       struct vt8500_port,
						       uart);

	vt8500_port->ier &= ~TX_FIFO_INTS;
	vt8500_write(port, vt8500_port->ier, VT8500_URIER);
}

static void vt8500_stop_rx(struct uart_port *port)
{
	struct vt8500_port *vt8500_port = container_of(port,
						       struct vt8500_port,
						       uart);

	vt8500_port->ier &= ~RX_FIFO_INTS;
	vt8500_write(port, vt8500_port->ier, VT8500_URIER);
}

static void vt8500_enable_ms(struct uart_port *port)
{
	struct vt8500_port *vt8500_port = container_of(port,
						       struct vt8500_port,
						       uart);

	vt8500_port->ier |= TCTS;
	vt8500_write(port, vt8500_port->ier, VT8500_URIER);
}

static void handle_rx(struct uart_port *port)
{
166
	struct tty_port *tport = &port->state->port;
167 168 169 170 171 172

	/*
	 * Handle overrun
	 */
	if ((vt8500_read(port, VT8500_URISR) & RXOVER)) {
		port->icount.overrun++;
173
		tty_insert_flip_char(tport, 0, TTY_OVERRUN);
174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195
	}

	/* and now the main RX loop */
	while (vt8500_read(port, VT8500_URFIDX) & 0x1f00) {
		unsigned int c;
		char flag = TTY_NORMAL;

		c = readw(port->membase + VT8500_RXFIFO) & 0x3ff;

		/* Mask conditions we're ignorning. */
		c &= ~port->read_status_mask;

		if (c & FER) {
			port->icount.frame++;
			flag = TTY_FRAME;
		} else if (c & PER) {
			port->icount.parity++;
			flag = TTY_PARITY;
		}
		port->icount.rx++;

		if (!uart_handle_sysrq_char(port, c))
196
			tty_insert_flip_char(tport, c, flag);
197 198
	}

199
	spin_unlock(&port->lock);
200
	tty_flip_buffer_push(tport);
201
	spin_lock(&port->lock);
202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295
}

static void handle_tx(struct uart_port *port)
{
	struct circ_buf *xmit = &port->state->xmit;

	if (port->x_char) {
		writeb(port->x_char, port->membase + VT8500_TXFIFO);
		port->icount.tx++;
		port->x_char = 0;
	}
	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
		vt8500_stop_tx(port);
		return;
	}

	while ((vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16) {
		if (uart_circ_empty(xmit))
			break;

		writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO);

		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		port->icount.tx++;
	}

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);

	if (uart_circ_empty(xmit))
		vt8500_stop_tx(port);
}

static void vt8500_start_tx(struct uart_port *port)
{
	struct vt8500_port *vt8500_port = container_of(port,
						       struct vt8500_port,
						       uart);

	vt8500_port->ier &= ~TX_FIFO_INTS;
	vt8500_write(port, vt8500_port->ier, VT8500_URIER);
	handle_tx(port);
	vt8500_port->ier |= TX_FIFO_INTS;
	vt8500_write(port, vt8500_port->ier, VT8500_URIER);
}

static void handle_delta_cts(struct uart_port *port)
{
	port->icount.cts++;
	wake_up_interruptible(&port->state->port.delta_msr_wait);
}

static irqreturn_t vt8500_irq(int irq, void *dev_id)
{
	struct uart_port *port = dev_id;
	unsigned long isr;

	spin_lock(&port->lock);
	isr = vt8500_read(port, VT8500_URISR);

	/* Acknowledge active status bits */
	vt8500_write(port, isr, VT8500_URISR);

	if (isr & RX_FIFO_INTS)
		handle_rx(port);
	if (isr & TX_FIFO_INTS)
		handle_tx(port);
	if (isr & TCTS)
		handle_delta_cts(port);

	spin_unlock(&port->lock);

	return IRQ_HANDLED;
}

static unsigned int vt8500_tx_empty(struct uart_port *port)
{
	return (vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16 ?
						TIOCSER_TEMT : 0;
}

static unsigned int vt8500_get_mctrl(struct uart_port *port)
{
	unsigned int usr;

	usr = vt8500_read(port, VT8500_URUSR);
	if (usr & (1 << 4))
		return TIOCM_CTS;
	else
		return 0;
}

static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
296 297 298 299 300 301 302 303
	unsigned int lcr = vt8500_read(port, VT8500_URLCR);

	if (mctrl & TIOCM_RTS)
		lcr |= VT8500_RTS;
	else
		lcr &= ~VT8500_RTS;

	vt8500_write(port, lcr, VT8500_URLCR);
304 305 306 307 308
}

static void vt8500_break_ctl(struct uart_port *port, int break_ctl)
{
	if (break_ctl)
309 310
		vt8500_write(port,
			     vt8500_read(port, VT8500_URLCR) | VT8500_BREAK,
311 312 313 314 315
			     VT8500_URLCR);
}

static int vt8500_set_baud_rate(struct uart_port *port, unsigned int baud)
{
316 317
	struct vt8500_port *vt8500_port =
			container_of(port, struct vt8500_port, uart);
318 319 320
	unsigned long div;
	unsigned int loops = 1000;

321 322
	div = ((vt8500_port->clk_predivisor - 1) & 0xf) << 16;
	div |= (uart_get_divisor(port, baud) - 1) & 0x3ff;
323

324 325
	/* Effective baud rate */
	baud = port->uartclk / 16 / ((div & 0x3ff) + 1);
326 327 328

	while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops)
		cpu_relax();
329

330 331
	vt8500_write(port, div, VT8500_URDIV);

332 333 334
	/* Break signal timing depends on baud rate, update accordingly */
	vt8500_write(port, mult_frac(baud, 4096, 1000000), VT8500_URBKR);

335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389
	return baud;
}

static int vt8500_startup(struct uart_port *port)
{
	struct vt8500_port *vt8500_port =
			container_of(port, struct vt8500_port, uart);
	int ret;

	snprintf(vt8500_port->name, sizeof(vt8500_port->name),
		 "vt8500_serial%d", port->line);

	ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH,
			  vt8500_port->name, port);
	if (unlikely(ret))
		return ret;

	vt8500_write(port, 0x03, VT8500_URLCR);	/* enable TX & RX */

	return 0;
}

static void vt8500_shutdown(struct uart_port *port)
{
	struct vt8500_port *vt8500_port =
			container_of(port, struct vt8500_port, uart);

	vt8500_port->ier = 0;

	/* disable interrupts and FIFOs */
	vt8500_write(&vt8500_port->uart, 0, VT8500_URIER);
	vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR);
	free_irq(port->irq, port);
}

static void vt8500_set_termios(struct uart_port *port,
			       struct ktermios *termios,
			       struct ktermios *old)
{
	struct vt8500_port *vt8500_port =
			container_of(port, struct vt8500_port, uart);
	unsigned long flags;
	unsigned int baud, lcr;
	unsigned int loops = 1000;

	spin_lock_irqsave(&port->lock, flags);

	/* calculate and set baud rate */
	baud = uart_get_baud_rate(port, termios, old, 900, 921600);
	baud = vt8500_set_baud_rate(port, baud);
	if (tty_termios_baud_rate(termios))
		tty_termios_encode_baud_rate(termios, baud, baud);

	/* calculate parity */
	lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR);
390
	lcr &= ~(VT8500_PARENB | VT8500_PARODD);
391
	if (termios->c_cflag & PARENB) {
392
		lcr |= VT8500_PARENB;
393 394
		termios->c_cflag &= ~CMSPAR;
		if (termios->c_cflag & PARODD)
395
			lcr |= VT8500_PARODD;
396 397 398
	}

	/* calculate bits per char */
399
	lcr &= ~VT8500_CS8;
400 401 402 403 404
	switch (termios->c_cflag & CSIZE) {
	case CS7:
		break;
	case CS8:
	default:
405
		lcr |= VT8500_CS8;
406 407 408 409 410 411
		termios->c_cflag &= ~CSIZE;
		termios->c_cflag |= CS8;
		break;
	}

	/* calculate stop bits */
412
	lcr &= ~VT8500_CSTOPB;
413
	if (termios->c_cflag & CSTOPB)
414 415 416 417 418
		lcr |= VT8500_CSTOPB;

	lcr &= ~VT8500_SWRTSCTS;
	if (vt8500_port->vt8500_uart_flags & VT8500_HAS_SWRTSCTS_SWITCH)
		lcr |= VT8500_SWRTSCTS;
419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481

	/* set parity, bits per char, and stop bit */
	vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR);

	/* Configure status bits to ignore based on termio flags. */
	port->read_status_mask = 0;
	if (termios->c_iflag & IGNPAR)
		port->read_status_mask = FER | PER;

	uart_update_timeout(port, termios->c_cflag, baud);

	/* Reset FIFOs */
	vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR);
	while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc)
							&& --loops)
		cpu_relax();

	/* Every possible FIFO-related interrupt */
	vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS;

	/*
	 * CTS flow control
	 */
	if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag))
		vt8500_port->ier |= TCTS;

	vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR);
	vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER);

	spin_unlock_irqrestore(&port->lock, flags);
}

static const char *vt8500_type(struct uart_port *port)
{
	struct vt8500_port *vt8500_port =
			container_of(port, struct vt8500_port, uart);
	return vt8500_port->name;
}

static void vt8500_release_port(struct uart_port *port)
{
}

static int vt8500_request_port(struct uart_port *port)
{
	return 0;
}

static void vt8500_config_port(struct uart_port *port, int flags)
{
	port->type = PORT_VT8500;
}

static int vt8500_verify_port(struct uart_port *port,
			      struct serial_struct *ser)
{
	if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500))
		return -EINVAL;
	if (unlikely(port->irq != ser->irq))
		return -EINVAL;
	return 0;
}

482
static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS];
483 484 485 486
static struct uart_driver vt8500_uart_driver;

#ifdef CONFIG_SERIAL_VT8500_CONSOLE

487
static void wait_for_xmitr(struct uart_port *port)
488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567
{
	unsigned int status, tmout = 10000;

	/* Wait up to 10ms for the character(s) to be sent. */
	do {
		status = vt8500_read(port, VT8500_URFIDX);

		if (--tmout == 0)
			break;
		udelay(1);
	} while (status & 0x10);
}

static void vt8500_console_putchar(struct uart_port *port, int c)
{
	wait_for_xmitr(port);
	writeb(c, port->membase + VT8500_TXFIFO);
}

static void vt8500_console_write(struct console *co, const char *s,
			      unsigned int count)
{
	struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index];
	unsigned long ier;

	BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr);

	ier = vt8500_read(&vt8500_port->uart, VT8500_URIER);
	vt8500_write(&vt8500_port->uart, VT8500_URIER, 0);

	uart_console_write(&vt8500_port->uart, s, count,
			   vt8500_console_putchar);

	/*
	 *	Finally, wait for transmitter to become empty
	 *	and switch back to FIFO
	 */
	wait_for_xmitr(&vt8500_port->uart);
	vt8500_write(&vt8500_port->uart, VT8500_URIER, ier);
}

static int __init vt8500_console_setup(struct console *co, char *options)
{
	struct vt8500_port *vt8500_port;
	int baud = 9600;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';

	if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0))
		return -ENXIO;

	vt8500_port = vt8500_uart_ports[co->index];

	if (!vt8500_port)
		return -ENODEV;

	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);

	return uart_set_options(&vt8500_port->uart,
				 co, baud, parity, bits, flow);
}

static struct console vt8500_console = {
	.name = "ttyWMT",
	.write = vt8500_console_write,
	.device = uart_console_device,
	.setup = vt8500_console_setup,
	.flags = CON_PRINTBUFFER,
	.index = -1,
	.data = &vt8500_uart_driver,
};

#define VT8500_CONSOLE	(&vt8500_console)

#else
#define VT8500_CONSOLE	NULL
#endif

568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594
#ifdef CONFIG_CONSOLE_POLL
static int vt8500_get_poll_char(struct uart_port *port)
{
	unsigned int status = vt8500_read(port, VT8500_URFIDX);

	if (!(status & 0x1f00))
		return NO_POLL_CHAR;

	return vt8500_read(port, VT8500_RXFIFO) & 0xff;
}

static void vt8500_put_poll_char(struct uart_port *port, unsigned char c)
{
	unsigned int status, tmout = 10000;

	do {
		status = vt8500_read(port, VT8500_URFIDX);

		if (--tmout == 0)
			break;
		udelay(1);
	} while (status & 0x10);

	vt8500_write(port, c, VT8500_TXFIFO);
}
#endif

595
static const struct uart_ops vt8500_uart_pops = {
596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611
	.tx_empty	= vt8500_tx_empty,
	.set_mctrl	= vt8500_set_mctrl,
	.get_mctrl	= vt8500_get_mctrl,
	.stop_tx	= vt8500_stop_tx,
	.start_tx	= vt8500_start_tx,
	.stop_rx	= vt8500_stop_rx,
	.enable_ms	= vt8500_enable_ms,
	.break_ctl	= vt8500_break_ctl,
	.startup	= vt8500_startup,
	.shutdown	= vt8500_shutdown,
	.set_termios	= vt8500_set_termios,
	.type		= vt8500_type,
	.release_port	= vt8500_release_port,
	.request_port	= vt8500_request_port,
	.config_port	= vt8500_config_port,
	.verify_port	= vt8500_verify_port,
612 613 614 615
#ifdef CONFIG_CONSOLE_POLL
	.poll_get_char	= vt8500_get_poll_char,
	.poll_put_char	= vt8500_put_poll_char,
#endif
616 617 618 619 620 621 622 623 624 625
};

static struct uart_driver vt8500_uart_driver = {
	.owner		= THIS_MODULE,
	.driver_name	= "vt8500_serial",
	.dev_name	= "ttyWMT",
	.nr		= 6,
	.cons		= VT8500_CONSOLE,
};

626 627 628 629 630 631 632 633 634
static unsigned int vt8500_flags; /* none required so far */
static unsigned int wm8880_flags = VT8500_HAS_SWRTSCTS_SWITCH;

static const struct of_device_id wmt_dt_ids[] = {
	{ .compatible = "via,vt8500-uart", .data = &vt8500_flags},
	{ .compatible = "wm,wm8880-uart", .data = &wm8880_flags},
	{}
};

635
static int vt8500_serial_probe(struct platform_device *pdev)
636 637 638
{
	struct vt8500_port *vt8500_port;
	struct resource *mmres, *irqres;
639
	struct device_node *np = pdev->dev.of_node;
640 641
	const struct of_device_id *match;
	const unsigned int *flags;
642
	int ret;
643
	int port;
644

645 646 647 648 649 650
	match = of_match_device(wmt_dt_ids, &pdev->dev);
	if (!match)
		return -EINVAL;

	flags = match->data;

651 652 653 654 655
	mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	if (!mmres || !irqres)
		return -ENODEV;

656
	if (np) {
657
		port = of_alias_get_id(np, "serial");
658
		if (port >= VT8500_MAX_PORTS)
659
			port = -1;
660
	} else {
661
		port = -1;
662
	}
663 664 665

	if (port < 0) {
		/* calculate the port id */
666 667
		port = find_first_zero_bit(vt8500_ports_in_use,
					   VT8500_MAX_PORTS);
668 669
	}

670
	if (port >= VT8500_MAX_PORTS)
671 672 673
		return -ENODEV;

	/* reserve the port id */
674
	if (test_and_set_bit(port, vt8500_ports_in_use)) {
675 676 677 678
		/* port already in use - shouldn't really happen */
		return -EBUSY;
	}

679 680
	vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port),
				   GFP_KERNEL);
681 682 683
	if (!vt8500_port)
		return -ENOMEM;

684 685 686
	vt8500_port->uart.membase = devm_ioremap_resource(&pdev->dev, mmres);
	if (IS_ERR(vt8500_port->uart.membase))
		return PTR_ERR(vt8500_port->uart.membase);
687 688 689 690

	vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);
	if (IS_ERR(vt8500_port->clk)) {
		dev_err(&pdev->dev, "failed to get clock\n");
691
		return  -EINVAL;
692 693 694 695 696
	}

	ret = clk_prepare_enable(vt8500_port->clk);
	if (ret) {
		dev_err(&pdev->dev, "failed to enable clock\n");
697
		return ret;
698 699
	}

700
	vt8500_port->vt8500_uart_flags = *flags;
701 702 703 704
	vt8500_port->clk_predivisor = DIV_ROUND_CLOSEST(
					clk_get_rate(vt8500_port->clk),
					VT8500_RECOMMENDED_CLK
				      );
705 706 707 708 709 710
	vt8500_port->uart.type = PORT_VT8500;
	vt8500_port->uart.iotype = UPIO_MEM;
	vt8500_port->uart.mapbase = mmres->start;
	vt8500_port->uart.irq = irqres->start;
	vt8500_port->uart.fifosize = 16;
	vt8500_port->uart.ops = &vt8500_uart_pops;
711
	vt8500_port->uart.line = port;
712 713
	vt8500_port->uart.dev = &pdev->dev;
	vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
714

715 716 717 718
	/* Serial core uses the magic "16" everywhere - adjust for it */
	vt8500_port->uart.uartclk = 16 * clk_get_rate(vt8500_port->clk) /
					vt8500_port->clk_predivisor /
					VT8500_OVERSAMPLING_DIVISOR;
719 720 721 722

	snprintf(vt8500_port->name, sizeof(vt8500_port->name),
		 "VT8500 UART%d", pdev->id);

723
	vt8500_uart_ports[port] = vt8500_port;
724 725 726 727 728 729 730 731 732 733 734 735

	uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart);

	platform_set_drvdata(pdev, vt8500_port);

	return 0;
}

static struct platform_driver vt8500_platform_driver = {
	.probe  = vt8500_serial_probe,
	.driver = {
		.name = "vt8500_serial",
736
		.of_match_table = wmt_dt_ids,
737
		.suppress_bind_attrs = true,
738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755
	},
};

static int __init vt8500_serial_init(void)
{
	int ret;

	ret = uart_register_driver(&vt8500_uart_driver);
	if (unlikely(ret))
		return ret;

	ret = platform_driver_register(&vt8500_platform_driver);

	if (unlikely(ret))
		uart_unregister_driver(&vt8500_uart_driver);

	return ret;
}
756
device_initcall(vt8500_serial_init);
新手
引导
客服 返回
顶部