verbs.c 55.3 KB
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/*
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 * Copyright(c) 2015 - 2017 Intel Corporation.
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 *
 * This file is provided under a dual BSD/GPLv2 license.  When using or
 * redistributing this file, you may do so under either license.
 *
 * GPL LICENSE SUMMARY
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * BSD LICENSE
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *  - Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  - Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in
 *    the documentation and/or other materials provided with the
 *    distribution.
 *  - Neither the name of Intel Corporation nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

#include <rdma/ib_mad.h>
#include <rdma/ib_user_verbs.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/utsname.h>
#include <linux/rculist.h>
#include <linux/mm.h>
#include <linux/vmalloc.h>

#include "hfi.h"
#include "common.h"
#include "device.h"
#include "trace.h"
#include "qp.h"
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#include "verbs_txreq.h"
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#include "debugfs.h"
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#include "vnic.h"
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static unsigned int hfi1_lkey_table_size = 16;
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module_param_named(lkey_table_size, hfi1_lkey_table_size, uint,
		   S_IRUGO);
MODULE_PARM_DESC(lkey_table_size,
		 "LKEY table size in bits (2^n, 1 <= n <= 23)");

static unsigned int hfi1_max_pds = 0xFFFF;
module_param_named(max_pds, hfi1_max_pds, uint, S_IRUGO);
MODULE_PARM_DESC(max_pds,
		 "Maximum number of protection domains to support");

static unsigned int hfi1_max_ahs = 0xFFFF;
module_param_named(max_ahs, hfi1_max_ahs, uint, S_IRUGO);
MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");

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unsigned int hfi1_max_cqes = 0x2FFFFF;
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module_param_named(max_cqes, hfi1_max_cqes, uint, S_IRUGO);
MODULE_PARM_DESC(max_cqes,
		 "Maximum number of completion queue entries to support");

unsigned int hfi1_max_cqs = 0x1FFFF;
module_param_named(max_cqs, hfi1_max_cqs, uint, S_IRUGO);
MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");

unsigned int hfi1_max_qp_wrs = 0x3FFF;
module_param_named(max_qp_wrs, hfi1_max_qp_wrs, uint, S_IRUGO);
MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");

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unsigned int hfi1_max_qps = 32768;
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module_param_named(max_qps, hfi1_max_qps, uint, S_IRUGO);
MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");

unsigned int hfi1_max_sges = 0x60;
module_param_named(max_sges, hfi1_max_sges, uint, S_IRUGO);
MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");

unsigned int hfi1_max_mcast_grps = 16384;
module_param_named(max_mcast_grps, hfi1_max_mcast_grps, uint, S_IRUGO);
MODULE_PARM_DESC(max_mcast_grps,
		 "Maximum number of multicast groups to support");

unsigned int hfi1_max_mcast_qp_attached = 16;
module_param_named(max_mcast_qp_attached, hfi1_max_mcast_qp_attached,
		   uint, S_IRUGO);
MODULE_PARM_DESC(max_mcast_qp_attached,
		 "Maximum number of attached QPs to support");

unsigned int hfi1_max_srqs = 1024;
module_param_named(max_srqs, hfi1_max_srqs, uint, S_IRUGO);
MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");

unsigned int hfi1_max_srq_sges = 128;
module_param_named(max_srq_sges, hfi1_max_srq_sges, uint, S_IRUGO);
MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");

unsigned int hfi1_max_srq_wrs = 0x1FFFF;
module_param_named(max_srq_wrs, hfi1_max_srq_wrs, uint, S_IRUGO);
MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");

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unsigned short piothreshold = 256;
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module_param(piothreshold, ushort, S_IRUGO);
MODULE_PARM_DESC(piothreshold, "size used to determine sdma vs. pio");

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#define COPY_CACHELESS 1
#define COPY_ADAPTIVE  2
static unsigned int sge_copy_mode;
module_param(sge_copy_mode, uint, S_IRUGO);
MODULE_PARM_DESC(sge_copy_mode,
		 "Verbs copy mode: 0 use memcpy, 1 use cacheless copy, 2 adapt based on WSS");

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static void verbs_sdma_complete(
	struct sdma_txreq *cookie,
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	int status);
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static int pio_wait(struct rvt_qp *qp,
		    struct send_context *sc,
		    struct hfi1_pkt_state *ps,
		    u32 flag);

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/* Length of buffer to create verbs txreq cache name */
#define TXREQ_NAME_LEN 24

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static uint wss_threshold;
module_param(wss_threshold, uint, S_IRUGO);
MODULE_PARM_DESC(wss_threshold, "Percentage (1-100) of LLC to use as a threshold for a cacheless copy");
static uint wss_clean_period = 256;
module_param(wss_clean_period, uint, S_IRUGO);
MODULE_PARM_DESC(wss_clean_period, "Count of verbs copies before an entry in the page copy table is cleaned");

/* memory working set size */
struct hfi1_wss {
	unsigned long *entries;
	atomic_t total_count;
	atomic_t clean_counter;
	atomic_t clean_entry;

	int threshold;
	int num_entries;
	long pages_mask;
};

static struct hfi1_wss wss;

int hfi1_wss_init(void)
{
	long llc_size;
	long llc_bits;
	long table_size;
	long table_bits;

	/* check for a valid percent range - default to 80 if none or invalid */
	if (wss_threshold < 1 || wss_threshold > 100)
		wss_threshold = 80;
	/* reject a wildly large period */
	if (wss_clean_period > 1000000)
		wss_clean_period = 256;
	/* reject a zero period */
	if (wss_clean_period == 0)
		wss_clean_period = 1;

	/*
	 * Calculate the table size - the next power of 2 larger than the
	 * LLC size.  LLC size is in KiB.
	 */
	llc_size = wss_llc_size() * 1024;
	table_size = roundup_pow_of_two(llc_size);

	/* one bit per page in rounded up table */
	llc_bits = llc_size / PAGE_SIZE;
	table_bits = table_size / PAGE_SIZE;
	wss.pages_mask = table_bits - 1;
	wss.num_entries = table_bits / BITS_PER_LONG;

	wss.threshold = (llc_bits * wss_threshold) / 100;
	if (wss.threshold == 0)
		wss.threshold = 1;

	atomic_set(&wss.clean_counter, wss_clean_period);

	wss.entries = kcalloc(wss.num_entries, sizeof(*wss.entries),
			      GFP_KERNEL);
	if (!wss.entries) {
		hfi1_wss_exit();
		return -ENOMEM;
	}

	return 0;
}

void hfi1_wss_exit(void)
{
	/* coded to handle partially initialized and repeat callers */
	kfree(wss.entries);
	wss.entries = NULL;
}

/*
 * Advance the clean counter.  When the clean period has expired,
 * clean an entry.
 *
 * This is implemented in atomics to avoid locking.  Because multiple
 * variables are involved, it can be racy which can lead to slightly
 * inaccurate information.  Since this is only a heuristic, this is
 * OK.  Any innaccuracies will clean themselves out as the counter
 * advances.  That said, it is unlikely the entry clean operation will
 * race - the next possible racer will not start until the next clean
 * period.
 *
 * The clean counter is implemented as a decrement to zero.  When zero
 * is reached an entry is cleaned.
 */
static void wss_advance_clean_counter(void)
{
	int entry;
	int weight;
	unsigned long bits;

	/* become the cleaner if we decrement the counter to zero */
	if (atomic_dec_and_test(&wss.clean_counter)) {
		/*
		 * Set, not add, the clean period.  This avoids an issue
		 * where the counter could decrement below the clean period.
		 * Doing a set can result in lost decrements, slowing the
		 * clean advance.  Since this a heuristic, this possible
		 * slowdown is OK.
		 *
		 * An alternative is to loop, advancing the counter by a
		 * clean period until the result is > 0. However, this could
		 * lead to several threads keeping another in the clean loop.
		 * This could be mitigated by limiting the number of times
		 * we stay in the loop.
		 */
		atomic_set(&wss.clean_counter, wss_clean_period);

		/*
		 * Uniquely grab the entry to clean and move to next.
		 * The current entry is always the lower bits of
		 * wss.clean_entry.  The table size, wss.num_entries,
		 * is always a power-of-2.
		 */
		entry = (atomic_inc_return(&wss.clean_entry) - 1)
			& (wss.num_entries - 1);

		/* clear the entry and count the bits */
		bits = xchg(&wss.entries[entry], 0);
		weight = hweight64((u64)bits);
		/* only adjust the contended total count if needed */
		if (weight)
			atomic_sub(weight, &wss.total_count);
	}
}

/*
 * Insert the given address into the working set array.
 */
static void wss_insert(void *address)
{
	u32 page = ((unsigned long)address >> PAGE_SHIFT) & wss.pages_mask;
	u32 entry = page / BITS_PER_LONG; /* assumes this ends up a shift */
	u32 nr = page & (BITS_PER_LONG - 1);

	if (!test_and_set_bit(nr, &wss.entries[entry]))
		atomic_inc(&wss.total_count);

	wss_advance_clean_counter();
}

/*
 * Is the working set larger than the threshold?
 */
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static inline bool wss_exceeds_threshold(void)
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{
	return atomic_read(&wss.total_count) >= wss.threshold;
}

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/*
 * Translate ib_wr_opcode into ib_wc_opcode.
 */
const enum ib_wc_opcode ib_hfi1_wc_opcode[] = {
	[IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
	[IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
	[IB_WR_SEND] = IB_WC_SEND,
	[IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
	[IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
	[IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
	[IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD,
	[IB_WR_SEND_WITH_INV] = IB_WC_SEND,
	[IB_WR_LOCAL_INV] = IB_WC_LOCAL_INV,
	[IB_WR_REG_MR] = IB_WC_REG_MR
};

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/*
 * Length of header by opcode, 0 --> not supported
 */
const u8 hdr_len_by_opcode[256] = {
	/* RC */
	[IB_OPCODE_RC_SEND_FIRST]                     = 12 + 8,
	[IB_OPCODE_RC_SEND_MIDDLE]                    = 12 + 8,
	[IB_OPCODE_RC_SEND_LAST]                      = 12 + 8,
	[IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE]       = 12 + 8 + 4,
	[IB_OPCODE_RC_SEND_ONLY]                      = 12 + 8,
	[IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE]       = 12 + 8 + 4,
	[IB_OPCODE_RC_RDMA_WRITE_FIRST]               = 12 + 8 + 16,
	[IB_OPCODE_RC_RDMA_WRITE_MIDDLE]              = 12 + 8,
	[IB_OPCODE_RC_RDMA_WRITE_LAST]                = 12 + 8,
	[IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = 12 + 8 + 4,
	[IB_OPCODE_RC_RDMA_WRITE_ONLY]                = 12 + 8 + 16,
	[IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = 12 + 8 + 20,
	[IB_OPCODE_RC_RDMA_READ_REQUEST]              = 12 + 8 + 16,
	[IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST]       = 12 + 8 + 4,
	[IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE]      = 12 + 8,
	[IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST]        = 12 + 8 + 4,
	[IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY]        = 12 + 8 + 4,
	[IB_OPCODE_RC_ACKNOWLEDGE]                    = 12 + 8 + 4,
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	[IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE]             = 12 + 8 + 4 + 8,
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	[IB_OPCODE_RC_COMPARE_SWAP]                   = 12 + 8 + 28,
	[IB_OPCODE_RC_FETCH_ADD]                      = 12 + 8 + 28,
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	[IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE]      = 12 + 8 + 4,
	[IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE]      = 12 + 8 + 4,
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	/* UC */
	[IB_OPCODE_UC_SEND_FIRST]                     = 12 + 8,
	[IB_OPCODE_UC_SEND_MIDDLE]                    = 12 + 8,
	[IB_OPCODE_UC_SEND_LAST]                      = 12 + 8,
	[IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE]       = 12 + 8 + 4,
	[IB_OPCODE_UC_SEND_ONLY]                      = 12 + 8,
	[IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE]       = 12 + 8 + 4,
	[IB_OPCODE_UC_RDMA_WRITE_FIRST]               = 12 + 8 + 16,
	[IB_OPCODE_UC_RDMA_WRITE_MIDDLE]              = 12 + 8,
	[IB_OPCODE_UC_RDMA_WRITE_LAST]                = 12 + 8,
	[IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = 12 + 8 + 4,
	[IB_OPCODE_UC_RDMA_WRITE_ONLY]                = 12 + 8 + 16,
	[IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = 12 + 8 + 20,
	/* UD */
	[IB_OPCODE_UD_SEND_ONLY]                      = 12 + 8 + 8,
	[IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE]       = 12 + 8 + 12
};

static const opcode_handler opcode_handler_tbl[256] = {
	/* RC */
	[IB_OPCODE_RC_SEND_FIRST]                     = &hfi1_rc_rcv,
	[IB_OPCODE_RC_SEND_MIDDLE]                    = &hfi1_rc_rcv,
	[IB_OPCODE_RC_SEND_LAST]                      = &hfi1_rc_rcv,
	[IB_OPCODE_RC_SEND_LAST_WITH_IMMEDIATE]       = &hfi1_rc_rcv,
	[IB_OPCODE_RC_SEND_ONLY]                      = &hfi1_rc_rcv,
	[IB_OPCODE_RC_SEND_ONLY_WITH_IMMEDIATE]       = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_WRITE_FIRST]               = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_WRITE_MIDDLE]              = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_WRITE_LAST]                = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_WRITE_ONLY]                = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_READ_REQUEST]              = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST]       = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE]      = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_READ_RESPONSE_LAST]        = &hfi1_rc_rcv,
	[IB_OPCODE_RC_RDMA_READ_RESPONSE_ONLY]        = &hfi1_rc_rcv,
	[IB_OPCODE_RC_ACKNOWLEDGE]                    = &hfi1_rc_rcv,
	[IB_OPCODE_RC_ATOMIC_ACKNOWLEDGE]             = &hfi1_rc_rcv,
	[IB_OPCODE_RC_COMPARE_SWAP]                   = &hfi1_rc_rcv,
	[IB_OPCODE_RC_FETCH_ADD]                      = &hfi1_rc_rcv,
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	[IB_OPCODE_RC_SEND_LAST_WITH_INVALIDATE]      = &hfi1_rc_rcv,
	[IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE]      = &hfi1_rc_rcv,
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	/* UC */
	[IB_OPCODE_UC_SEND_FIRST]                     = &hfi1_uc_rcv,
	[IB_OPCODE_UC_SEND_MIDDLE]                    = &hfi1_uc_rcv,
	[IB_OPCODE_UC_SEND_LAST]                      = &hfi1_uc_rcv,
	[IB_OPCODE_UC_SEND_LAST_WITH_IMMEDIATE]       = &hfi1_uc_rcv,
	[IB_OPCODE_UC_SEND_ONLY]                      = &hfi1_uc_rcv,
	[IB_OPCODE_UC_SEND_ONLY_WITH_IMMEDIATE]       = &hfi1_uc_rcv,
	[IB_OPCODE_UC_RDMA_WRITE_FIRST]               = &hfi1_uc_rcv,
	[IB_OPCODE_UC_RDMA_WRITE_MIDDLE]              = &hfi1_uc_rcv,
	[IB_OPCODE_UC_RDMA_WRITE_LAST]                = &hfi1_uc_rcv,
	[IB_OPCODE_UC_RDMA_WRITE_LAST_WITH_IMMEDIATE] = &hfi1_uc_rcv,
	[IB_OPCODE_UC_RDMA_WRITE_ONLY]                = &hfi1_uc_rcv,
	[IB_OPCODE_UC_RDMA_WRITE_ONLY_WITH_IMMEDIATE] = &hfi1_uc_rcv,
	/* UD */
	[IB_OPCODE_UD_SEND_ONLY]                      = &hfi1_ud_rcv,
	[IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE]       = &hfi1_ud_rcv,
	/* CNP */
	[IB_OPCODE_CNP]				      = &hfi1_cnp_rcv
};

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#define OPMASK 0x1f

static const u32 pio_opmask[BIT(3)] = {
	/* RC */
	[IB_OPCODE_RC >> 5] =
		BIT(RC_OP(SEND_ONLY) & OPMASK) |
		BIT(RC_OP(SEND_ONLY_WITH_IMMEDIATE) & OPMASK) |
		BIT(RC_OP(RDMA_WRITE_ONLY) & OPMASK) |
		BIT(RC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE) & OPMASK) |
		BIT(RC_OP(RDMA_READ_REQUEST) & OPMASK) |
		BIT(RC_OP(ACKNOWLEDGE) & OPMASK) |
		BIT(RC_OP(ATOMIC_ACKNOWLEDGE) & OPMASK) |
		BIT(RC_OP(COMPARE_SWAP) & OPMASK) |
		BIT(RC_OP(FETCH_ADD) & OPMASK),
	/* UC */
	[IB_OPCODE_UC >> 5] =
		BIT(UC_OP(SEND_ONLY) & OPMASK) |
		BIT(UC_OP(SEND_ONLY_WITH_IMMEDIATE) & OPMASK) |
		BIT(UC_OP(RDMA_WRITE_ONLY) & OPMASK) |
		BIT(UC_OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE) & OPMASK),
};

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/*
 * System image GUID.
 */
__be64 ib_hfi1_sys_image_guid;

/**
 * hfi1_copy_sge - copy data to SGE memory
 * @ss: the SGE state
 * @data: the data to copy
 * @length: the length of the data
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 * @release: boolean to release MR
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 * @copy_last: do a separate copy of the last 8 bytes
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 */
void hfi1_copy_sge(
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	struct rvt_sge_state *ss,
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	void *data, u32 length,
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	bool release,
	bool copy_last)
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{
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	struct rvt_sge *sge = &ss->sge;
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	int i;
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	bool in_last = false;
	bool cacheless_copy = false;
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	if (sge_copy_mode == COPY_CACHELESS) {
		cacheless_copy = length >= PAGE_SIZE;
	} else if (sge_copy_mode == COPY_ADAPTIVE) {
		if (length >= PAGE_SIZE) {
			/*
			 * NOTE: this *assumes*:
			 * o The first vaddr is the dest.
			 * o If multiple pages, then vaddr is sequential.
			 */
			wss_insert(sge->vaddr);
			if (length >= (2 * PAGE_SIZE))
				wss_insert(sge->vaddr + PAGE_SIZE);
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			cacheless_copy = wss_exceeds_threshold();
		} else {
			wss_advance_clean_counter();
		}
	}
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	if (copy_last) {
		if (length > 8) {
			length -= 8;
		} else {
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			copy_last = false;
			in_last = true;
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		}
	}

again:
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	while (length) {
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		u32 len = rvt_get_sge_length(sge, length);
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		WARN_ON_ONCE(len == 0);
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		if (unlikely(in_last)) {
			/* enforce byte transfer ordering */
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			for (i = 0; i < len; i++)
				((u8 *)sge->vaddr)[i] = ((u8 *)data)[i];
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		} else if (cacheless_copy) {
			cacheless_memcpy(sge->vaddr, data, len);
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		} else {
			memcpy(sge->vaddr, data, len);
		}
495
		rvt_update_sge(ss, len, release);
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Mike Marciniszyn 已提交
496 497 498
		data += len;
		length -= len;
	}
499 500

	if (copy_last) {
501 502
		copy_last = false;
		in_last = true;
503 504 505
		length = 8;
		goto again;
	}
M
Mike Marciniszyn 已提交
506 507 508 509 510
}

/*
 * Make sure the QP is ready and able to accept the given opcode.
 */
511
static inline opcode_handler qp_ok(int opcode, struct hfi1_packet *packet)
M
Mike Marciniszyn 已提交
512
{
513
	if (!(ib_rvt_state_ops[packet->qp->state] & RVT_PROCESS_RECV_OK))
514
		return NULL;
515
	if (((opcode & RVT_OPCODE_QP_MASK) == packet->qp->allowed_ops) ||
M
Mike Marciniszyn 已提交
516
	    (opcode == IB_OPCODE_CNP))
517 518 519
		return opcode_handler_tbl[opcode];

	return NULL;
M
Mike Marciniszyn 已提交
520 521
}

522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550
static u64 hfi1_fault_tx(struct rvt_qp *qp, u8 opcode, u64 pbc)
{
#ifdef CONFIG_FAULT_INJECTION
	if ((opcode & IB_OPCODE_MSP) == IB_OPCODE_MSP)
		/*
		 * In order to drop non-IB traffic we
		 * set PbcInsertHrc to NONE (0x2).
		 * The packet will still be delivered
		 * to the receiving node but a
		 * KHdrHCRCErr (KDETH packet with a bad
		 * HCRC) will be triggered and the
		 * packet will not be delivered to the
		 * correct context.
		 */
		pbc |= (u64)PBC_IHCRC_NONE << PBC_INSERT_HCRC_SHIFT;
	else
		/*
		 * In order to drop regular verbs
		 * traffic we set the PbcTestEbp
		 * flag. The packet will still be
		 * delivered to the receiving node but
		 * a 'late ebp error' will be
		 * triggered and will be dropped.
		 */
		pbc |= PBC_TEST_EBP;
#endif
	return pbc;
}

M
Mike Marciniszyn 已提交
551 552 553 554 555 556 557 558 559 560 561
/**
 * hfi1_ib_rcv - process an incoming packet
 * @packet: data packet information
 *
 * This is called to process an incoming packet at interrupt level.
 *
 * Tlen is the length of the header + data + CRC in bytes.
 */
void hfi1_ib_rcv(struct hfi1_packet *packet)
{
	struct hfi1_ctxtdata *rcd = packet->rcd;
562
	struct ib_header *hdr = packet->hdr;
M
Mike Marciniszyn 已提交
563 564
	u32 tlen = packet->tlen;
	struct hfi1_pportdata *ppd = rcd->ppd;
565
	struct hfi1_ibport *ibp = rcd_to_iport(rcd);
566
	struct rvt_dev_info *rdi = &ppd->dd->verbs_dev.rdi;
567
	opcode_handler packet_handler;
568
	unsigned long flags;
M
Mike Marciniszyn 已提交
569 570 571 572 573 574
	u32 qp_num;
	int lnh;
	u8 opcode;
	u16 lid;

	/* Check for GRH */
575
	lnh = ib_get_lnh(hdr);
576
	if (lnh == HFI1_LRH_BTH) {
M
Mike Marciniszyn 已提交
577
		packet->ohdr = &hdr->u.oth;
578
	} else if (lnh == HFI1_LRH_GRH) {
M
Mike Marciniszyn 已提交
579 580 581 582 583 584 585 586 587
		u32 vtf;

		packet->ohdr = &hdr->u.l.oth;
		if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
			goto drop;
		vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
		if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
			goto drop;
		packet->rcv_flags |= HFI1_HAS_GRH;
588
	} else {
M
Mike Marciniszyn 已提交
589
		goto drop;
590
	}
M
Mike Marciniszyn 已提交
591 592 593

	trace_input_ibhdr(rcd->dd, hdr);

594
	opcode = ib_bth_get_opcode(packet->ohdr);
M
Mike Marciniszyn 已提交
595 596 597
	inc_opstats(tlen, &rcd->opstats->stats[opcode]);

	/* Get the destination QP number. */
598
	qp_num = be32_to_cpu(packet->ohdr->bth[1]) & RVT_QPN_MASK;
599
	lid = ib_get_dlid(hdr);
600 601
	if (unlikely((lid >= be16_to_cpu(IB_MULTICAST_LID_BASE)) &&
		     (lid != be16_to_cpu(IB_LID_PERMISSIVE)))) {
602 603
		struct rvt_mcast *mcast;
		struct rvt_mcast_qp *p;
M
Mike Marciniszyn 已提交
604 605 606

		if (lnh != HFI1_LRH_GRH)
			goto drop;
607
		mcast = rvt_mcast_find(&ibp->rvp, &hdr->u.l.grh.dgid, lid);
608
		if (!mcast)
M
Mike Marciniszyn 已提交
609 610 611
			goto drop;
		list_for_each_entry_rcu(p, &mcast->qp_list, list) {
			packet->qp = p->qp;
612
			spin_lock_irqsave(&packet->qp->r_lock, flags);
613 614 615 616 617
			packet_handler = qp_ok(opcode, packet);
			if (likely(packet_handler))
				packet_handler(packet);
			else
				ibp->rvp.n_pkt_drops++;
618
			spin_unlock_irqrestore(&packet->qp->r_lock, flags);
M
Mike Marciniszyn 已提交
619 620
		}
		/*
621
		 * Notify rvt_multicast_detach() if it is waiting for us
M
Mike Marciniszyn 已提交
622 623 624 625 626 627
		 * to finish.
		 */
		if (atomic_dec_return(&mcast->refcount) <= 1)
			wake_up(&mcast->wait);
	} else {
		rcu_read_lock();
628
		packet->qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
M
Mike Marciniszyn 已提交
629 630 631 632
		if (!packet->qp) {
			rcu_read_unlock();
			goto drop;
		}
633 634 635 636 637
		if (unlikely(hfi1_dbg_fault_opcode(packet->qp, opcode,
						   true))) {
			rcu_read_unlock();
			goto drop;
		}
638
		spin_lock_irqsave(&packet->qp->r_lock, flags);
639 640 641 642 643
		packet_handler = qp_ok(opcode, packet);
		if (likely(packet_handler))
			packet_handler(packet);
		else
			ibp->rvp.n_pkt_drops++;
644
		spin_unlock_irqrestore(&packet->qp->r_lock, flags);
M
Mike Marciniszyn 已提交
645 646 647 648 649
		rcu_read_unlock();
	}
	return;

drop:
650
	ibp->rvp.n_pkt_drops++;
M
Mike Marciniszyn 已提交
651 652 653 654 655 656 657 658 659 660
}

/*
 * This is called from a timer to check for QPs
 * which need kernel memory in order to send a packet.
 */
static void mem_timer(unsigned long data)
{
	struct hfi1_ibdev *dev = (struct hfi1_ibdev *)data;
	struct list_head *list = &dev->memwait;
661
	struct rvt_qp *qp = NULL;
M
Mike Marciniszyn 已提交
662 663
	struct iowait *wait;
	unsigned long flags;
664
	struct hfi1_qp_priv *priv;
M
Mike Marciniszyn 已提交
665 666 667 668

	write_seqlock_irqsave(&dev->iowait_lock, flags);
	if (!list_empty(list)) {
		wait = list_first_entry(list, struct iowait, list);
669 670 671
		qp = iowait_to_qp(wait);
		priv = qp->priv;
		list_del_init(&priv->s_iowait.list);
672
		priv->s_iowait.lock = NULL;
M
Mike Marciniszyn 已提交
673 674 675 676 677 678 679
		/* refcount held until actual wake up */
		if (!list_empty(list))
			mod_timer(&dev->mem_timer, jiffies + 1);
	}
	write_sequnlock_irqrestore(&dev->iowait_lock, flags);

	if (qp)
680
		hfi1_qp_wakeup(qp, RVT_S_WAIT_KMEM);
M
Mike Marciniszyn 已提交
681 682 683 684 685 686 687 688
}

/*
 * This is called with progress side lock held.
 */
/* New API */
static void verbs_sdma_complete(
	struct sdma_txreq *cookie,
689
	int status)
M
Mike Marciniszyn 已提交
690 691 692
{
	struct verbs_txreq *tx =
		container_of(cookie, struct verbs_txreq, txreq);
693
	struct rvt_qp *qp = tx->qp;
M
Mike Marciniszyn 已提交
694 695

	spin_lock(&qp->s_lock);
696
	if (tx->wqe) {
M
Mike Marciniszyn 已提交
697
		hfi1_send_complete(qp, tx->wqe, IB_WC_SUCCESS);
698
	} else if (qp->ibqp.qp_type == IB_QPT_RC) {
699
		struct ib_header *hdr;
M
Mike Marciniszyn 已提交
700 701 702 703 704 705 706 707 708

		hdr = &tx->phdr.hdr;
		hfi1_rc_send_complete(qp, hdr);
	}
	spin_unlock(&qp->s_lock);

	hfi1_put_txreq(tx);
}

709 710 711
static int wait_kmem(struct hfi1_ibdev *dev,
		     struct rvt_qp *qp,
		     struct hfi1_pkt_state *ps)
M
Mike Marciniszyn 已提交
712
{
713
	struct hfi1_qp_priv *priv = qp->priv;
M
Mike Marciniszyn 已提交
714 715 716 717
	unsigned long flags;
	int ret = 0;

	spin_lock_irqsave(&qp->s_lock, flags);
718
	if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
M
Mike Marciniszyn 已提交
719
		write_seqlock(&dev->iowait_lock);
720 721
		list_add_tail(&ps->s_txreq->txreq.list,
			      &priv->s_iowait.tx_head);
722
		if (list_empty(&priv->s_iowait.list)) {
M
Mike Marciniszyn 已提交
723 724
			if (list_empty(&dev->memwait))
				mod_timer(&dev->mem_timer, jiffies + 1);
725
			qp->s_flags |= RVT_S_WAIT_KMEM;
726
			list_add_tail(&priv->s_iowait.list, &dev->memwait);
727
			priv->s_iowait.lock = &dev->iowait_lock;
728
			trace_hfi1_qpsleep(qp, RVT_S_WAIT_KMEM);
729
			rvt_get_qp(qp);
M
Mike Marciniszyn 已提交
730 731
		}
		write_sequnlock(&dev->iowait_lock);
732
		qp->s_flags &= ~RVT_S_BUSY;
M
Mike Marciniszyn 已提交
733 734 735 736 737 738 739 740 741 742 743 744
		ret = -EBUSY;
	}
	spin_unlock_irqrestore(&qp->s_lock, flags);

	return ret;
}

/*
 * This routine calls txadds for each sg entry.
 *
 * Add failures will revert the sge cursor
 */
745
static noinline int build_verbs_ulp_payload(
M
Mike Marciniszyn 已提交
746 747 748 749
	struct sdma_engine *sde,
	u32 length,
	struct verbs_txreq *tx)
{
750
	struct rvt_sge_state *ss = tx->ss;
751 752
	struct rvt_sge *sg_list = ss->sg_list;
	struct rvt_sge sge = ss->sge;
M
Mike Marciniszyn 已提交
753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770
	u8 num_sge = ss->num_sge;
	u32 len;
	int ret = 0;

	while (length) {
		len = ss->sge.length;
		if (len > length)
			len = length;
		if (len > ss->sge.sge_length)
			len = ss->sge.sge_length;
		WARN_ON_ONCE(len == 0);
		ret = sdma_txadd_kvaddr(
			sde->dd,
			&tx->txreq,
			ss->sge.vaddr,
			len);
		if (ret)
			goto bail_txadd;
771
		rvt_update_sge(ss, len, false);
M
Mike Marciniszyn 已提交
772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788
		length -= len;
	}
	return ret;
bail_txadd:
	/* unwind cursor */
	ss->sge = sge;
	ss->num_sge = num_sge;
	ss->sg_list = sg_list;
	return ret;
}

/*
 * Build the number of DMA descriptors needed to send length bytes of data.
 *
 * NOTE: DMA mapping is held in the tx until completed in the ring or
 *       the tx desc is freed without having been submitted to the ring
 *
789
 * This routine ensures all the helper routine calls succeed.
M
Mike Marciniszyn 已提交
790 791 792 793 794 795
 */
/* New API */
static int build_verbs_tx_desc(
	struct sdma_engine *sde,
	u32 length,
	struct verbs_txreq *tx,
796
	struct hfi1_ahg_info *ahg_info,
M
Mike Marciniszyn 已提交
797 798 799
	u64 pbc)
{
	int ret = 0;
800
	struct hfi1_sdma_header *phdr = &tx->phdr;
M
Mike Marciniszyn 已提交
801 802
	u16 hdrbytes = tx->hdr_dwords << 2;

803
	if (!ahg_info->ahgcount) {
M
Mike Marciniszyn 已提交
804 805
		ret = sdma_txinit_ahg(
			&tx->txreq,
806
			ahg_info->tx_flags,
M
Mike Marciniszyn 已提交
807
			hdrbytes + length,
808
			ahg_info->ahgidx,
M
Mike Marciniszyn 已提交
809 810 811 812 813 814 815 816 817 818
			0,
			NULL,
			0,
			verbs_sdma_complete);
		if (ret)
			goto bail_txadd;
		phdr->pbc = cpu_to_le64(pbc);
		ret = sdma_txadd_kvaddr(
			sde->dd,
			&tx->txreq,
819 820
			phdr,
			hdrbytes);
M
Mike Marciniszyn 已提交
821 822 823 824 825
		if (ret)
			goto bail_txadd;
	} else {
		ret = sdma_txinit_ahg(
			&tx->txreq,
826
			ahg_info->tx_flags,
M
Mike Marciniszyn 已提交
827
			length,
828 829 830
			ahg_info->ahgidx,
			ahg_info->ahgcount,
			ahg_info->ahgdesc,
M
Mike Marciniszyn 已提交
831 832 833 834 835
			hdrbytes,
			verbs_sdma_complete);
		if (ret)
			goto bail_txadd;
	}
836 837 838
	/* add the ulp payload - if any. tx->ss can be NULL for acks */
	if (tx->ss)
		ret = build_verbs_ulp_payload(sde, length, tx);
M
Mike Marciniszyn 已提交
839 840 841 842
bail_txadd:
	return ret;
}

843
int hfi1_verbs_send_dma(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
844
			u64 pbc)
M
Mike Marciniszyn 已提交
845
{
846
	struct hfi1_qp_priv *priv = qp->priv;
847
	struct hfi1_ahg_info *ahg_info = priv->s_ahg;
848
	u32 hdrwords = qp->s_hdrwords;
849
	u32 len = ps->s_txreq->s_cur_size;
850 851 852
	u32 plen = hdrwords + ((len + 3) >> 2) + 2; /* includes pbc */
	struct hfi1_ibdev *dev = ps->dev;
	struct hfi1_pportdata *ppd = ps->ppd;
M
Mike Marciniszyn 已提交
853
	struct verbs_txreq *tx;
854 855
	u8 sc5 = priv->s_sc;

M
Mike Marciniszyn 已提交
856 857
	int ret;

858
	tx = ps->s_txreq;
859 860 861
	if (!sdma_txreq_built(&tx->txreq)) {
		if (likely(pbc == 0)) {
			u32 vl = sc_to_vlt(dd_from_ibdev(qp->ibqp.device), sc5);
862 863
			u8 opcode = get_opcode(&tx->phdr.hdr);

864 865
			/* No vl15 here */
			/* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
866
			pbc |= (!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT;
867

868 869
			if (unlikely(hfi1_dbg_fault_opcode(qp, opcode, false)))
				pbc = hfi1_fault_tx(qp, opcode, pbc);
870
			pbc = create_pbc(ppd,
871
					 pbc,
872 873 874 875 876
					 qp->srate_mbps,
					 vl,
					 plen);
		}
		tx->wqe = qp->s_wqe;
877
		ret = build_verbs_tx_desc(tx->sde, len, tx, ahg_info, pbc);
878 879
		if (unlikely(ret))
			goto bail_build;
M
Mike Marciniszyn 已提交
880
	}
881 882 883 884 885 886
	ret =  sdma_send_txreq(tx->sde, &priv->s_iowait, &tx->txreq);
	if (unlikely(ret < 0)) {
		if (ret == -ECOMM)
			goto bail_ecomm;
		return ret;
	}
887 888
	trace_sdma_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
				&ps->s_txreq->phdr.hdr);
M
Mike Marciniszyn 已提交
889 890 891 892 893 894
	return ret;

bail_ecomm:
	/* The current one got "sent" */
	return 0;
bail_build:
895 896 897 898 899 900 901
	ret = wait_kmem(dev, qp, ps);
	if (!ret) {
		/* free txreq - bad state */
		hfi1_put_txreq(ps->s_txreq);
		ps->s_txreq = NULL;
	}
	return ret;
M
Mike Marciniszyn 已提交
902 903 904 905 906 907
}

/*
 * If we are now in the error state, return zero to flush the
 * send work request.
 */
908 909 910 911
static int pio_wait(struct rvt_qp *qp,
		    struct send_context *sc,
		    struct hfi1_pkt_state *ps,
		    u32 flag)
M
Mike Marciniszyn 已提交
912
{
913
	struct hfi1_qp_priv *priv = qp->priv;
M
Mike Marciniszyn 已提交
914 915 916 917 918 919 920 921 922 923 924 925
	struct hfi1_devdata *dd = sc->dd;
	struct hfi1_ibdev *dev = &dd->verbs_dev;
	unsigned long flags;
	int ret = 0;

	/*
	 * Note that as soon as want_buffer() is called and
	 * possibly before it returns, sc_piobufavail()
	 * could be called. Therefore, put QP on the I/O wait list before
	 * enabling the PIO avail interrupt.
	 */
	spin_lock_irqsave(&qp->s_lock, flags);
926
	if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
M
Mike Marciniszyn 已提交
927
		write_seqlock(&dev->iowait_lock);
928 929
		list_add_tail(&ps->s_txreq->txreq.list,
			      &priv->s_iowait.tx_head);
930
		if (list_empty(&priv->s_iowait.list)) {
M
Mike Marciniszyn 已提交
931 932 933
			struct hfi1_ibdev *dev = &dd->verbs_dev;
			int was_empty;

934 935 936
			dev->n_piowait += !!(flag & RVT_S_WAIT_PIO);
			dev->n_piodrain += !!(flag & RVT_S_WAIT_PIO_DRAIN);
			qp->s_flags |= flag;
M
Mike Marciniszyn 已提交
937
			was_empty = list_empty(&sc->piowait);
938
			list_add_tail(&priv->s_iowait.list, &sc->piowait);
939
			priv->s_iowait.lock = &dev->iowait_lock;
940
			trace_hfi1_qpsleep(qp, RVT_S_WAIT_PIO);
941
			rvt_get_qp(qp);
M
Mike Marciniszyn 已提交
942 943 944 945 946
			/* counting: only call wantpiobuf_intr if first user */
			if (was_empty)
				hfi1_sc_wantpiobuf_intr(sc, 1);
		}
		write_sequnlock(&dev->iowait_lock);
947
		qp->s_flags &= ~RVT_S_BUSY;
M
Mike Marciniszyn 已提交
948 949 950 951 952 953
		ret = -EBUSY;
	}
	spin_unlock_irqrestore(&qp->s_lock, flags);
	return ret;
}

954 955 956 957 958 959 960 961 962
static void verbs_pio_complete(void *arg, int code)
{
	struct rvt_qp *qp = (struct rvt_qp *)arg;
	struct hfi1_qp_priv *priv = qp->priv;

	if (iowait_pio_dec(&priv->s_iowait))
		iowait_drain_wakeup(&priv->s_iowait);
}

963
int hfi1_verbs_send_pio(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
964
			u64 pbc)
M
Mike Marciniszyn 已提交
965
{
966
	struct hfi1_qp_priv *priv = qp->priv;
967
	u32 hdrwords = qp->s_hdrwords;
968
	struct rvt_sge_state *ss = ps->s_txreq->ss;
969
	u32 len = ps->s_txreq->s_cur_size;
970 971 972
	u32 dwords = (len + 3) >> 2;
	u32 plen = hdrwords + dwords + 2; /* includes pbc */
	struct hfi1_pportdata *ppd = ps->ppd;
973
	u32 *hdr = (u32 *)&ps->s_txreq->phdr.hdr;
974
	u8 sc5;
M
Mike Marciniszyn 已提交
975 976 977 978
	unsigned long flags = 0;
	struct send_context *sc;
	struct pio_buf *pbuf;
	int wc_status = IB_WC_SUCCESS;
979
	int ret = 0;
980 981 982 983 984 985 986 987 988 989 990
	pio_release_cb cb = NULL;

	/* only RC/UC use complete */
	switch (qp->ibqp.qp_type) {
	case IB_QPT_RC:
	case IB_QPT_UC:
		cb = verbs_pio_complete;
		break;
	default:
		break;
	}
M
Mike Marciniszyn 已提交
991 992

	/* vl15 special case taken care of in ud.c */
993
	sc5 = priv->s_sc;
994
	sc = ps->s_txreq->psc;
M
Mike Marciniszyn 已提交
995 996

	if (likely(pbc == 0)) {
997
		u8 vl = sc_to_vlt(dd_from_ibdev(qp->ibqp.device), sc5);
998 999 1000
		struct verbs_txreq *tx = ps->s_txreq;
		u8 opcode = get_opcode(&tx->phdr.hdr);

M
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1001
		/* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
1002 1003 1004 1005
		pbc |= (!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT;
		if (unlikely(hfi1_dbg_fault_opcode(qp, opcode, false)))
			pbc = hfi1_fault_tx(qp, opcode, pbc);
		pbc = create_pbc(ppd, pbc, qp->srate_mbps, vl, plen);
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1006
	}
1007 1008 1009
	if (cb)
		iowait_pio_inc(&priv->s_iowait);
	pbuf = sc_buffer_alloc(sc, plen, cb, qp);
1010
	if (unlikely(!pbuf)) {
1011 1012
		if (cb)
			verbs_pio_complete(qp, 0);
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1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031
		if (ppd->host_link_state != HLS_UP_ACTIVE) {
			/*
			 * If we have filled the PIO buffers to capacity and are
			 * not in an active state this request is not going to
			 * go out to so just complete it with an error or else a
			 * ULP or the core may be stuck waiting.
			 */
			hfi1_cdbg(
				PIO,
				"alloc failed. state not active, completing");
			wc_status = IB_WC_GENERAL_ERR;
			goto pio_bail;
		} else {
			/*
			 * This is a normal occurrence. The PIO buffs are full
			 * up but we are still happily sending, well we could be
			 * so lets continue to queue the request.
			 */
			hfi1_cdbg(PIO, "alloc failed. state active, queuing");
1032
			ret = pio_wait(qp, sc, ps, RVT_S_WAIT_PIO);
1033
			if (!ret)
1034
				/* txreq not queued - free */
1035 1036 1037
				goto bail;
			/* tx consumed in wait */
			return ret;
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1038 1039 1040 1041 1042 1043 1044
		}
	}

	if (len == 0) {
		pio_copy(ppd->dd, pbuf, pbc, hdr, hdrwords);
	} else {
		if (ss) {
1045
			seg_pio_copy_start(pbuf, pbc, hdr, hdrwords * 4);
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Mike Marciniszyn 已提交
1046 1047 1048 1049 1050 1051
			while (len) {
				void *addr = ss->sge.vaddr;
				u32 slen = ss->sge.length;

				if (slen > len)
					slen = len;
1052
				rvt_update_sge(ss, slen, false);
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1053 1054 1055 1056 1057 1058 1059
				seg_pio_copy_mid(pbuf, addr, slen);
				len -= slen;
			}
			seg_pio_copy_end(pbuf);
		}
	}

1060 1061
	trace_pio_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
			       &ps->s_txreq->phdr.hdr);
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1062 1063 1064 1065 1066 1067 1068 1069

pio_bail:
	if (qp->s_wqe) {
		spin_lock_irqsave(&qp->s_lock, flags);
		hfi1_send_complete(qp, qp->s_wqe, wc_status);
		spin_unlock_irqrestore(&qp->s_lock, flags);
	} else if (qp->ibqp.qp_type == IB_QPT_RC) {
		spin_lock_irqsave(&qp->s_lock, flags);
1070
		hfi1_rc_send_complete(qp, &ps->s_txreq->phdr.hdr);
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1071 1072
		spin_unlock_irqrestore(&qp->s_lock, flags);
	}
1073 1074 1075 1076 1077 1078

	ret = 0;

bail:
	hfi1_put_txreq(ps->s_txreq);
	return ret;
M
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1079
}
1080

M
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1081 1082
/*
 * egress_pkey_matches_entry - return 1 if the pkey matches ent (ent
1083
 * being an entry from the partition key table), return 0
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 * otherwise. Use the matching criteria for egress partition keys
 * specified in the OPAv1 spec., section 9.1l.7.
 */
static inline int egress_pkey_matches_entry(u16 pkey, u16 ent)
{
	u16 mkey = pkey & PKEY_LOW_15_MASK;
1090
	u16 mentry = ent & PKEY_LOW_15_MASK;
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1091

1092
	if (mkey == mentry) {
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1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104
		/*
		 * If pkey[15] is set (full partition member),
		 * is bit 15 in the corresponding table element
		 * clear (limited member)?
		 */
		if (pkey & PKEY_MEMBER_MASK)
			return !!(ent & PKEY_MEMBER_MASK);
		return 1;
	}
	return 0;
}

1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117
/**
 * egress_pkey_check - check P_KEY of a packet
 * @ppd:    Physical IB port data
 * @lrh: Local route header
 * @bth: Base transport header
 * @sc5:    SC for packet
 * @s_pkey_index: It will be used for look up optimization for kernel contexts
 * only. If it is negative value, then it means user contexts is calling this
 * function.
 *
 * It checks if hdr's pkey is valid.
 *
 * Return: 0 on success, otherwise, 1
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1118
 */
1119 1120
int egress_pkey_check(struct hfi1_pportdata *ppd, __be16 *lrh, __be32 *bth,
		      u8 sc5, int8_t s_pkey_index)
M
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1121 1122
{
	struct hfi1_devdata *dd;
1123
	int i;
M
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1124
	u16 pkey;
1125
	int is_user_ctxt_mechanism = (s_pkey_index < 0);
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1126 1127 1128 1129

	if (!(ppd->part_enforce & HFI1_PART_ENFORCE_OUT))
		return 0;

1130
	pkey = (u16)be32_to_cpu(bth[0]);
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Mike Marciniszyn 已提交
1131 1132 1133 1134 1135 1136 1137 1138 1139

	/* If SC15, pkey[0:14] must be 0x7fff */
	if ((sc5 == 0xf) && ((pkey & PKEY_LOW_15_MASK) != PKEY_LOW_15_MASK))
		goto bad;

	/* Is the pkey = 0x0, or 0x8000? */
	if ((pkey & PKEY_LOW_15_MASK) == 0)
		goto bad;

1140 1141 1142 1143 1144 1145 1146
	/*
	 * For the kernel contexts only, if a qp is passed into the function,
	 * the most likely matching pkey has index qp->s_pkey_index
	 */
	if (!is_user_ctxt_mechanism &&
	    egress_pkey_matches_entry(pkey, ppd->pkeys[s_pkey_index])) {
		return 0;
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Mike Marciniszyn 已提交
1147 1148
	}

1149 1150 1151 1152
	for (i = 0; i < MAX_PKEY_VALUES; i++) {
		if (egress_pkey_matches_entry(pkey, ppd->pkeys[i]))
			return 0;
	}
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1153
bad:
1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170
	/*
	 * For the user-context mechanism, the P_KEY check would only happen
	 * once per SDMA request, not once per packet.  Therefore, there's no
	 * need to increment the counter for the user-context mechanism.
	 */
	if (!is_user_ctxt_mechanism) {
		incr_cntr64(&ppd->port_xmit_constraint_errors);
		dd = ppd->dd;
		if (!(dd->err_info_xmit_constraint.status &
		      OPA_EI_STATUS_SMASK)) {
			u16 slid = be16_to_cpu(lrh[3]);

			dd->err_info_xmit_constraint.status |=
				OPA_EI_STATUS_SMASK;
			dd->err_info_xmit_constraint.slid = slid;
			dd->err_info_xmit_constraint.pkey = pkey;
		}
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Mike Marciniszyn 已提交
1171 1172 1173 1174
	}
	return 1;
}

1175 1176 1177 1178 1179 1180 1181
/**
 * get_send_routine - choose an egress routine
 *
 * Choose an egress routine based on QP type
 * and size
 */
static inline send_routine get_send_routine(struct rvt_qp *qp,
1182
					    struct verbs_txreq *tx)
1183 1184 1185
{
	struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
	struct hfi1_qp_priv *priv = qp->priv;
1186
	struct ib_header *h = &tx->phdr.hdr;
1187 1188 1189 1190 1191 1192 1193 1194 1195 1196

	if (unlikely(!(dd->flags & HFI1_HAS_SEND_DMA)))
		return dd->process_pio_send;
	switch (qp->ibqp.qp_type) {
	case IB_QPT_SMI:
		return dd->process_pio_send;
	case IB_QPT_GSI:
	case IB_QPT_UD:
		break;
	case IB_QPT_UC:
1197 1198 1199
	case IB_QPT_RC: {
		u8 op = get_opcode(h);

1200
		if (piothreshold &&
1201
		    tx->s_cur_size <= min(piothreshold, qp->pmtu) &&
1202
		    (BIT(op & OPMASK) & pio_opmask[op >> 5]) &&
1203 1204
		    iowait_sdma_pending(&priv->s_iowait) == 0 &&
		    !sdma_txreq_built(&tx->txreq))
1205 1206
			return dd->process_pio_send;
		break;
1207
	}
1208 1209 1210 1211 1212 1213
	default:
		break;
	}
	return dd->process_dma_send;
}

M
Mike Marciniszyn 已提交
1214 1215 1216
/**
 * hfi1_verbs_send - send a packet
 * @qp: the QP to send on
1217
 * @ps: the state of the packet to send
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1218 1219
 *
 * Return zero if packet is sent or queued OK.
1220
 * Return non-zero and clear qp->s_flags RVT_S_BUSY otherwise.
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1221
 */
1222
int hfi1_verbs_send(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
M
Mike Marciniszyn 已提交
1223 1224
{
	struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
1225
	struct hfi1_qp_priv *priv = qp->priv;
1226 1227
	struct ib_other_headers *ohdr;
	struct ib_header *hdr;
1228
	send_routine sr;
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Mike Marciniszyn 已提交
1229
	int ret;
1230 1231 1232 1233
	u8 lnh;

	hdr = &ps->s_txreq->phdr.hdr;
	/* locate the pkey within the headers */
1234
	lnh = ib_get_lnh(hdr);
1235 1236 1237 1238
	if (lnh == HFI1_LRH_GRH)
		ohdr = &hdr->u.l.oth;
	else
		ohdr = &hdr->u.oth;
M
Mike Marciniszyn 已提交
1239

1240
	sr = get_send_routine(qp, ps->s_txreq);
1241 1242 1243 1244 1245
	ret = egress_pkey_check(dd->pport,
				hdr->lrh,
				ohdr->bth,
				priv->s_sc,
				qp->s_pkey_index);
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Mike Marciniszyn 已提交
1246 1247 1248 1249 1250 1251 1252 1253 1254
	if (unlikely(ret)) {
		/*
		 * The value we are returning here does not get propagated to
		 * the verbs caller. Thus we need to complete the request with
		 * error otherwise the caller could be sitting waiting on the
		 * completion event. Only do this for PIO. SDMA has its own
		 * mechanism for handling the errors. So for SDMA we can just
		 * return.
		 */
1255 1256 1257
		if (sr == dd->process_pio_send) {
			unsigned long flags;

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Mike Marciniszyn 已提交
1258 1259 1260 1261 1262 1263 1264 1265
			hfi1_cdbg(PIO, "%s() Failed. Completing with err",
				  __func__);
			spin_lock_irqsave(&qp->s_lock, flags);
			hfi1_send_complete(qp, qp->s_wqe, IB_WC_GENERAL_ERR);
			spin_unlock_irqrestore(&qp->s_lock, flags);
		}
		return -EINVAL;
	}
1266 1267 1268 1269 1270
	if (sr == dd->process_dma_send && iowait_pio_pending(&priv->s_iowait))
		return pio_wait(qp,
				ps->s_txreq->psc,
				ps,
				RVT_S_WAIT_PIO_DRAIN);
1271
	return sr(qp, ps, 0);
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Mike Marciniszyn 已提交
1272 1273
}

1274 1275 1276 1277 1278
/**
 * hfi1_fill_device_attr - Fill in rvt dev info device attributes.
 * @dd: the device data structure
 */
static void hfi1_fill_device_attr(struct hfi1_devdata *dd)
M
Mike Marciniszyn 已提交
1279
{
1280
	struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
1281
	u32 ver = dd->dc8051_ver;
1282 1283 1284

	memset(&rdi->dparms.props, 0, sizeof(rdi->dparms.props));

1285 1286 1287 1288
	rdi->dparms.props.fw_ver = ((u64)(dc8051_ver_maj(ver)) << 32) |
		((u64)(dc8051_ver_min(ver)) << 16) |
		(u64)dc8051_ver_patch(ver);

1289 1290 1291
	rdi->dparms.props.device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
			IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
			IB_DEVICE_SYS_IMAGE_GUID | IB_DEVICE_RC_RNR_NAK_GEN |
1292
			IB_DEVICE_PORT_ACTIVE_EVENT | IB_DEVICE_SRQ_RESIZE |
1293 1294
			IB_DEVICE_MEM_MGT_EXTENSIONS |
			IB_DEVICE_RDMA_NETDEV_OPA_VNIC;
1295 1296 1297 1298 1299
	rdi->dparms.props.page_size_cap = PAGE_SIZE;
	rdi->dparms.props.vendor_id = dd->oui1 << 16 | dd->oui2 << 8 | dd->oui3;
	rdi->dparms.props.vendor_part_id = dd->pcidev->device;
	rdi->dparms.props.hw_ver = dd->minrev;
	rdi->dparms.props.sys_image_guid = ib_hfi1_sys_image_guid;
1300 1301
	rdi->dparms.props.max_mr_size = U64_MAX;
	rdi->dparms.props.max_fast_reg_page_list_len = UINT_MAX;
1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324
	rdi->dparms.props.max_qp = hfi1_max_qps;
	rdi->dparms.props.max_qp_wr = hfi1_max_qp_wrs;
	rdi->dparms.props.max_sge = hfi1_max_sges;
	rdi->dparms.props.max_sge_rd = hfi1_max_sges;
	rdi->dparms.props.max_cq = hfi1_max_cqs;
	rdi->dparms.props.max_ah = hfi1_max_ahs;
	rdi->dparms.props.max_cqe = hfi1_max_cqes;
	rdi->dparms.props.max_mr = rdi->lkey_table.max;
	rdi->dparms.props.max_fmr = rdi->lkey_table.max;
	rdi->dparms.props.max_map_per_fmr = 32767;
	rdi->dparms.props.max_pd = hfi1_max_pds;
	rdi->dparms.props.max_qp_rd_atom = HFI1_MAX_RDMA_ATOMIC;
	rdi->dparms.props.max_qp_init_rd_atom = 255;
	rdi->dparms.props.max_srq = hfi1_max_srqs;
	rdi->dparms.props.max_srq_wr = hfi1_max_srq_wrs;
	rdi->dparms.props.max_srq_sge = hfi1_max_srq_sges;
	rdi->dparms.props.atomic_cap = IB_ATOMIC_GLOB;
	rdi->dparms.props.max_pkeys = hfi1_get_npkeys(dd);
	rdi->dparms.props.max_mcast_grp = hfi1_max_mcast_grps;
	rdi->dparms.props.max_mcast_qp_attach = hfi1_max_mcast_qp_attached;
	rdi->dparms.props.max_total_mcast_qp_attach =
					rdi->dparms.props.max_mcast_qp_attach *
					rdi->dparms.props.max_mcast_grp;
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1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357
}

static inline u16 opa_speed_to_ib(u16 in)
{
	u16 out = 0;

	if (in & OPA_LINK_SPEED_25G)
		out |= IB_SPEED_EDR;
	if (in & OPA_LINK_SPEED_12_5G)
		out |= IB_SPEED_FDR;

	return out;
}

/*
 * Convert a single OPA link width (no multiple flags) to an IB value.
 * A zero OPA link width means link down, which means the IB width value
 * is a don't care.
 */
static inline u16 opa_width_to_ib(u16 in)
{
	switch (in) {
	case OPA_LINK_WIDTH_1X:
	/* map 2x and 3x to 1x as they don't exist in IB */
	case OPA_LINK_WIDTH_2X:
	case OPA_LINK_WIDTH_3X:
		return IB_WIDTH_1X;
	default: /* link down or unknown, return our largest width */
	case OPA_LINK_WIDTH_4X:
		return IB_WIDTH_4X;
	}
}

1358
static int query_port(struct rvt_dev_info *rdi, u8 port_num,
M
Mike Marciniszyn 已提交
1359 1360
		      struct ib_port_attr *props)
{
1361 1362 1363
	struct hfi1_ibdev *verbs_dev = dev_from_rdi(rdi);
	struct hfi1_devdata *dd = dd_from_dev(verbs_dev);
	struct hfi1_pportdata *ppd = &dd->pport[port_num - 1];
M
Mike Marciniszyn 已提交
1364 1365
	u16 lid = ppd->lid;

1366
	/* props being zeroed by the caller, avoid zeroing it here */
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1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408
	props->lid = lid ? lid : 0;
	props->lmc = ppd->lmc;
	/* OPA logical states match IB logical states */
	props->state = driver_lstate(ppd);
	props->phys_state = hfi1_ibphys_portstate(ppd);
	props->gid_tbl_len = HFI1_GUIDS_PER_PORT;
	props->active_width = (u8)opa_width_to_ib(ppd->link_width_active);
	/* see rate_show() in ib core/sysfs.c */
	props->active_speed = (u8)opa_speed_to_ib(ppd->link_speed_active);
	props->max_vl_num = ppd->vls_supported;

	/* Once we are a "first class" citizen and have added the OPA MTUs to
	 * the core we can advertise the larger MTU enum to the ULPs, for now
	 * advertise only 4K.
	 *
	 * Those applications which are either OPA aware or pass the MTU enum
	 * from the Path Records to us will get the new 8k MTU.  Those that
	 * attempt to process the MTU enum may fail in various ways.
	 */
	props->max_mtu = mtu_to_enum((!valid_ib_mtu(hfi1_max_mtu) ?
				      4096 : hfi1_max_mtu), IB_MTU_4096);
	props->active_mtu = !valid_ib_mtu(ppd->ibmtu) ? props->max_mtu :
		mtu_to_enum(ppd->ibmtu, IB_MTU_2048);

	return 0;
}

static int modify_device(struct ib_device *device,
			 int device_modify_mask,
			 struct ib_device_modify *device_modify)
{
	struct hfi1_devdata *dd = dd_from_ibdev(device);
	unsigned i;
	int ret;

	if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
				   IB_DEVICE_MODIFY_NODE_DESC)) {
		ret = -EOPNOTSUPP;
		goto bail;
	}

	if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC) {
1409 1410
		memcpy(device->node_desc, device_modify->node_desc,
		       IB_DEVICE_NODE_DESC_MAX);
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Mike Marciniszyn 已提交
1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433
		for (i = 0; i < dd->num_pports; i++) {
			struct hfi1_ibport *ibp = &dd->pport[i].ibport_data;

			hfi1_node_desc_chg(ibp);
		}
	}

	if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID) {
		ib_hfi1_sys_image_guid =
			cpu_to_be64(device_modify->sys_image_guid);
		for (i = 0; i < dd->num_pports; i++) {
			struct hfi1_ibport *ibp = &dd->pport[i].ibport_data;

			hfi1_sys_guid_chg(ibp);
		}
	}

	ret = 0;

bail:
	return ret;
}

1434
static int shut_down_port(struct rvt_dev_info *rdi, u8 port_num)
M
Mike Marciniszyn 已提交
1435
{
1436 1437 1438 1439
	struct hfi1_ibdev *verbs_dev = dev_from_rdi(rdi);
	struct hfi1_devdata *dd = dd_from_dev(verbs_dev);
	struct hfi1_pportdata *ppd = &dd->pport[port_num - 1];
	int ret;
M
Mike Marciniszyn 已提交
1440

1441 1442 1443
	set_link_down_reason(ppd, OPA_LINKDOWN_REASON_UNKNOWN, 0,
			     OPA_LINKDOWN_REASON_UNKNOWN);
	ret = set_link_state(ppd, HLS_DN_DOWNDEF);
M
Mike Marciniszyn 已提交
1444 1445 1446
	return ret;
}

1447 1448
static int hfi1_get_guid_be(struct rvt_dev_info *rdi, struct rvt_ibport *rvp,
			    int guid_index, __be64 *guid)
M
Mike Marciniszyn 已提交
1449
{
1450
	struct hfi1_ibport *ibp = container_of(rvp, struct hfi1_ibport, rvp);
M
Mike Marciniszyn 已提交
1451

1452
	if (guid_index >= HFI1_GUIDS_PER_PORT)
1453
		return -EINVAL;
M
Mike Marciniszyn 已提交
1454

1455
	*guid = get_sguid(ibp, guid_index);
1456
	return 0;
M
Mike Marciniszyn 已提交
1457 1458 1459 1460 1461
}

/*
 * convert ah port,sl to sc
 */
1462
u8 ah_to_sc(struct ib_device *ibdev, struct rdma_ah_attr *ah)
M
Mike Marciniszyn 已提交
1463 1464 1465 1466 1467 1468
{
	struct hfi1_ibport *ibp = to_iport(ibdev, ah->port_num);

	return ibp->sl_to_sc[ah->sl];
}

1469
static int hfi1_check_ah(struct ib_device *ibdev, struct rdma_ah_attr *ah_attr)
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Mike Marciniszyn 已提交
1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481
{
	struct hfi1_ibport *ibp;
	struct hfi1_pportdata *ppd;
	struct hfi1_devdata *dd;
	u8 sc5;

	/* test the mapping for validity */
	ibp = to_iport(ibdev, ah_attr->port_num);
	ppd = ppd_from_ibp(ibp);
	sc5 = ibp->sl_to_sc[ah_attr->sl];
	dd = dd_from_ppd(ppd);
	if (sc_to_vlt(dd, sc5) > num_vls && sc_to_vlt(dd, sc5) != 0xf)
1482
		return -EINVAL;
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Mike Marciniszyn 已提交
1483 1484 1485
	return 0;
}

1486
static void hfi1_notify_new_ah(struct ib_device *ibdev,
1487
			       struct rdma_ah_attr *ah_attr,
1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508
			       struct rvt_ah *ah)
{
	struct hfi1_ibport *ibp;
	struct hfi1_pportdata *ppd;
	struct hfi1_devdata *dd;
	u8 sc5;

	/*
	 * Do not trust reading anything from rvt_ah at this point as it is not
	 * done being setup. We can however modify things which we need to set.
	 */

	ibp = to_iport(ibdev, ah_attr->port_num);
	ppd = ppd_from_ibp(ibp);
	sc5 = ibp->sl_to_sc[ah->attr.sl];
	dd = dd_from_ppd(ppd);
	ah->vl = sc_to_vlt(dd, sc5);
	if (ah->vl < num_vls || ah->vl == 15)
		ah->log_pmtu = ilog2(dd->vld[ah->vl].mtu);
}

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Mike Marciniszyn 已提交
1509 1510
struct ib_ah *hfi1_create_qp0_ah(struct hfi1_ibport *ibp, u16 dlid)
{
1511
	struct rdma_ah_attr attr;
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Mike Marciniszyn 已提交
1512
	struct ib_ah *ah = ERR_PTR(-EINVAL);
1513
	struct rvt_qp *qp0;
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Mike Marciniszyn 已提交
1514 1515 1516 1517 1518

	memset(&attr, 0, sizeof(attr));
	attr.dlid = dlid;
	attr.port_num = ppd_from_ibp(ibp)->port;
	rcu_read_lock();
1519
	qp0 = rcu_dereference(ibp->rvp.qp[0]);
M
Mike Marciniszyn 已提交
1520
	if (qp0)
1521
		ah = rdma_create_ah(qp0->ibqp.pd, &attr);
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Mike Marciniszyn 已提交
1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545
	rcu_read_unlock();
	return ah;
}

/**
 * hfi1_get_npkeys - return the size of the PKEY table for context 0
 * @dd: the hfi1_ib device
 */
unsigned hfi1_get_npkeys(struct hfi1_devdata *dd)
{
	return ARRAY_SIZE(dd->pport[0].pkeys);
}

static void init_ibport(struct hfi1_pportdata *ppd)
{
	struct hfi1_ibport *ibp = &ppd->ibport_data;
	size_t sz = ARRAY_SIZE(ibp->sl_to_sc);
	int i;

	for (i = 0; i < sz; i++) {
		ibp->sl_to_sc[i] = i;
		ibp->sc_to_sl[i] = i;
	}

1546
	spin_lock_init(&ibp->rvp.lock);
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Mike Marciniszyn 已提交
1547
	/* Set the prefix to the default value (see ch. 4.1.1) */
1548 1549
	ibp->rvp.gid_prefix = IB_DEFAULT_GID_PREFIX;
	ibp->rvp.sm_lid = 0;
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Mike Marciniszyn 已提交
1550
	/* Below should only set bits defined in OPA PortInfo.CapabilityMask */
1551
	ibp->rvp.port_cap_flags = IB_PORT_AUTO_MIGR_SUP |
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Mike Marciniszyn 已提交
1552
		IB_PORT_CAP_MASK_NOTICE_SUP;
1553 1554 1555 1556 1557 1558 1559 1560
	ibp->rvp.pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
	ibp->rvp.pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
	ibp->rvp.pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
	ibp->rvp.pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
	ibp->rvp.pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;

	RCU_INIT_POINTER(ibp->rvp.qp[0], NULL);
	RCU_INIT_POINTER(ibp->rvp.qp[1], NULL);
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Mike Marciniszyn 已提交
1561 1562
}

1563 1564 1565 1566 1567
static void hfi1_get_dev_fw_str(struct ib_device *ibdev, char *str,
				size_t str_len)
{
	struct rvt_dev_info *rdi = ib_to_rvt(ibdev);
	struct hfi1_ibdev *dev = dev_from_rdi(rdi);
1568
	u32 ver = dd_from_dev(dev)->dc8051_ver;
1569

1570 1571
	snprintf(str, str_len, "%u.%u.%u", dc8051_ver_maj(ver),
		 dc8051_ver_min(ver), dc8051_ver_patch(ver));
1572 1573
}

1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587
static const char * const driver_cntr_names[] = {
	/* must be element 0*/
	"DRIVER_KernIntr",
	"DRIVER_ErrorIntr",
	"DRIVER_Tx_Errs",
	"DRIVER_Rcv_Errs",
	"DRIVER_HW_Errs",
	"DRIVER_NoPIOBufs",
	"DRIVER_CtxtsOpen",
	"DRIVER_RcvLen_Errs",
	"DRIVER_EgrBufFull",
	"DRIVER_EgrHdrFull"
};

1588
static DEFINE_MUTEX(cntr_names_lock); /* protects the *_cntr_names bufers */
1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601
static const char **dev_cntr_names;
static const char **port_cntr_names;
static int num_driver_cntrs = ARRAY_SIZE(driver_cntr_names);
static int num_dev_cntrs;
static int num_port_cntrs;
static int cntr_names_initialized;

/*
 * Convert a list of names separated by '\n' into an array of NULL terminated
 * strings. Optionally some entries can be reserved in the array to hold extra
 * external strings.
 */
static int init_cntr_names(const char *names_in,
1602
			   const size_t names_len,
1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642
			   int num_extra_names,
			   int *num_cntrs,
			   const char ***cntr_names)
{
	char *names_out, *p, **q;
	int i, n;

	n = 0;
	for (i = 0; i < names_len; i++)
		if (names_in[i] == '\n')
			n++;

	names_out = kmalloc((n + num_extra_names) * sizeof(char *) + names_len,
			    GFP_KERNEL);
	if (!names_out) {
		*num_cntrs = 0;
		*cntr_names = NULL;
		return -ENOMEM;
	}

	p = names_out + (n + num_extra_names) * sizeof(char *);
	memcpy(p, names_in, names_len);

	q = (char **)names_out;
	for (i = 0; i < n; i++) {
		q[i] = p;
		p = strchr(p, '\n');
		*p++ = '\0';
	}

	*num_cntrs = n;
	*cntr_names = (const char **)names_out;
	return 0;
}

static struct rdma_hw_stats *alloc_hw_stats(struct ib_device *ibdev,
					    u8 port_num)
{
	int i, err;

1643
	mutex_lock(&cntr_names_lock);
1644 1645 1646 1647 1648 1649 1650 1651
	if (!cntr_names_initialized) {
		struct hfi1_devdata *dd = dd_from_ibdev(ibdev);

		err = init_cntr_names(dd->cntrnames,
				      dd->cntrnameslen,
				      num_driver_cntrs,
				      &num_dev_cntrs,
				      &dev_cntr_names);
1652 1653
		if (err) {
			mutex_unlock(&cntr_names_lock);
1654
			return NULL;
1655
		}
1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668

		for (i = 0; i < num_driver_cntrs; i++)
			dev_cntr_names[num_dev_cntrs + i] =
				driver_cntr_names[i];

		err = init_cntr_names(dd->portcntrnames,
				      dd->portcntrnameslen,
				      0,
				      &num_port_cntrs,
				      &port_cntr_names);
		if (err) {
			kfree(dev_cntr_names);
			dev_cntr_names = NULL;
1669
			mutex_unlock(&cntr_names_lock);
1670 1671 1672 1673
			return NULL;
		}
		cntr_names_initialized = 1;
	}
1674
	mutex_unlock(&cntr_names_lock);
1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727

	if (!port_num)
		return rdma_alloc_hw_stats_struct(
				dev_cntr_names,
				num_dev_cntrs + num_driver_cntrs,
				RDMA_HW_STATS_DEFAULT_LIFESPAN);
	else
		return rdma_alloc_hw_stats_struct(
				port_cntr_names,
				num_port_cntrs,
				RDMA_HW_STATS_DEFAULT_LIFESPAN);
}

static u64 hfi1_sps_ints(void)
{
	unsigned long flags;
	struct hfi1_devdata *dd;
	u64 sps_ints = 0;

	spin_lock_irqsave(&hfi1_devs_lock, flags);
	list_for_each_entry(dd, &hfi1_dev_list, list) {
		sps_ints += get_all_cpu_total(dd->int_counter);
	}
	spin_unlock_irqrestore(&hfi1_devs_lock, flags);
	return sps_ints;
}

static int get_hw_stats(struct ib_device *ibdev, struct rdma_hw_stats *stats,
			u8 port, int index)
{
	u64 *values;
	int count;

	if (!port) {
		u64 *stats = (u64 *)&hfi1_stats;
		int i;

		hfi1_read_cntrs(dd_from_ibdev(ibdev), NULL, &values);
		values[num_dev_cntrs] = hfi1_sps_ints();
		for (i = 1; i < num_driver_cntrs; i++)
			values[num_dev_cntrs + i] = stats[i];
		count = num_dev_cntrs + num_driver_cntrs;
	} else {
		struct hfi1_ibport *ibp = to_iport(ibdev, port);

		hfi1_read_portcntrs(ppd_from_ibp(ibp), NULL, &values);
		count = num_port_cntrs;
	}

	memcpy(stats->value, values, count * sizeof(u64));
	return count;
}

M
Mike Marciniszyn 已提交
1728 1729 1730 1731 1732 1733 1734 1735
/**
 * hfi1_register_ib_device - register our device with the infiniband core
 * @dd: the device data structure
 * Return 0 if successful, errno if unsuccessful.
 */
int hfi1_register_ib_device(struct hfi1_devdata *dd)
{
	struct hfi1_ibdev *dev = &dd->verbs_dev;
1736
	struct ib_device *ibdev = &dev->rdi.ibdev;
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Mike Marciniszyn 已提交
1737
	struct hfi1_pportdata *ppd = dd->pport;
1738
	struct hfi1_ibport *ibp = &ppd->ibport_data;
1739
	unsigned i;
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Mike Marciniszyn 已提交
1740 1741 1742 1743 1744 1745 1746
	int ret;
	size_t lcpysz = IB_DEVICE_NAME_MAX;

	for (i = 0; i < dd->num_pports; i++)
		init_ibport(ppd + i);

	/* Only need to initialize non-zero fields. */
1747

1748
	setup_timer(&dev->mem_timer, mem_timer, (unsigned long)dev);
M
Mike Marciniszyn 已提交
1749 1750

	seqlock_init(&dev->iowait_lock);
1751
	seqlock_init(&dev->txwait_lock);
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Mike Marciniszyn 已提交
1752 1753 1754
	INIT_LIST_HEAD(&dev->txwait);
	INIT_LIST_HEAD(&dev->memwait);

1755 1756
	ret = verbs_txreq_init(dev);
	if (ret)
M
Mike Marciniszyn 已提交
1757 1758
		goto err_verbs_txreq;

1759 1760 1761
	/* Use first-port GUID as node guid */
	ibdev->node_guid = get_sguid(ibp, HFI1_PORT_GUID_INDEX);

M
Mike Marciniszyn 已提交
1762 1763 1764 1765 1766 1767
	/*
	 * The system image GUID is supposed to be the same for all
	 * HFIs in a single system but since there can be other
	 * device types in the system, we can't be sure this is unique.
	 */
	if (!ib_hfi1_sys_image_guid)
1768
		ib_hfi1_sys_image_guid = ibdev->node_guid;
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Mike Marciniszyn 已提交
1769 1770 1771 1772
	lcpysz = strlcpy(ibdev->name, class_name(), lcpysz);
	strlcpy(ibdev->name + lcpysz, "_%d", IB_DEVICE_NAME_MAX - lcpysz);
	ibdev->owner = THIS_MODULE;
	ibdev->phys_port_cnt = dd->num_pports;
1773
	ibdev->dev.parent = &dd->pcidev->dev;
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Mike Marciniszyn 已提交
1774
	ibdev->modify_device = modify_device;
1775 1776
	ibdev->alloc_hw_stats = alloc_hw_stats;
	ibdev->get_hw_stats = get_hw_stats;
1777 1778
	ibdev->alloc_rdma_netdev = hfi1_vnic_alloc_rn;
	ibdev->free_rdma_netdev = hfi1_vnic_free_rn;
1779 1780

	/* keep process mad in the driver */
M
Mike Marciniszyn 已提交
1781
	ibdev->process_mad = hfi1_process_mad;
1782
	ibdev->get_dev_fw_str = hfi1_get_dev_fw_str;
M
Mike Marciniszyn 已提交
1783 1784 1785 1786

	strncpy(ibdev->node_desc, init_utsname()->nodename,
		sizeof(ibdev->node_desc));

1787 1788 1789 1790
	/*
	 * Fill in rvt info object.
	 */
	dd->verbs_dev.rdi.driver_f.port_callback = hfi1_create_port_files;
1791 1792
	dd->verbs_dev.rdi.driver_f.get_card_name = get_card_name;
	dd->verbs_dev.rdi.driver_f.get_pci_dev = get_pci_dev;
1793
	dd->verbs_dev.rdi.driver_f.check_ah = hfi1_check_ah;
1794
	dd->verbs_dev.rdi.driver_f.notify_new_ah = hfi1_notify_new_ah;
1795
	dd->verbs_dev.rdi.driver_f.get_guid_be = hfi1_get_guid_be;
1796 1797 1798
	dd->verbs_dev.rdi.driver_f.query_port_state = query_port;
	dd->verbs_dev.rdi.driver_f.shut_down_port = shut_down_port;
	dd->verbs_dev.rdi.driver_f.cap_mask_chg = hfi1_cap_mask_chg;
1799 1800 1801 1802
	/*
	 * Fill in rvt info device attributes.
	 */
	hfi1_fill_device_attr(dd);
1803 1804 1805 1806 1807 1808 1809 1810

	/* queue pair */
	dd->verbs_dev.rdi.dparms.qp_table_size = hfi1_qp_table_size;
	dd->verbs_dev.rdi.dparms.qpn_start = 0;
	dd->verbs_dev.rdi.dparms.qpn_inc = 1;
	dd->verbs_dev.rdi.dparms.qos_shift = dd->qos_shift;
	dd->verbs_dev.rdi.dparms.qpn_res_start = kdeth_qp << 16;
	dd->verbs_dev.rdi.dparms.qpn_res_end =
1811
	dd->verbs_dev.rdi.dparms.qpn_res_start + 65535;
1812 1813 1814 1815
	dd->verbs_dev.rdi.dparms.max_rdma_atomic = HFI1_MAX_RDMA_ATOMIC;
	dd->verbs_dev.rdi.dparms.psn_mask = PSN_MASK;
	dd->verbs_dev.rdi.dparms.psn_shift = PSN_SHIFT;
	dd->verbs_dev.rdi.dparms.psn_modify_mask = PSN_MODIFY_MASK;
1816 1817 1818
	dd->verbs_dev.rdi.dparms.core_cap_flags = RDMA_CORE_PORT_INTEL_OPA;
	dd->verbs_dev.rdi.dparms.max_mad_size = OPA_MGMT_MAD_SIZE;

1819 1820 1821 1822
	dd->verbs_dev.rdi.driver_f.qp_priv_alloc = qp_priv_alloc;
	dd->verbs_dev.rdi.driver_f.qp_priv_free = qp_priv_free;
	dd->verbs_dev.rdi.driver_f.free_all_qps = free_all_qps;
	dd->verbs_dev.rdi.driver_f.notify_qp_reset = notify_qp_reset;
1823
	dd->verbs_dev.rdi.driver_f.do_send = hfi1_do_send_from_rvt;
1824
	dd->verbs_dev.rdi.driver_f.schedule_send = hfi1_schedule_send;
1825
	dd->verbs_dev.rdi.driver_f.schedule_send_no_lock = _hfi1_schedule_send;
1826 1827 1828 1829 1830 1831 1832 1833 1834 1835
	dd->verbs_dev.rdi.driver_f.get_pmtu_from_attr = get_pmtu_from_attr;
	dd->verbs_dev.rdi.driver_f.notify_error_qp = notify_error_qp;
	dd->verbs_dev.rdi.driver_f.flush_qp_waiters = flush_qp_waiters;
	dd->verbs_dev.rdi.driver_f.stop_send_queue = stop_send_queue;
	dd->verbs_dev.rdi.driver_f.quiesce_qp = quiesce_qp;
	dd->verbs_dev.rdi.driver_f.notify_error_qp = notify_error_qp;
	dd->verbs_dev.rdi.driver_f.mtu_from_qp = mtu_from_qp;
	dd->verbs_dev.rdi.driver_f.mtu_to_path_mtu = mtu_to_path_mtu;
	dd->verbs_dev.rdi.driver_f.check_modify_qp = hfi1_check_modify_qp;
	dd->verbs_dev.rdi.driver_f.modify_qp = hfi1_modify_qp;
1836
	dd->verbs_dev.rdi.driver_f.notify_restart_rc = hfi1_restart_rc;
1837
	dd->verbs_dev.rdi.driver_f.check_send_wqe = hfi1_check_send_wqe;
1838

1839 1840 1841 1842
	/* completeion queue */
	snprintf(dd->verbs_dev.rdi.dparms.cq_name,
		 sizeof(dd->verbs_dev.rdi.dparms.cq_name),
		 "hfi1_cq%d", dd->unit);
1843
	dd->verbs_dev.rdi.dparms.node = dd->node;
1844

1845
	/* misc settings */
1846
	dd->verbs_dev.rdi.flags = 0; /* Let rdmavt handle it all */
1847
	dd->verbs_dev.rdi.dparms.lkey_table_size = hfi1_lkey_table_size;
1848 1849 1850
	dd->verbs_dev.rdi.dparms.nports = dd->num_pports;
	dd->verbs_dev.rdi.dparms.npkeys = hfi1_get_npkeys(dd);

1851 1852 1853
	/* post send table */
	dd->verbs_dev.rdi.post_parms = hfi1_post_parms;

1854 1855 1856 1857 1858 1859
	ppd = dd->pport;
	for (i = 0; i < dd->num_pports; i++, ppd++)
		rvt_init_port(&dd->verbs_dev.rdi,
			      &ppd->ibport_data.rvp,
			      i,
			      ppd->pkeys);
1860 1861

	ret = rvt_register_device(&dd->verbs_dev.rdi);
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Mike Marciniszyn 已提交
1862
	if (ret)
1863
		goto err_verbs_txreq;
M
Mike Marciniszyn 已提交
1864 1865 1866 1867 1868

	ret = hfi1_verbs_register_sysfs(dd);
	if (ret)
		goto err_class;

1869
	return ret;
M
Mike Marciniszyn 已提交
1870 1871

err_class:
1872
	rvt_unregister_device(&dd->verbs_dev.rdi);
M
Mike Marciniszyn 已提交
1873
err_verbs_txreq:
1874
	verbs_txreq_exit(dev);
M
Mike Marciniszyn 已提交
1875 1876 1877 1878 1879 1880 1881 1882 1883 1884
	dd_dev_err(dd, "cannot register verbs: %d!\n", -ret);
	return ret;
}

void hfi1_unregister_ib_device(struct hfi1_devdata *dd)
{
	struct hfi1_ibdev *dev = &dd->verbs_dev;

	hfi1_verbs_unregister_sysfs(dd);

1885
	rvt_unregister_device(&dd->verbs_dev.rdi);
M
Mike Marciniszyn 已提交
1886 1887 1888 1889 1890 1891 1892

	if (!list_empty(&dev->txwait))
		dd_dev_err(dd, "txwait list not empty!\n");
	if (!list_empty(&dev->memwait))
		dd_dev_err(dd, "memwait list not empty!\n");

	del_timer_sync(&dev->mem_timer);
1893
	verbs_txreq_exit(dev);
1894

1895
	mutex_lock(&cntr_names_lock);
1896 1897
	kfree(dev_cntr_names);
	kfree(port_cntr_names);
1898 1899
	dev_cntr_names = NULL;
	port_cntr_names = NULL;
1900
	cntr_names_initialized = 0;
1901
	mutex_unlock(&cntr_names_lock);
M
Mike Marciniszyn 已提交
1902 1903 1904 1905
}

void hfi1_cnp_rcv(struct hfi1_packet *packet)
{
1906
	struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd);
1907
	struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1908
	struct ib_header *hdr = packet->hdr;
1909
	struct rvt_qp *qp = packet->qp;
1910 1911
	u32 lqpn, rqpn = 0;
	u16 rlid = 0;
1912
	u8 sl, sc5, svc_type;
1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930

	switch (packet->qp->ibqp.qp_type) {
	case IB_QPT_UC:
		rlid = qp->remote_ah_attr.dlid;
		rqpn = qp->remote_qpn;
		svc_type = IB_CC_SVCTYPE_UC;
		break;
	case IB_QPT_RC:
		rlid = qp->remote_ah_attr.dlid;
		rqpn = qp->remote_qpn;
		svc_type = IB_CC_SVCTYPE_RC;
		break;
	case IB_QPT_SMI:
	case IB_QPT_GSI:
	case IB_QPT_UD:
		svc_type = IB_CC_SVCTYPE_UD;
		break;
	default:
1931
		ibp->rvp.n_pkt_drops++;
1932 1933 1934
		return;
	}

1935
	sc5 = hfi1_9B_get_sc5(hdr, packet->rhf);
1936 1937 1938 1939
	sl = ibp->sc_to_sl[sc5];
	lqpn = qp->ibqp.qp_num;

	process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
M
Mike Marciniszyn 已提交
1940
}