meson-gxbb.dtsi 11.3 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
/*
 * Copyright (c) 2016 Andreas Färber
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This library is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This library is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

43
#include "meson-gx.dtsi"
44
#include <dt-bindings/gpio/meson-gxbb-gpio.h>
45
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
46
#include <dt-bindings/clock/gxbb-clkc.h>
47 48
#include <dt-bindings/clock/gxbb-aoclkc.h>
#include <dt-bindings/reset/gxbb-aoclkc.h>
49 50 51 52

/ {
	compatible = "amlogic,meson-gxbb";

53 54 55 56 57 58
	firmware {
		sm: secure-monitor {
			compatible = "amlogic,meson-gxbb-sm";
		};
	};

59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76
	efuse: efuse {
		compatible = "amlogic,meson-gxbb-efuse";
		#address-cells = <1>;
		#size-cells = <1>;

		sn: sn@14 {
			reg = <0x14 0x10>;
		};

		eth_mac: eth_mac@34 {
			reg = <0x34 0x10>;
		};

		bid: bid@46 {
			reg = <0x46 0x30>;
		};
	};

77
	soc {
78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96
		usb0_phy: phy@c0000000 {
			compatible = "amlogic,meson-gxbb-usb2-phy";
			#phy-cells = <0>;
			reg = <0x0 0xc0000000 0x0 0x20>;
			resets = <&reset RESET_USB_OTG>;
			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
			clock-names = "usb_general", "usb";
			status = "disabled";
		};

		usb1_phy: phy@c0000020 {
			compatible = "amlogic,meson-gxbb-usb2-phy";
			#phy-cells = <0>;
			reg = <0x0 0xc0000020 0x0 0x20>;
			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
			clock-names = "usb_general", "usb";
			status = "disabled";
		};

97 98 99 100 101 102 103 104 105 106 107
		usb0: usb@c9000000 {
			compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
			reg = <0x0 0xc9000000 0x0 0x40000>;
			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
			clock-names = "otg";
			phys = <&usb0_phy>;
			phy-names = "usb2-phy";
			dr_mode = "host";
			status = "disabled";
		};
108

109 110 111 112 113 114 115 116 117 118 119
		usb1: usb@c9100000 {
			compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
			reg = <0x0 0xc9100000 0x0 0x40000>;
			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
			clock-names = "otg";
			phys = <&usb1_phy>;
			phy-names = "usb2-phy";
			dr_mode = "host";
			status = "disabled";
		};
120

121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232
		ethmac: ethernet@c9410000 {
			compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
			reg = <0x0 0xc9410000 0x0 0x10000
			       0x0 0xc8834540 0x0 0x4>;
			interrupts = <0 8 1>;
			interrupt-names = "macirq";
			clocks = <&clkc CLKID_ETH>,
				 <&clkc CLKID_FCLK_DIV2>,
				 <&clkc CLKID_MPLL2>;
			clock-names = "stmmaceth", "clkin0", "clkin1";
			phy-mode = "rgmii";
			status = "disabled";
		};
	};
};

&cbus {
	reset: reset-controller@4404 {
		compatible = "amlogic,meson-gxbb-reset";
		reg = <0x0 0x04404 0x0 0x20>;
		#reset-cells = <1>;
	};

	uart_B: serial@84dc {
		compatible = "amlogic,meson-uart";
		reg = <0x0 0x84dc 0x0 0x14>;
		interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
		clocks = <&xtal>;
		status = "disabled";
	};

	pwm_ab: pwm@8550 {
		compatible = "amlogic,meson-gxbb-pwm";
		reg = <0x0 0x08550 0x0 0x10>;
		#pwm-cells = <3>;
		status = "disabled";
	};

	pwm_cd: pwm@8650 {
		compatible = "amlogic,meson-gxbb-pwm";
		reg = <0x0 0x08650 0x0 0x10>;
		#pwm-cells = <3>;
		status = "disabled";
	};

	pwm_ef: pwm@86c0 {
		compatible = "amlogic,meson-gxbb-pwm";
		reg = <0x0 0x086c0 0x0 0x10>;
		#pwm-cells = <3>;
		status = "disabled";
	};

	uart_C: serial@8700 {
		compatible = "amlogic,meson-uart";
		reg = <0x0 0x8700 0x0 0x14>;
		interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
		clocks = <&xtal>;
		status = "disabled";
	};

	watchdog@98d0 {
		compatible = "amlogic,meson-gxbb-wdt";
		reg = <0x0 0x098d0 0x0 0x10>;
		clocks = <&xtal>;
	};

	spifc: spi@8c80 {
		compatible = "amlogic,meson-gxbb-spifc";
		reg = <0x0 0x08c80 0x0 0x80>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clkc CLKID_SPI>;
		status = "disabled";
	};

	i2c_A: i2c@8500 {
		compatible = "amlogic,meson-gxbb-i2c";
		reg = <0x0 0x08500 0x0 0x20>;
		interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
		clocks = <&clkc CLKID_I2C>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c_B: i2c@87c0 {
		compatible = "amlogic,meson-gxbb-i2c";
		reg = <0x0 0x087c0 0x0 0x20>;
		interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
		clocks = <&clkc CLKID_I2C>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c_C: i2c@87e0 {
		compatible = "amlogic,meson-gxbb-i2c";
		reg = <0x0 0x087e0 0x0 0x20>;
		interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
		clocks = <&clkc CLKID_I2C>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};

&aobus {
	pinctrl_aobus: pinctrl@14 {
		compatible = "amlogic,meson-gxbb-aobus-pinctrl";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
233

234 235 236 237 238 239 240 241 242 243 244 245 246
		gpio_ao: bank@14 {
			reg = <0x0 0x00014 0x0 0x8>,
			      <0x0 0x0002c 0x0 0x4>,
			      <0x0 0x00024 0x0 0x8>;
			reg-names = "mux", "pull", "gpio";
			gpio-controller;
			#gpio-cells = <2>;
		};

		uart_ao_a_pins: uart_ao_a {
			mux {
				groups = "uart_tx_ao_a", "uart_rx_ao_a";
				function = "uart_ao";
247
			};
248
		};
249

250 251 252 253
		remote_input_ao_pins: remote_input_ao {
			mux {
				groups = "remote_input_ao";
				function = "remote_input_ao";
254
			};
255
		};
256

257 258 259 260 261
		i2c_ao_pins: i2c_ao {
			mux {
				groups = "i2c_sck_ao",
				       "i2c_sda_ao";
				function = "i2c_ao";
262
			};
263
		};
264

265 266 267 268
		pwm_ao_a_3_pins: pwm_ao_a_3 {
			mux {
				groups = "pwm_ao_a_3";
				function = "pwm_ao_a_3";
269
			};
270
		};
271

272 273 274 275
		pwm_ao_a_6_pins: pwm_ao_a_6 {
			mux {
				groups = "pwm_ao_a_6";
				function = "pwm_ao_a_6";
276
			};
277
		};
278

279 280 281 282
		pwm_ao_a_12_pins: pwm_ao_a_12 {
			mux {
				groups = "pwm_ao_a_12";
				function = "pwm_ao_a_12";
283
			};
284
		};
285

286 287 288 289
		pwm_ao_b_pins: pwm_ao_b {
			mux {
				groups = "pwm_ao_b";
				function = "pwm_ao_b";
290
			};
291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346
		};
	};

	clkc_AO: clock-controller@040 {
		compatible = "amlogic,gxbb-aoclkc";
		reg = <0x0 0x00040 0x0 0x4>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	ir: ir@580 {
		compatible = "amlogic,meson-gxbb-ir";
		reg = <0x0 0x00580 0x0 0x40>;
		interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
		status = "disabled";
	};

	pwm_ab_AO: pwm@550 {
		compatible = "amlogic,meson-gxbb-pwm";
		reg = <0x0 0x0550 0x0 0x10>;
		#pwm-cells = <3>;
		status = "disabled";
	};

	i2c_AO: i2c@500 {
		compatible = "amlogic,meson-gxbb-i2c";
		reg = <0x0 0x500 0x0 0x20>;
		interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
		clocks = <&clkc CLKID_AO_I2C>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};

&periphs {
	rng {
		compatible = "amlogic,meson-rng";
		reg = <0x0 0x0 0x0 0x4>;
	};

	pinctrl_periphs: pinctrl@4b0 {
		compatible = "amlogic,meson-gxbb-periphs-pinctrl";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		gpio: bank@4b0 {
			reg = <0x0 0x004b0 0x0 0x28>,
			      <0x0 0x004e8 0x0 0x14>,
			      <0x0 0x00120 0x0 0x14>,
			      <0x0 0x00430 0x0 0x40>;
			reg-names = "mux", "pull", "pull-enable", "gpio";
			gpio-controller;
			#gpio-cells = <2>;
		};
347

348 349 350 351 352 353
		emmc_pins: emmc {
			mux {
				groups = "emmc_nand_d07",
				       "emmc_cmd",
				       "emmc_clk";
				function = "emmc";
354
			};
355
		};
356

357 358 359 360 361 362 363
		nor_pins: nor {
			mux {
				groups = "nor_d",
				       "nor_q",
				       "nor_c",
				       "nor_cs";
				function = "nor";
364
			};
365
		};
366

367 368 369 370 371 372 373 374 375
		sdcard_pins: sdcard {
			mux {
				groups = "sdcard_d0",
				       "sdcard_d1",
				       "sdcard_d2",
				       "sdcard_d3",
				       "sdcard_cmd",
				       "sdcard_clk";
				function = "sdcard";
376
			};
377 378
		};

379 380 381 382 383 384 385 386 387
		sdio_pins: sdio {
			mux {
				groups = "sdio_d0",
				       "sdio_d1",
				       "sdio_d2",
				       "sdio_d3",
				       "sdio_cmd",
				       "sdio_clk";
				function = "sdio";
388
			};
389
		};
390

391 392 393 394
		sdio_irq_pins: sdio_irq {
			mux {
				groups = "sdio_irq";
				function = "sdio";
395
			};
396
		};
397

398 399 400 401 402
		uart_a_pins: uart_a {
			mux {
				groups = "uart_tx_a",
				       "uart_rx_a";
				function = "uart_a";
403
			};
404
		};
405

406 407 408 409 410
		uart_b_pins: uart_b {
			mux {
				groups = "uart_tx_b",
				       "uart_rx_b";
				function = "uart_b";
411
			};
412
		};
413

414 415 416 417 418
		uart_c_pins: uart_c {
			mux {
				groups = "uart_tx_c",
				       "uart_rx_c";
				function = "uart_c";
419
			};
420
		};
421

422 423 424 425 426
		i2c_a_pins: i2c_a {
			mux {
				groups = "i2c_sck_a",
				       "i2c_sda_a";
				function = "i2c_a";
427
			};
428 429
		};

430 431 432 433 434 435 436
		i2c_b_pins: i2c_b {
			mux {
				groups = "i2c_sck_b",
				       "i2c_sda_b";
				function = "i2c_b";
			};
		};
437

438 439 440 441 442
		i2c_c_pins: i2c_c {
			mux {
				groups = "i2c_sck_c",
				       "i2c_sda_c";
				function = "i2c_c";
443
			};
444
		};
445

446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462
		eth_pins: eth_c {
			mux {
				groups = "eth_mdio",
				       "eth_mdc",
				       "eth_clk_rx_clk",
				       "eth_rx_dv",
				       "eth_rxd0",
				       "eth_rxd1",
				       "eth_rxd2",
				       "eth_rxd3",
				       "eth_rgmii_tx_clk",
				       "eth_tx_en",
				       "eth_txd0",
				       "eth_txd1",
				       "eth_txd2",
				       "eth_txd3";
				function = "eth";
463
			};
464 465
		};

466 467 468 469 470 471
		pwm_a_x_pins: pwm_a_x {
			mux {
				groups = "pwm_a_x";
				function = "pwm_a_x";
			};
		};
472

473 474 475 476
		pwm_a_y_pins: pwm_a_y {
			mux {
				groups = "pwm_a_y";
				function = "pwm_a_y";
477
			};
478
		};
479

480 481 482 483
		pwm_b_pins: pwm_b {
			mux {
				groups = "pwm_b";
				function = "pwm_b";
484
			};
485 486
		};

487 488 489 490 491
		pwm_d_pins: pwm_d {
			mux {
				groups = "pwm_d";
				function = "pwm_d";
			};
492
		};
493

494 495 496 497 498
		pwm_e_pins: pwm_e {
			mux {
				groups = "pwm_e";
				function = "pwm_e";
			};
499 500
		};

501 502 503 504 505
		pwm_f_x_pins: pwm_f_x {
			mux {
				groups = "pwm_f_x";
				function = "pwm_f_x";
			};
506 507
		};

508 509 510 511 512
		pwm_f_y_pins: pwm_f_y {
			mux {
				groups = "pwm_f_y";
				function = "pwm_f_y";
			};
513
		};
514 515
	};
};
516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532

&hiubus {
	clkc: clock-controller@0 {
		compatible = "amlogic,gxbb-clkc";
		#clock-cells = <1>;
		reg = <0x0 0x0 0x0 0x3db>;
	};

	mailbox: mailbox@404 {
		compatible = "amlogic,meson-gxbb-mhu";
		reg = <0 0x404 0 0x4c>;
		interrupts = <0 208 IRQ_TYPE_EDGE_RISING>,
			     <0 209 IRQ_TYPE_EDGE_RISING>,
			     <0 210 IRQ_TYPE_EDGE_RISING>;
		#mbox-cells = <1>;
	};
};