vmx.c 67.7 KB
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/*
 * Kernel-based Virtual Machine driver for Linux
 *
 * This module enables machines with Intel VT-x extensions to run virtual
 * machines without emulation or binary translation.
 *
 * Copyright (C) 2006 Qumranet, Inc.
 *
 * Authors:
 *   Avi Kivity   <avi@qumranet.com>
 *   Yaniv Kamay  <yaniv@qumranet.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 */

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#include "irq.h"
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#include "vmx.h"
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#include "segment_descriptor.h"
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#include "mmu.h"
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#include <linux/kvm_host.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
#include <linux/highmem.h>
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#include <linux/sched.h>
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#include <linux/moduleparam.h>
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#include <asm/io.h>
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#include <asm/desc.h>
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MODULE_AUTHOR("Qumranet");
MODULE_LICENSE("GPL");

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static int bypass_guest_pf = 1;
module_param(bypass_guest_pf, bool, 0);

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struct vmcs {
	u32 revision_id;
	u32 abort;
	char data[0];
};

struct vcpu_vmx {
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	struct kvm_vcpu       vcpu;
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	int                   launched;
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	u8                    fail;
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	u32                   idt_vectoring_info;
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	struct kvm_msr_entry *guest_msrs;
	struct kvm_msr_entry *host_msrs;
	int                   nmsrs;
	int                   save_nmsrs;
	int                   msr_offset_efer;
#ifdef CONFIG_X86_64
	int                   msr_offset_kernel_gs_base;
#endif
	struct vmcs          *vmcs;
	struct {
		int           loaded;
		u16           fs_sel, gs_sel, ldt_sel;
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		int           gs_ldt_reload_needed;
		int           fs_reload_needed;
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		int           guest_efer_loaded;
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	} host_state;
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	struct {
		struct {
			bool pending;
			u8 vector;
			unsigned rip;
		} irq;
	} rmode;
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};

static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
{
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	return container_of(vcpu, struct vcpu_vmx, vcpu);
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}

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static int init_rmode_tss(struct kvm *kvm);

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static DEFINE_PER_CPU(struct vmcs *, vmxarea);
static DEFINE_PER_CPU(struct vmcs *, current_vmcs);

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static struct page *vmx_io_bitmap_a;
static struct page *vmx_io_bitmap_b;

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static struct vmcs_config {
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	int size;
	int order;
	u32 revision_id;
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	u32 pin_based_exec_ctrl;
	u32 cpu_based_exec_ctrl;
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	u32 cpu_based_2nd_exec_ctrl;
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	u32 vmexit_ctrl;
	u32 vmentry_ctrl;
} vmcs_config;
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#define VMX_SEGMENT_FIELD(seg)					\
	[VCPU_SREG_##seg] = {                                   \
		.selector = GUEST_##seg##_SELECTOR,		\
		.base = GUEST_##seg##_BASE,		   	\
		.limit = GUEST_##seg##_LIMIT,		   	\
		.ar_bytes = GUEST_##seg##_AR_BYTES,	   	\
	}

static struct kvm_vmx_segment_field {
	unsigned selector;
	unsigned base;
	unsigned limit;
	unsigned ar_bytes;
} kvm_vmx_segment_fields[] = {
	VMX_SEGMENT_FIELD(CS),
	VMX_SEGMENT_FIELD(DS),
	VMX_SEGMENT_FIELD(ES),
	VMX_SEGMENT_FIELD(FS),
	VMX_SEGMENT_FIELD(GS),
	VMX_SEGMENT_FIELD(SS),
	VMX_SEGMENT_FIELD(TR),
	VMX_SEGMENT_FIELD(LDTR),
};

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/*
 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
 * away by decrementing the array size.
 */
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static const u32 vmx_msr_index[] = {
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#ifdef CONFIG_X86_64
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	MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
#endif
	MSR_EFER, MSR_K6_STAR,
};
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#define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
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static void load_msrs(struct kvm_msr_entry *e, int n)
{
	int i;

	for (i = 0; i < n; ++i)
		wrmsrl(e[i].index, e[i].data);
}

static void save_msrs(struct kvm_msr_entry *e, int n)
{
	int i;

	for (i = 0; i < n; ++i)
		rdmsrl(e[i].index, e[i].data);
}

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static inline int is_page_fault(u32 intr_info)
{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
			     INTR_INFO_VALID_MASK)) ==
		(INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
}

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static inline int is_no_device(u32 intr_info)
{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
			     INTR_INFO_VALID_MASK)) ==
		(INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
}

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static inline int is_invalid_opcode(u32 intr_info)
{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
			     INTR_INFO_VALID_MASK)) ==
		(INTR_TYPE_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
}

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static inline int is_external_interrupt(u32 intr_info)
{
	return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
		== (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
}

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static inline int cpu_has_vmx_tpr_shadow(void)
{
	return (vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW);
}

static inline int vm_need_tpr_shadow(struct kvm *kvm)
{
	return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)));
}

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static inline int cpu_has_secondary_exec_ctrls(void)
{
	return (vmcs_config.cpu_based_exec_ctrl &
		CPU_BASED_ACTIVATE_SECONDARY_CONTROLS);
}

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static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
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{
	return (vmcs_config.cpu_based_2nd_exec_ctrl &
		SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES);
}

static inline int vm_need_virtualize_apic_accesses(struct kvm *kvm)
{
	return ((cpu_has_vmx_virtualize_apic_accesses()) &&
		(irqchip_in_kernel(kvm)));
}

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static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
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{
	int i;

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	for (i = 0; i < vmx->nmsrs; ++i)
		if (vmx->guest_msrs[i].index == msr)
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			return i;
	return -1;
}

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static struct kvm_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
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{
	int i;

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	i = __find_msr_index(vmx, msr);
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	if (i >= 0)
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		return &vmx->guest_msrs[i];
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	return NULL;
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}

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static void vmcs_clear(struct vmcs *vmcs)
{
	u64 phys_addr = __pa(vmcs);
	u8 error;

	asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
		      : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
		      : "cc", "memory");
	if (error)
		printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
		       vmcs, phys_addr);
}

static void __vcpu_clear(void *arg)
{
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	struct vcpu_vmx *vmx = arg;
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	int cpu = raw_smp_processor_id();
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	if (vmx->vcpu.cpu == cpu)
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		vmcs_clear(vmx->vmcs);
	if (per_cpu(current_vmcs, cpu) == vmx->vmcs)
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		per_cpu(current_vmcs, cpu) = NULL;
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	rdtscll(vmx->vcpu.arch.host_tsc);
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}

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static void vcpu_clear(struct vcpu_vmx *vmx)
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{
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	if (vmx->vcpu.cpu == -1)
		return;
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	smp_call_function_single(vmx->vcpu.cpu, __vcpu_clear, vmx, 0, 1);
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	vmx->launched = 0;
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}

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static unsigned long vmcs_readl(unsigned long field)
{
	unsigned long value;

	asm volatile (ASM_VMX_VMREAD_RDX_RAX
		      : "=a"(value) : "d"(field) : "cc");
	return value;
}

static u16 vmcs_read16(unsigned long field)
{
	return vmcs_readl(field);
}

static u32 vmcs_read32(unsigned long field)
{
	return vmcs_readl(field);
}

static u64 vmcs_read64(unsigned long field)
{
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#ifdef CONFIG_X86_64
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	return vmcs_readl(field);
#else
	return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
#endif
}

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static noinline void vmwrite_error(unsigned long field, unsigned long value)
{
	printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
	       field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
	dump_stack();
}

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static void vmcs_writel(unsigned long field, unsigned long value)
{
	u8 error;

	asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
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		       : "=q"(error) : "a"(value), "d"(field) : "cc");
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	if (unlikely(error))
		vmwrite_error(field, value);
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}

static void vmcs_write16(unsigned long field, u16 value)
{
	vmcs_writel(field, value);
}

static void vmcs_write32(unsigned long field, u32 value)
{
	vmcs_writel(field, value);
}

static void vmcs_write64(unsigned long field, u64 value)
{
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#ifdef CONFIG_X86_64
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	vmcs_writel(field, value);
#else
	vmcs_writel(field, value);
	asm volatile ("");
	vmcs_writel(field+1, value >> 32);
#endif
}

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static void vmcs_clear_bits(unsigned long field, u32 mask)
{
	vmcs_writel(field, vmcs_readl(field) & ~mask);
}

static void vmcs_set_bits(unsigned long field, u32 mask)
{
	vmcs_writel(field, vmcs_readl(field) | mask);
}

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static void update_exception_bitmap(struct kvm_vcpu *vcpu)
{
	u32 eb;

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	eb = (1u << PF_VECTOR) | (1u << UD_VECTOR);
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	if (!vcpu->fpu_active)
		eb |= 1u << NM_VECTOR;
	if (vcpu->guest_debug.enabled)
		eb |= 1u << 1;
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	if (vcpu->arch.rmode.active)
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		eb = ~0;
	vmcs_write32(EXCEPTION_BITMAP, eb);
}

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static void reload_tss(void)
{
	/*
	 * VT restores TR but not its size.  Useless.
	 */
	struct descriptor_table gdt;
	struct segment_descriptor *descs;

	get_gdt(&gdt);
	descs = (void *)gdt.base;
	descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
	load_TR_desc();
}

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static void load_transition_efer(struct vcpu_vmx *vmx)
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{
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	int efer_offset = vmx->msr_offset_efer;
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	u64 host_efer = vmx->host_msrs[efer_offset].data;
	u64 guest_efer = vmx->guest_msrs[efer_offset].data;
	u64 ignore_bits;

	if (efer_offset < 0)
		return;
	/*
	 * NX is emulated; LMA and LME handled by hardware; SCE meaninless
	 * outside long mode
	 */
	ignore_bits = EFER_NX | EFER_SCE;
#ifdef CONFIG_X86_64
	ignore_bits |= EFER_LMA | EFER_LME;
	/* SCE is meaningful only in long mode on Intel */
	if (guest_efer & EFER_LMA)
		ignore_bits &= ~(u64)EFER_SCE;
#endif
	if ((guest_efer & ~ignore_bits) == (host_efer & ~ignore_bits))
		return;
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	vmx->host_state.guest_efer_loaded = 1;
	guest_efer &= ~ignore_bits;
	guest_efer |= host_efer & ignore_bits;
	wrmsrl(MSR_EFER, guest_efer);
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	vmx->vcpu.stat.efer_reload++;
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}

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static void reload_host_efer(struct vcpu_vmx *vmx)
{
	if (vmx->host_state.guest_efer_loaded) {
		vmx->host_state.guest_efer_loaded = 0;
		load_msrs(vmx->host_msrs + vmx->msr_offset_efer, 1);
	}
}

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static void vmx_save_host_state(struct kvm_vcpu *vcpu)
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{
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	struct vcpu_vmx *vmx = to_vmx(vcpu);

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	if (vmx->host_state.loaded)
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		return;

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	vmx->host_state.loaded = 1;
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	/*
	 * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
	 * allow segment selectors with cpl > 0 or ti == 1.
	 */
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	vmx->host_state.ldt_sel = read_ldt();
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	vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
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	vmx->host_state.fs_sel = read_fs();
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	if (!(vmx->host_state.fs_sel & 7)) {
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		vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
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		vmx->host_state.fs_reload_needed = 0;
	} else {
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		vmcs_write16(HOST_FS_SELECTOR, 0);
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		vmx->host_state.fs_reload_needed = 1;
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	}
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	vmx->host_state.gs_sel = read_gs();
	if (!(vmx->host_state.gs_sel & 7))
		vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
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	else {
		vmcs_write16(HOST_GS_SELECTOR, 0);
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		vmx->host_state.gs_ldt_reload_needed = 1;
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	}

#ifdef CONFIG_X86_64
	vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
	vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
#else
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	vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
	vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
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#endif
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#ifdef CONFIG_X86_64
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	if (is_long_mode(&vmx->vcpu))
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		save_msrs(vmx->host_msrs +
			  vmx->msr_offset_kernel_gs_base, 1);
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#endif
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	load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
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	load_transition_efer(vmx);
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}

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static void vmx_load_host_state(struct vcpu_vmx *vmx)
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{
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	unsigned long flags;
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	if (!vmx->host_state.loaded)
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		return;

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	++vmx->vcpu.stat.host_state_reload;
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	vmx->host_state.loaded = 0;
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	if (vmx->host_state.fs_reload_needed)
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		load_fs(vmx->host_state.fs_sel);
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	if (vmx->host_state.gs_ldt_reload_needed) {
		load_ldt(vmx->host_state.ldt_sel);
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		/*
		 * If we have to reload gs, we must take care to
		 * preserve our gs base.
		 */
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		local_irq_save(flags);
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		load_gs(vmx->host_state.gs_sel);
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#ifdef CONFIG_X86_64
		wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
#endif
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		local_irq_restore(flags);
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	}
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	reload_tss();
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	save_msrs(vmx->guest_msrs, vmx->save_nmsrs);
	load_msrs(vmx->host_msrs, vmx->save_nmsrs);
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	reload_host_efer(vmx);
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}

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/*
 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 * vcpu mutex is already taken.
 */
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static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
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{
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	struct vcpu_vmx *vmx = to_vmx(vcpu);
	u64 phys_addr = __pa(vmx->vmcs);
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	u64 tsc_this, delta;
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	if (vcpu->cpu != cpu) {
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		vcpu_clear(vmx);
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		kvm_migrate_apic_timer(vcpu);
	}
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	if (per_cpu(current_vmcs, cpu) != vmx->vmcs) {
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		u8 error;

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		per_cpu(current_vmcs, cpu) = vmx->vmcs;
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		asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
			      : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
			      : "cc");
		if (error)
			printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
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			       vmx->vmcs, phys_addr);
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	}

	if (vcpu->cpu != cpu) {
		struct descriptor_table dt;
		unsigned long sysenter_esp;

		vcpu->cpu = cpu;
		/*
		 * Linux uses per-cpu TSS and GDT, so set these when switching
		 * processors.
		 */
		vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
		get_gdt(&dt);
		vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */

		rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
		vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
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		/*
		 * Make sure the time stamp counter is monotonous.
		 */
		rdtscll(tsc_this);
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		delta = vcpu->arch.host_tsc - tsc_this;
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		vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
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	}
}

static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
{
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	vmx_load_host_state(to_vmx(vcpu));
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}

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static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
{
	if (vcpu->fpu_active)
		return;
	vcpu->fpu_active = 1;
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	vmcs_clear_bits(GUEST_CR0, X86_CR0_TS);
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	if (vcpu->arch.cr0 & X86_CR0_TS)
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		vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
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	update_exception_bitmap(vcpu);
}

static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
{
	if (!vcpu->fpu_active)
		return;
	vcpu->fpu_active = 0;
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	vmcs_set_bits(GUEST_CR0, X86_CR0_TS);
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	update_exception_bitmap(vcpu);
}

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static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
{
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	vcpu_clear(to_vmx(vcpu));
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}

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static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
{
	return vmcs_readl(GUEST_RFLAGS);
}

static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
{
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	if (vcpu->arch.rmode.active)
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		rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
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	vmcs_writel(GUEST_RFLAGS, rflags);
}

static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
{
	unsigned long rip;
	u32 interruptibility;

	rip = vmcs_readl(GUEST_RIP);
	rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
	vmcs_writel(GUEST_RIP, rip);

	/*
	 * We emulated an instruction, so temporary interrupt blocking
	 * should be removed, if set.
	 */
	interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
	if (interruptibility & 3)
		vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
			     interruptibility & ~3);
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	vcpu->arch.interrupt_window_open = 1;
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}

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static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
				bool has_error_code, u32 error_code)
{
	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
		     nr | INTR_TYPE_EXCEPTION
		     | (has_error_code ? INTR_INFO_DELIEVER_CODE_MASK : 0)
		     | INTR_INFO_VALID_MASK);
	if (has_error_code)
		vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
}

static bool vmx_exception_injected(struct kvm_vcpu *vcpu)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);

	return !(vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK);
}

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/*
 * Swap MSR entry in host/guest MSR entry array.
 */
615
#ifdef CONFIG_X86_64
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static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
617
{
618 619 620 621 622 623 624 625
	struct kvm_msr_entry tmp;

	tmp = vmx->guest_msrs[to];
	vmx->guest_msrs[to] = vmx->guest_msrs[from];
	vmx->guest_msrs[from] = tmp;
	tmp = vmx->host_msrs[to];
	vmx->host_msrs[to] = vmx->host_msrs[from];
	vmx->host_msrs[from] = tmp;
626
}
627
#endif
628

629 630 631 632 633
/*
 * Set up the vmcs to automatically save and restore system
 * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 * mode, as fiddling with msrs is very expensive.
 */
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static void setup_msrs(struct vcpu_vmx *vmx)
635
{
636
	int save_nmsrs;
637

638
	vmx_load_host_state(vmx);
639 640
	save_nmsrs = 0;
#ifdef CONFIG_X86_64
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	if (is_long_mode(&vmx->vcpu)) {
642 643
		int index;

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		index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
645
		if (index >= 0)
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			move_msr_up(vmx, index, save_nmsrs++);
		index = __find_msr_index(vmx, MSR_LSTAR);
648
		if (index >= 0)
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			move_msr_up(vmx, index, save_nmsrs++);
		index = __find_msr_index(vmx, MSR_CSTAR);
651
		if (index >= 0)
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			move_msr_up(vmx, index, save_nmsrs++);
		index = __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
654
		if (index >= 0)
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			move_msr_up(vmx, index, save_nmsrs++);
656 657 658 659
		/*
		 * MSR_K6_STAR is only needed on long mode guests, and only
		 * if efer.sce is enabled.
		 */
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		index = __find_msr_index(vmx, MSR_K6_STAR);
661
		if ((index >= 0) && (vmx->vcpu.arch.shadow_efer & EFER_SCE))
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			move_msr_up(vmx, index, save_nmsrs++);
663 664
	}
#endif
665
	vmx->save_nmsrs = save_nmsrs;
666

667
#ifdef CONFIG_X86_64
668
	vmx->msr_offset_kernel_gs_base =
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		__find_msr_index(vmx, MSR_KERNEL_GS_BASE);
670
#endif
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	vmx->msr_offset_efer = __find_msr_index(vmx, MSR_EFER);
672 673
}

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/*
 * reads and returns guest's timestamp counter "register"
 * guest_tsc = host_tsc + tsc_offset    -- 21.3
 */
static u64 guest_read_tsc(void)
{
	u64 host_tsc, tsc_offset;

	rdtscll(host_tsc);
	tsc_offset = vmcs_read64(TSC_OFFSET);
	return host_tsc + tsc_offset;
}

/*
 * writes 'guest_tsc' into guest's timestamp counter "register"
 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 */
static void guest_write_tsc(u64 guest_tsc)
{
	u64 host_tsc;

	rdtscll(host_tsc);
	vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
}

/*
 * Reads an msr value (of 'msr_index') into 'pdata'.
 * Returns 0 on success, non-0 otherwise.
 * Assumes vcpu_load() was already called.
 */
static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
{
	u64 data;
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	struct kvm_msr_entry *msr;
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	if (!pdata) {
		printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
		return -EINVAL;
	}

	switch (msr_index) {
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#ifdef CONFIG_X86_64
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	case MSR_FS_BASE:
		data = vmcs_readl(GUEST_FS_BASE);
		break;
	case MSR_GS_BASE:
		data = vmcs_readl(GUEST_GS_BASE);
		break;
	case MSR_EFER:
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		return kvm_get_msr_common(vcpu, msr_index, pdata);
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#endif
	case MSR_IA32_TIME_STAMP_COUNTER:
		data = guest_read_tsc();
		break;
	case MSR_IA32_SYSENTER_CS:
		data = vmcs_read32(GUEST_SYSENTER_CS);
		break;
	case MSR_IA32_SYSENTER_EIP:
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		data = vmcs_readl(GUEST_SYSENTER_EIP);
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		break;
	case MSR_IA32_SYSENTER_ESP:
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		data = vmcs_readl(GUEST_SYSENTER_ESP);
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		break;
	default:
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		msr = find_msr_entry(to_vmx(vcpu), msr_index);
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		if (msr) {
			data = msr->data;
			break;
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		}
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		return kvm_get_msr_common(vcpu, msr_index, pdata);
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	}

	*pdata = data;
	return 0;
}

/*
 * Writes msr value into into the appropriate "register".
 * Returns 0 on success, non-0 otherwise.
 * Assumes vcpu_load() was already called.
 */
static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
{
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	struct vcpu_vmx *vmx = to_vmx(vcpu);
	struct kvm_msr_entry *msr;
759 760
	int ret = 0;

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	switch (msr_index) {
762
#ifdef CONFIG_X86_64
763
	case MSR_EFER:
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		ret = kvm_set_msr_common(vcpu, msr_index, data);
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		if (vmx->host_state.loaded) {
			reload_host_efer(vmx);
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			load_transition_efer(vmx);
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		}
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		break;
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	case MSR_FS_BASE:
		vmcs_writel(GUEST_FS_BASE, data);
		break;
	case MSR_GS_BASE:
		vmcs_writel(GUEST_GS_BASE, data);
		break;
#endif
	case MSR_IA32_SYSENTER_CS:
		vmcs_write32(GUEST_SYSENTER_CS, data);
		break;
	case MSR_IA32_SYSENTER_EIP:
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		vmcs_writel(GUEST_SYSENTER_EIP, data);
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		break;
	case MSR_IA32_SYSENTER_ESP:
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		vmcs_writel(GUEST_SYSENTER_ESP, data);
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		break;
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	case MSR_IA32_TIME_STAMP_COUNTER:
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		guest_write_tsc(data);
		break;
	default:
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		msr = find_msr_entry(vmx, msr_index);
791 792
		if (msr) {
			msr->data = data;
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			if (vmx->host_state.loaded)
				load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
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			break;
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		}
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		ret = kvm_set_msr_common(vcpu, msr_index, data);
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	}

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	return ret;
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}

/*
 * Sync the rsp and rip registers into the vcpu structure.  This allows
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 * registers to be accessed by indexing vcpu->arch.regs.
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 */
static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
{
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	vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
	vcpu->arch.rip = vmcs_readl(GUEST_RIP);
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}

/*
 * Syncs rsp and rip back into the vmcs.  Should be called after possible
 * modification.
 */
static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
{
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	vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]);
	vmcs_writel(GUEST_RIP, vcpu->arch.rip);
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}

static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
{
	unsigned long dr7 = 0x400;
	int old_singlestep;

	old_singlestep = vcpu->guest_debug.singlestep;

	vcpu->guest_debug.enabled = dbg->enabled;
	if (vcpu->guest_debug.enabled) {
		int i;

		dr7 |= 0x200;  /* exact */
		for (i = 0; i < 4; ++i) {
			if (!dbg->breakpoints[i].enabled)
				continue;
			vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
			dr7 |= 2 << (i*2);    /* global enable */
			dr7 |= 0 << (i*4+16); /* execution breakpoint */
		}

		vcpu->guest_debug.singlestep = dbg->singlestep;
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	} else
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		vcpu->guest_debug.singlestep = 0;

	if (old_singlestep && !vcpu->guest_debug.singlestep) {
		unsigned long flags;

		flags = vmcs_readl(GUEST_RFLAGS);
		flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
		vmcs_writel(GUEST_RFLAGS, flags);
	}

855
	update_exception_bitmap(vcpu);
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	vmcs_writel(GUEST_DR7, dr7);

	return 0;
}

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static int vmx_get_irq(struct kvm_vcpu *vcpu)
{
863
	struct vcpu_vmx *vmx = to_vmx(vcpu);
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	u32 idtv_info_field;

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	idtv_info_field = vmx->idt_vectoring_info;
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	if (idtv_info_field & INTR_INFO_VALID_MASK) {
		if (is_external_interrupt(idtv_info_field))
			return idtv_info_field & VECTORING_INFO_VECTOR_MASK;
		else
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			printk(KERN_DEBUG "pending exception: not handled yet\n");
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	}
	return -1;
}

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static __init int cpu_has_kvm_support(void)
{
	unsigned long ecx = cpuid_ecx(1);
	return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
}

static __init int vmx_disabled_by_bios(void)
{
	u64 msr;

	rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
887 888 889 890
	return (msr & (MSR_IA32_FEATURE_CONTROL_LOCKED |
		       MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
	    == MSR_IA32_FEATURE_CONTROL_LOCKED;
	/* locked but not enabled */
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}

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static void hardware_enable(void *garbage)
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{
	int cpu = raw_smp_processor_id();
	u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
	u64 old;

	rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
900 901 902 903
	if ((old & (MSR_IA32_FEATURE_CONTROL_LOCKED |
		    MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
	    != (MSR_IA32_FEATURE_CONTROL_LOCKED |
		MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED))
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		/* enable and lock */
905 906 907
		wrmsrl(MSR_IA32_FEATURE_CONTROL, old |
		       MSR_IA32_FEATURE_CONTROL_LOCKED |
		       MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED);
908
	write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
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	asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
		      : "memory", "cc");
}

static void hardware_disable(void *garbage)
{
	asm volatile (ASM_VMX_VMXOFF : : : "cc");
}

918
static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
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				      u32 msr, u32 *result)
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{
	u32 vmx_msr_low, vmx_msr_high;
	u32 ctl = ctl_min | ctl_opt;

	rdmsr(msr, vmx_msr_low, vmx_msr_high);

	ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
	ctl |= vmx_msr_low;  /* bit == 1 in low word  ==> must be one  */

	/* Ensure minimum (required) set of control bits are supported. */
	if (ctl_min & ~ctl)
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		return -EIO;
932 933 934 935 936

	*result = ctl;
	return 0;
}

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static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
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{
	u32 vmx_msr_low, vmx_msr_high;
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	u32 min, opt;
	u32 _pin_based_exec_control = 0;
	u32 _cpu_based_exec_control = 0;
943
	u32 _cpu_based_2nd_exec_control = 0;
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	u32 _vmexit_control = 0;
	u32 _vmentry_control = 0;

	min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
	opt = 0;
	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
				&_pin_based_exec_control) < 0)
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		return -EIO;
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	min = CPU_BASED_HLT_EXITING |
#ifdef CONFIG_X86_64
	      CPU_BASED_CR8_LOAD_EXITING |
	      CPU_BASED_CR8_STORE_EXITING |
#endif
	      CPU_BASED_USE_IO_BITMAPS |
	      CPU_BASED_MOV_DR_EXITING |
	      CPU_BASED_USE_TSC_OFFSETING;
961 962
	opt = CPU_BASED_TPR_SHADOW |
	      CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
963 964
	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
				&_cpu_based_exec_control) < 0)
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		return -EIO;
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#ifdef CONFIG_X86_64
	if ((_cpu_based_exec_control & CPU_BASED_TPR_SHADOW))
		_cpu_based_exec_control &= ~CPU_BASED_CR8_LOAD_EXITING &
					   ~CPU_BASED_CR8_STORE_EXITING;
#endif
971 972
	if (_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) {
		min = 0;
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		opt = SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
			SECONDARY_EXEC_WBINVD_EXITING;
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		if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS2,
					&_cpu_based_2nd_exec_control) < 0)
			return -EIO;
	}
#ifndef CONFIG_X86_64
	if (!(_cpu_based_2nd_exec_control &
				SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES))
		_cpu_based_exec_control &= ~CPU_BASED_TPR_SHADOW;
#endif
984 985 986 987 988 989 990 991

	min = 0;
#ifdef CONFIG_X86_64
	min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
#endif
	opt = 0;
	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
				&_vmexit_control) < 0)
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		return -EIO;
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	min = opt = 0;
	if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
				&_vmentry_control) < 0)
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		return -EIO;
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	rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
1000 1001 1002

	/* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
	if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
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		return -EIO;
1004 1005 1006 1007

#ifdef CONFIG_X86_64
	/* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
	if (vmx_msr_high & (1u<<16))
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		return -EIO;
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#endif

	/* Require Write-Back (WB) memory type for VMCS accesses. */
	if (((vmx_msr_high >> 18) & 15) != 6)
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		return -EIO;
1014

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	vmcs_conf->size = vmx_msr_high & 0x1fff;
	vmcs_conf->order = get_order(vmcs_config.size);
	vmcs_conf->revision_id = vmx_msr_low;
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	vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
	vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
1021
	vmcs_conf->cpu_based_2nd_exec_ctrl = _cpu_based_2nd_exec_control;
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	vmcs_conf->vmexit_ctrl         = _vmexit_control;
	vmcs_conf->vmentry_ctrl        = _vmentry_control;
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	return 0;
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}
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static struct vmcs *alloc_vmcs_cpu(int cpu)
{
	int node = cpu_to_node(cpu);
	struct page *pages;
	struct vmcs *vmcs;

1034
	pages = alloc_pages_node(node, GFP_KERNEL, vmcs_config.order);
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	if (!pages)
		return NULL;
	vmcs = page_address(pages);
1038 1039
	memset(vmcs, 0, vmcs_config.size);
	vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
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	return vmcs;
}

static struct vmcs *alloc_vmcs(void)
{
1045
	return alloc_vmcs_cpu(raw_smp_processor_id());
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}

static void free_vmcs(struct vmcs *vmcs)
{
1050
	free_pages((unsigned long)vmcs, vmcs_config.order);
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}

1053
static void free_kvm_area(void)
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{
	int cpu;

	for_each_online_cpu(cpu)
		free_vmcs(per_cpu(vmxarea, cpu));
}

static __init int alloc_kvm_area(void)
{
	int cpu;

	for_each_online_cpu(cpu) {
		struct vmcs *vmcs;

		vmcs = alloc_vmcs_cpu(cpu);
		if (!vmcs) {
			free_kvm_area();
			return -ENOMEM;
		}

		per_cpu(vmxarea, cpu) = vmcs;
	}
	return 0;
}

static __init int hardware_setup(void)
{
Y
Yang, Sheng 已提交
1081 1082
	if (setup_vmcs_config(&vmcs_config) < 0)
		return -EIO;
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	return alloc_kvm_area();
}

static __exit void hardware_unsetup(void)
{
	free_kvm_area();
}

static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
{
	struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];

1095
	if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
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		vmcs_write16(sf->selector, save->selector);
		vmcs_writel(sf->base, save->base);
		vmcs_write32(sf->limit, save->limit);
		vmcs_write32(sf->ar_bytes, save->ar);
	} else {
		u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
			<< AR_DPL_SHIFT;
		vmcs_write32(sf->ar_bytes, 0x93 | dpl);
	}
}

static void enter_pmode(struct kvm_vcpu *vcpu)
{
	unsigned long flags;

1111
	vcpu->arch.rmode.active = 0;
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1112

1113 1114 1115
	vmcs_writel(GUEST_TR_BASE, vcpu->arch.rmode.tr.base);
	vmcs_write32(GUEST_TR_LIMIT, vcpu->arch.rmode.tr.limit);
	vmcs_write32(GUEST_TR_AR_BYTES, vcpu->arch.rmode.tr.ar);
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1116 1117

	flags = vmcs_readl(GUEST_RFLAGS);
1118
	flags &= ~(X86_EFLAGS_IOPL | X86_EFLAGS_VM);
1119
	flags |= (vcpu->arch.rmode.save_iopl << IOPL_SHIFT);
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	vmcs_writel(GUEST_RFLAGS, flags);

1122 1123
	vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
			(vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
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	update_exception_bitmap(vcpu);

1127 1128 1129 1130
	fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->arch.rmode.es);
	fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->arch.rmode.ds);
	fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->arch.rmode.gs);
	fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->arch.rmode.fs);
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	vmcs_write16(GUEST_SS_SELECTOR, 0);
	vmcs_write32(GUEST_SS_AR_BYTES, 0x93);

	vmcs_write16(GUEST_CS_SELECTOR,
		     vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
	vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
}

M
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1140
static gva_t rmode_tss_base(struct kvm *kvm)
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1141
{
1142
	if (!kvm->arch.tss_addr) {
1143 1144 1145 1146
		gfn_t base_gfn = kvm->memslots[0].base_gfn +
				 kvm->memslots[0].npages - 3;
		return base_gfn << PAGE_SHIFT;
	}
1147
	return kvm->arch.tss_addr;
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}

static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
{
	struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];

	save->selector = vmcs_read16(sf->selector);
	save->base = vmcs_readl(sf->base);
	save->limit = vmcs_read32(sf->limit);
	save->ar = vmcs_read32(sf->ar_bytes);
1158 1159
	vmcs_write16(sf->selector, save->base >> 4);
	vmcs_write32(sf->base, save->base & 0xfffff);
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	vmcs_write32(sf->limit, 0xffff);
	vmcs_write32(sf->ar_bytes, 0xf3);
}

static void enter_rmode(struct kvm_vcpu *vcpu)
{
	unsigned long flags;

1168
	vcpu->arch.rmode.active = 1;
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1170
	vcpu->arch.rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
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	vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));

1173
	vcpu->arch.rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
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	vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);

1176
	vcpu->arch.rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
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	vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);

	flags = vmcs_readl(GUEST_RFLAGS);
1180 1181
	vcpu->arch.rmode.save_iopl
		= (flags & X86_EFLAGS_IOPL) >> IOPL_SHIFT;
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1182

1183
	flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
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1184 1185

	vmcs_writel(GUEST_RFLAGS, flags);
1186
	vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
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	update_exception_bitmap(vcpu);

	vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
	vmcs_write32(GUEST_SS_LIMIT, 0xffff);
	vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);

	vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
1194
	vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1195 1196
	if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
		vmcs_writel(GUEST_CS_BASE, 0xf0000);
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	vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);

1199 1200 1201 1202
	fix_rmode_seg(VCPU_SREG_ES, &vcpu->arch.rmode.es);
	fix_rmode_seg(VCPU_SREG_DS, &vcpu->arch.rmode.ds);
	fix_rmode_seg(VCPU_SREG_GS, &vcpu->arch.rmode.gs);
	fix_rmode_seg(VCPU_SREG_FS, &vcpu->arch.rmode.fs);
1203

1204
	kvm_mmu_reset_context(vcpu);
1205
	init_rmode_tss(vcpu->kvm);
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}

1208
#ifdef CONFIG_X86_64
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static void enter_lmode(struct kvm_vcpu *vcpu)
{
	u32 guest_tr_ar;

	guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
	if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
		printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
		       __FUNCTION__);
		vmcs_write32(GUEST_TR_AR_BYTES,
			     (guest_tr_ar & ~AR_TYPE_MASK)
			     | AR_TYPE_BUSY_64_TSS);
	}

1223
	vcpu->arch.shadow_efer |= EFER_LMA;
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	find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
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	vmcs_write32(VM_ENTRY_CONTROLS,
		     vmcs_read32(VM_ENTRY_CONTROLS)
1228
		     | VM_ENTRY_IA32E_MODE);
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}

static void exit_lmode(struct kvm_vcpu *vcpu)
{
1233
	vcpu->arch.shadow_efer &= ~EFER_LMA;
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	vmcs_write32(VM_ENTRY_CONTROLS,
		     vmcs_read32(VM_ENTRY_CONTROLS)
1237
		     & ~VM_ENTRY_IA32E_MODE);
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}

#endif

1242
static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
1243
{
1244 1245
	vcpu->arch.cr4 &= KVM_GUEST_CR4_MASK;
	vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
1246 1247
}

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static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
{
1250 1251
	vmx_fpu_deactivate(vcpu);

1252
	if (vcpu->arch.rmode.active && (cr0 & X86_CR0_PE))
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1253 1254
		enter_pmode(vcpu);

1255
	if (!vcpu->arch.rmode.active && !(cr0 & X86_CR0_PE))
A
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1256 1257
		enter_rmode(vcpu);

1258
#ifdef CONFIG_X86_64
1259
	if (vcpu->arch.shadow_efer & EFER_LME) {
1260
		if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
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1261
			enter_lmode(vcpu);
1262
		if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
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			exit_lmode(vcpu);
	}
#endif

	vmcs_writel(CR0_READ_SHADOW, cr0);
	vmcs_writel(GUEST_CR0,
		    (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1270
	vcpu->arch.cr0 = cr0;
1271

1272
	if (!(cr0 & X86_CR0_TS) || !(cr0 & X86_CR0_PE))
1273
		vmx_fpu_activate(vcpu);
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}

static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
{
	vmcs_writel(GUEST_CR3, cr3);
1279
	if (vcpu->arch.cr0 & X86_CR0_PE)
1280
		vmx_fpu_deactivate(vcpu);
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}

static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
{
	vmcs_writel(CR4_READ_SHADOW, cr4);
1286
	vmcs_writel(GUEST_CR4, cr4 | (vcpu->arch.rmode.active ?
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1287
		    KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1288
	vcpu->arch.cr4 = cr4;
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1289 1290
}

1291
#ifdef CONFIG_X86_64
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static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
{
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	struct vcpu_vmx *vmx = to_vmx(vcpu);
	struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
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Avi Kivity 已提交
1297

1298
	vcpu->arch.shadow_efer = efer;
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1299 1300 1301
	if (efer & EFER_LMA) {
		vmcs_write32(VM_ENTRY_CONTROLS,
				     vmcs_read32(VM_ENTRY_CONTROLS) |
1302
				     VM_ENTRY_IA32E_MODE);
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1303 1304 1305 1306 1307
		msr->data = efer;

	} else {
		vmcs_write32(VM_ENTRY_CONTROLS,
				     vmcs_read32(VM_ENTRY_CONTROLS) &
1308
				     ~VM_ENTRY_IA32E_MODE);
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		msr->data = efer & ~EFER_LME;
	}
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	setup_msrs(vmx);
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}

#endif

static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
{
	struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];

	return vmcs_readl(sf->base);
}

static void vmx_get_segment(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg)
{
	struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
	u32 ar;

	var->base = vmcs_readl(sf->base);
	var->limit = vmcs_read32(sf->limit);
	var->selector = vmcs_read16(sf->selector);
	ar = vmcs_read32(sf->ar_bytes);
	if (ar & AR_UNUSABLE_MASK)
		ar = 0;
	var->type = ar & 15;
	var->s = (ar >> 4) & 1;
	var->dpl = (ar >> 5) & 3;
	var->present = (ar >> 7) & 1;
	var->avl = (ar >> 12) & 1;
	var->l = (ar >> 13) & 1;
	var->db = (ar >> 14) & 1;
	var->g = (ar >> 15) & 1;
	var->unusable = (ar >> 16) & 1;
}

1347
static u32 vmx_segment_access_rights(struct kvm_segment *var)
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1348 1349 1350
{
	u32 ar;

1351
	if (var->unusable)
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1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362
		ar = 1 << 16;
	else {
		ar = var->type & 15;
		ar |= (var->s & 1) << 4;
		ar |= (var->dpl & 3) << 5;
		ar |= (var->present & 1) << 7;
		ar |= (var->avl & 1) << 12;
		ar |= (var->l & 1) << 13;
		ar |= (var->db & 1) << 14;
		ar |= (var->g & 1) << 15;
	}
1363 1364
	if (ar == 0) /* a 0 value means unusable */
		ar = AR_UNUSABLE_MASK;
1365 1366 1367 1368 1369 1370 1371 1372 1373 1374

	return ar;
}

static void vmx_set_segment(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg)
{
	struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
	u32 ar;

1375 1376 1377 1378 1379
	if (vcpu->arch.rmode.active && seg == VCPU_SREG_TR) {
		vcpu->arch.rmode.tr.selector = var->selector;
		vcpu->arch.rmode.tr.base = var->base;
		vcpu->arch.rmode.tr.limit = var->limit;
		vcpu->arch.rmode.tr.ar = vmx_segment_access_rights(var);
1380 1381 1382 1383 1384
		return;
	}
	vmcs_writel(sf->base, var->base);
	vmcs_write32(sf->limit, var->limit);
	vmcs_write16(sf->selector, var->selector);
1385
	if (vcpu->arch.rmode.active && var->s) {
1386 1387 1388 1389 1390 1391 1392 1393
		/*
		 * Hack real-mode segments into vm86 compatibility.
		 */
		if (var->base == 0xffff0000 && var->selector == 0xf000)
			vmcs_writel(sf->base, 0xf0000);
		ar = 0xf3;
	} else
		ar = vmx_segment_access_rights(var);
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	vmcs_write32(sf->ar_bytes, ar);
}

static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
{
	u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);

	*db = (ar >> 14) & 1;
	*l = (ar >> 13) & 1;
}

static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
{
	dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
	dt->base = vmcs_readl(GUEST_IDTR_BASE);
}

static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
{
	vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
	vmcs_writel(GUEST_IDTR_BASE, dt->base);
}

static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
{
	dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
	dt->base = vmcs_readl(GUEST_GDTR_BASE);
}

static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
{
	vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
	vmcs_writel(GUEST_GDTR_BASE, dt->base);
}

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static int init_rmode_tss(struct kvm *kvm)
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1430 1431
{
	gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1432
	u16 data = 0;
1433
	int ret = 0;
1434
	int r;
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1435

1436
	down_read(&current->mm->mmap_sem);
1437 1438
	r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
	if (r < 0)
1439
		goto out;
1440 1441 1442
	data = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
	r = kvm_write_guest_page(kvm, fn++, &data, 0x66, sizeof(u16));
	if (r < 0)
1443
		goto out;
1444 1445
	r = kvm_clear_guest_page(kvm, fn++, 0, PAGE_SIZE);
	if (r < 0)
1446
		goto out;
1447 1448
	r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
	if (r < 0)
1449
		goto out;
1450
	data = ~0;
1451 1452 1453
	r = kvm_write_guest_page(kvm, fn, &data,
				 RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1,
				 sizeof(u8));
1454
	if (r < 0)
1455 1456 1457 1458 1459 1460
		goto out;

	ret = 1;
out:
	up_read(&current->mm->mmap_sem);
	return ret;
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}

static void seg_setup(int seg)
{
	struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];

	vmcs_write16(sf->selector, 0);
	vmcs_writel(sf->base, 0);
	vmcs_write32(sf->limit, 0xffff);
	vmcs_write32(sf->ar_bytes, 0x93);
}

1473 1474 1475 1476 1477
static int alloc_apic_access_page(struct kvm *kvm)
{
	struct kvm_userspace_memory_region kvm_userspace_mem;
	int r = 0;

1478
	down_write(&kvm->slots_lock);
1479
	if (kvm->arch.apic_access_page)
1480 1481 1482 1483 1484 1485 1486 1487
		goto out;
	kvm_userspace_mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
	kvm_userspace_mem.flags = 0;
	kvm_userspace_mem.guest_phys_addr = 0xfee00000ULL;
	kvm_userspace_mem.memory_size = PAGE_SIZE;
	r = __kvm_set_memory_region(kvm, &kvm_userspace_mem, 0);
	if (r)
		goto out;
1488 1489

	down_read(&current->mm->mmap_sem);
1490
	kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00);
1491
	up_read(&current->mm->mmap_sem);
1492
out:
1493
	up_write(&kvm->slots_lock);
1494 1495 1496
	return r;
}

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/*
 * Sets up the vmcs for emulated real mode.
 */
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static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
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{
	u32 host_sysenter_cs;
	u32 junk;
	unsigned long a;
	struct descriptor_table dt;
	int i;
1507
	unsigned long kvm_vmx_return;
1508
	u32 exec_control;
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1509 1510

	/* I/O */
1511 1512
	vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
	vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
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1513 1514 1515 1516

	vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */

	/* Control */
1517 1518
	vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
		vmcs_config.pin_based_exec_ctrl);
1519 1520 1521 1522 1523 1524 1525 1526 1527 1528

	exec_control = vmcs_config.cpu_based_exec_ctrl;
	if (!vm_need_tpr_shadow(vmx->vcpu.kvm)) {
		exec_control &= ~CPU_BASED_TPR_SHADOW;
#ifdef CONFIG_X86_64
		exec_control |= CPU_BASED_CR8_STORE_EXITING |
				CPU_BASED_CR8_LOAD_EXITING;
#endif
	}
	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
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1529

1530 1531 1532 1533 1534 1535 1536
	if (cpu_has_secondary_exec_ctrls()) {
		exec_control = vmcs_config.cpu_based_2nd_exec_ctrl;
		if (!vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
			exec_control &=
				~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
		vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);
	}
1537

1538 1539
	vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, !!bypass_guest_pf);
	vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, !!bypass_guest_pf);
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1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551
	vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */

	vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
	vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
	vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */

	vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
	vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
	vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
	vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
	vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
	vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1552
#ifdef CONFIG_X86_64
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1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566
	rdmsrl(MSR_FS_BASE, a);
	vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
	rdmsrl(MSR_GS_BASE, a);
	vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
#else
	vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
	vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
#endif

	vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */

	get_idt(&dt);
	vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */

M
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1567
	asm("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1568
	vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1569 1570 1571
	vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
	vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
	vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
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1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583

	rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
	vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
	rdmsrl(MSR_IA32_SYSENTER_ESP, a);
	vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
	rdmsrl(MSR_IA32_SYSENTER_EIP, a);
	vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */

	for (i = 0; i < NR_VMX_MSR; ++i) {
		u32 index = vmx_msr_index[i];
		u32 data_low, data_high;
		u64 data;
1584
		int j = vmx->nmsrs;
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1585 1586 1587

		if (rdmsr_safe(index, &data_low, &data_high) < 0)
			continue;
1588 1589
		if (wrmsr_safe(index, data_low, data_high) < 0)
			continue;
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		data = data_low | ((u64)data_high << 32);
1591 1592 1593 1594 1595
		vmx->host_msrs[j].index = index;
		vmx->host_msrs[j].reserved = 0;
		vmx->host_msrs[j].data = data;
		vmx->guest_msrs[j] = vmx->host_msrs[j];
		++vmx->nmsrs;
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1596 1597
	}

1598
	vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
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1599 1600

	/* 22.2.1, 20.8.1 */
1601 1602
	vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);

1603 1604 1605
	vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
	vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);

1606

1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620
	return 0;
}

static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
{
	struct vcpu_vmx *vmx = to_vmx(vcpu);
	u64 msr;
	int ret;

	if (!init_rmode_tss(vmx->vcpu.kvm)) {
		ret = -ENOMEM;
		goto out;
	}

1621
	vmx->vcpu.arch.rmode.active = 0;
1622

1623
	vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();
1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639
	set_cr8(&vmx->vcpu, 0);
	msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
	if (vmx->vcpu.vcpu_id == 0)
		msr |= MSR_IA32_APICBASE_BSP;
	kvm_set_apic_base(&vmx->vcpu, msr);

	fx_init(&vmx->vcpu);

	/*
	 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
	 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
	 */
	if (vmx->vcpu.vcpu_id == 0) {
		vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
		vmcs_writel(GUEST_CS_BASE, 0x000f0000);
	} else {
1640 1641
		vmcs_write16(GUEST_CS_SELECTOR, vmx->vcpu.arch.sipi_vector << 8);
		vmcs_writel(GUEST_CS_BASE, vmx->vcpu.arch.sipi_vector << 12);
1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692
	}
	vmcs_write32(GUEST_CS_LIMIT, 0xffff);
	vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);

	seg_setup(VCPU_SREG_DS);
	seg_setup(VCPU_SREG_ES);
	seg_setup(VCPU_SREG_FS);
	seg_setup(VCPU_SREG_GS);
	seg_setup(VCPU_SREG_SS);

	vmcs_write16(GUEST_TR_SELECTOR, 0);
	vmcs_writel(GUEST_TR_BASE, 0);
	vmcs_write32(GUEST_TR_LIMIT, 0xffff);
	vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);

	vmcs_write16(GUEST_LDTR_SELECTOR, 0);
	vmcs_writel(GUEST_LDTR_BASE, 0);
	vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
	vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);

	vmcs_write32(GUEST_SYSENTER_CS, 0);
	vmcs_writel(GUEST_SYSENTER_ESP, 0);
	vmcs_writel(GUEST_SYSENTER_EIP, 0);

	vmcs_writel(GUEST_RFLAGS, 0x02);
	if (vmx->vcpu.vcpu_id == 0)
		vmcs_writel(GUEST_RIP, 0xfff0);
	else
		vmcs_writel(GUEST_RIP, 0);
	vmcs_writel(GUEST_RSP, 0);

	/* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */
	vmcs_writel(GUEST_DR7, 0x400);

	vmcs_writel(GUEST_GDTR_BASE, 0);
	vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);

	vmcs_writel(GUEST_IDTR_BASE, 0);
	vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);

	vmcs_write32(GUEST_ACTIVITY_STATE, 0);
	vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
	vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);

	guest_write_tsc(0);

	/* Special registers */
	vmcs_write64(GUEST_IA32_DEBUGCTL, 0);

	setup_msrs(vmx);

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	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */

1695 1696 1697 1698
	if (cpu_has_vmx_tpr_shadow()) {
		vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);
		if (vm_need_tpr_shadow(vmx->vcpu.kvm))
			vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
1699
				page_to_phys(vmx->vcpu.arch.apic->regs_page));
1700 1701 1702 1703 1704
		vmcs_write32(TPR_THRESHOLD, 0);
	}

	if (vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
		vmcs_write64(APIC_ACCESS_ADDR,
1705
			     page_to_phys(vmx->vcpu.kvm->arch.apic_access_page));
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1707 1708
	vmx->vcpu.arch.cr0 = 0x60000010;
	vmx_set_cr0(&vmx->vcpu, vmx->vcpu.arch.cr0); /* enter rmode */
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	vmx_set_cr4(&vmx->vcpu, 0);
1710
#ifdef CONFIG_X86_64
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	vmx_set_efer(&vmx->vcpu, 0);
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#endif
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1713 1714
	vmx_fpu_activate(&vmx->vcpu);
	update_exception_bitmap(&vmx->vcpu);
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1715 1716 1717 1718 1719 1720 1721

	return 0;

out:
	return ret;
}

1722 1723
static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
{
1724 1725
	struct vcpu_vmx *vmx = to_vmx(vcpu);

1726
	if (vcpu->arch.rmode.active) {
1727 1728 1729
		vmx->rmode.irq.pending = true;
		vmx->rmode.irq.vector = irq;
		vmx->rmode.irq.rip = vmcs_readl(GUEST_RIP);
1730 1731 1732
		vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
			     irq | INTR_TYPE_SOFT_INTR | INTR_INFO_VALID_MASK);
		vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
1733
		vmcs_writel(GUEST_RIP, vmx->rmode.irq.rip - 1);
1734 1735 1736 1737 1738 1739
		return;
	}
	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
			irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
}

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static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
{
1742 1743
	int word_index = __ffs(vcpu->arch.irq_summary);
	int bit_index = __ffs(vcpu->arch.irq_pending[word_index]);
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	int irq = word_index * BITS_PER_LONG + bit_index;

1746 1747 1748
	clear_bit(bit_index, &vcpu->arch.irq_pending[word_index]);
	if (!vcpu->arch.irq_pending[word_index])
		clear_bit(word_index, &vcpu->arch.irq_summary);
1749
	vmx_inject_irq(vcpu, irq);
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}

1752 1753 1754

static void do_interrupt_requests(struct kvm_vcpu *vcpu,
				       struct kvm_run *kvm_run)
A
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1755
{
1756 1757
	u32 cpu_based_vm_exec_control;

1758
	vcpu->arch.interrupt_window_open =
1759 1760 1761
		((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
		 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);

1762 1763
	if (vcpu->arch.interrupt_window_open &&
	    vcpu->arch.irq_summary &&
1764
	    !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
A
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		/*
1766
		 * If interrupts enabled, and not blocked by sti or mov ss. Good.
A
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1767 1768
		 */
		kvm_do_inject_irq(vcpu);
1769 1770

	cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1771 1772
	if (!vcpu->arch.interrupt_window_open &&
	    (vcpu->arch.irq_summary || kvm_run->request_interrupt_window))
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		/*
		 * Interrupts blocked.  Wait for unblock.
		 */
1776 1777 1778 1779
		cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
	else
		cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
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}

1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794
static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
{
	int ret;
	struct kvm_userspace_memory_region tss_mem = {
		.slot = 8,
		.guest_phys_addr = addr,
		.memory_size = PAGE_SIZE * 3,
		.flags = 0,
	};

	ret = kvm_set_memory_region(kvm, &tss_mem, 0);
	if (ret)
		return ret;
1795
	kvm->arch.tss_addr = addr;
1796 1797 1798
	return 0;
}

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static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
{
	struct kvm_guest_debug *dbg = &vcpu->guest_debug;

	set_debugreg(dbg->bp[0], 0);
	set_debugreg(dbg->bp[1], 1);
	set_debugreg(dbg->bp[2], 2);
	set_debugreg(dbg->bp[3], 3);

	if (dbg->singlestep) {
		unsigned long flags;

		flags = vmcs_readl(GUEST_RFLAGS);
		flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
		vmcs_writel(GUEST_RFLAGS, flags);
	}
}

static int handle_rmode_exception(struct kvm_vcpu *vcpu,
				  int vec, u32 err_code)
{
1820
	if (!vcpu->arch.rmode.active)
A
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1821 1822
		return 0;

1823 1824 1825 1826 1827
	/*
	 * Instruction with address size override prefix opcode 0x67
	 * Cause the #SS fault with 0 error code in VM86 mode.
	 */
	if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1828
		if (emulate_instruction(vcpu, NULL, 0, 0, 0) == EMULATE_DONE)
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1829 1830 1831 1832 1833 1834
			return 1;
	return 0;
}

static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
1835
	struct vcpu_vmx *vmx = to_vmx(vcpu);
A
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1836 1837 1838 1839 1840
	u32 intr_info, error_code;
	unsigned long cr2, rip;
	u32 vect_info;
	enum emulation_result er;

1841
	vect_info = vmx->idt_vectoring_info;
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1842 1843 1844
	intr_info = vmcs_read32(VM_EXIT_INTR_INFO);

	if ((vect_info & VECTORING_INFO_VALID_MASK) &&
M
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1845
						!is_page_fault(intr_info))
A
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1846 1847 1848
		printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
		       "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);

1849
	if (!irqchip_in_kernel(vcpu->kvm) && is_external_interrupt(vect_info)) {
A
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1850
		int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1851 1852
		set_bit(irq, vcpu->arch.irq_pending);
		set_bit(irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
A
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1853 1854
	}

1855 1856
	if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) /* nmi */
		return 1;  /* already handled by vmx_vcpu_run() */
1857 1858

	if (is_no_device(intr_info)) {
1859
		vmx_fpu_activate(vcpu);
1860 1861 1862
		return 1;
	}

1863
	if (is_invalid_opcode(intr_info)) {
1864
		er = emulate_instruction(vcpu, kvm_run, 0, 0, EMULTYPE_TRAP_UD);
1865
		if (er != EMULATE_DONE)
1866
			kvm_queue_exception(vcpu, UD_VECTOR);
1867 1868 1869
		return 1;
	}

A
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1870 1871 1872 1873 1874 1875
	error_code = 0;
	rip = vmcs_readl(GUEST_RIP);
	if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
		error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
	if (is_page_fault(intr_info)) {
		cr2 = vmcs_readl(EXIT_QUALIFICATION);
1876
		return kvm_mmu_page_fault(vcpu, cr2, error_code);
A
Avi Kivity 已提交
1877 1878
	}

1879
	if (vcpu->arch.rmode.active &&
A
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1880
	    handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1881
								error_code)) {
1882 1883
		if (vcpu->arch.halt_request) {
			vcpu->arch.halt_request = 0;
1884 1885
			return kvm_emulate_halt(vcpu);
		}
A
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1886
		return 1;
1887
	}
A
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1888

M
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1889 1890
	if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) ==
	    (INTR_TYPE_EXCEPTION | 1)) {
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1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902
		kvm_run->exit_reason = KVM_EXIT_DEBUG;
		return 0;
	}
	kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
	kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
	kvm_run->ex.error_code = error_code;
	return 0;
}

static int handle_external_interrupt(struct kvm_vcpu *vcpu,
				     struct kvm_run *kvm_run)
{
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1903
	++vcpu->stat.irq_exits;
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1904 1905 1906
	return 1;
}

1907 1908 1909 1910 1911
static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
	kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
	return 0;
}
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1912 1913 1914

static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
1915
	unsigned long exit_qualification;
1916 1917
	int size, down, in, string, rep;
	unsigned port;
A
Avi Kivity 已提交
1918

A
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1919
	++vcpu->stat.io_exits;
1920
	exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
1921
	string = (exit_qualification & 16) != 0;
1922 1923

	if (string) {
1924 1925
		if (emulate_instruction(vcpu,
					kvm_run, 0, 0, 0) == EMULATE_DO_MMIO)
1926 1927 1928 1929 1930 1931
			return 0;
		return 1;
	}

	size = (exit_qualification & 7) + 1;
	in = (exit_qualification & 8) != 0;
1932 1933 1934
	down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
	rep = (exit_qualification & 32) != 0;
	port = exit_qualification >> 16;
1935

L
Laurent Vivier 已提交
1936
	return kvm_emulate_pio(vcpu, kvm_run, in, size, port);
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1937 1938
}

I
Ingo Molnar 已提交
1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949
static void
vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
{
	/*
	 * Patch in the VMCALL instruction:
	 */
	hypercall[0] = 0x0f;
	hypercall[1] = 0x01;
	hypercall[2] = 0xc1;
}

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1950 1951
static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
1952
	unsigned long exit_qualification;
A
Avi Kivity 已提交
1953 1954 1955
	int cr;
	int reg;

1956
	exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
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1957 1958 1959 1960 1961 1962 1963
	cr = exit_qualification & 15;
	reg = (exit_qualification >> 8) & 15;
	switch ((exit_qualification >> 4) & 3) {
	case 0: /* mov to cr */
		switch (cr) {
		case 0:
			vcpu_load_rsp_rip(vcpu);
1964
			set_cr0(vcpu, vcpu->arch.regs[reg]);
A
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1965 1966 1967 1968
			skip_emulated_instruction(vcpu);
			return 1;
		case 3:
			vcpu_load_rsp_rip(vcpu);
1969
			set_cr3(vcpu, vcpu->arch.regs[reg]);
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1970 1971 1972 1973
			skip_emulated_instruction(vcpu);
			return 1;
		case 4:
			vcpu_load_rsp_rip(vcpu);
1974
			set_cr4(vcpu, vcpu->arch.regs[reg]);
A
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1975 1976 1977 1978
			skip_emulated_instruction(vcpu);
			return 1;
		case 8:
			vcpu_load_rsp_rip(vcpu);
1979
			set_cr8(vcpu, vcpu->arch.regs[reg]);
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1980
			skip_emulated_instruction(vcpu);
1981 1982
			if (irqchip_in_kernel(vcpu->kvm))
				return 1;
1983 1984
			kvm_run->exit_reason = KVM_EXIT_SET_TPR;
			return 0;
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1985 1986
		};
		break;
1987 1988
	case 2: /* clts */
		vcpu_load_rsp_rip(vcpu);
1989
		vmx_fpu_deactivate(vcpu);
1990 1991
		vcpu->arch.cr0 &= ~X86_CR0_TS;
		vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
1992
		vmx_fpu_activate(vcpu);
1993 1994
		skip_emulated_instruction(vcpu);
		return 1;
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1995 1996 1997 1998
	case 1: /*mov from cr*/
		switch (cr) {
		case 3:
			vcpu_load_rsp_rip(vcpu);
1999
			vcpu->arch.regs[reg] = vcpu->arch.cr3;
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2000 2001 2002 2003 2004
			vcpu_put_rsp_rip(vcpu);
			skip_emulated_instruction(vcpu);
			return 1;
		case 8:
			vcpu_load_rsp_rip(vcpu);
2005
			vcpu->arch.regs[reg] = get_cr8(vcpu);
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			vcpu_put_rsp_rip(vcpu);
			skip_emulated_instruction(vcpu);
			return 1;
		}
		break;
	case 3: /* lmsw */
		lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);

		skip_emulated_instruction(vcpu);
		return 1;
	default:
		break;
	}
	kvm_run->exit_reason = 0;
2020
	pr_unimpl(vcpu, "unhandled control register: op %d cr %d\n",
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	       (int)(exit_qualification >> 4) & 3, cr);
	return 0;
}

static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
2027
	unsigned long exit_qualification;
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	unsigned long val;
	int dr, reg;

	/*
	 * FIXME: this code assumes the host is debugging the guest.
	 *        need to deal with guest debugging itself too.
	 */
2035
	exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
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	dr = exit_qualification & 7;
	reg = (exit_qualification >> 8) & 15;
	vcpu_load_rsp_rip(vcpu);
	if (exit_qualification & 16) {
		/* mov from dr */
		switch (dr) {
		case 6:
			val = 0xffff0ff0;
			break;
		case 7:
			val = 0x400;
			break;
		default:
			val = 0;
		}
2051
		vcpu->arch.regs[reg] = val;
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	} else {
		/* mov to dr */
	}
	vcpu_put_rsp_rip(vcpu);
	skip_emulated_instruction(vcpu);
	return 1;
}

static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
2062 2063
	kvm_emulate_cpuid(vcpu);
	return 1;
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}

static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
2068
	u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
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	u64 data;

	if (vmx_get_msr(vcpu, ecx, &data)) {
2072
		kvm_inject_gp(vcpu, 0);
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		return 1;
	}

	/* FIXME: handling of bits 32:63 of rax, rdx */
2077 2078
	vcpu->arch.regs[VCPU_REGS_RAX] = data & -1u;
	vcpu->arch.regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
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	skip_emulated_instruction(vcpu);
	return 1;
}

static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
2085 2086 2087
	u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
	u64 data = (vcpu->arch.regs[VCPU_REGS_RAX] & -1u)
		| ((u64)(vcpu->arch.regs[VCPU_REGS_RDX] & -1u) << 32);
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	if (vmx_set_msr(vcpu, ecx, data) != 0) {
2090
		kvm_inject_gp(vcpu, 0);
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		return 1;
	}

	skip_emulated_instruction(vcpu);
	return 1;
}

2098 2099 2100 2101 2102 2103
static int handle_tpr_below_threshold(struct kvm_vcpu *vcpu,
				      struct kvm_run *kvm_run)
{
	return 1;
}

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static int handle_interrupt_window(struct kvm_vcpu *vcpu,
				   struct kvm_run *kvm_run)
{
2107 2108 2109 2110 2111 2112
	u32 cpu_based_vm_exec_control;

	/* clear pending irq */
	cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
	cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
2113 2114 2115 2116 2117
	/*
	 * If the user space waits to inject interrupts, exit as soon as
	 * possible
	 */
	if (kvm_run->request_interrupt_window &&
2118
	    !vcpu->arch.irq_summary) {
2119
		kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
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		++vcpu->stat.irq_window_exits;
2121 2122
		return 0;
	}
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	return 1;
}

static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
	skip_emulated_instruction(vcpu);
2129
	return kvm_emulate_halt(vcpu);
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}

2132 2133
static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
2134
	skip_emulated_instruction(vcpu);
2135 2136
	kvm_emulate_hypercall(vcpu);
	return 1;
2137 2138
}

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static int handle_wbinvd(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
	skip_emulated_instruction(vcpu);
	/* TODO: Add support for VT-d/pass-through device */
	return 1;
}

2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165
static int handle_apic_access(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
	u64 exit_qualification;
	enum emulation_result er;
	unsigned long offset;

	exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
	offset = exit_qualification & 0xffful;

	er = emulate_instruction(vcpu, kvm_run, 0, 0, 0);

	if (er !=  EMULATE_DONE) {
		printk(KERN_ERR
		       "Fail to handle apic access vmexit! Offset is 0x%lx\n",
		       offset);
		return -ENOTSUPP;
	}
	return 1;
}

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2166 2167 2168 2169 2170 2171 2172 2173 2174
/*
 * The exit handlers return 1 if the exit was handled fully and guest execution
 * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
 * to be done to userspace and return 0.
 */
static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
				      struct kvm_run *kvm_run) = {
	[EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
	[EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
2175
	[EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
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	[EXIT_REASON_IO_INSTRUCTION]          = handle_io,
	[EXIT_REASON_CR_ACCESS]               = handle_cr,
	[EXIT_REASON_DR_ACCESS]               = handle_dr,
	[EXIT_REASON_CPUID]                   = handle_cpuid,
	[EXIT_REASON_MSR_READ]                = handle_rdmsr,
	[EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
	[EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
	[EXIT_REASON_HLT]                     = handle_halt,
2184
	[EXIT_REASON_VMCALL]                  = handle_vmcall,
2185 2186
	[EXIT_REASON_TPR_BELOW_THRESHOLD]     = handle_tpr_below_threshold,
	[EXIT_REASON_APIC_ACCESS]             = handle_apic_access,
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	[EXIT_REASON_WBINVD]                  = handle_wbinvd,
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2188 2189 2190
};

static const int kvm_vmx_max_exit_handlers =
2191
	ARRAY_SIZE(kvm_vmx_exit_handlers);
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2192 2193 2194 2195 2196 2197 2198 2199

/*
 * The guest has exited.  See if we can fix it or if we need userspace
 * assistance.
 */
static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
{
	u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
2200
	struct vcpu_vmx *vmx = to_vmx(vcpu);
2201
	u32 vectoring_info = vmx->idt_vectoring_info;
2202 2203 2204 2205 2206 2207 2208

	if (unlikely(vmx->fail)) {
		kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
		kvm_run->fail_entry.hardware_entry_failure_reason
			= vmcs_read32(VM_INSTRUCTION_ERROR);
		return 0;
	}
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	if ((vectoring_info & VECTORING_INFO_VALID_MASK) &&
				exit_reason != EXIT_REASON_EXCEPTION_NMI)
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		printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
		       "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
	if (exit_reason < kvm_vmx_max_exit_handlers
	    && kvm_vmx_exit_handlers[exit_reason])
		return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
	else {
		kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
		kvm_run->hw.hardware_exit_reason = exit_reason;
	}
	return 0;
}

2224 2225 2226 2227
static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
{
}

2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244
static void update_tpr_threshold(struct kvm_vcpu *vcpu)
{
	int max_irr, tpr;

	if (!vm_need_tpr_shadow(vcpu->kvm))
		return;

	if (!kvm_lapic_enabled(vcpu) ||
	    ((max_irr = kvm_lapic_find_highest_irr(vcpu)) == -1)) {
		vmcs_write32(TPR_THRESHOLD, 0);
		return;
	}

	tpr = (kvm_lapic_get_cr8(vcpu) & 0x0f) << 4;
	vmcs_write32(TPR_THRESHOLD, (max_irr > tpr) ? tpr >> 4 : max_irr >> 4);
}

2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255
static void enable_irq_window(struct kvm_vcpu *vcpu)
{
	u32 cpu_based_vm_exec_control;

	cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
	cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
	vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
}

static void vmx_intr_assist(struct kvm_vcpu *vcpu)
{
2256
	struct vcpu_vmx *vmx = to_vmx(vcpu);
2257 2258
	u32 idtv_info_field, intr_info_field;
	int has_ext_irq, interrupt_window_open;
2259
	int vector;
2260

2261 2262
	update_tpr_threshold(vcpu);

2263 2264
	has_ext_irq = kvm_cpu_has_interrupt(vcpu);
	intr_info_field = vmcs_read32(VM_ENTRY_INTR_INFO_FIELD);
2265
	idtv_info_field = vmx->idt_vectoring_info;
2266 2267 2268
	if (intr_info_field & INTR_INFO_VALID_MASK) {
		if (idtv_info_field & INTR_INFO_VALID_MASK) {
			/* TODO: fault when IDT_Vectoring */
2269 2270
			if (printk_ratelimit())
				printk(KERN_ERR "Fault when IDT_Vectoring\n");
2271 2272 2273 2274 2275 2276
		}
		if (has_ext_irq)
			enable_irq_window(vcpu);
		return;
	}
	if (unlikely(idtv_info_field & INTR_INFO_VALID_MASK)) {
2277 2278
		if ((idtv_info_field & VECTORING_INFO_TYPE_MASK)
		    == INTR_TYPE_EXT_INTR
2279
		    && vcpu->arch.rmode.active) {
2280 2281 2282 2283 2284 2285 2286 2287
			u8 vect = idtv_info_field & VECTORING_INFO_VECTOR_MASK;

			vmx_inject_irq(vcpu, vect);
			if (unlikely(has_ext_irq))
				enable_irq_window(vcpu);
			return;
		}

2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303
		vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, idtv_info_field);
		vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
				vmcs_read32(VM_EXIT_INSTRUCTION_LEN));

		if (unlikely(idtv_info_field & INTR_INFO_DELIEVER_CODE_MASK))
			vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
				vmcs_read32(IDT_VECTORING_ERROR_CODE));
		if (unlikely(has_ext_irq))
			enable_irq_window(vcpu);
		return;
	}
	if (!has_ext_irq)
		return;
	interrupt_window_open =
		((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
		 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
2304 2305 2306 2307 2308
	if (interrupt_window_open) {
		vector = kvm_cpu_get_interrupt(vcpu);
		vmx_inject_irq(vcpu, vector);
		kvm_timer_intr_post(vcpu, vector);
	} else
2309 2310 2311
		enable_irq_window(vcpu);
}

2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334
/*
 * Failure to inject an interrupt should give us the information
 * in IDT_VECTORING_INFO_FIELD.  However, if the failure occurs
 * when fetching the interrupt redirection bitmap in the real-mode
 * tss, this doesn't happen.  So we do it ourselves.
 */
static void fixup_rmode_irq(struct vcpu_vmx *vmx)
{
	vmx->rmode.irq.pending = 0;
	if (vmcs_readl(GUEST_RIP) + 1 != vmx->rmode.irq.rip)
		return;
	vmcs_writel(GUEST_RIP, vmx->rmode.irq.rip);
	if (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK) {
		vmx->idt_vectoring_info &= ~VECTORING_INFO_TYPE_MASK;
		vmx->idt_vectoring_info |= INTR_TYPE_EXT_INTR;
		return;
	}
	vmx->idt_vectoring_info =
		VECTORING_INFO_VALID_MASK
		| INTR_TYPE_EXT_INTR
		| vmx->rmode.irq.vector;
}

2335
static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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2336
{
2337
	struct vcpu_vmx *vmx = to_vmx(vcpu);
2338
	u32 intr_info;
2339 2340 2341 2342 2343 2344

	/*
	 * Loading guest fpu may have cleared host cr0.ts
	 */
	vmcs_writel(HOST_CR0, read_cr0());

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	asm(
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		/* Store host registers */
2347
#ifdef CONFIG_X86_64
2348
		"push %%rdx; push %%rbp;"
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2349 2350
		"push %%rcx \n\t"
#else
2351 2352
		"push %%edx; push %%ebp;"
		"push %%ecx \n\t"
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2353
#endif
2354
		ASM_VMX_VMWRITE_RSP_RDX "\n\t"
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2355
		/* Check if vmlaunch of vmresume is needed */
2356
		"cmpl $0, %c[launched](%0) \n\t"
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2357
		/* Load guest registers.  Don't clobber flags. */
2358
#ifdef CONFIG_X86_64
2359
		"mov %c[cr2](%0), %%rax \n\t"
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2360
		"mov %%rax, %%cr2 \n\t"
2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375
		"mov %c[rax](%0), %%rax \n\t"
		"mov %c[rbx](%0), %%rbx \n\t"
		"mov %c[rdx](%0), %%rdx \n\t"
		"mov %c[rsi](%0), %%rsi \n\t"
		"mov %c[rdi](%0), %%rdi \n\t"
		"mov %c[rbp](%0), %%rbp \n\t"
		"mov %c[r8](%0),  %%r8  \n\t"
		"mov %c[r9](%0),  %%r9  \n\t"
		"mov %c[r10](%0), %%r10 \n\t"
		"mov %c[r11](%0), %%r11 \n\t"
		"mov %c[r12](%0), %%r12 \n\t"
		"mov %c[r13](%0), %%r13 \n\t"
		"mov %c[r14](%0), %%r14 \n\t"
		"mov %c[r15](%0), %%r15 \n\t"
		"mov %c[rcx](%0), %%rcx \n\t" /* kills %0 (rcx) */
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#else
2377
		"mov %c[cr2](%0), %%eax \n\t"
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2378
		"mov %%eax,   %%cr2 \n\t"
2379 2380 2381 2382 2383 2384 2385
		"mov %c[rax](%0), %%eax \n\t"
		"mov %c[rbx](%0), %%ebx \n\t"
		"mov %c[rdx](%0), %%edx \n\t"
		"mov %c[rsi](%0), %%esi \n\t"
		"mov %c[rdi](%0), %%edi \n\t"
		"mov %c[rbp](%0), %%ebp \n\t"
		"mov %c[rcx](%0), %%ecx \n\t" /* kills %0 (ecx) */
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2386 2387
#endif
		/* Enter guest mode */
2388
		"jne .Llaunched \n\t"
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2389
		ASM_VMX_VMLAUNCH "\n\t"
2390 2391 2392
		"jmp .Lkvm_vmx_return \n\t"
		".Llaunched: " ASM_VMX_VMRESUME "\n\t"
		".Lkvm_vmx_return: "
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		/* Save guest registers, load host registers, keep flags */
2394
#ifdef CONFIG_X86_64
2395 2396 2397 2398 2399 2400 2401 2402 2403 2404 2405 2406 2407 2408 2409 2410
		"xchg %0,     (%%rsp) \n\t"
		"mov %%rax, %c[rax](%0) \n\t"
		"mov %%rbx, %c[rbx](%0) \n\t"
		"pushq (%%rsp); popq %c[rcx](%0) \n\t"
		"mov %%rdx, %c[rdx](%0) \n\t"
		"mov %%rsi, %c[rsi](%0) \n\t"
		"mov %%rdi, %c[rdi](%0) \n\t"
		"mov %%rbp, %c[rbp](%0) \n\t"
		"mov %%r8,  %c[r8](%0) \n\t"
		"mov %%r9,  %c[r9](%0) \n\t"
		"mov %%r10, %c[r10](%0) \n\t"
		"mov %%r11, %c[r11](%0) \n\t"
		"mov %%r12, %c[r12](%0) \n\t"
		"mov %%r13, %c[r13](%0) \n\t"
		"mov %%r14, %c[r14](%0) \n\t"
		"mov %%r15, %c[r15](%0) \n\t"
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		"mov %%cr2, %%rax   \n\t"
2412
		"mov %%rax, %c[cr2](%0) \n\t"
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2413

2414
		"pop  %%rbp; pop  %%rbp; pop  %%rdx \n\t"
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2415
#else
2416 2417 2418 2419 2420 2421 2422 2423
		"xchg %0, (%%esp) \n\t"
		"mov %%eax, %c[rax](%0) \n\t"
		"mov %%ebx, %c[rbx](%0) \n\t"
		"pushl (%%esp); popl %c[rcx](%0) \n\t"
		"mov %%edx, %c[rdx](%0) \n\t"
		"mov %%esi, %c[rsi](%0) \n\t"
		"mov %%edi, %c[rdi](%0) \n\t"
		"mov %%ebp, %c[rbp](%0) \n\t"
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2424
		"mov %%cr2, %%eax  \n\t"
2425
		"mov %%eax, %c[cr2](%0) \n\t"
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2426

2427
		"pop %%ebp; pop %%ebp; pop %%edx \n\t"
A
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2428
#endif
2429 2430 2431 2432
		"setbe %c[fail](%0) \n\t"
	      : : "c"(vmx), "d"((unsigned long)HOST_RSP),
		[launched]"i"(offsetof(struct vcpu_vmx, launched)),
		[fail]"i"(offsetof(struct vcpu_vmx, fail)),
2433 2434 2435 2436 2437 2438 2439
		[rax]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RAX])),
		[rbx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBX])),
		[rcx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RCX])),
		[rdx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDX])),
		[rsi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RSI])),
		[rdi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDI])),
		[rbp]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBP])),
2440
#ifdef CONFIG_X86_64
2441 2442 2443 2444 2445 2446 2447 2448
		[r8]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R8])),
		[r9]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R9])),
		[r10]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R10])),
		[r11]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R11])),
		[r12]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R12])),
		[r13]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R13])),
		[r14]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R14])),
		[r15]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R15])),
A
Avi Kivity 已提交
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#endif
2450
		[cr2]"i"(offsetof(struct vcpu_vmx, vcpu.arch.cr2))
2451 2452 2453 2454
	      : "cc", "memory"
#ifdef CONFIG_X86_64
		, "rbx", "rdi", "rsi"
		, "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2455 2456
#else
		, "ebx", "edi", "rsi"
2457 2458
#endif
	      );
A
Avi Kivity 已提交
2459

2460
	vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2461 2462
	if (vmx->rmode.irq.pending)
		fixup_rmode_irq(vmx);
2463

2464
	vcpu->arch.interrupt_window_open =
M
Mike Day 已提交
2465
		(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
A
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2466

M
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2467
	asm("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2468
	vmx->launched = 1;
2469 2470 2471 2472 2473 2474

	intr_info = vmcs_read32(VM_EXIT_INTR_INFO);

	/* We need to handle NMIs before interrupts are enabled */
	if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) /* nmi */
		asm("int $2");
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}

static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
{
2479 2480 2481
	struct vcpu_vmx *vmx = to_vmx(vcpu);

	if (vmx->vmcs) {
R
Rusty Russell 已提交
2482
		on_each_cpu(__vcpu_clear, vmx, 0, 1);
2483 2484
		free_vmcs(vmx->vmcs);
		vmx->vmcs = NULL;
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	}
}

static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
{
R
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	struct vcpu_vmx *vmx = to_vmx(vcpu);

A
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2492
	vmx_free_vmcs(vcpu);
R
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	kfree(vmx->host_msrs);
	kfree(vmx->guest_msrs);
	kvm_vcpu_uninit(vcpu);
2496
	kmem_cache_free(kvm_vcpu_cache, vmx);
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}

R
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static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
A
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2500
{
R
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2501
	int err;
2502
	struct vcpu_vmx *vmx = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
2503
	int cpu;
A
Avi Kivity 已提交
2504

2505
	if (!vmx)
R
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		return ERR_PTR(-ENOMEM);

	err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
	if (err)
		goto free_vcpu;
2511

2512
	vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
R
Rusty Russell 已提交
2513 2514 2515 2516
	if (!vmx->guest_msrs) {
		err = -ENOMEM;
		goto uninit_vcpu;
	}
2517

2518 2519
	vmx->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
	if (!vmx->host_msrs)
R
Rusty Russell 已提交
2520
		goto free_guest_msrs;
2521

2522 2523
	vmx->vmcs = alloc_vmcs();
	if (!vmx->vmcs)
R
Rusty Russell 已提交
2524
		goto free_msrs;
2525 2526 2527

	vmcs_clear(vmx->vmcs);

2528 2529
	cpu = get_cpu();
	vmx_vcpu_load(&vmx->vcpu, cpu);
R
Rusty Russell 已提交
2530
	err = vmx_vcpu_setup(vmx);
R
Rusty Russell 已提交
2531
	vmx_vcpu_put(&vmx->vcpu);
2532
	put_cpu();
R
Rusty Russell 已提交
2533 2534
	if (err)
		goto free_vmcs;
2535 2536 2537
	if (vm_need_virtualize_apic_accesses(kvm))
		if (alloc_apic_access_page(kvm) != 0)
			goto free_vmcs;
R
Rusty Russell 已提交
2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549

	return &vmx->vcpu;

free_vmcs:
	free_vmcs(vmx->vmcs);
free_msrs:
	kfree(vmx->host_msrs);
free_guest_msrs:
	kfree(vmx->guest_msrs);
uninit_vcpu:
	kvm_vcpu_uninit(&vmx->vcpu);
free_vcpu:
2550
	kmem_cache_free(kvm_vcpu_cache, vmx);
R
Rusty Russell 已提交
2551
	return ERR_PTR(err);
A
Avi Kivity 已提交
2552 2553
}

Y
Yang, Sheng 已提交
2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567
static void __init vmx_check_processor_compat(void *rtn)
{
	struct vmcs_config vmcs_conf;

	*(int *)rtn = 0;
	if (setup_vmcs_config(&vmcs_conf) < 0)
		*(int *)rtn = -EIO;
	if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
		printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
				smp_processor_id());
		*(int *)rtn = -EIO;
	}
}

2568
static struct kvm_x86_ops vmx_x86_ops = {
A
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	.cpu_has_kvm_support = cpu_has_kvm_support,
	.disabled_by_bios = vmx_disabled_by_bios,
	.hardware_setup = hardware_setup,
	.hardware_unsetup = hardware_unsetup,
Y
Yang, Sheng 已提交
2573
	.check_processor_compatibility = vmx_check_processor_compat,
A
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2574 2575
	.hardware_enable = hardware_enable,
	.hardware_disable = hardware_disable,
2576
	.cpu_has_accelerated_tpr = cpu_has_vmx_virtualize_apic_accesses,
A
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2577 2578 2579

	.vcpu_create = vmx_create_vcpu,
	.vcpu_free = vmx_free_vcpu,
2580
	.vcpu_reset = vmx_vcpu_reset,
A
Avi Kivity 已提交
2581

2582
	.prepare_guest_switch = vmx_save_host_state,
A
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2583 2584
	.vcpu_load = vmx_vcpu_load,
	.vcpu_put = vmx_vcpu_put,
A
Avi Kivity 已提交
2585
	.vcpu_decache = vmx_vcpu_decache,
A
Avi Kivity 已提交
2586 2587

	.set_guest_debug = set_guest_debug,
2588
	.guest_debug_pre = kvm_guest_debug_pre,
A
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2589 2590 2591 2592 2593 2594
	.get_msr = vmx_get_msr,
	.set_msr = vmx_set_msr,
	.get_segment_base = vmx_get_segment_base,
	.get_segment = vmx_get_segment,
	.set_segment = vmx_set_segment,
	.get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2595
	.decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
A
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2596 2597 2598
	.set_cr0 = vmx_set_cr0,
	.set_cr3 = vmx_set_cr3,
	.set_cr4 = vmx_set_cr4,
2599
#ifdef CONFIG_X86_64
A
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2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613
	.set_efer = vmx_set_efer,
#endif
	.get_idt = vmx_get_idt,
	.set_idt = vmx_set_idt,
	.get_gdt = vmx_get_gdt,
	.set_gdt = vmx_set_gdt,
	.cache_regs = vcpu_load_rsp_rip,
	.decache_regs = vcpu_put_rsp_rip,
	.get_rflags = vmx_get_rflags,
	.set_rflags = vmx_set_rflags,

	.tlb_flush = vmx_flush_tlb,

	.run = vmx_vcpu_run,
2614
	.handle_exit = kvm_handle_exit,
A
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2615
	.skip_emulated_instruction = skip_emulated_instruction,
I
Ingo Molnar 已提交
2616
	.patch_hypercall = vmx_patch_hypercall,
E
Eddie Dong 已提交
2617 2618
	.get_irq = vmx_get_irq,
	.set_irq = vmx_inject_irq,
2619 2620
	.queue_exception = vmx_queue_exception,
	.exception_injected = vmx_exception_injected,
2621 2622
	.inject_pending_irq = vmx_intr_assist,
	.inject_pending_vectors = do_interrupt_requests,
2623 2624

	.set_tss_addr = vmx_set_tss_addr,
A
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2625 2626 2627 2628
};

static int __init vmx_init(void)
{
2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648
	void *iova;
	int r;

	vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
	if (!vmx_io_bitmap_a)
		return -ENOMEM;

	vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
	if (!vmx_io_bitmap_b) {
		r = -ENOMEM;
		goto out;
	}

	/*
	 * Allow direct access to the PC debug port (it is often used for I/O
	 * delays, but the vmexits simply slow things down).
	 */
	iova = kmap(vmx_io_bitmap_a);
	memset(iova, 0xff, PAGE_SIZE);
	clear_bit(0x80, iova);
2649
	kunmap(vmx_io_bitmap_a);
2650 2651 2652

	iova = kmap(vmx_io_bitmap_b);
	memset(iova, 0xff, PAGE_SIZE);
2653
	kunmap(vmx_io_bitmap_b);
2654

2655
	r = kvm_init(&vmx_x86_ops, sizeof(struct vcpu_vmx), THIS_MODULE);
2656 2657 2658
	if (r)
		goto out1;

2659 2660 2661
	if (bypass_guest_pf)
		kvm_mmu_set_nonpresent_ptes(~0xffeull, 0ull);

2662 2663 2664 2665 2666 2667 2668
	return 0;

out1:
	__free_page(vmx_io_bitmap_b);
out:
	__free_page(vmx_io_bitmap_a);
	return r;
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2669 2670 2671 2672
}

static void __exit vmx_exit(void)
{
2673 2674 2675
	__free_page(vmx_io_bitmap_b);
	__free_page(vmx_io_bitmap_a);

2676
	kvm_exit();
A
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2677 2678 2679 2680
}

module_init(vmx_init)
module_exit(vmx_exit)