sm712fb.c 48.4 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
/*
 * Silicon Motion SM7XX frame buffer device
 *
 * Copyright (C) 2006 Silicon Motion Technology Corp.
 * Authors:  Ge Wang, gewang@siliconmotion.com
 *	     Boyod boyod.yang@siliconmotion.com.cn
 *
 * Copyright (C) 2009 Lemote, Inc.
 * Author:   Wu Zhangjin, wuzhangjin@gmail.com
 *
 * Copyright (C) 2011 Igalia, S.L.
 * Author:   Javier M. Mellid <jmunhoz@igalia.com>
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License. See the file COPYING in the main directory of this archive for
 * more details.
 *
 * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
 */

#include <linux/io.h>
#include <linux/fb.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/module.h>
#include <linux/console.h>
#include <linux/screen_info.h>

#include <linux/pm.h>

33
#include "sm712.h"
34 35

/*
36 37
 * Private structure
 */
38 39
struct smtcfb_info {
	struct pci_dev *pdev;
40
	struct fb_info *fb;
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
	u16 chip_id;
	u8  chip_rev_id;

	void __iomem *lfb;	/* linear frame buffer */
	void __iomem *dp_regs;	/* drawing processor control regs */
	void __iomem *vp_regs;	/* video processor control regs */
	void __iomem *cp_regs;	/* capture processor control regs */
	void __iomem *mmio;	/* memory map IO port */

	u_int width;
	u_int height;
	u_int hz;

	u32 colreg[17];
};

57
void __iomem *smtc_regbaseaddress;	/* Memory Map IO starting address */
58

59
static const struct fb_var_screeninfo smtcfb_var = {
60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94
	.xres           = 1024,
	.yres           = 600,
	.xres_virtual   = 1024,
	.yres_virtual   = 600,
	.bits_per_pixel = 16,
	.red            = {16, 8, 0},
	.green          = {8, 8, 0},
	.blue           = {0, 8, 0},
	.activate       = FB_ACTIVATE_NOW,
	.height         = -1,
	.width          = -1,
	.vmode          = FB_VMODE_NONINTERLACED,
	.nonstd         = 0,
	.accel_flags    = FB_ACCELF_TEXT,
};

static struct fb_fix_screeninfo smtcfb_fix = {
	.id             = "smXXXfb",
	.type           = FB_TYPE_PACKED_PIXELS,
	.visual         = FB_VISUAL_TRUECOLOR,
	.line_length    = 800 * 3,
	.accel          = FB_ACCEL_SMI_LYNX,
	.type_aux       = 0,
	.xpanstep       = 0,
	.ypanstep       = 0,
	.ywrapstep      = 0,
};

struct vesa_mode {
	char index[6];
	u16  lfb_width;
	u16  lfb_height;
	u16  lfb_depth;
};

95
static const struct vesa_mode vesa_mode_table[] = {
96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111
	{"0x301", 640,  480,  8},
	{"0x303", 800,  600,  8},
	{"0x305", 1024, 768,  8},
	{"0x307", 1280, 1024, 8},

	{"0x311", 640,  480,  16},
	{"0x314", 800,  600,  16},
	{"0x317", 1024, 768,  16},
	{"0x31A", 1280, 1024, 16},

	{"0x312", 640,  480,  24},
	{"0x315", 800,  600,  24},
	{"0x318", 1024, 768,  24},
	{"0x31B", 1280, 1024, 24},
};

112 113 114
/**********************************************************************
			 SM712 Mode table.
 **********************************************************************/
115
static const struct modeinit vgamode[] = {
116
	{
117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175
		/*  mode#0: 640 x 480  16Bpp  60Hz */
		640, 480, 16, 60,
		/*  Init_MISC */
		0xE3,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x00, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x30, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
			0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
			0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
			0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
			0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
			0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
			0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
			0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
			0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
		},
		{	/*  Init_CR90_CRA7 */
			0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
			0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
			0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
		},
	},
176
	{
177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235
		/*  mode#1: 640 x 480  24Bpp  60Hz */
		640, 480, 24, 60,
		/*  Init_MISC */
		0xE3,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x00, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x30, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
			0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
			0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
			0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
			0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
			0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
			0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
			0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
			0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
		},
		{	/*  Init_CR90_CRA7 */
			0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
			0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
			0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
		},
	},
236
	{
237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295
		/*  mode#0: 640 x 480  32Bpp  60Hz */
		640, 480, 32, 60,
		/*  Init_MISC */
		0xE3,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x00, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x30, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
			0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
			0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
			0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
			0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
			0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
			0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
			0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
			0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
		},
		{	/*  Init_CR90_CRA7 */
			0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
			0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
			0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
		},
	},
296

297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472
	{	/*  mode#2: 800 x 600  16Bpp  60Hz */
		800, 600, 16, 60,
		/*  Init_MISC */
		0x2B,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x03, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x30, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
			0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
			0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
			0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
			0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
			0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
		},
		{	/*  Init_SR80_SR93 */
			0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
			0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
			0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
			0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
		},
		{	/*  Init_CR90_CRA7 */
			0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
			0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
			0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
		},
	},
	{	/*  mode#3: 800 x 600  24Bpp  60Hz */
		800, 600, 24, 60,
		0x2B,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x03, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x30, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
			0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
			0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
			0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
			0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
			0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
			0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
			0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
		},
		{	/*  Init_CR90_CRA7 */
			0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
			0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
			0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
		},
	},
	{	/*  mode#7: 800 x 600  32Bpp  60Hz */
		800, 600, 32, 60,
		/*  Init_MISC */
		0x2B,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x03, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x30, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
			0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
			0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
			0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
			0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
			0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
		},
		{	/*  Init_SR80_SR93 */
			0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
			0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
			0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
			0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
			0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
		},
		{	/*  Init_CR90_CRA7 */
			0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
			0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
			0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
		},
	},
473
	/* We use 1024x768 table to light 1024x600 panel for lemote */
474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532
	{	/*  mode#4: 1024 x 600  16Bpp  60Hz  */
		1024, 600, 16, 60,
		/*  Init_MISC */
		0xEB,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x00, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
			0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x30, 0x02, 0x00, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
			0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
			0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
			0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
			0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
			0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
			0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
			0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
			0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
			0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
		},
		{	/*  Init_CR90_CRA7 */
			0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
			0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
			0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
		},
	},
533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591
	{	/*  1024 x 768  16Bpp  60Hz */
		1024, 768, 16, 60,
		/*  Init_MISC */
		0xEB,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x03, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x30, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
			0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
			0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
			0x0F, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
			0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
			0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
			0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
			0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
			0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
		},
		{	/*  Init_CR90_CRA7 */
			0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
			0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
			0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
		},
	},
592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768
	{	/*  mode#5: 1024 x 768  24Bpp  60Hz */
		1024, 768, 24, 60,
		/*  Init_MISC */
		0xEB,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x03, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x30, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
			0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
			0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
			0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
			0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
			0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
			0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
			0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
			0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
		},
		{	/*  Init_CR90_CRA7 */
			0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
			0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
			0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
		},
	},
	{	/*  mode#4: 1024 x 768  32Bpp  60Hz */
		1024, 768, 32, 60,
		/*  Init_MISC */
		0xEB,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x03, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x32, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
			0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
			0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
			0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
			0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
			0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
			0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
			0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
			0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
			0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
		},
		{	/*  Init_CR90_CRA7 */
			0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
			0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
			0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
		},
	},
	{	/*  mode#6: 320 x 240  16Bpp  60Hz */
		320, 240, 16, 60,
		/*  Init_MISC */
		0xEB,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x03, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x32, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
			0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
			0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
			0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
			0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
			0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
			0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
			0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
			0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
			0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
		},
		{	/*  Init_CR90_CRA7 */
			0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
			0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
			0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
		},
	},
769

770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828
	{	/*  mode#8: 320 x 240  32Bpp  60Hz */
		320, 240, 32, 60,
		/*  Init_MISC */
		0xEB,
		{	/*  Init_SR0_SR4 */
			0x03, 0x01, 0x0F, 0x03, 0x0E,
		},
		{	/*  Init_SR10_SR24 */
			0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
			0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
			0xC4, 0x32, 0x02, 0x01, 0x01,
		},
		{	/*  Init_SR30_SR75 */
			0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
			0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
			0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
			0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
			0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
			0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
			0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
			0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
			0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
		},
		{	/*  Init_SR80_SR93 */
			0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
			0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
			0x00, 0x00, 0x00, 0x00,
		},
		{	/*  Init_SRA0_SRAF */
			0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
			0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
		},
		{	/*  Init_GR00_GR08 */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
			0xFF,
		},
		{	/*  Init_AR00_AR14 */
			0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
			0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
			0x41, 0x00, 0x0F, 0x00, 0x00,
		},
		{	/*  Init_CR00_CR18 */
			0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
			0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
			0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
			0xFF,
		},
		{	/*  Init_CR30_CR4D */
			0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
			0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
			0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
			0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
		},
		{	/*  Init_CR90_CRA7 */
			0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
			0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
			0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
		},
	},
829 830
};

831
static struct screen_info smtc_scr_info;
832

833 834
static char *mode_option;

835
/* process command line options, get vga parameter */
836
static void __init sm7xx_vga_setup(char *options)
837 838 839 840
{
	int i;

	if (!options || !*options)
841
		return;
842 843 844 845 846

	smtc_scr_info.lfb_width = 0;
	smtc_scr_info.lfb_height = 0;
	smtc_scr_info.lfb_depth = 0;

847
	pr_debug("%s = %s\n", __func__, options);
848 849 850 851 852 853 854

	for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
		if (strstr(options, vesa_mode_table[i].index)) {
			smtc_scr_info.lfb_width  = vesa_mode_table[i].lfb_width;
			smtc_scr_info.lfb_height =
						vesa_mode_table[i].lfb_height;
			smtc_scr_info.lfb_depth  = vesa_mode_table[i].lfb_depth;
855
			return;
856 857 858 859
		}
	}
}

860 861
static void sm712_setpalette(int regno, unsigned int red, unsigned int green,
			     unsigned int blue, struct fb_info *info)
862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888
{
	/* set bit 5:4 = 01 (write LCD RAM only) */
	smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);

	smtc_mmiowb(regno, dac_reg);
	smtc_mmiowb(red >> 10, dac_val);
	smtc_mmiowb(green >> 10, dac_val);
	smtc_mmiowb(blue >> 10, dac_val);
}

/* chan_to_field
 *
 * convert a colour value into a field position
 *
 * from pxafb.c
 */

static inline unsigned int chan_to_field(unsigned int chan,
					 struct fb_bitfield *bf)
{
	chan &= 0xffff;
	chan >>= 16 - bf->length;
	return chan << bf->offset;
}

static int smtc_blank(int blank_mode, struct fb_info *info)
{
889 890
	struct smtcfb_info *sfb = info->par;

891 892 893 894
	/* clear DPMS setting */
	switch (blank_mode) {
	case FB_BLANK_UNBLANK:
		/* Screen On: HSync: On, VSync : On */
895 896 897 898 899 900 901 902 903 904 905 906 907

		switch (sfb->chip_id) {
		case 0x710:
		case 0x712:
			smtc_seqw(0x6a, 0x16);
			smtc_seqw(0x6b, 0x02);
		case 0x720:
			smtc_seqw(0x6a, 0x0d);
			smtc_seqw(0x6b, 0x02);
			break;
		}

		smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
908 909 910 911
		smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
		smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
		smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
		smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
912
		smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
913 914 915
		break;
	case FB_BLANK_NORMAL:
		/* Screen Off: HSync: On, VSync : On   Soft blank */
916 917 918
		smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
		smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
		smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
919
		smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
920
		smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
921 922 923 924 925
		smtc_seqw(0x6a, 0x16);
		smtc_seqw(0x6b, 0x02);
		break;
	case FB_BLANK_VSYNC_SUSPEND:
		/* Screen On: HSync: On, VSync : Off */
926 927 928
		smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
		smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
		smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
929 930
		smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
		smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
931
		smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
932 933
		smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
		smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
934 935
		smtc_seqw(0x6a, 0x0c);
		smtc_seqw(0x6b, 0x02);
936 937 938
		break;
	case FB_BLANK_HSYNC_SUSPEND:
		/* Screen On: HSync: Off, VSync : On */
939 940 941
		smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
		smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
		smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
942 943
		smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
		smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
944
		smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
945 946
		smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
		smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
947 948
		smtc_seqw(0x6a, 0x0c);
		smtc_seqw(0x6b, 0x02);
949 950 951
		break;
	case FB_BLANK_POWERDOWN:
		/* Screen On: HSync: Off, VSync : Off */
952 953 954
		smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
		smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
		smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
955 956
		smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
		smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
957
		smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
958 959
		smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
		smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
960 961
		smtc_seqw(0x6a, 0x0c);
		smtc_seqw(0x6b, 0x02);
962 963 964 965 966 967 968 969
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

970 971 972
static int smtc_setcolreg(unsigned int regno, unsigned int red,
			  unsigned int green, unsigned int blue,
			  unsigned int trans, struct fb_info *info)
973 974 975 976 977 978 979 980 981
{
	struct smtcfb_info *sfb;
	u32 val;

	sfb = info->par;

	if (regno > 255)
		return 1;

982
	switch (sfb->fb->fix.visual) {
983 984 985 986 987
	case FB_VISUAL_DIRECTCOLOR:
	case FB_VISUAL_TRUECOLOR:
		/*
		 * 16/32 bit true-colour, use pseudo-palette for 16 base color
		 */
988 989 990 991 992 993 994 995
		if (regno >= 16)
			break;
		if (sfb->fb->var.bits_per_pixel == 16) {
			u32 *pal = sfb->fb->pseudo_palette;

			val = chan_to_field(red, &sfb->fb->var.red);
			val |= chan_to_field(green, &sfb->fb->var.green);
			val |= chan_to_field(blue, &sfb->fb->var.blue);
996
			pal[regno] = pal_rgb(red, green, blue, val);
997 998
		} else {
			u32 *pal = sfb->fb->pseudo_palette;
999

1000 1001 1002
			val = chan_to_field(red, &sfb->fb->var.red);
			val |= chan_to_field(green, &sfb->fb->var.green);
			val |= chan_to_field(blue, &sfb->fb->var.blue);
1003
			pal[regno] = big_swap(val);
1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018
		}
		break;

	case FB_VISUAL_PSEUDOCOLOR:
		/* color depth 8 bit */
		sm712_setpalette(regno, red, green, blue, info);
		break;

	default:
		return 1;	/* unknown type */
	}

	return 0;
}

1019 1020
static ssize_t smtcfb_read(struct fb_info *info, char __user *buf,
			   size_t count, loff_t *ppos)
1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052
{
	unsigned long p = *ppos;

	u32 *buffer, *dst;
	u32 __iomem *src;
	int c, i, cnt = 0, err = 0;
	unsigned long total_size;

	if (!info || !info->screen_base)
		return -ENODEV;

	if (info->state != FBINFO_STATE_RUNNING)
		return -EPERM;

	total_size = info->screen_size;

	if (total_size == 0)
		total_size = info->fix.smem_len;

	if (p >= total_size)
		return 0;

	if (count >= total_size)
		count = total_size;

	if (count + p > total_size)
		count = total_size - p;

	buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
	if (!buffer)
		return -ENOMEM;

1053
	src = (u32 __iomem *)(info->screen_base + p);
1054 1055 1056 1057 1058 1059 1060 1061 1062

	if (info->fbops->fb_sync)
		info->fbops->fb_sync(info);

	while (count) {
		c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
		dst = buffer;
		for (i = c >> 2; i--;) {
			*dst = fb_readl(src++);
1063
			*dst = big_swap(*dst);
1064 1065 1066
			dst++;
		}
		if (c & 3) {
1067 1068
			u8 *dst8 = (u8 *)dst;
			u8 __iomem *src8 = (u8 __iomem *)src;
1069 1070 1071 1072 1073 1074 1075 1076 1077

			for (i = c & 3; i--;) {
				if (i & 1) {
					*dst8++ = fb_readb(++src8);
				} else {
					*dst8++ = fb_readb(--src8);
					src8 += 2;
				}
			}
1078
			src = (u32 __iomem *)src8;
1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095
		}

		if (copy_to_user(buf, buffer, c)) {
			err = -EFAULT;
			break;
		}
		*ppos += c;
		buf += c;
		cnt += c;
		count -= c;
	}

	kfree(buffer);

	return (err) ? err : cnt;
}

1096 1097
static ssize_t smtcfb_write(struct fb_info *info, const char __user *buf,
			    size_t count, loff_t *ppos)
1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135
{
	unsigned long p = *ppos;

	u32 *buffer, *src;
	u32 __iomem *dst;
	int c, i, cnt = 0, err = 0;
	unsigned long total_size;

	if (!info || !info->screen_base)
		return -ENODEV;

	if (info->state != FBINFO_STATE_RUNNING)
		return -EPERM;

	total_size = info->screen_size;

	if (total_size == 0)
		total_size = info->fix.smem_len;

	if (p > total_size)
		return -EFBIG;

	if (count > total_size) {
		err = -EFBIG;
		count = total_size;
	}

	if (count + p > total_size) {
		if (!err)
			err = -ENOSPC;

		count = total_size - p;
	}

	buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
	if (!buffer)
		return -ENOMEM;

1136
	dst = (u32 __iomem *)(info->screen_base + p);
1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150

	if (info->fbops->fb_sync)
		info->fbops->fb_sync(info);

	while (count) {
		c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
		src = buffer;

		if (copy_from_user(src, buf, c)) {
			err = -EFAULT;
			break;
		}

		for (i = c >> 2; i--;) {
1151
			fb_writel(big_swap(*src), dst++);
1152 1153 1154
			src++;
		}
		if (c & 3) {
1155 1156
			u8 *src8 = (u8 *)src;
			u8 __iomem *dst8 = (u8 __iomem *)dst;
1157 1158 1159 1160 1161 1162 1163 1164 1165

			for (i = c & 3; i--;) {
				if (i & 1) {
					fb_writeb(*src8++, ++dst8);
				} else {
					fb_writeb(*src8++, --dst8);
					dst8 += 2;
				}
			}
1166
			dst = (u32 __iomem *)dst8;
1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182
		}

		*ppos += c;
		buf += c;
		cnt += c;
		count -= c;
	}

	kfree(buffer);

	return (cnt) ? cnt : err;
}

static void sm7xx_set_timing(struct smtcfb_info *sfb)
{
	int i = 0, j = 0;
1183
	u32 m_nscreenstride;
1184 1185

	dev_dbg(&sfb->pdev->dev,
1186 1187
		"sfb->width=%d sfb->height=%d sfb->fb->var.bits_per_pixel=%d sfb->hz=%d\n",
		sfb->width, sfb->height, sfb->fb->var.bits_per_pixel, sfb->hz);
1188

1189
	for (j = 0; j < ARRAY_SIZE(vgamode); j++) {
1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218
		if (vgamode[j].mmsizex != sfb->width ||
		    vgamode[j].mmsizey != sfb->height ||
		    vgamode[j].bpp != sfb->fb->var.bits_per_pixel ||
		    vgamode[j].hz != sfb->hz)
			continue;

		dev_dbg(&sfb->pdev->dev,
			"vgamode[j].mmsizex=%d vgamode[j].mmSizeY=%d vgamode[j].bpp=%d vgamode[j].hz=%d\n",
			vgamode[j].mmsizex, vgamode[j].mmsizey,
			vgamode[j].bpp, vgamode[j].hz);

		dev_dbg(&sfb->pdev->dev, "vgamode index=%d\n", j);

		smtc_mmiowb(0x0, 0x3c6);

		smtc_seqw(0, 0x1);

		smtc_mmiowb(vgamode[j].init_misc, 0x3c2);

		/* init SEQ register SR00 - SR04 */
		for (i = 0; i < SIZE_SR00_SR04; i++)
			smtc_seqw(i, vgamode[j].init_sr00_sr04[i]);

		/* init SEQ register SR10 - SR24 */
		for (i = 0; i < SIZE_SR10_SR24; i++)
			smtc_seqw(i + 0x10, vgamode[j].init_sr10_sr24[i]);

		/* init SEQ register SR30 - SR75 */
		for (i = 0; i < SIZE_SR30_SR75; i++)
1219
			if ((i + 0x30) != 0x30 && (i + 0x30) != 0x62 &&
1220 1221 1222
			    (i + 0x30) != 0x6a && (i + 0x30) != 0x6b &&
			    (i + 0x30) != 0x70 && (i + 0x30) != 0x71 &&
			    (i + 0x30) != 0x74 && (i + 0x30) != 0x75)
1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246
				smtc_seqw(i + 0x30,
					  vgamode[j].init_sr30_sr75[i]);

		/* init SEQ register SR80 - SR93 */
		for (i = 0; i < SIZE_SR80_SR93; i++)
			smtc_seqw(i + 0x80, vgamode[j].init_sr80_sr93[i]);

		/* init SEQ register SRA0 - SRAF */
		for (i = 0; i < SIZE_SRA0_SRAF; i++)
			smtc_seqw(i + 0xa0, vgamode[j].init_sra0_sraf[i]);

		/* init Graphic register GR00 - GR08 */
		for (i = 0; i < SIZE_GR00_GR08; i++)
			smtc_grphw(i, vgamode[j].init_gr00_gr08[i]);

		/* init Attribute register AR00 - AR14 */
		for (i = 0; i < SIZE_AR00_AR14; i++)
			smtc_attrw(i, vgamode[j].init_ar00_ar14[i]);

		/* init CRTC register CR00 - CR18 */
		for (i = 0; i < SIZE_CR00_CR18; i++)
			smtc_crtcw(i, vgamode[j].init_cr00_cr18[i]);

		/* init CRTC register CR30 - CR4D */
1247 1248 1249 1250
		for (i = 0; i < SIZE_CR30_CR4D; i++) {
			if ((i + 0x30) >= 0x3B && (i + 0x30) <= 0x3F)
				/* side-effect, don't write to CR3B-CR3F */
				continue;
1251
			smtc_crtcw(i + 0x30, vgamode[j].init_cr30_cr4d[i]);
1252
		}
1253 1254 1255 1256

		/* init CRTC register CR90 - CRA7 */
		for (i = 0; i < SIZE_CR90_CRA7; i++)
			smtc_crtcw(i + 0x90, vgamode[j].init_cr90_cra7[i]);
1257 1258 1259 1260 1261 1262 1263 1264
	}
	smtc_mmiowb(0x67, 0x3c2);

	/* set VPR registers */
	writel(0x0, sfb->vp_regs + 0x0C);
	writel(0x0, sfb->vp_regs + 0x40);

	/* set data width */
1265
	m_nscreenstride = (sfb->width * sfb->fb->var.bits_per_pixel) / 64;
1266
	switch (sfb->fb->var.bits_per_pixel) {
1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279
	case 8:
		writel(0x0, sfb->vp_regs + 0x0);
		break;
	case 16:
		writel(0x00020000, sfb->vp_regs + 0x0);
		break;
	case 24:
		writel(0x00040000, sfb->vp_regs + 0x0);
		break;
	case 32:
		writel(0x00030000, sfb->vp_regs + 0x0);
		break;
	}
1280
	writel((u32)(((m_nscreenstride + 2) << 16) | m_nscreenstride),
1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296
	       sfb->vp_regs + 0x10);
}

static void smtc_set_timing(struct smtcfb_info *sfb)
{
	switch (sfb->chip_id) {
	case 0x710:
	case 0x712:
	case 0x720:
		sm7xx_set_timing(sfb);
		break;
	}
}

static void smtcfb_setmode(struct smtcfb_info *sfb)
{
1297
	switch (sfb->fb->var.bits_per_pixel) {
1298
	case 32:
1299 1300 1301 1302 1303 1304 1305 1306
		sfb->fb->fix.visual       = FB_VISUAL_TRUECOLOR;
		sfb->fb->fix.line_length  = sfb->fb->var.xres * 4;
		sfb->fb->var.red.length   = 8;
		sfb->fb->var.green.length = 8;
		sfb->fb->var.blue.length  = 8;
		sfb->fb->var.red.offset   = 16;
		sfb->fb->var.green.offset = 8;
		sfb->fb->var.blue.offset  = 0;
1307 1308
		break;
	case 24:
1309 1310 1311 1312 1313 1314 1315 1316
		sfb->fb->fix.visual       = FB_VISUAL_TRUECOLOR;
		sfb->fb->fix.line_length  = sfb->fb->var.xres * 3;
		sfb->fb->var.red.length   = 8;
		sfb->fb->var.green.length = 8;
		sfb->fb->var.blue.length  = 8;
		sfb->fb->var.red.offset   = 16;
		sfb->fb->var.green.offset = 8;
		sfb->fb->var.blue.offset  = 0;
1317 1318
		break;
	case 8:
1319 1320 1321 1322 1323 1324 1325 1326
		sfb->fb->fix.visual       = FB_VISUAL_PSEUDOCOLOR;
		sfb->fb->fix.line_length  = sfb->fb->var.xres;
		sfb->fb->var.red.length   = 3;
		sfb->fb->var.green.length = 3;
		sfb->fb->var.blue.length  = 2;
		sfb->fb->var.red.offset   = 5;
		sfb->fb->var.green.offset = 2;
		sfb->fb->var.blue.offset  = 0;
1327 1328 1329
		break;
	case 16:
	default:
1330 1331 1332 1333 1334 1335 1336 1337
		sfb->fb->fix.visual       = FB_VISUAL_TRUECOLOR;
		sfb->fb->fix.line_length  = sfb->fb->var.xres * 2;
		sfb->fb->var.red.length   = 5;
		sfb->fb->var.green.length = 6;
		sfb->fb->var.blue.length  = 5;
		sfb->fb->var.red.offset   = 11;
		sfb->fb->var.green.offset = 5;
		sfb->fb->var.blue.offset  = 0;
1338 1339 1340
		break;
	}

1341 1342
	sfb->width  = sfb->fb->var.xres;
	sfb->height = sfb->fb->var.yres;
1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389
	sfb->hz = 60;
	smtc_set_timing(sfb);
}

static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
	/* sanity checks */
	if (var->xres_virtual < var->xres)
		var->xres_virtual = var->xres;

	if (var->yres_virtual < var->yres)
		var->yres_virtual = var->yres;

	/* set valid default bpp */
	if ((var->bits_per_pixel != 8)  && (var->bits_per_pixel != 16) &&
	    (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
		var->bits_per_pixel = 16;

	return 0;
}

static int smtc_set_par(struct fb_info *info)
{
	smtcfb_setmode(info->par);

	return 0;
}

static struct fb_ops smtcfb_ops = {
	.owner        = THIS_MODULE,
	.fb_check_var = smtc_check_var,
	.fb_set_par   = smtc_set_par,
	.fb_setcolreg = smtc_setcolreg,
	.fb_blank     = smtc_blank,
	.fb_fillrect  = cfb_fillrect,
	.fb_imageblit = cfb_imageblit,
	.fb_copyarea  = cfb_copyarea,
	.fb_read      = smtcfb_read,
	.fb_write     = smtcfb_write,
};

/*
 * Unmap in the memory mapped IO registers
 */

static void smtc_unmap_mmio(struct smtcfb_info *sfb)
{
1390 1391
	if (sfb && smtc_regbaseaddress)
		smtc_regbaseaddress = NULL;
1392 1393 1394 1395 1396 1397 1398
}

/*
 * Map in the screen memory
 */

static int smtc_map_smem(struct smtcfb_info *sfb,
1399
			 struct pci_dev *pdev, u_long smem_len)
1400
{
1401
	sfb->fb->fix.smem_start = pci_resource_start(pdev, 0);
1402

1403 1404 1405 1406 1407
	if (sfb->chip_id == 0x720)
		/* on SM720, the framebuffer starts at the 1 MB offset */
		sfb->fb->fix.smem_start += 0x00200000;

	/* XXX: is it safe for SM720 on Big-Endian? */
1408
	if (sfb->fb->var.bits_per_pixel == 32)
1409
		sfb->fb->fix.smem_start += big_addr;
1410

1411
	sfb->fb->fix.smem_len = smem_len;
1412

1413
	sfb->fb->screen_base = sfb->lfb;
1414

1415
	if (!sfb->fb->screen_base) {
1416
		dev_err(&pdev->dev,
1417
			"%s: unable to map screen memory\n", sfb->fb->fix.id);
1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429
		return -ENOMEM;
	}

	return 0;
}

/*
 * Unmap in the screen memory
 *
 */
static void smtc_unmap_smem(struct smtcfb_info *sfb)
{
1430 1431 1432
	if (sfb && sfb->fb->screen_base) {
		iounmap(sfb->fb->screen_base);
		sfb->fb->screen_base = NULL;
1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444
	}
}

/*
 * We need to wake up the device and make sure its in linear memory mode.
 */
static inline void sm7xx_init_hw(void)
{
	outb_p(0x18, 0x3c4);
	outb_p(0x11, 0x3c5);
}

1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477
static u_long sm7xx_vram_probe(struct smtcfb_info *sfb)
{
	u8 vram;

	switch (sfb->chip_id) {
	case 0x710:
	case 0x712:
		/*
		 * Assume SM712 graphics chip has 4MB VRAM.
		 *
		 * FIXME: SM712 can have 2MB VRAM, which is used on earlier
		 * laptops, such as IBM Thinkpad 240X. This driver would
		 * probably crash on those machines. If anyone gets one of
		 * those and is willing to help, run "git blame" and send me
		 * an E-mail.
		 */
		return 0x00400000;
	case 0x720:
		outb_p(0x76, 0x3c4);
		vram = inb_p(0x3c5) >> 6;

		if (vram == 0x00)
			return 0x00800000;  /* 8 MB */
		else if (vram == 0x01)
			return 0x01000000;  /* 16 MB */
		else if (vram == 0x02)
			return 0x00400000;  /* illegal, fallback to 4 MB */
		else if (vram == 0x03)
			return 0x00400000;  /* 4 MB */
	}
	return 0;  /* unknown hardware */
}

1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514
static void sm7xx_resolution_probe(struct smtcfb_info *sfb)
{
	/* get mode parameter from smtc_scr_info */
	if (smtc_scr_info.lfb_width != 0) {
		sfb->fb->var.xres = smtc_scr_info.lfb_width;
		sfb->fb->var.yres = smtc_scr_info.lfb_height;
		sfb->fb->var.bits_per_pixel = smtc_scr_info.lfb_depth;
		goto final;
	}

	/*
	 * No parameter, default resolution is 1024x768-16.
	 *
	 * FIXME: earlier laptops, such as IBM Thinkpad 240X, has a 800x600
	 * panel, also see the comments about Thinkpad 240X above.
	 */
	sfb->fb->var.xres = SCREEN_X_RES;
	sfb->fb->var.yres = SCREEN_Y_RES_PC;
	sfb->fb->var.bits_per_pixel = SCREEN_BPP;

#ifdef CONFIG_MIPS
	/*
	 * Loongson MIPS netbooks use 1024x600 LCD panels, which is the original
	 * target platform of this driver, but nearly all old x86 laptops have
	 * 1024x768. Lighting 768 panels using 600's timings would partially
	 * garble the display, so we don't want that. But it's not possible to
	 * distinguish them reliably.
	 *
	 * So we change the default to 768, but keep 600 as-is on MIPS.
	 */
	sfb->fb->var.yres = SCREEN_Y_RES_NETBOOK;
#endif

final:
	big_pixel_depth(sfb->fb->var.bits_per_pixel, smtc_scr_info.lfb_depth);
}

1515
static int smtcfb_pci_probe(struct pci_dev *pdev,
1516
			    const struct pci_device_id *ent)
1517 1518
{
	struct smtcfb_info *sfb;
1519
	struct fb_info *info;
1520
	u_long smem_size;
1521 1522 1523
	int err;
	unsigned long mmio_base;

S
Sudip Mukherjee 已提交
1524
	dev_info(&pdev->dev, "Silicon Motion display driver.\n");
1525 1526 1527 1528 1529

	err = pci_enable_device(pdev);	/* enable SMTC chip */
	if (err)
		return err;

1530 1531 1532 1533 1534 1535
	err = pci_request_region(pdev, 0, "sm7xxfb");
	if (err < 0) {
		dev_err(&pdev->dev, "cannot reserve framebuffer region\n");
		goto failed_regions;
	}

1536 1537
	sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);

1538 1539 1540
	info = framebuffer_alloc(sizeof(*sfb), &pdev->dev);
	if (!info) {
		dev_err(&pdev->dev, "framebuffer_alloc failed\n");
1541 1542 1543 1544
		err = -ENOMEM;
		goto failed_free;
	}

1545 1546
	sfb = info->par;
	sfb->fb = info;
1547
	sfb->chip_id = ent->device;
1548 1549 1550 1551 1552 1553 1554
	sfb->pdev = pdev;
	info->flags = FBINFO_FLAG_DEFAULT;
	info->fbops = &smtcfb_ops;
	info->fix = smtcfb_fix;
	info->var = smtcfb_var;
	info->pseudo_palette = sfb->colreg;
	info->par = sfb;
1555 1556 1557 1558 1559 1560 1561 1562 1563

	pci_set_drvdata(pdev, sfb);

	sm7xx_init_hw();

	/* Map address and memory detection */
	mmio_base = pci_resource_start(pdev, 0);
	pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);

1564 1565 1566 1567
	smem_size = sm7xx_vram_probe(sfb);
	dev_info(&pdev->dev, "%lu MiB of VRAM detected.\n",
					smem_size / 1048576);

1568 1569 1570
	switch (sfb->chip_id) {
	case 0x710:
	case 0x712:
1571 1572
		sfb->fb->fix.mmio_start = mmio_base + 0x00400000;
		sfb->fb->fix.mmio_len = 0x00400000;
1573
		sfb->lfb = ioremap(mmio_base, mmio_addr);
1574 1575 1576 1577 1578 1579 1580 1581
		if (!sfb->lfb) {
			dev_err(&pdev->dev,
				"%s: unable to map memory mapped IO!\n",
				sfb->fb->fix.id);
			err = -ENOMEM;
			goto failed_fb;
		}

1582
		sfb->mmio = (smtc_regbaseaddress =
1583 1584 1585
		    sfb->lfb + 0x00700000);
		sfb->dp_regs = sfb->lfb + 0x00408000;
		sfb->vp_regs = sfb->lfb + 0x0040c000;
1586
		if (sfb->fb->var.bits_per_pixel == 32) {
1587
			sfb->lfb += big_addr;
S
Sudip Mukherjee 已提交
1588
			dev_info(&pdev->dev, "sfb->lfb=%p\n", sfb->lfb);
1589 1590 1591 1592 1593 1594 1595 1596 1597
		}

		/* set MCLK = 14.31818 * (0x16 / 0x2) */
		smtc_seqw(0x6a, 0x16);
		smtc_seqw(0x6b, 0x02);
		smtc_seqw(0x62, 0x3e);
		/* enable PCI burst */
		smtc_seqw(0x17, 0x20);
		/* enable word swap */
1598
		if (sfb->fb->var.bits_per_pixel == 32)
1599
			seqw17();
1600 1601
		break;
	case 0x720:
1602 1603
		sfb->fb->fix.mmio_start = mmio_base;
		sfb->fb->fix.mmio_len = 0x00200000;
1604
		sfb->dp_regs = ioremap(mmio_base, 0x00200000 + smem_size);
1605
		sfb->lfb = sfb->dp_regs + 0x00200000;
1606
		sfb->mmio = (smtc_regbaseaddress =
1607 1608 1609 1610 1611 1612 1613 1614 1615
		    sfb->dp_regs + 0x000c0000);
		sfb->vp_regs = sfb->dp_regs + 0x800;

		smtc_seqw(0x62, 0xff);
		smtc_seqw(0x6a, 0x0d);
		smtc_seqw(0x6b, 0x02);
		break;
	default:
		dev_err(&pdev->dev,
S
Sudip Mukherjee 已提交
1616
			"No valid Silicon Motion display chip was detected!\n");
1617 1618 1619 1620

		goto failed_fb;
	}

1621 1622 1623
	/* probe and decide resolution */
	sm7xx_resolution_probe(sfb);

1624
	/* can support 32 bpp */
1625
	if (sfb->fb->var.bits_per_pixel == 15)
1626
		sfb->fb->var.bits_per_pixel = 16;
1627

1628 1629
	sfb->fb->var.xres_virtual = sfb->fb->var.xres;
	sfb->fb->var.yres_virtual = sfb->fb->var.yres;
1630 1631 1632 1633
	err = smtc_map_smem(sfb, pdev, smem_size);
	if (err)
		goto failed;

1634 1635 1636 1637 1638
	/*
	 * The screen would be temporarily garbled when sm712fb takes over
	 * vesafb or VGA text mode. Zero the framebuffer.
	 */
	memset_io(sfb->lfb, 0, sfb->fb->fix.smem_len);
1639

1640
	err = register_framebuffer(info);
1641 1642 1643 1644
	if (err < 0)
		goto failed;

	dev_info(&pdev->dev,
S
Sudip Mukherjee 已提交
1645
		 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.\n",
1646 1647
		 sfb->chip_id, sfb->chip_rev_id, sfb->fb->var.xres,
		 sfb->fb->var.yres, sfb->fb->var.bits_per_pixel);
1648 1649 1650 1651

	return 0;

failed:
S
Sudip Mukherjee 已提交
1652
	dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.\n");
1653 1654 1655 1656

	smtc_unmap_smem(sfb);
	smtc_unmap_mmio(sfb);
failed_fb:
1657
	framebuffer_release(info);
1658 1659

failed_free:
1660 1661 1662
	pci_release_region(pdev, 0);

failed_regions:
1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679
	pci_disable_device(pdev);

	return err;
}

/*
 * 0x710 (LynxEM)
 * 0x712 (LynxEM+)
 * 0x720 (Lynx3DM, Lynx3DM+)
 */
static const struct pci_device_id smtcfb_pci_table[] = {
	{ PCI_DEVICE(0x126f, 0x710), },
	{ PCI_DEVICE(0x126f, 0x712), },
	{ PCI_DEVICE(0x126f, 0x720), },
	{0,}
};

1680 1681
MODULE_DEVICE_TABLE(pci, smtcfb_pci_table);

1682 1683 1684 1685 1686 1687 1688
static void smtcfb_pci_remove(struct pci_dev *pdev)
{
	struct smtcfb_info *sfb;

	sfb = pci_get_drvdata(pdev);
	smtc_unmap_smem(sfb);
	smtc_unmap_mmio(sfb);
1689 1690
	unregister_framebuffer(sfb->fb);
	framebuffer_release(sfb->fb);
1691
	pci_release_region(pdev, 0);
1692
	pci_disable_device(pdev);
1693 1694
}

1695
static int __maybe_unused smtcfb_pci_suspend(struct device *device)
1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct smtcfb_info *sfb;

	sfb = pci_get_drvdata(pdev);

	/* set the hw in sleep mode use external clock and self memory refresh
	 * so that we can turn off internal PLLs later on
	 */
	smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
	smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));

	console_lock();
1709
	fb_set_suspend(sfb->fb, 1);
1710 1711 1712 1713 1714 1715 1716 1717
	console_unlock();

	/* additionally turn off all function blocks including internal PLLs */
	smtc_seqw(0x21, 0xff);

	return 0;
}

1718
static int __maybe_unused smtcfb_pci_resume(struct device *device)
1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735
{
	struct pci_dev *pdev = to_pci_dev(device);
	struct smtcfb_info *sfb;

	sfb = pci_get_drvdata(pdev);

	/* reinit hardware */
	sm7xx_init_hw();
	switch (sfb->chip_id) {
	case 0x710:
	case 0x712:
		/* set MCLK = 14.31818 *  (0x16 / 0x2) */
		smtc_seqw(0x6a, 0x16);
		smtc_seqw(0x6b, 0x02);
		smtc_seqw(0x62, 0x3e);
		/* enable PCI burst */
		smtc_seqw(0x17, 0x20);
1736
		if (sfb->fb->var.bits_per_pixel == 32)
1737
			seqw17();
1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751
		break;
	case 0x720:
		smtc_seqw(0x62, 0xff);
		smtc_seqw(0x6a, 0x0d);
		smtc_seqw(0x6b, 0x02);
		break;
	}

	smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
	smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));

	smtcfb_setmode(sfb);

	console_lock();
1752
	fb_set_suspend(sfb->fb, 0);
1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764
	console_unlock();

	return 0;
}

static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);

static struct pci_driver smtcfb_driver = {
	.name = "smtcfb",
	.id_table = smtcfb_pci_table,
	.probe = smtcfb_pci_probe,
	.remove = smtcfb_pci_remove,
1765
	.driver.pm  = &sm7xx_pm_ops,
1766 1767
};

1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788
static int __init sm712fb_init(void)
{
	char *option = NULL;

	if (fb_get_options("sm712fb", &option))
		return -ENODEV;
	if (option && *option)
		mode_option = option;
	sm7xx_vga_setup(mode_option);

	return pci_register_driver(&smtcfb_driver);
}

module_init(sm712fb_init);

static void __exit sm712fb_exit(void)
{
	pci_unregister_driver(&smtcfb_driver);
}

module_exit(sm712fb_exit);
1789 1790 1791 1792

MODULE_AUTHOR("Siliconmotion ");
MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
MODULE_LICENSE("GPL");