r8152.c 88.2 KB
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/*
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 *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
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 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 */

#include <linux/signal.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/usb.h>
#include <linux/crc32.h>
#include <linux/if_vlan.h>
#include <linux/uaccess.h>
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#include <linux/list.h>
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#include <linux/ip.h>
#include <linux/ipv6.h>
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#include <net/ip6_checksum.h>
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#include <uapi/linux/mdio.h>
#include <linux/mdio.h>
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/* Version Information */
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#define DRIVER_VERSION "v1.07.0 (2014/10/09)"
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#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
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#define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
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#define MODULENAME "r8152"

#define R8152_PHY_ID		32

#define PLA_IDR			0xc000
#define PLA_RCR			0xc010
#define PLA_RMS			0xc016
#define PLA_RXFIFO_CTRL0	0xc0a0
#define PLA_RXFIFO_CTRL1	0xc0a4
#define PLA_RXFIFO_CTRL2	0xc0a8
#define PLA_FMC			0xc0b4
#define PLA_CFG_WOL		0xc0b6
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#define PLA_TEREDO_CFG		0xc0bc
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#define PLA_MAR			0xcd00
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#define PLA_BACKUP		0xd000
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#define PAL_BDC_CR		0xd1a0
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#define PLA_TEREDO_TIMER	0xd2cc
#define PLA_REALWOW_TIMER	0xd2e8
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#define PLA_LEDSEL		0xdd90
#define PLA_LED_FEATURE		0xdd92
#define PLA_PHYAR		0xde00
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#define PLA_BOOT_CTRL		0xe004
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#define PLA_GPHY_INTR_IMR	0xe022
#define PLA_EEE_CR		0xe040
#define PLA_EEEP_CR		0xe080
#define PLA_MAC_PWR_CTRL	0xe0c0
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#define PLA_MAC_PWR_CTRL2	0xe0ca
#define PLA_MAC_PWR_CTRL3	0xe0cc
#define PLA_MAC_PWR_CTRL4	0xe0ce
#define PLA_WDT6_CTRL		0xe428
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#define PLA_TCR0		0xe610
#define PLA_TCR1		0xe612
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#define PLA_MTPS		0xe615
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#define PLA_TXFIFO_CTRL		0xe618
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#define PLA_RSTTALLY		0xe800
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#define PLA_CR			0xe813
#define PLA_CRWECR		0xe81c
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#define PLA_CONFIG12		0xe81e	/* CONFIG1, CONFIG2 */
#define PLA_CONFIG34		0xe820	/* CONFIG3, CONFIG4 */
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#define PLA_CONFIG5		0xe822
#define PLA_PHY_PWR		0xe84c
#define PLA_OOB_CTRL		0xe84f
#define PLA_CPCR		0xe854
#define PLA_MISC_0		0xe858
#define PLA_MISC_1		0xe85a
#define PLA_OCP_GPHY_BASE	0xe86c
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#define PLA_TALLYCNT		0xe890
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#define PLA_SFF_STS_7		0xe8de
#define PLA_PHYSTATUS		0xe908
#define PLA_BP_BA		0xfc26
#define PLA_BP_0		0xfc28
#define PLA_BP_1		0xfc2a
#define PLA_BP_2		0xfc2c
#define PLA_BP_3		0xfc2e
#define PLA_BP_4		0xfc30
#define PLA_BP_5		0xfc32
#define PLA_BP_6		0xfc34
#define PLA_BP_7		0xfc36
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#define PLA_BP_EN		0xfc38
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#define USB_U2P3_CTRL		0xb460
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#define USB_DEV_STAT		0xb808
#define USB_USB_CTRL		0xd406
#define USB_PHY_CTRL		0xd408
#define USB_TX_AGG		0xd40a
#define USB_RX_BUF_TH		0xd40c
#define USB_USB_TIMER		0xd428
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#define USB_RX_EARLY_AGG	0xd42c
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#define USB_PM_CTRL_STATUS	0xd432
#define USB_TX_DMA		0xd434
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#define USB_TOLERANCE		0xd490
#define USB_LPM_CTRL		0xd41a
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#define USB_UPS_CTRL		0xd800
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#define USB_MISC_0		0xd81a
#define USB_POWER_CUT		0xd80a
#define USB_AFE_CTRL2		0xd824
#define USB_WDT11_CTRL		0xe43c
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#define USB_BP_BA		0xfc26
#define USB_BP_0		0xfc28
#define USB_BP_1		0xfc2a
#define USB_BP_2		0xfc2c
#define USB_BP_3		0xfc2e
#define USB_BP_4		0xfc30
#define USB_BP_5		0xfc32
#define USB_BP_6		0xfc34
#define USB_BP_7		0xfc36
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#define USB_BP_EN		0xfc38
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/* OCP Registers */
#define OCP_ALDPS_CONFIG	0x2010
#define OCP_EEE_CONFIG1		0x2080
#define OCP_EEE_CONFIG2		0x2092
#define OCP_EEE_CONFIG3		0x2094
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#define OCP_BASE_MII		0xa400
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#define OCP_EEE_AR		0xa41a
#define OCP_EEE_DATA		0xa41c
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#define OCP_PHY_STATUS		0xa420
#define OCP_POWER_CFG		0xa430
#define OCP_EEE_CFG		0xa432
#define OCP_SRAM_ADDR		0xa436
#define OCP_SRAM_DATA		0xa438
#define OCP_DOWN_SPEED		0xa442
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#define OCP_EEE_ABLE		0xa5c4
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#define OCP_EEE_ADV		0xa5d0
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#define OCP_EEE_LPABLE		0xa5d2
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#define OCP_ADC_CFG		0xbc06

/* SRAM Register */
#define SRAM_LPF_CFG		0x8012
#define SRAM_10M_AMP1		0x8080
#define SRAM_10M_AMP2		0x8082
#define SRAM_IMPEDANCE		0x8084
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/* PLA_RCR */
#define RCR_AAP			0x00000001
#define RCR_APM			0x00000002
#define RCR_AM			0x00000004
#define RCR_AB			0x00000008
#define RCR_ACPT_ALL		(RCR_AAP | RCR_APM | RCR_AM | RCR_AB)

/* PLA_RXFIFO_CTRL0 */
#define RXFIFO_THR1_NORMAL	0x00080002
#define RXFIFO_THR1_OOB		0x01800003

/* PLA_RXFIFO_CTRL1 */
#define RXFIFO_THR2_FULL	0x00000060
#define RXFIFO_THR2_HIGH	0x00000038
#define RXFIFO_THR2_OOB		0x0000004a
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#define RXFIFO_THR2_NORMAL	0x00a0
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/* PLA_RXFIFO_CTRL2 */
#define RXFIFO_THR3_FULL	0x00000078
#define RXFIFO_THR3_HIGH	0x00000048
#define RXFIFO_THR3_OOB		0x0000005a
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#define RXFIFO_THR3_NORMAL	0x0110
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/* PLA_TXFIFO_CTRL */
#define TXFIFO_THR_NORMAL	0x00400008
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#define TXFIFO_THR_NORMAL2	0x01000008
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/* PLA_FMC */
#define FMC_FCR_MCU_EN		0x0001

/* PLA_EEEP_CR */
#define EEEP_CR_EEEP_TX		0x0002

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/* PLA_WDT6_CTRL */
#define WDT6_SET_MODE		0x0010

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/* PLA_TCR0 */
#define TCR0_TX_EMPTY		0x0800
#define TCR0_AUTO_FIFO		0x0080

/* PLA_TCR1 */
#define VERSION_MASK		0x7cf0

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/* PLA_MTPS */
#define MTPS_JUMBO		(12 * 1024 / 64)
#define MTPS_DEFAULT		(6 * 1024 / 64)

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/* PLA_RSTTALLY */
#define TALLY_RESET		0x0001

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/* PLA_CR */
#define CR_RST			0x10
#define CR_RE			0x08
#define CR_TE			0x04

/* PLA_CRWECR */
#define CRWECR_NORAML		0x00
#define CRWECR_CONFIG		0xc0

/* PLA_OOB_CTRL */
#define NOW_IS_OOB		0x80
#define TXFIFO_EMPTY		0x20
#define RXFIFO_EMPTY		0x10
#define LINK_LIST_READY		0x02
#define DIS_MCU_CLROOB		0x01
#define FIFO_EMPTY		(TXFIFO_EMPTY | RXFIFO_EMPTY)

/* PLA_MISC_1 */
#define RXDY_GATED_EN		0x0008

/* PLA_SFF_STS_7 */
#define RE_INIT_LL		0x8000
#define MCU_BORW_EN		0x4000

/* PLA_CPCR */
#define CPCR_RX_VLAN		0x0040

/* PLA_CFG_WOL */
#define MAGIC_EN		0x0001

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/* PLA_TEREDO_CFG */
#define TEREDO_SEL		0x8000
#define TEREDO_WAKE_MASK	0x7f00
#define TEREDO_RS_EVENT_MASK	0x00fe
#define OOB_TEREDO_EN		0x0001

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/* PAL_BDC_CR */
#define ALDPS_PROXY_MODE	0x0001

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/* PLA_CONFIG34 */
#define LINK_ON_WAKE_EN		0x0010
#define LINK_OFF_WAKE_EN	0x0008

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/* PLA_CONFIG5 */
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#define BWF_EN			0x0040
#define MWF_EN			0x0020
#define UWF_EN			0x0010
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#define LAN_WAKE_EN		0x0002

/* PLA_LED_FEATURE */
#define LED_MODE_MASK		0x0700

/* PLA_PHY_PWR */
#define TX_10M_IDLE_EN		0x0080
#define PFM_PWM_SWITCH		0x0040

/* PLA_MAC_PWR_CTRL */
#define D3_CLK_GATED_EN		0x00004000
#define MCU_CLK_RATIO		0x07010f07
#define MCU_CLK_RATIO_MASK	0x0f0f0f0f
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#define ALDPS_SPDWN_RATIO	0x0f87

/* PLA_MAC_PWR_CTRL2 */
#define EEE_SPDWN_RATIO		0x8007

/* PLA_MAC_PWR_CTRL3 */
#define PKT_AVAIL_SPDWN_EN	0x0100
#define SUSPEND_SPDWN_EN	0x0004
#define U1U2_SPDWN_EN		0x0002
#define L1_SPDWN_EN		0x0001

/* PLA_MAC_PWR_CTRL4 */
#define PWRSAVE_SPDWN_EN	0x1000
#define RXDV_SPDWN_EN		0x0800
#define TX10MIDLE_EN		0x0100
#define TP100_SPDWN_EN		0x0020
#define TP500_SPDWN_EN		0x0010
#define TP1000_SPDWN_EN		0x0008
#define EEE_SPDWN_EN		0x0001
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/* PLA_GPHY_INTR_IMR */
#define GPHY_STS_MSK		0x0001
#define SPEED_DOWN_MSK		0x0002
#define SPDWN_RXDV_MSK		0x0004
#define SPDWN_LINKCHG_MSK	0x0008

/* PLA_PHYAR */
#define PHYAR_FLAG		0x80000000

/* PLA_EEE_CR */
#define EEE_RX_EN		0x0001
#define EEE_TX_EN		0x0002

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/* PLA_BOOT_CTRL */
#define AUTOLOAD_DONE		0x0002

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/* USB_DEV_STAT */
#define STAT_SPEED_MASK		0x0006
#define STAT_SPEED_HIGH		0x0000
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#define STAT_SPEED_FULL		0x0002
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/* USB_TX_AGG */
#define TX_AGG_MAX_THRESHOLD	0x03

/* USB_RX_BUF_TH */
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#define RX_THR_SUPPER		0x0c350180
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#define RX_THR_HIGH		0x7a120180
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#define RX_THR_SLOW		0xffff0180
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/* USB_TX_DMA */
#define TEST_MODE_DISABLE	0x00000001
#define TX_SIZE_ADJUST1		0x00000100

/* USB_UPS_CTRL */
#define POWER_CUT		0x0100

/* USB_PM_CTRL_STATUS */
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#define RESUME_INDICATE		0x0001
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/* USB_USB_CTRL */
#define RX_AGG_DISABLE		0x0010

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/* USB_U2P3_CTRL */
#define U2P3_ENABLE		0x0001

/* USB_POWER_CUT */
#define PWR_EN			0x0001
#define PHASE2_EN		0x0008

/* USB_MISC_0 */
#define PCUT_STATUS		0x0001

/* USB_RX_EARLY_AGG */
#define EARLY_AGG_SUPPER	0x0e832981
#define EARLY_AGG_HIGH		0x0e837a12
#define EARLY_AGG_SLOW		0x0e83ffff

/* USB_WDT11_CTRL */
#define TIMER11_EN		0x0001

/* USB_LPM_CTRL */
#define LPM_TIMER_MASK		0x0c
#define LPM_TIMER_500MS		0x04	/* 500 ms */
#define LPM_TIMER_500US		0x0c	/* 500 us */

/* USB_AFE_CTRL2 */
#define SEN_VAL_MASK		0xf800
#define SEN_VAL_NORMAL		0xa000
#define SEL_RXIDLE		0x0100

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/* OCP_ALDPS_CONFIG */
#define ENPWRSAVE		0x8000
#define ENPDNPS			0x0200
#define LINKENA			0x0100
#define DIS_SDSAVE		0x0010

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/* OCP_PHY_STATUS */
#define PHY_STAT_MASK		0x0007
#define PHY_STAT_LAN_ON		3
#define PHY_STAT_PWRDN		5

/* OCP_POWER_CFG */
#define EEE_CLKDIV_EN		0x8000
#define EN_ALDPS		0x0004
#define EN_10M_PLLOFF		0x0001

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/* OCP_EEE_CONFIG1 */
#define RG_TXLPI_MSK_HFDUP	0x8000
#define RG_MATCLR_EN		0x4000
#define EEE_10_CAP		0x2000
#define EEE_NWAY_EN		0x1000
#define TX_QUIET_EN		0x0200
#define RX_QUIET_EN		0x0100
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#define sd_rise_time_mask	0x0070
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#define sd_rise_time(x)		(min(x, 7) << 4)	/* bit 4 ~ 6 */
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#define RG_RXLPI_MSK_HFDUP	0x0008
#define SDFALLTIME		0x0007	/* bit 0 ~ 2 */

/* OCP_EEE_CONFIG2 */
#define RG_LPIHYS_NUM		0x7000	/* bit 12 ~ 15 */
#define RG_DACQUIET_EN		0x0400
#define RG_LDVQUIET_EN		0x0200
#define RG_CKRSEL		0x0020
#define RG_EEEPRG_EN		0x0010

/* OCP_EEE_CONFIG3 */
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#define fast_snr_mask		0xff80
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#define fast_snr(x)		(min(x, 0x1ff) << 7)	/* bit 7 ~ 15 */
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#define RG_LFS_SEL		0x0060	/* bit 6 ~ 5 */
#define MSK_PH			0x0006	/* bit 0 ~ 3 */

/* OCP_EEE_AR */
/* bit[15:14] function */
#define FUN_ADDR		0x0000
#define FUN_DATA		0x4000
/* bit[4:0] device addr */

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/* OCP_EEE_CFG */
#define CTAP_SHORT_EN		0x0040
#define EEE10_EN		0x0010

/* OCP_DOWN_SPEED */
#define EN_10M_BGOFF		0x0080

/* OCP_ADC_CFG */
#define CKADSEL_L		0x0100
#define ADC_EN			0x0080
#define EN_EMI_L		0x0040

/* SRAM_LPF_CFG */
#define LPF_AUTO_TUNE		0x8000

/* SRAM_10M_AMP1 */
#define GDAC_IB_UPALL		0x0008

/* SRAM_10M_AMP2 */
#define AMP_DN			0x0200

/* SRAM_IMPEDANCE */
#define RX_DRIVING_MASK		0x6000

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enum rtl_register_content {
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	_1000bps	= 0x10,
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	_100bps		= 0x08,
	_10bps		= 0x04,
	LINK_STATUS	= 0x02,
	FULL_DUP	= 0x01,
};

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#define RTL8152_MAX_TX		4
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#define RTL8152_MAX_RX		10
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#define INTBUFSIZE		2
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#define CRC_SIZE		4
#define TX_ALIGN		4
#define RX_ALIGN		8
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#define INTR_LINK		0x0004
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#define RTL8152_REQT_READ	0xc0
#define RTL8152_REQT_WRITE	0x40
#define RTL8152_REQ_GET_REGS	0x05
#define RTL8152_REQ_SET_REGS	0x05

#define BYTE_EN_DWORD		0xff
#define BYTE_EN_WORD		0x33
#define BYTE_EN_BYTE		0x11
#define BYTE_EN_SIX_BYTES	0x3f
#define BYTE_EN_START_MASK	0x0f
#define BYTE_EN_END_MASK	0xf0

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#define RTL8153_MAX_PACKET	9216 /* 9K */
#define RTL8153_MAX_MTU		(RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
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#define RTL8152_RMS		(VLAN_ETH_FRAME_LEN + VLAN_HLEN)
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#define RTL8153_RMS		RTL8153_MAX_PACKET
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#define RTL8152_TX_TIMEOUT	(5 * HZ)
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/* rtl8152 flags */
enum rtl8152_flags {
	RTL8152_UNPLUG = 0,
	RTL8152_SET_RX_MODE,
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	WORK_ENABLE,
	RTL8152_LINK_CHG,
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	SELECTIVE_SUSPEND,
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	PHY_RESET,
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	SCHEDULE_TASKLET,
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};

/* Define these values to match your device */
#define VENDOR_ID_REALTEK		0x0bda
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#define VENDOR_ID_SAMSUNG		0x04e8
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#define MCU_TYPE_PLA			0x0100
#define MCU_TYPE_USB			0x0000

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#define REALTEK_USB_DEVICE(vend, prod)	\
	USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)

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struct tally_counter {
	__le64	tx_packets;
	__le64	rx_packets;
	__le64	tx_errors;
	__le32	rx_errors;
	__le16	rx_missed;
	__le16	align_errors;
	__le32	tx_one_collision;
	__le32	tx_multi_collision;
	__le64	rx_unicast;
	__le64	rx_broadcast;
	__le32	rx_multicast;
	__le16	tx_aborted;
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	__le16	tx_underrun;
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};

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struct rx_desc {
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	__le32 opts1;
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#define RX_LEN_MASK			0x7fff
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	__le32 opts2;
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#define RD_UDP_CS			(1 << 23)
#define RD_TCP_CS			(1 << 22)
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#define RD_IPV6_CS			(1 << 20)
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#define RD_IPV4_CS			(1 << 19)

498
	__le32 opts3;
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#define IPF				(1 << 23) /* IP checksum fail */
#define UDPF				(1 << 22) /* UDP checksum fail */
#define TCPF				(1 << 21) /* TCP checksum fail */
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#define RX_VLAN_TAG			(1 << 16)
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504 505 506
	__le32 opts4;
	__le32 opts5;
	__le32 opts6;
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};

struct tx_desc {
510
	__le32 opts1;
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#define TX_FS			(1 << 31) /* First segment of a packet */
#define TX_LS			(1 << 30) /* Final segment of a packet */
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#define GTSENDV4		(1 << 28)
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#define GTSENDV6		(1 << 27)
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#define GTTCPHO_SHIFT		18
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#define GTTCPHO_MAX		0x7fU
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#define TX_LEN_MAX		0x3ffffU
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518

519
	__le32 opts2;
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#define UDP_CS			(1 << 31) /* Calculate UDP/IP checksum */
#define TCP_CS			(1 << 30) /* Calculate TCP/IP checksum */
#define IPV4_CS			(1 << 29) /* Calculate IPv4 checksum */
#define IPV6_CS			(1 << 28) /* Calculate IPv6 checksum */
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#define MSS_SHIFT		17
#define MSS_MAX			0x7ffU
#define TCPHO_SHIFT		17
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#define TCPHO_MAX		0x7ffU
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528
#define TX_VLAN_TAG			(1 << 16)
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};

531 532
struct r8152;

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struct rx_agg {
	struct list_head list;
	struct urb *urb;
536
	struct r8152 *context;
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	void *buffer;
	void *head;
};

struct tx_agg {
	struct list_head list;
	struct urb *urb;
544
	struct r8152 *context;
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	void *buffer;
	void *head;
	u32 skb_num;
	u32 skb_len;
};

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struct r8152 {
	unsigned long flags;
	struct usb_device *udev;
	struct tasklet_struct tl;
555
	struct usb_interface *intf;
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	struct net_device *netdev;
557
	struct urb *intr_urb;
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	struct tx_agg tx_info[RTL8152_MAX_TX];
	struct rx_agg rx_info[RTL8152_MAX_RX];
	struct list_head rx_done, tx_free;
	struct sk_buff_head tx_queue;
	spinlock_t rx_lock, tx_lock;
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	struct delayed_work schedule;
	struct mii_if_info mii;
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	struct mutex control;	/* use for hw setting */
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	struct rtl_ops {
		void (*init)(struct r8152 *);
		int (*enable)(struct r8152 *);
		void (*disable)(struct r8152 *);
571
		void (*up)(struct r8152 *);
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		void (*down)(struct r8152 *);
		void (*unload)(struct r8152 *);
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		int (*eee_get)(struct r8152 *, struct ethtool_eee *);
		int (*eee_set)(struct r8152 *, struct ethtool_eee *);
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	} rtl_ops;

578
	int intr_interval;
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579
	u32 saved_wolopts;
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580
	u32 msg_enable;
581
	u32 tx_qlen;
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	u16 ocp_base;
583
	u8 *intr_buff;
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	u8 version;
	u8 speed;
};

enum rtl_version {
	RTL_VER_UNKNOWN = 0,
	RTL_VER_01,
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	RTL_VER_02,
	RTL_VER_03,
	RTL_VER_04,
	RTL_VER_05,
	RTL_VER_MAX
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};

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enum tx_csum_stat {
	TX_CSUM_SUCCESS = 0,
	TX_CSUM_TSO,
	TX_CSUM_NONE
};

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/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
 */
static const int multicast_filter_limit = 32;
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static unsigned int agg_buf_sz = 16384;
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609

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#define RTL_LIMITED_TSO_SIZE	(agg_buf_sz - sizeof(struct tx_desc) - \
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				 VLAN_ETH_HLEN - VLAN_HLEN)

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static
int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
{
616 617 618 619 620 621 622 623
	int ret;
	void *tmp;

	tmp = kmalloc(size, GFP_KERNEL);
	if (!tmp)
		return -ENOMEM;

	ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
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			      RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
			      value, index, tmp, size, 500);
626 627 628 629 630

	memcpy(data, tmp, size);
	kfree(tmp);

	return ret;
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}

static
int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
{
636 637 638
	int ret;
	void *tmp;

639
	tmp = kmemdup(data, size, GFP_KERNEL);
640 641 642 643
	if (!tmp)
		return -ENOMEM;

	ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
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			      RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
			      value, index, tmp, size, 500);
646 647

	kfree(tmp);
648

649
	return ret;
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}

static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
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			    void *data, u16 type)
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{
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	u16 limit = 64;
	int ret = 0;
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	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return -ENODEV;

	/* both size and indix must be 4 bytes align */
	if ((size & 3) || !size || (index & 3) || !data)
		return -EPERM;

	if ((u32)index + (u32)size > 0xffff)
		return -EPERM;

	while (size) {
		if (size > limit) {
			ret = get_registers(tp, index, type, limit, data);
			if (ret < 0)
				break;

			index += limit;
			data += limit;
			size -= limit;
		} else {
			ret = get_registers(tp, index, type, size, data);
			if (ret < 0)
				break;

			index += size;
			data += size;
			size = 0;
			break;
		}
	}

689 690 691
	if (ret == -ENODEV)
		set_bit(RTL8152_UNPLUG, &tp->flags);

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	return ret;
}

static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
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			     u16 size, void *data, u16 type)
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{
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	int ret;
	u16 byteen_start, byteen_end, byen;
	u16 limit = 512;
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	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return -ENODEV;

	/* both size and indix must be 4 bytes align */
	if ((size & 3) || !size || (index & 3) || !data)
		return -EPERM;

	if ((u32)index + (u32)size > 0xffff)
		return -EPERM;

	byteen_start = byteen & BYTE_EN_START_MASK;
	byteen_end = byteen & BYTE_EN_END_MASK;

	byen = byteen_start | (byteen_start << 4);
	ret = set_registers(tp, index, type | byen, 4, data);
	if (ret < 0)
		goto error1;

	index += 4;
	data += 4;
	size -= 4;

	if (size) {
		size -= 4;

		while (size) {
			if (size > limit) {
				ret = set_registers(tp, index,
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						    type | BYTE_EN_DWORD,
						    limit, data);
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				if (ret < 0)
					goto error1;

				index += limit;
				data += limit;
				size -= limit;
			} else {
				ret = set_registers(tp, index,
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						    type | BYTE_EN_DWORD,
						    size, data);
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				if (ret < 0)
					goto error1;

				index += size;
				data += size;
				size = 0;
				break;
			}
		}

		byen = byteen_end | (byteen_end >> 4);
		ret = set_registers(tp, index, type | byen, 4, data);
		if (ret < 0)
			goto error1;
	}

error1:
759 760 761
	if (ret == -ENODEV)
		set_bit(RTL8152_UNPLUG, &tp->flags);

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	return ret;
}

static inline
int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
{
	return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
}

static inline
int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
{
	return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
}

static inline
int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
{
	return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
}

static inline
int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
{
	return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
}

static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
{
791
	__le32 data;
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793
	generic_ocp_read(tp, index, sizeof(data), &data, type);
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	return __le32_to_cpu(data);
}

static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
{
800 801 802
	__le32 tmp = __cpu_to_le32(data);

	generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
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}

static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
{
	u32 data;
808
	__le32 tmp;
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	u8 shift = index & 2;

	index &= ~3;

813
	generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
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815
	data = __le32_to_cpu(tmp);
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	data >>= (shift * 8);
	data &= 0xffff;

	return (u16)data;
}

static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
{
824 825
	u32 mask = 0xffff;
	__le32 tmp;
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	u16 byen = BYTE_EN_WORD;
	u8 shift = index & 2;

	data &= mask;

	if (index & 2) {
		byen <<= shift;
		mask <<= (shift * 8);
		data <<= (shift * 8);
		index &= ~3;
	}

838
	generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
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840 841
	data |= __le32_to_cpu(tmp) & ~mask;
	tmp = __cpu_to_le32(data);
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843
	generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
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}

static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
{
	u32 data;
849
	__le32 tmp;
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	u8 shift = index & 3;

	index &= ~3;

854
	generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
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856
	data = __le32_to_cpu(tmp);
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	data >>= (shift * 8);
	data &= 0xff;

	return (u8)data;
}

static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
{
865 866
	u32 mask = 0xff;
	__le32 tmp;
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	u16 byen = BYTE_EN_BYTE;
	u8 shift = index & 3;

	data &= mask;

	if (index & 3) {
		byen <<= shift;
		mask <<= (shift * 8);
		data <<= (shift * 8);
		index &= ~3;
	}

879
	generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
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881 882
	data |= __le32_to_cpu(tmp) & ~mask;
	tmp = __cpu_to_le32(data);
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884
	generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
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}

887
static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
888 889 890 891 892 893 894 895 896 897
{
	u16 ocp_base, ocp_index;

	ocp_base = addr & 0xf000;
	if (ocp_base != tp->ocp_base) {
		ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
		tp->ocp_base = ocp_base;
	}

	ocp_index = (addr & 0x0fff) | 0xb000;
898
	return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
899 900
}

901
static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
H
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902
{
903
	u16 ocp_base, ocp_index;
H
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905 906 907 908
	ocp_base = addr & 0xf000;
	if (ocp_base != tp->ocp_base) {
		ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
		tp->ocp_base = ocp_base;
H
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	}
910 911 912

	ocp_index = (addr & 0x0fff) | 0xb000;
	ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
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}

915
static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
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{
917 918
	ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
}
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920 921 922
static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
{
	return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
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}

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static void sram_write(struct r8152 *tp, u16 addr, u16 data)
{
	ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
	ocp_reg_write(tp, OCP_SRAM_DATA, data);
}

static u16 sram_read(struct r8152 *tp, u16 addr)
{
	ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
	return ocp_reg_read(tp, OCP_SRAM_DATA);
}

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static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
{
	struct r8152 *tp = netdev_priv(netdev);
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	int ret;
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	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return -ENODEV;

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	if (phy_id != R8152_PHY_ID)
		return -EINVAL;

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	ret = r8152_mdio_read(tp, reg);

	return ret;
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}

static
void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
{
	struct r8152 *tp = netdev_priv(netdev);

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	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

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	if (phy_id != R8152_PHY_ID)
		return;

	r8152_mdio_write(tp, reg, val);
}

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static int
r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
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970 971 972 973
static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
{
	struct r8152 *tp = netdev_priv(netdev);
	struct sockaddr *addr = p;
974
	int ret = -EADDRNOTAVAIL;
975 976

	if (!is_valid_ether_addr(addr->sa_data))
977 978 979 980 981
		goto out1;

	ret = usb_autopm_get_interface(tp->intf);
	if (ret < 0)
		goto out1;
982

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	mutex_lock(&tp->control);

985 986 987 988 989 990
	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);

	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
	pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);

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	mutex_unlock(&tp->control);

993 994 995
	usb_autopm_put_interface(tp->intf);
out1:
	return ret;
996 997
}

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static int set_ethernet_addr(struct r8152 *tp)
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{
	struct net_device *dev = tp->netdev;
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	struct sockaddr sa;
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	int ret;
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1003

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	if (tp->version == RTL_VER_01)
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		ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
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	else
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		ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
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	if (ret < 0) {
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		netif_err(tp, probe, dev, "Get ether addr fail\n");
	} else if (!is_valid_ether_addr(sa.sa_data)) {
		netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
			  sa.sa_data);
		eth_hw_addr_random(dev);
		ether_addr_copy(sa.sa_data, dev->dev_addr);
		ret = rtl8152_set_mac_address(dev, &sa);
		netif_info(tp, probe, dev, "Random ether addr %pM\n",
			   sa.sa_data);
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	} else {
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		if (tp->version == RTL_VER_01)
			ether_addr_copy(dev->dev_addr, sa.sa_data);
		else
			ret = rtl8152_set_mac_address(dev, &sa);
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	}
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	return ret;
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}

static void read_bulk_callback(struct urb *urb)
{
	struct net_device *netdev;
	int status = urb->status;
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	struct rx_agg *agg;
	struct r8152 *tp;
H
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	int result;

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	agg = urb->context;
	if (!agg)
		return;

	tp = agg->context;
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	if (!tp)
		return;
H
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	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;
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1047 1048 1049 1050

	if (!test_bit(WORK_ENABLE, &tp->flags))
		return;

H
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1051
	netdev = tp->netdev;
H
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1052 1053 1054

	/* When link down, the driver would cancel all bulks. */
	/* This avoid the re-submitting bulk */
H
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1055
	if (!netif_carrier_ok(netdev))
H
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1056 1057
		return;

H
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1058 1059
	usb_mark_last_busy(tp->udev);

H
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1060 1061
	switch (status) {
	case 0:
H
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1062 1063 1064
		if (urb->actual_length < ETH_ZLEN)
			break;

1065
		spin_lock(&tp->rx_lock);
H
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1066
		list_add_tail(&agg->list, &tp->rx_done);
1067
		spin_unlock(&tp->rx_lock);
H
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1068 1069
		tasklet_schedule(&tp->tl);
		return;
H
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1070 1071 1072
	case -ESHUTDOWN:
		set_bit(RTL8152_UNPLUG, &tp->flags);
		netif_device_detach(tp->netdev);
H
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1073
		return;
H
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1074 1075 1076
	case -ENOENT:
		return;	/* the urb is in unlink state */
	case -ETIME:
H
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1077 1078
		if (net_ratelimit())
			netdev_warn(netdev, "maybe reset is needed?\n");
H
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1079
		break;
H
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1080
	default:
H
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1081 1082
		if (net_ratelimit())
			netdev_warn(netdev, "Rx status %d\n", status);
H
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1083
		break;
H
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1084 1085
	}

H
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1086
	result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
H
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1087
	if (result == -ENODEV) {
1088
		set_bit(RTL8152_UNPLUG, &tp->flags);
H
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1089 1090
		netif_device_detach(tp->netdev);
	} else if (result) {
1091
		spin_lock(&tp->rx_lock);
H
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1092
		list_add_tail(&agg->list, &tp->rx_done);
1093
		spin_unlock(&tp->rx_lock);
H
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1094
		tasklet_schedule(&tp->tl);
H
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1095 1096 1097
	}
}

H
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1098
static void write_bulk_callback(struct urb *urb)
H
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1099
{
H
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1100
	struct net_device_stats *stats;
1101
	struct net_device *netdev;
H
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1102
	struct tx_agg *agg;
H
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1103
	struct r8152 *tp;
H
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1104
	int status = urb->status;
H
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1105

H
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1106 1107
	agg = urb->context;
	if (!agg)
H
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1108 1109
		return;

H
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1110 1111 1112 1113
	tp = agg->context;
	if (!tp)
		return;

1114
	netdev = tp->netdev;
H
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1115
	stats = &netdev->stats;
H
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1116
	if (status) {
H
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1117
		if (net_ratelimit())
1118
			netdev_warn(netdev, "Tx status %d\n", status);
H
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1119
		stats->tx_errors += agg->skb_num;
H
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1120
	} else {
H
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1121 1122
		stats->tx_packets += agg->skb_num;
		stats->tx_bytes += agg->skb_len;
H
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1123 1124
	}

1125
	spin_lock(&tp->tx_lock);
H
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1126
	list_add_tail(&agg->list, &tp->tx_free);
1127
	spin_unlock(&tp->tx_lock);
H
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1128

H
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1129 1130
	usb_autopm_put_interface_async(tp->intf);

1131
	if (!netif_carrier_ok(netdev))
H
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1132 1133 1134 1135 1136 1137 1138 1139 1140
		return;

	if (!test_bit(WORK_ENABLE, &tp->flags))
		return;

	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

	if (!skb_queue_empty(&tp->tx_queue))
1141
		tasklet_schedule(&tp->tl);
H
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1142 1143
}

1144 1145 1146
static void intr_callback(struct urb *urb)
{
	struct r8152 *tp;
1147
	__le16 *d;
1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167
	int status = urb->status;
	int res;

	tp = urb->context;
	if (!tp)
		return;

	if (!test_bit(WORK_ENABLE, &tp->flags))
		return;

	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

	switch (status) {
	case 0:			/* success */
		break;
	case -ECONNRESET:	/* unlink */
	case -ESHUTDOWN:
		netif_device_detach(tp->netdev);
	case -ENOENT:
1168 1169 1170
	case -EPROTO:
		netif_info(tp, intr, tp->netdev,
			   "Stop submitting intr, status %d\n", status);
1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195
		return;
	case -EOVERFLOW:
		netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
		goto resubmit;
	/* -EPIPE:  should clear the halt */
	default:
		netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
		goto resubmit;
	}

	d = urb->transfer_buffer;
	if (INTR_LINK & __le16_to_cpu(d[0])) {
		if (!(tp->speed & LINK_STATUS)) {
			set_bit(RTL8152_LINK_CHG, &tp->flags);
			schedule_delayed_work(&tp->schedule, 0);
		}
	} else {
		if (tp->speed & LINK_STATUS) {
			set_bit(RTL8152_LINK_CHG, &tp->flags);
			schedule_delayed_work(&tp->schedule, 0);
		}
	}

resubmit:
	res = usb_submit_urb(urb, GFP_ATOMIC);
1196 1197
	if (res == -ENODEV) {
		set_bit(RTL8152_UNPLUG, &tp->flags);
1198
		netif_device_detach(tp->netdev);
1199
	} else if (res) {
1200
		netif_err(tp, intr, tp->netdev,
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			  "can't resubmit intr, status %d\n", res);
1202
	}
1203 1204
}

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static inline void *rx_agg_align(void *data)
{
H
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1207
	return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
H
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1208 1209 1210 1211
}

static inline void *tx_agg_align(void *data)
{
H
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1212
	return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
H
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1213 1214 1215 1216 1217 1218 1219
}

static void free_all_mem(struct r8152 *tp)
{
	int i;

	for (i = 0; i < RTL8152_MAX_RX; i++) {
1220 1221
		usb_free_urb(tp->rx_info[i].urb);
		tp->rx_info[i].urb = NULL;
H
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1222

1223 1224 1225
		kfree(tp->rx_info[i].buffer);
		tp->rx_info[i].buffer = NULL;
		tp->rx_info[i].head = NULL;
H
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1226 1227 1228
	}

	for (i = 0; i < RTL8152_MAX_TX; i++) {
1229 1230
		usb_free_urb(tp->tx_info[i].urb);
		tp->tx_info[i].urb = NULL;
H
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1231

1232 1233 1234
		kfree(tp->tx_info[i].buffer);
		tp->tx_info[i].buffer = NULL;
		tp->tx_info[i].head = NULL;
H
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1235
	}
1236

1237 1238
	usb_free_urb(tp->intr_urb);
	tp->intr_urb = NULL;
1239

1240 1241
	kfree(tp->intr_buff);
	tp->intr_buff = NULL;
H
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1242 1243 1244 1245 1246
}

static int alloc_all_mem(struct r8152 *tp)
{
	struct net_device *netdev = tp->netdev;
1247 1248 1249
	struct usb_interface *intf = tp->intf;
	struct usb_host_interface *alt = intf->cur_altsetting;
	struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
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1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261
	struct urb *urb;
	int node, i;
	u8 *buf;

	node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;

	spin_lock_init(&tp->rx_lock);
	spin_lock_init(&tp->tx_lock);
	INIT_LIST_HEAD(&tp->tx_free);
	skb_queue_head_init(&tp->tx_queue);

	for (i = 0; i < RTL8152_MAX_RX; i++) {
H
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1262
		buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
H
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1263 1264 1265 1266 1267
		if (!buf)
			goto err1;

		if (buf != rx_agg_align(buf)) {
			kfree(buf);
H
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1268
			buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
H
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1269
					   node);
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1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287
			if (!buf)
				goto err1;
		}

		urb = usb_alloc_urb(0, GFP_KERNEL);
		if (!urb) {
			kfree(buf);
			goto err1;
		}

		INIT_LIST_HEAD(&tp->rx_info[i].list);
		tp->rx_info[i].context = tp;
		tp->rx_info[i].urb = urb;
		tp->rx_info[i].buffer = buf;
		tp->rx_info[i].head = rx_agg_align(buf);
	}

	for (i = 0; i < RTL8152_MAX_TX; i++) {
H
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		buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
H
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1289 1290 1291 1292 1293
		if (!buf)
			goto err1;

		if (buf != tx_agg_align(buf)) {
			kfree(buf);
H
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1294
			buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
H
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1295
					   node);
H
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1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314
			if (!buf)
				goto err1;
		}

		urb = usb_alloc_urb(0, GFP_KERNEL);
		if (!urb) {
			kfree(buf);
			goto err1;
		}

		INIT_LIST_HEAD(&tp->tx_info[i].list);
		tp->tx_info[i].context = tp;
		tp->tx_info[i].urb = urb;
		tp->tx_info[i].buffer = buf;
		tp->tx_info[i].head = tx_agg_align(buf);

		list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
	}

1315 1316 1317 1318 1319 1320 1321 1322 1323 1324
	tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
	if (!tp->intr_urb)
		goto err1;

	tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
	if (!tp->intr_buff)
		goto err1;

	tp->intr_interval = (int)ep_intr->desc.bInterval;
	usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
H
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1325 1326
			 tp->intr_buff, INTBUFSIZE, intr_callback,
			 tp, tp->intr_interval);
1327

H
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1328 1329 1330 1331 1332 1333 1334
	return 0;

err1:
	free_all_mem(tp);
	return -ENOMEM;
}

H
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1335 1336 1337 1338 1339
static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
{
	struct tx_agg *agg = NULL;
	unsigned long flags;

1340 1341 1342
	if (list_empty(&tp->tx_free))
		return NULL;

H
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1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355
	spin_lock_irqsave(&tp->tx_lock, flags);
	if (!list_empty(&tp->tx_free)) {
		struct list_head *cursor;

		cursor = tp->tx_free.next;
		list_del_init(cursor);
		agg = list_entry(cursor, struct tx_agg, list);
	}
	spin_unlock_irqrestore(&tp->tx_lock, flags);

	return agg;
}

H
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1356
static inline __be16 get_protocol(struct sk_buff *skb)
H
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1357
{
H
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1358
	__be16 protocol;
H
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1359

H
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1360 1361 1362 1363
	if (skb->protocol == htons(ETH_P_8021Q))
		protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
	else
		protocol = skb->protocol;
H
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1364

H
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1365 1366
	return protocol;
}
H
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1367

H
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1368
/* r8152_csum_workaround()
H
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1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379
 * The hw limites the value the transport offset. When the offset is out of the
 * range, calculate the checksum by sw.
 */
static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
				  struct sk_buff_head *list)
{
	if (skb_shinfo(skb)->gso_size) {
		netdev_features_t features = tp->netdev->features;
		struct sk_buff_head seg_list;
		struct sk_buff *segs, *nskb;

1380
		features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
H
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1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410
		segs = skb_gso_segment(skb, features);
		if (IS_ERR(segs) || !segs)
			goto drop;

		__skb_queue_head_init(&seg_list);

		do {
			nskb = segs;
			segs = segs->next;
			nskb->next = NULL;
			__skb_queue_tail(&seg_list, nskb);
		} while (segs);

		skb_queue_splice(&seg_list, list);
		dev_kfree_skb(skb);
	} else if (skb->ip_summed == CHECKSUM_PARTIAL) {
		if (skb_checksum_help(skb) < 0)
			goto drop;

		__skb_queue_head(list, skb);
	} else {
		struct net_device_stats *stats;

drop:
		stats = &tp->netdev->stats;
		stats->tx_dropped++;
		dev_kfree_skb(skb);
	}
}

H
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1411
/* msdn_giant_send_check()
H
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1412 1413 1414 1415 1416 1417 1418
 * According to the document of microsoft, the TCP Pseudo Header excludes the
 * packet length for IPv6 TCP large packets.
 */
static int msdn_giant_send_check(struct sk_buff *skb)
{
	const struct ipv6hdr *ipv6h;
	struct tcphdr *th;
H
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1419 1420 1421 1422 1423
	int ret;

	ret = skb_cow_head(skb, 0);
	if (ret)
		return ret;
H
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1424 1425 1426 1427 1428 1429 1430

	ipv6h = ipv6_hdr(skb);
	th = tcp_hdr(skb);

	th->check = 0;
	th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);

H
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1431
	return ret;
H
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1432 1433
}

H
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1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452
static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
{
	if (vlan_tx_tag_present(skb)) {
		u32 opts2;

		opts2 = TX_VLAN_TAG | swab16(vlan_tx_tag_get(skb));
		desc->opts2 |= cpu_to_le32(opts2);
	}
}

static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
{
	u32 opts2 = le32_to_cpu(desc->opts2);

	if (opts2 & RX_VLAN_TAG)
		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
				       swab16(opts2 & 0xffff));
}

H
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1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464
static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
			 struct sk_buff *skb, u32 len, u32 transport_offset)
{
	u32 mss = skb_shinfo(skb)->gso_size;
	u32 opts1, opts2 = 0;
	int ret = TX_CSUM_SUCCESS;

	WARN_ON_ONCE(len > TX_LEN_MAX);

	opts1 = len | TX_FS | TX_LS;

	if (mss) {
H
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1465 1466 1467 1468 1469 1470 1471 1472
		if (transport_offset > GTTCPHO_MAX) {
			netif_warn(tp, tx_err, tp->netdev,
				   "Invalid transport offset 0x%x for TSO\n",
				   transport_offset);
			ret = TX_CSUM_TSO;
			goto unavailable;
		}

H
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1473 1474 1475 1476 1477
		switch (get_protocol(skb)) {
		case htons(ETH_P_IP):
			opts1 |= GTSENDV4;
			break;

H
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1478
		case htons(ETH_P_IPV6):
H
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1479 1480 1481 1482
			if (msdn_giant_send_check(skb)) {
				ret = TX_CSUM_TSO;
				goto unavailable;
			}
H
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1483 1484 1485
			opts1 |= GTSENDV6;
			break;

H
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1486 1487 1488 1489 1490 1491 1492 1493 1494
		default:
			WARN_ON_ONCE(1);
			break;
		}

		opts1 |= transport_offset << GTTCPHO_SHIFT;
		opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
	} else if (skb->ip_summed == CHECKSUM_PARTIAL) {
		u8 ip_protocol;
H
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1495

H
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1496 1497 1498 1499 1500 1501 1502 1503
		if (transport_offset > TCPHO_MAX) {
			netif_warn(tp, tx_err, tp->netdev,
				   "Invalid transport offset 0x%x\n",
				   transport_offset);
			ret = TX_CSUM_NONE;
			goto unavailable;
		}

H
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1504
		switch (get_protocol(skb)) {
H
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1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519
		case htons(ETH_P_IP):
			opts2 |= IPV4_CS;
			ip_protocol = ip_hdr(skb)->protocol;
			break;

		case htons(ETH_P_IPV6):
			opts2 |= IPV6_CS;
			ip_protocol = ipv6_hdr(skb)->nexthdr;
			break;

		default:
			ip_protocol = IPPROTO_RAW;
			break;
		}

H
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1520
		if (ip_protocol == IPPROTO_TCP)
H
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1521
			opts2 |= TCP_CS;
H
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1522
		else if (ip_protocol == IPPROTO_UDP)
H
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1523
			opts2 |= UDP_CS;
H
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1524
		else
H
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1525 1526
			WARN_ON_ONCE(1);

H
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1527
		opts2 |= transport_offset << TCPHO_SHIFT;
H
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1528
	}
H
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1529 1530 1531 1532

	desc->opts2 = cpu_to_le32(opts2);
	desc->opts1 = cpu_to_le32(opts1);

H
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1533
unavailable:
H
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1534
	return ret;
H
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1535 1536
}

H
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1537 1538
static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
{
1539
	struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
H
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1540
	int remain, ret;
H
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1541 1542
	u8 *tx_data;

1543
	__skb_queue_head_init(&skb_head);
1544
	spin_lock(&tx_queue->lock);
1545
	skb_queue_splice_init(tx_queue, &skb_head);
1546
	spin_unlock(&tx_queue->lock);
1547

H
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1548
	tx_data = agg->head;
H
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1549 1550
	agg->skb_num = 0;
	agg->skb_len = 0;
H
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1551
	remain = agg_buf_sz;
H
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1552

H
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1553
	while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
H
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1554 1555 1556
		struct tx_desc *tx_desc;
		struct sk_buff *skb;
		unsigned int len;
H
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1557
		u32 offset;
H
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1558

1559
		skb = __skb_dequeue(&skb_head);
H
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1560 1561 1562
		if (!skb)
			break;

H
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1563 1564 1565
		len = skb->len + sizeof(*tx_desc);

		if (len > remain) {
1566
			__skb_queue_head(&skb_head, skb);
H
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1567 1568 1569
			break;
		}

H
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1570
		tx_data = tx_agg_align(tx_data);
H
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1571
		tx_desc = (struct tx_desc *)tx_data;
H
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1572 1573 1574

		offset = (u32)skb_transport_offset(skb);

H
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1575 1576 1577 1578
		if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
			r8152_csum_workaround(tp, skb, &skb_head);
			continue;
		}
H
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1579

H
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1580 1581
		rtl_tx_vlan_tag(tx_desc, skb);

H
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1582 1583
		tx_data += sizeof(*tx_desc);

H
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1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594
		len = skb->len;
		if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
			struct net_device_stats *stats = &tp->netdev->stats;

			stats->tx_dropped++;
			dev_kfree_skb_any(skb);
			tx_data -= sizeof(*tx_desc);
			continue;
		}

		tx_data += len;
H
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1595
		agg->skb_len += len;
H
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1596 1597
		agg->skb_num++;

H
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1598 1599
		dev_kfree_skb_any(skb);

H
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1600
		remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
H
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1601 1602
	}

1603
	if (!skb_queue_empty(&skb_head)) {
1604
		spin_lock(&tx_queue->lock);
1605
		skb_queue_splice(&skb_head, tx_queue);
1606
		spin_unlock(&tx_queue->lock);
1607 1608
	}

1609
	netif_tx_lock(tp->netdev);
1610 1611 1612 1613 1614

	if (netif_queue_stopped(tp->netdev) &&
	    skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
		netif_wake_queue(tp->netdev);

1615
	netif_tx_unlock(tp->netdev);
H
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1616

1617
	ret = usb_autopm_get_interface_async(tp->intf);
H
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1618 1619
	if (ret < 0)
		goto out_tx_fill;
1620

H
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1621 1622 1623 1624
	usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
			  agg->head, (int)(tx_data - (u8 *)agg->head),
			  (usb_complete_t)write_bulk_callback, agg);

1625
	ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
H
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1626
	if (ret < 0)
1627
		usb_autopm_put_interface_async(tp->intf);
H
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1628 1629 1630

out_tx_fill:
	return ret;
H
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1631 1632
}

H
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1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652
static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
{
	u8 checksum = CHECKSUM_NONE;
	u32 opts2, opts3;

	if (tp->version == RTL_VER_01)
		goto return_result;

	opts2 = le32_to_cpu(rx_desc->opts2);
	opts3 = le32_to_cpu(rx_desc->opts3);

	if (opts2 & RD_IPV4_CS) {
		if (opts3 & IPF)
			checksum = CHECKSUM_NONE;
		else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
			checksum = CHECKSUM_NONE;
		else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
			checksum = CHECKSUM_NONE;
		else
			checksum = CHECKSUM_UNNECESSARY;
H
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1653 1654 1655 1656 1657
	} else if (RD_IPV6_CS) {
		if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
			checksum = CHECKSUM_UNNECESSARY;
		else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
			checksum = CHECKSUM_UNNECESSARY;
H
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1658 1659 1660 1661 1662 1663
	}

return_result:
	return checksum;
}

H
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1664 1665
static void rx_bottom(struct r8152 *tp)
{
H
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1666
	unsigned long flags;
1667
	struct list_head *cursor, *next, rx_queue;
H
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1668

1669 1670 1671 1672
	if (list_empty(&tp->rx_done))
		return;

	INIT_LIST_HEAD(&rx_queue);
H
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1673
	spin_lock_irqsave(&tp->rx_lock, flags);
1674 1675 1676 1677
	list_splice_init(&tp->rx_done, &rx_queue);
	spin_unlock_irqrestore(&tp->rx_lock, flags);

	list_for_each_safe(cursor, next, &rx_queue) {
1678 1679 1680 1681 1682 1683 1684
		struct rx_desc *rx_desc;
		struct rx_agg *agg;
		int len_used = 0;
		struct urb *urb;
		u8 *rx_data;
		int ret;

H
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1685 1686 1687 1688
		list_del_init(cursor);

		agg = list_entry(cursor, struct rx_agg, list);
		urb = agg->urb;
H
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1689 1690
		if (urb->actual_length < ETH_ZLEN)
			goto submit;
H
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1691 1692 1693

		rx_desc = agg->head;
		rx_data = agg->head;
H
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1694
		len_used += sizeof(struct rx_desc);
H
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1695

H
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1696
		while (urb->actual_length > len_used) {
1697
			struct net_device *netdev = tp->netdev;
H
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1698
			struct net_device_stats *stats = &netdev->stats;
H
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1699
			unsigned int pkt_len;
1700 1701
			struct sk_buff *skb;

H
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1702
			pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
H
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1703 1704 1705
			if (pkt_len < ETH_ZLEN)
				break;

H
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1706 1707 1708 1709
			len_used += pkt_len;
			if (urb->actual_length < len_used)
				break;

H
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1710
			pkt_len -= CRC_SIZE;
H
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1711 1712 1713 1714 1715
			rx_data += sizeof(struct rx_desc);

			skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
			if (!skb) {
				stats->rx_dropped++;
1716
				goto find_next_rx;
H
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1717
			}
H
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1718 1719

			skb->ip_summed = r8152_rx_csum(tp, rx_desc);
H
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1720 1721 1722
			memcpy(skb->data, rx_data, pkt_len);
			skb_put(skb, pkt_len);
			skb->protocol = eth_type_trans(skb, netdev);
H
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1723
			rtl_rx_vlan_tag(rx_desc, skb);
1724
			netif_receive_skb(skb);
H
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1725 1726 1727
			stats->rx_packets++;
			stats->rx_bytes += pkt_len;

1728
find_next_rx:
H
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1729
			rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
H
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1730 1731
			rx_desc = (struct rx_desc *)rx_data;
			len_used = (int)(rx_data - (u8 *)agg->head);
H
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1732
			len_used += sizeof(struct rx_desc);
H
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1733 1734
		}

H
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1735
submit:
H
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1736 1737
		ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
		if (ret && ret != -ENODEV) {
1738 1739 1740
			spin_lock_irqsave(&tp->rx_lock, flags);
			list_add_tail(&agg->list, &tp->rx_done);
			spin_unlock_irqrestore(&tp->rx_lock, flags);
H
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1741 1742 1743 1744 1745 1746 1747 1748 1749
			tasklet_schedule(&tp->tl);
		}
	}
}

static void tx_bottom(struct r8152 *tp)
{
	int res;

H
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1750 1751
	do {
		struct tx_agg *agg;
H
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1752

H
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1753
		if (skb_queue_empty(&tp->tx_queue))
H
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1754 1755
			break;

H
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1756 1757
		agg = r8152_get_tx_agg(tp);
		if (!agg)
H
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1758 1759
			break;

H
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1760 1761
		res = r8152_tx_agg_fill(tp, agg);
		if (res) {
H
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1762
			struct net_device *netdev = tp->netdev;
H
hayeswang 已提交
1763

H
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1764
			if (res == -ENODEV) {
1765
				set_bit(RTL8152_UNPLUG, &tp->flags);
H
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1766 1767
				netif_device_detach(netdev);
			} else {
H
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1768 1769 1770
				struct net_device_stats *stats = &netdev->stats;
				unsigned long flags;

H
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1771 1772 1773
				netif_warn(tp, tx_err, netdev,
					   "failed tx_urb %d\n", res);
				stats->tx_dropped += agg->skb_num;
1774

H
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1775 1776 1777 1778
				spin_lock_irqsave(&tp->tx_lock, flags);
				list_add_tail(&agg->list, &tp->tx_free);
				spin_unlock_irqrestore(&tp->tx_lock, flags);
			}
H
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1779
		}
H
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1780
	} while (res == 0);
H
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1781 1782 1783
}

static void bottom_half(unsigned long data)
H
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1784 1785 1786
{
	struct r8152 *tp;

H
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1787 1788 1789 1790 1791 1792
	tp = (struct r8152 *)data;

	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

	if (!test_bit(WORK_ENABLE, &tp->flags))
H
hayeswang 已提交
1793
		return;
H
hayeswang 已提交
1794

H
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1795 1796
	/* When link down, the driver would cancel all bulks. */
	/* This avoid the re-submitting bulk */
H
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1797
	if (!netif_carrier_ok(tp->netdev))
H
hayeswang 已提交
1798
		return;
H
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1799 1800

	rx_bottom(tp);
1801
	tx_bottom(tp);
H
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1802 1803 1804 1805 1806 1807
}

static
int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
{
	usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
H
hayeswang 已提交
1808
			  agg->head, agg_buf_sz,
H
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1809
			  (usb_complete_t)read_bulk_callback, agg);
H
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1810 1811

	return usb_submit_urb(agg->urb, mem_flags);
H
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1812 1813
}

H
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1814 1815 1816
static void rtl_drop_queued_tx(struct r8152 *tp)
{
	struct net_device_stats *stats = &tp->netdev->stats;
1817
	struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
H
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1818 1819
	struct sk_buff *skb;

1820 1821 1822 1823
	if (skb_queue_empty(tx_queue))
		return;

	__skb_queue_head_init(&skb_head);
1824
	spin_lock_bh(&tx_queue->lock);
1825
	skb_queue_splice_init(tx_queue, &skb_head);
1826
	spin_unlock_bh(&tx_queue->lock);
1827 1828

	while ((skb = __skb_dequeue(&skb_head))) {
H
hayeswang 已提交
1829 1830 1831 1832 1833
		dev_kfree_skb(skb);
		stats->tx_dropped++;
	}
}

H
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1834 1835 1836
static void rtl8152_tx_timeout(struct net_device *netdev)
{
	struct r8152 *tp = netdev_priv(netdev);
H
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1837 1838
	int i;

H
Hayes Wang 已提交
1839
	netif_warn(tp, tx_err, netdev, "Tx timeout\n");
H
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1840 1841
	for (i = 0; i < RTL8152_MAX_TX; i++)
		usb_unlink_urb(tp->tx_info[i].urb);
H
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1842 1843 1844 1845 1846 1847
}

static void rtl8152_set_rx_mode(struct net_device *netdev)
{
	struct r8152 *tp = netdev_priv(netdev);

1848
	if (tp->speed & LINK_STATUS) {
H
hayeswang 已提交
1849
		set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1850 1851
		schedule_delayed_work(&tp->schedule, 0);
	}
H
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1852 1853 1854 1855 1856
}

static void _rtl8152_set_rx_mode(struct net_device *netdev)
{
	struct r8152 *tp = netdev_priv(netdev);
1857 1858
	u32 mc_filter[2];	/* Multicast hash filter */
	__le32 tmp[2];
H
hayeswang 已提交
1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870
	u32 ocp_data;

	clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
	netif_stop_queue(netdev);
	ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
	ocp_data &= ~RCR_ACPT_ALL;
	ocp_data |= RCR_AB | RCR_APM;

	if (netdev->flags & IFF_PROMISC) {
		/* Unconditionally log net taps. */
		netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
		ocp_data |= RCR_AM | RCR_AAP;
H
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1871 1872
		mc_filter[1] = 0xffffffff;
		mc_filter[0] = 0xffffffff;
H
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1873 1874 1875 1876
	} else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
		   (netdev->flags & IFF_ALLMULTI)) {
		/* Too many to filter perfectly -- accept all multicasts. */
		ocp_data |= RCR_AM;
H
hayeswang 已提交
1877 1878
		mc_filter[1] = 0xffffffff;
		mc_filter[0] = 0xffffffff;
H
hayeswang 已提交
1879 1880 1881
	} else {
		struct netdev_hw_addr *ha;

H
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1882 1883
		mc_filter[1] = 0;
		mc_filter[0] = 0;
H
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1884 1885
		netdev_for_each_mc_addr(ha, netdev) {
			int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
H
hayeswang 已提交
1886

H
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1887 1888 1889 1890 1891
			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
			ocp_data |= RCR_AM;
		}
	}

1892 1893
	tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
	tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
H
hayeswang 已提交
1894

1895
	pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
H
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1896 1897 1898 1899 1900
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
	netif_wake_queue(netdev);
}

static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
H
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1901
				      struct net_device *netdev)
H
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1902 1903 1904
{
	struct r8152 *tp = netdev_priv(netdev);

H
hayeswang 已提交
1905
	skb_tx_timestamp(skb);
H
hayeswang 已提交
1906

H
hayeswang 已提交
1907
	skb_queue_tail(&tp->tx_queue, skb);
H
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1908

1909 1910 1911 1912 1913 1914 1915 1916
	if (!list_empty(&tp->tx_free)) {
		if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
			set_bit(SCHEDULE_TASKLET, &tp->flags);
			schedule_delayed_work(&tp->schedule, 0);
		} else {
			usb_mark_last_busy(tp->udev);
			tasklet_schedule(&tp->tl);
		}
H
hayeswang 已提交
1917
	} else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1918
		netif_stop_queue(netdev);
H
hayeswang 已提交
1919
	}
1920

H
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1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943
	return NETDEV_TX_OK;
}

static void r8152b_reset_packet_filter(struct r8152 *tp)
{
	u32	ocp_data;

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
	ocp_data &= ~FMC_FCR_MCU_EN;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
	ocp_data |= FMC_FCR_MCU_EN;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
}

static void rtl8152_nic_reset(struct r8152 *tp)
{
	int	i;

	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);

	for (i = 0; i < 1000; i++) {
		if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
			break;
H
hayeswang 已提交
1944
		usleep_range(100, 400);
H
hayeswang 已提交
1945 1946 1947
	}
}

1948 1949 1950 1951
static void set_tx_qlen(struct r8152 *tp)
{
	struct net_device *netdev = tp->netdev;

H
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1952 1953
	tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
				    sizeof(struct tx_desc));
1954 1955
}

H
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1956 1957 1958 1959 1960
static inline u8 rtl8152_get_speed(struct r8152 *tp)
{
	return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
}

H
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1961
static void rtl_set_eee_plus(struct r8152 *tp)
H
hayeswang 已提交
1962
{
H
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1963
	u32 ocp_data;
H
hayeswang 已提交
1964 1965 1966
	u8 speed;

	speed = rtl8152_get_speed(tp);
H
hayeswang 已提交
1967
	if (speed & _10bps) {
H
hayeswang 已提交
1968
		ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
H
hayeswang 已提交
1969
		ocp_data |= EEEP_CR_EEEP_TX;
H
hayeswang 已提交
1970 1971 1972
		ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
	} else {
		ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
H
hayeswang 已提交
1973
		ocp_data &= ~EEEP_CR_EEEP_TX;
H
hayeswang 已提交
1974 1975
		ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
	}
H
hayeswang 已提交
1976 1977
}

H
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1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989
static void rxdy_gated_en(struct r8152 *tp, bool enable)
{
	u32 ocp_data;

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
	if (enable)
		ocp_data |= RXDY_GATED_EN;
	else
		ocp_data &= ~RXDY_GATED_EN;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
}

1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014
static int rtl_start_rx(struct r8152 *tp)
{
	int i, ret = 0;

	INIT_LIST_HEAD(&tp->rx_done);
	for (i = 0; i < RTL8152_MAX_RX; i++) {
		INIT_LIST_HEAD(&tp->rx_info[i].list);
		ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
		if (ret)
			break;
	}

	return ret;
}

static int rtl_stop_rx(struct r8152 *tp)
{
	int i;

	for (i = 0; i < RTL8152_MAX_RX; i++)
		usb_kill_urb(tp->rx_info[i].urb);

	return 0;
}

H
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2015 2016 2017
static int rtl_enable(struct r8152 *tp)
{
	u32 ocp_data;
H
hayeswang 已提交
2018 2019 2020 2021 2022 2023 2024

	r8152b_reset_packet_filter(tp);

	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
	ocp_data |= CR_RE | CR_TE;
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);

H
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2025
	rxdy_gated_en(tp, false);
H
hayeswang 已提交
2026

2027
	return rtl_start_rx(tp);
H
hayeswang 已提交
2028 2029
}

H
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2030 2031
static int rtl8152_enable(struct r8152 *tp)
{
H
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2032 2033 2034
	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return -ENODEV;

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	set_tx_qlen(tp);
	rtl_set_eee_plus(tp);

	return rtl_enable(tp);
}

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static void r8153_set_rx_agg(struct r8152 *tp)
{
	u8 speed;

	speed = rtl8152_get_speed(tp);
	if (speed & _1000bps) {
		if (tp->udev->speed == USB_SPEED_SUPER) {
			ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
					RX_THR_SUPPER);
			ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
					EARLY_AGG_SUPPER);
		} else {
			ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
					RX_THR_HIGH);
			ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
					EARLY_AGG_HIGH);
		}
	} else {
		ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
		ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
				EARLY_AGG_SLOW);
	}
}

static int rtl8153_enable(struct r8152 *tp)
{
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	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return -ENODEV;

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	set_tx_qlen(tp);
	rtl_set_eee_plus(tp);
	r8153_set_rx_agg(tp);

	return rtl_enable(tp);
}

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static void rtl_disable(struct r8152 *tp)
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{
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	u32 ocp_data;
	int i;
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	if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
		rtl_drop_queued_tx(tp);
		return;
	}

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	ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
	ocp_data &= ~RCR_ACPT_ALL;
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);

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	rtl_drop_queued_tx(tp);
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	for (i = 0; i < RTL8152_MAX_TX; i++)
		usb_kill_urb(tp->tx_info[i].urb);
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	rxdy_gated_en(tp, true);
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	for (i = 0; i < 1000; i++) {
		ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
		if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
			break;
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		usleep_range(1000, 2000);
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	}

	for (i = 0; i < 1000; i++) {
		if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
			break;
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		usleep_range(1000, 2000);
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	}

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	rtl_stop_rx(tp);
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	rtl8152_nic_reset(tp);
}

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static void r8152_power_cut_en(struct r8152 *tp, bool enable)
{
	u32 ocp_data;

	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
	if (enable)
		ocp_data |= POWER_CUT;
	else
		ocp_data &= ~POWER_CUT;
	ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);

	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
	ocp_data &= ~RESUME_INDICATE;
	ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
}

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static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
{
	u32 ocp_data;

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
	if (enable)
		ocp_data |= CPCR_RX_VLAN;
	else
		ocp_data &= ~CPCR_RX_VLAN;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
}

static int rtl8152_set_features(struct net_device *dev,
				netdev_features_t features)
{
	netdev_features_t changed = features ^ dev->features;
	struct r8152 *tp = netdev_priv(dev);
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	int ret;

	ret = usb_autopm_get_interface(tp->intf);
	if (ret < 0)
		goto out;
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	mutex_lock(&tp->control);

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	if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
		if (features & NETIF_F_HW_VLAN_CTAG_RX)
			rtl_rx_vlan_en(tp, true);
		else
			rtl_rx_vlan_en(tp, false);
	}

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	mutex_unlock(&tp->control);

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	usb_autopm_put_interface(tp->intf);

out:
	return ret;
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}

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#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)

static u32 __rtl_get_wol(struct r8152 *tp)
{
	u32 ocp_data;
	u32 wolopts = 0;

	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
	if (!(ocp_data & LAN_WAKE_EN))
		return 0;

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
	if (ocp_data & LINK_ON_WAKE_EN)
		wolopts |= WAKE_PHY;

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
	if (ocp_data & UWF_EN)
		wolopts |= WAKE_UCAST;
	if (ocp_data & BWF_EN)
		wolopts |= WAKE_BCAST;
	if (ocp_data & MWF_EN)
		wolopts |= WAKE_MCAST;

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
	if (ocp_data & MAGIC_EN)
		wolopts |= WAKE_MAGIC;

	return wolopts;
}

static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
{
	u32 ocp_data;

	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
	ocp_data &= ~LINK_ON_WAKE_EN;
	if (wolopts & WAKE_PHY)
		ocp_data |= LINK_ON_WAKE_EN;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
	ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
	if (wolopts & WAKE_UCAST)
		ocp_data |= UWF_EN;
	if (wolopts & WAKE_BCAST)
		ocp_data |= BWF_EN;
	if (wolopts & WAKE_MCAST)
		ocp_data |= MWF_EN;
	if (wolopts & WAKE_ANY)
		ocp_data |= LAN_WAKE_EN;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);

	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
	ocp_data &= ~MAGIC_EN;
	if (wolopts & WAKE_MAGIC)
		ocp_data |= MAGIC_EN;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);

	if (wolopts & WAKE_ANY)
		device_set_wakeup_enable(&tp->udev->dev, true);
	else
		device_set_wakeup_enable(&tp->udev->dev, false);
}

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static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
{
	if (enable) {
		u32 ocp_data;

		__rtl_set_wol(tp, WAKE_ANY);

		ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);

		ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
		ocp_data |= LINK_OFF_WAKE_EN;
		ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);

		ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
	} else {
		__rtl_set_wol(tp, tp->saved_wolopts);
	}
}

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static void rtl_phy_reset(struct r8152 *tp)
{
	u16 data;
	int i;

	clear_bit(PHY_RESET, &tp->flags);

	data = r8152_mdio_read(tp, MII_BMCR);

	/* don't reset again before the previous one complete */
	if (data & BMCR_RESET)
		return;

	data |= BMCR_RESET;
	r8152_mdio_write(tp, MII_BMCR, data);

	for (i = 0; i < 50; i++) {
		msleep(20);
		if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
			break;
	}
}

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static void r8153_teredo_off(struct r8152 *tp)
{
	u32 ocp_data;

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
	ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);

	ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
}

static void r8152b_disable_aldps(struct r8152 *tp)
{
	ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
	msleep(20);
}

static inline void r8152b_enable_aldps(struct r8152 *tp)
{
	ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
					    LINKENA | DIS_SDSAVE);
}

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static void rtl8152_disable(struct r8152 *tp)
{
	r8152b_disable_aldps(tp);
	rtl_disable(tp);
	r8152b_enable_aldps(tp);
}

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static void r8152b_hw_phy_cfg(struct r8152 *tp)
{
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	u16 data;

	data = r8152_mdio_read(tp, MII_BMCR);
	if (data & BMCR_PDOWN) {
		data &= ~BMCR_PDOWN;
		r8152_mdio_write(tp, MII_BMCR, data);
	}

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	set_bit(PHY_RESET, &tp->flags);
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}

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static void r8152b_exit_oob(struct r8152 *tp)
{
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	u32 ocp_data;
	int i;
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	ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
	ocp_data &= ~RCR_ACPT_ALL;
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);

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	rxdy_gated_en(tp, true);
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	r8153_teredo_off(tp);
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	r8152b_hw_phy_cfg(tp);
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	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);

	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
	ocp_data &= ~NOW_IS_OOB;
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
	ocp_data &= ~MCU_BORW_EN;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);

	for (i = 0; i < 1000; i++) {
		ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
		if (ocp_data & LINK_LIST_READY)
			break;
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		usleep_range(1000, 2000);
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	}

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
	ocp_data |= RE_INIT_LL;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);

	for (i = 0; i < 1000; i++) {
		ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
		if (ocp_data & LINK_LIST_READY)
			break;
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		usleep_range(1000, 2000);
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	}

	rtl8152_nic_reset(tp);

	/* rx share fifo credit full threshold */
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);

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	if (tp->udev->speed == USB_SPEED_FULL ||
	    tp->udev->speed == USB_SPEED_LOW) {
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		/* rx share fifo credit near full threshold */
		ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
				RXFIFO_THR2_FULL);
		ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
				RXFIFO_THR3_FULL);
	} else {
		/* rx share fifo credit near full threshold */
		ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
				RXFIFO_THR2_HIGH);
		ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
				RXFIFO_THR3_HIGH);
	}

	/* TX share fifo free credit full threshold */
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);

	ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
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	ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
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	ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
			TEST_MODE_DISABLE | TX_SIZE_ADJUST1);

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	rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
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	ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
	ocp_data |= TCR0_AUTO_FIFO;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
}

static void r8152b_enter_oob(struct r8152 *tp)
{
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	u32 ocp_data;
	int i;
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	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
	ocp_data &= ~NOW_IS_OOB;
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);

	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);

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	rtl_disable(tp);
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	for (i = 0; i < 1000; i++) {
		ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
		if (ocp_data & LINK_LIST_READY)
			break;
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		usleep_range(1000, 2000);
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	}

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
	ocp_data |= RE_INIT_LL;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);

	for (i = 0; i < 1000; i++) {
		ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
		if (ocp_data & LINK_LIST_READY)
			break;
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		usleep_range(1000, 2000);
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	}

	ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);

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	rtl_rx_vlan_en(tp, true);
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	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
	ocp_data |= ALDPS_PROXY_MODE;
	ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);

	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
	ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);

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	rxdy_gated_en(tp, false);
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	ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
	ocp_data |= RCR_APM | RCR_AM | RCR_AB;
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
}

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static void r8153_hw_phy_cfg(struct r8152 *tp)
{
	u32 ocp_data;
	u16 data;

	ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
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	data = r8152_mdio_read(tp, MII_BMCR);
	if (data & BMCR_PDOWN) {
		data &= ~BMCR_PDOWN;
		r8152_mdio_write(tp, MII_BMCR, data);
	}
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	if (tp->version == RTL_VER_03) {
		data = ocp_reg_read(tp, OCP_EEE_CFG);
		data &= ~CTAP_SHORT_EN;
		ocp_reg_write(tp, OCP_EEE_CFG, data);
	}

	data = ocp_reg_read(tp, OCP_POWER_CFG);
	data |= EEE_CLKDIV_EN;
	ocp_reg_write(tp, OCP_POWER_CFG, data);

	data = ocp_reg_read(tp, OCP_DOWN_SPEED);
	data |= EN_10M_BGOFF;
	ocp_reg_write(tp, OCP_DOWN_SPEED, data);
	data = ocp_reg_read(tp, OCP_POWER_CFG);
	data |= EN_10M_PLLOFF;
	ocp_reg_write(tp, OCP_POWER_CFG, data);
	data = sram_read(tp, SRAM_IMPEDANCE);
	data &= ~RX_DRIVING_MASK;
	sram_write(tp, SRAM_IMPEDANCE, data);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
	ocp_data |= PFM_PWM_SWITCH;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);

	data = sram_read(tp, SRAM_LPF_CFG);
	data |= LPF_AUTO_TUNE;
	sram_write(tp, SRAM_LPF_CFG, data);

	data = sram_read(tp, SRAM_10M_AMP1);
	data |= GDAC_IB_UPALL;
	sram_write(tp, SRAM_10M_AMP1, data);
	data = sram_read(tp, SRAM_10M_AMP2);
	data |= AMP_DN;
	sram_write(tp, SRAM_10M_AMP2, data);
2504 2505

	set_bit(PHY_RESET, &tp->flags);
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}

2508
static void r8153_u1u2en(struct r8152 *tp, bool enable)
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2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519
{
	u8 u1u2[8];

	if (enable)
		memset(u1u2, 0xff, sizeof(u1u2));
	else
		memset(u1u2, 0x00, sizeof(u1u2));

	usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
}

2520
static void r8153_u2p3en(struct r8152 *tp, bool enable)
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2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531
{
	u32 ocp_data;

	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
	if (enable)
		ocp_data |= U2P3_ENABLE;
	else
		ocp_data &= ~U2P3_ENABLE;
	ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
}

2532
static void r8153_power_cut_en(struct r8152 *tp, bool enable)
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2533 2534 2535 2536 2537 2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552
{
	u32 ocp_data;

	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
	if (enable)
		ocp_data |= PWR_EN | PHASE2_EN;
	else
		ocp_data &= ~(PWR_EN | PHASE2_EN);
	ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);

	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
	ocp_data &= ~PCUT_STATUS;
	ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
}

static void r8153_first_init(struct r8152 *tp)
{
	u32 ocp_data;
	int i;

H
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	rxdy_gated_en(tp, true);
H
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2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575
	r8153_teredo_off(tp);

	ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
	ocp_data &= ~RCR_ACPT_ALL;
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);

	r8153_hw_phy_cfg(tp);

	rtl8152_nic_reset(tp);

	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
	ocp_data &= ~NOW_IS_OOB;
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
	ocp_data &= ~MCU_BORW_EN;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);

	for (i = 0; i < 1000; i++) {
		ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
		if (ocp_data & LINK_LIST_READY)
			break;
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		usleep_range(1000, 2000);
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2577 2578 2579 2580 2581 2582 2583 2584 2585 2586
	}

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
	ocp_data |= RE_INIT_LL;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);

	for (i = 0; i < 1000; i++) {
		ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
		if (ocp_data & LINK_LIST_READY)
			break;
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		usleep_range(1000, 2000);
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2588 2589
	}

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2590
	rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
H
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2591

2592 2593
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
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	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
	ocp_data |= TCR0_AUTO_FIFO;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);

	rtl8152_nic_reset(tp);

	/* rx share fifo credit full threshold */
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
	/* TX share fifo free credit full threshold */
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);

2608
	/* rx aggregation */
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	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
	ocp_data &= ~RX_AGG_DISABLE;
	ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
}

static void r8153_enter_oob(struct r8152 *tp)
{
	u32 ocp_data;
	int i;

	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
	ocp_data &= ~NOW_IS_OOB;
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);

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2623
	rtl_disable(tp);
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2624 2625 2626 2627 2628

	for (i = 0; i < 1000; i++) {
		ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
		if (ocp_data & LINK_LIST_READY)
			break;
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2629
		usleep_range(1000, 2000);
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2630 2631 2632 2633 2634 2635 2636 2637 2638 2639
	}

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
	ocp_data |= RE_INIT_LL;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);

	for (i = 0; i < 1000; i++) {
		ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
		if (ocp_data & LINK_LIST_READY)
			break;
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		usleep_range(1000, 2000);
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2641 2642
	}

2643
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
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	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
	ocp_data &= ~TEREDO_WAKE_MASK;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);

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	rtl_rx_vlan_en(tp, true);
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	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
	ocp_data |= ALDPS_PROXY_MODE;
	ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);

	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
	ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);

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	rxdy_gated_en(tp, false);
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	ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
	ocp_data |= RCR_APM | RCR_AM | RCR_AB;
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
}

static void r8153_disable_aldps(struct r8152 *tp)
{
	u16 data;

	data = ocp_reg_read(tp, OCP_POWER_CFG);
	data &= ~EN_ALDPS;
	ocp_reg_write(tp, OCP_POWER_CFG, data);
	msleep(20);
}

static void r8153_enable_aldps(struct r8152 *tp)
{
	u16 data;

	data = ocp_reg_read(tp, OCP_POWER_CFG);
	data |= EN_ALDPS;
	ocp_reg_write(tp, OCP_POWER_CFG, data);
}

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static void rtl8153_disable(struct r8152 *tp)
{
	r8153_disable_aldps(tp);
	rtl_disable(tp);
	r8153_enable_aldps(tp);
}

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static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
{
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	u16 bmcr, anar, gbcr;
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	int ret = 0;

	cancel_delayed_work_sync(&tp->schedule);
	anar = r8152_mdio_read(tp, MII_ADVERTISE);
	anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
		  ADVERTISE_100HALF | ADVERTISE_100FULL);
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	if (tp->mii.supports_gmii) {
		gbcr = r8152_mdio_read(tp, MII_CTRL1000);
		gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
	} else {
		gbcr = 0;
	}
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	if (autoneg == AUTONEG_DISABLE) {
		if (speed == SPEED_10) {
			bmcr = 0;
			anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
		} else if (speed == SPEED_100) {
			bmcr = BMCR_SPEED100;
			anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
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		} else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
			bmcr = BMCR_SPEED1000;
			gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
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		} else {
			ret = -EINVAL;
			goto out;
		}

		if (duplex == DUPLEX_FULL)
			bmcr |= BMCR_FULLDPLX;
	} else {
		if (speed == SPEED_10) {
			if (duplex == DUPLEX_FULL)
				anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
			else
				anar |= ADVERTISE_10HALF;
		} else if (speed == SPEED_100) {
			if (duplex == DUPLEX_FULL) {
				anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
				anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
			} else {
				anar |= ADVERTISE_10HALF;
				anar |= ADVERTISE_100HALF;
			}
H
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2739 2740 2741 2742 2743 2744 2745 2746 2747 2748
		} else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
			if (duplex == DUPLEX_FULL) {
				anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
				anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
				gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
			} else {
				anar |= ADVERTISE_10HALF;
				anar |= ADVERTISE_100HALF;
				gbcr |= ADVERTISE_1000HALF;
			}
H
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		} else {
			ret = -EINVAL;
			goto out;
		}

		bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
	}

2757 2758 2759
	if (test_bit(PHY_RESET, &tp->flags))
		bmcr |= BMCR_RESET;

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	if (tp->mii.supports_gmii)
		r8152_mdio_write(tp, MII_CTRL1000, gbcr);

H
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2763 2764 2765
	r8152_mdio_write(tp, MII_ADVERTISE, anar);
	r8152_mdio_write(tp, MII_BMCR, bmcr);

2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 2776
	if (test_bit(PHY_RESET, &tp->flags)) {
		int i;

		clear_bit(PHY_RESET, &tp->flags);
		for (i = 0; i < 50; i++) {
			msleep(20);
			if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
				break;
		}
	}

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2777 2778 2779 2780 2781
out:

	return ret;
}

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2782 2783 2784 2785 2786 2787 2788 2789 2790 2791
static void rtl8152_up(struct r8152 *tp)
{
	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

	r8152b_disable_aldps(tp);
	r8152b_exit_oob(tp);
	r8152b_enable_aldps(tp);
}

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static void rtl8152_down(struct r8152 *tp)
{
H
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2794 2795 2796 2797 2798
	if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
		rtl_drop_queued_tx(tp);
		return;
	}

H
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2799
	r8152_power_cut_en(tp, false);
H
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2800 2801 2802 2803 2804
	r8152b_disable_aldps(tp);
	r8152b_enter_oob(tp);
	r8152b_enable_aldps(tp);
}

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2805 2806 2807 2808 2809 2810 2811 2812 2813 2814
static void rtl8153_up(struct r8152 *tp)
{
	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

	r8153_disable_aldps(tp);
	r8153_first_init(tp);
	r8153_enable_aldps(tp);
}

H
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2815 2816
static void rtl8153_down(struct r8152 *tp)
{
H
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2817 2818 2819 2820 2821
	if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
		rtl_drop_queued_tx(tp);
		return;
	}

2822 2823
	r8153_u1u2en(tp, false);
	r8153_power_cut_en(tp, false);
H
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2824 2825 2826 2827 2828
	r8153_disable_aldps(tp);
	r8153_enter_oob(tp);
	r8153_enable_aldps(tp);
}

H
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2829 2830 2831 2832 2833
static void set_carrier(struct r8152 *tp)
{
	struct net_device *netdev = tp->netdev;
	u8 speed;

2834
	clear_bit(RTL8152_LINK_CHG, &tp->flags);
H
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2835 2836 2837 2838
	speed = rtl8152_get_speed(tp);

	if (speed & LINK_STATUS) {
		if (!(tp->speed & LINK_STATUS)) {
H
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2839
			tp->rtl_ops.enable(tp);
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2840 2841 2842 2843 2844 2845
			set_bit(RTL8152_SET_RX_MODE, &tp->flags);
			netif_carrier_on(netdev);
		}
	} else {
		if (tp->speed & LINK_STATUS) {
			netif_carrier_off(netdev);
H
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2846
			tasklet_disable(&tp->tl);
H
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2847
			tp->rtl_ops.disable(tp);
H
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2848
			tasklet_enable(&tp->tl);
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		}
	}
	tp->speed = speed;
}

static void rtl_work_func_t(struct work_struct *work)
{
	struct r8152 *tp = container_of(work, struct r8152, schedule.work);

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2858 2859 2860
	if (usb_autopm_get_interface(tp->intf) < 0)
		return;

H
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	if (!test_bit(WORK_ENABLE, &tp->flags))
		goto out1;

	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		goto out1;

H
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2867 2868 2869 2870 2871
	if (!mutex_trylock(&tp->control)) {
		schedule_delayed_work(&tp->schedule, 0);
		goto out1;
	}

2872 2873
	if (test_bit(RTL8152_LINK_CHG, &tp->flags))
		set_carrier(tp);
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2874 2875 2876 2877

	if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
		_rtl8152_set_rx_mode(tp->netdev);

2878 2879 2880 2881 2882
	if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
	    (tp->speed & LINK_STATUS)) {
		clear_bit(SCHEDULE_TASKLET, &tp->flags);
		tasklet_schedule(&tp->tl);
	}
2883 2884 2885 2886

	if (test_bit(PHY_RESET, &tp->flags))
		rtl_phy_reset(tp);

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	mutex_unlock(&tp->control);

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2889
out1:
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2890
	usb_autopm_put_interface(tp->intf);
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2891 2892 2893 2894 2895 2896 2897
}

static int rtl8152_open(struct net_device *netdev)
{
	struct r8152 *tp = netdev_priv(netdev);
	int res = 0;

2898 2899 2900 2901
	res = alloc_all_mem(tp);
	if (res)
		goto out;

2902 2903 2904
	/* set speed to 0 to avoid autoresume try to submit rx */
	tp->speed = 0;

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2905 2906 2907 2908 2909 2910
	res = usb_autopm_get_interface(tp->intf);
	if (res < 0) {
		free_all_mem(tp);
		goto out;
	}

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2911 2912
	mutex_lock(&tp->control);

H
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2913 2914 2915 2916 2917
	/* The WORK_ENABLE may be set when autoresume occurs */
	if (test_bit(WORK_ENABLE, &tp->flags)) {
		clear_bit(WORK_ENABLE, &tp->flags);
		usb_kill_urb(tp->intr_urb);
		cancel_delayed_work_sync(&tp->schedule);
2918 2919

		/* disable the tx/rx, if the workqueue has enabled them. */
H
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		if (tp->speed & LINK_STATUS)
			tp->rtl_ops.disable(tp);
	}

2924 2925
	tp->rtl_ops.up(tp);

2926 2927 2928 2929 2930 2931 2932
	rtl8152_set_speed(tp, AUTONEG_ENABLE,
			  tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
			  DUPLEX_FULL);
	tp->speed = 0;
	netif_carrier_off(netdev);
	netif_start_queue(netdev);
	set_bit(WORK_ENABLE, &tp->flags);
2933

2934 2935 2936 2937
	res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
	if (res) {
		if (res == -ENODEV)
			netif_device_detach(tp->netdev);
H
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2938 2939
		netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
			   res);
2940
		free_all_mem(tp);
H
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2941 2942
	} else {
		tasklet_enable(&tp->tl);
H
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2943 2944
	}

H
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2945 2946
	mutex_unlock(&tp->control);

H
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2947
	usb_autopm_put_interface(tp->intf);
H
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2948

2949
out:
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2950 2951 2952 2953 2954 2955 2956 2957
	return res;
}

static int rtl8152_close(struct net_device *netdev)
{
	struct r8152 *tp = netdev_priv(netdev);
	int res = 0;

H
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2958
	tasklet_disable(&tp->tl);
H
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2959
	clear_bit(WORK_ENABLE, &tp->flags);
2960
	usb_kill_urb(tp->intr_urb);
H
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2961 2962
	cancel_delayed_work_sync(&tp->schedule);
	netif_stop_queue(netdev);
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2963 2964 2965 2966 2967

	res = usb_autopm_get_interface(tp->intf);
	if (res < 0) {
		rtl_drop_queued_tx(tp);
	} else {
H
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2968 2969
		mutex_lock(&tp->control);

H
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2970
		/* The autosuspend may have been enabled and wouldn't
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2971 2972 2973
		 * be disable when autoresume occurs, because the
		 * netif_running() would be false.
		 */
2974
		rtl_runtime_suspend_enable(tp, false);
H
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2975 2976

		tp->rtl_ops.down(tp);
H
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2977 2978 2979

		mutex_unlock(&tp->control);

H
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2980 2981
		usb_autopm_put_interface(tp->intf);
	}
H
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2982

2983 2984
	free_all_mem(tp);

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2985 2986 2987
	return res;
}

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static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
{
	ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
	ocp_reg_write(tp, OCP_EEE_DATA, reg);
	ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
}

static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
{
	u16 data;

	r8152_mmd_indirect(tp, dev, reg);
	data = ocp_reg_read(tp, OCP_EEE_DATA);
	ocp_reg_write(tp, OCP_EEE_AR, 0x0000);

	return data;
}

static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
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{
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3008 3009 3010 3011 3012 3013 3014 3015
	r8152_mmd_indirect(tp, dev, reg);
	ocp_reg_write(tp, OCP_EEE_DATA, data);
	ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
}

static void r8152_eee_en(struct r8152 *tp, bool enable)
{
	u16 config1, config2, config3;
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	u32 ocp_data;
H
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3017 3018

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
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3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037
	config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
	config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
	config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;

	if (enable) {
		ocp_data |= EEE_RX_EN | EEE_TX_EN;
		config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
		config1 |= sd_rise_time(1);
		config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
		config3 |= fast_snr(42);
	} else {
		ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
		config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
			     RX_QUIET_EN);
		config1 |= sd_rise_time(7);
		config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
		config3 |= fast_snr(511);
	}

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	ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
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3039 3040 3041
	ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
	ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
	ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
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}

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static void r8152b_enable_eee(struct r8152 *tp)
{
	r8152_eee_en(tp, true);
	r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
}

static void r8153_eee_en(struct r8152 *tp, bool enable)
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3051 3052
{
	u32 ocp_data;
H
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3053
	u16 config;
H
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3054 3055

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
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3056 3057 3058 3059 3060 3061 3062 3063 3064 3065
	config = ocp_reg_read(tp, OCP_EEE_CFG);

	if (enable) {
		ocp_data |= EEE_RX_EN | EEE_TX_EN;
		config |= EEE10_EN;
	} else {
		ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
		config &= ~EEE10_EN;
	}

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	ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
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3067 3068 3069 3070 3071 3072 3073
	ocp_reg_write(tp, OCP_EEE_CFG, config);
}

static void r8153_enable_eee(struct r8152 *tp)
{
	r8153_eee_en(tp, true);
	ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
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3074 3075
}

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3076 3077 3078 3079 3080 3081 3082 3083 3084
static void r8152b_enable_fc(struct r8152 *tp)
{
	u16 anar;

	anar = r8152_mdio_read(tp, MII_ADVERTISE);
	anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
	r8152_mdio_write(tp, MII_ADVERTISE, anar);
}

3085 3086 3087 3088 3089 3090 3091 3092 3093
static void rtl_tally_reset(struct r8152 *tp)
{
	u32 ocp_data;

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
	ocp_data |= TALLY_RESET;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
}

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3094 3095
static void r8152b_init(struct r8152 *tp)
{
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3096
	u32 ocp_data;
H
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3097

H
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3098 3099 3100
	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

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3101 3102
	r8152b_disable_aldps(tp);

H
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3103 3104 3105 3106 3107 3108
	if (tp->version == RTL_VER_01) {
		ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
		ocp_data &= ~LED_MODE_MASK;
		ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
	}

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3109
	r8152_power_cut_en(tp, false);
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3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
	ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
	ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
	ocp_data &= ~MCU_CLK_RATIO_MASK;
	ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
	ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
	ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
		   SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);

	r8152b_enable_eee(tp);
	r8152b_enable_aldps(tp);
	r8152b_enable_fc(tp);
3125
	rtl_tally_reset(tp);
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3126

H
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3127
	/* enable rx aggregation */
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3128
	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
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3129
	ocp_data &= ~RX_AGG_DISABLE;
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3130 3131 3132
	ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
}

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3133 3134 3135 3136 3137
static void r8153_init(struct r8152 *tp)
{
	u32 ocp_data;
	int i;

H
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3138 3139 3140
	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

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3141
	r8153_disable_aldps(tp);
3142
	r8153_u1u2en(tp, false);
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3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157

	for (i = 0; i < 500; i++) {
		if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
		    AUTOLOAD_DONE)
			break;
		msleep(20);
	}

	for (i = 0; i < 500; i++) {
		ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
		if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
			break;
		msleep(20);
	}

3158
	r8153_u2p3en(tp, false);
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3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180

	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
	ocp_data &= ~TIMER11_EN;
	ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
	ocp_data &= ~LED_MODE_MASK;
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);

	ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
	ocp_data &= ~LPM_TIMER_MASK;
	if (tp->udev->speed == USB_SPEED_SUPER)
		ocp_data |= LPM_TIMER_500US;
	else
		ocp_data |= LPM_TIMER_500MS;
	ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);

	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
	ocp_data &= ~SEN_VAL_MASK;
	ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
	ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);

3181 3182
	r8153_power_cut_en(tp, false);
	r8153_u1u2en(tp, true);
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3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196

	ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
		       PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
		       U1U2_SPDWN_EN | L1_SPDWN_EN);
	ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
		       PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
		       TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
		       EEE_SPDWN_EN);

	r8153_enable_eee(tp);
	r8153_enable_aldps(tp);
	r8152b_enable_fc(tp);
3197
	rtl_tally_reset(tp);
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3198 3199
}

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3200 3201 3202
static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
{
	struct r8152 *tp = usb_get_intfdata(intf);
3203 3204
	struct net_device *netdev = tp->netdev;
	int ret = 0;
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3205

H
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3206 3207
	mutex_lock(&tp->control);

3208 3209 3210 3211 3212 3213
	if (PMSG_IS_AUTO(message)) {
		if (netif_running(netdev) && work_busy(&tp->schedule.work)) {
			ret = -EBUSY;
			goto out1;
		}

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		set_bit(SELECTIVE_SUSPEND, &tp->flags);
3215 3216 3217
	} else {
		netif_device_detach(netdev);
	}
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3219
	if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
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		clear_bit(WORK_ENABLE, &tp->flags);
3221
		usb_kill_urb(tp->intr_urb);
3222
		tasklet_disable(&tp->tl);
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3223
		if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3224
			rtl_stop_rx(tp);
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3225 3226
			rtl_runtime_suspend_enable(tp, true);
		} else {
3227
			cancel_delayed_work_sync(&tp->schedule);
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3228 3229
			tp->rtl_ops.down(tp);
		}
3230
		tasklet_enable(&tp->tl);
H
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3231
	}
3232
out1:
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3233 3234
	mutex_unlock(&tp->control);

3235
	return ret;
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3236 3237 3238 3239 3240 3241
}

static int rtl8152_resume(struct usb_interface *intf)
{
	struct r8152 *tp = usb_get_intfdata(intf);

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3242 3243
	mutex_lock(&tp->control);

H
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3244 3245 3246 3247 3248
	if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
		tp->rtl_ops.init(tp);
		netif_device_attach(tp->netdev);
	}

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	if (netif_running(tp->netdev)) {
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3250 3251 3252
		if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
			rtl_runtime_suspend_enable(tp, false);
			clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3253
			set_bit(WORK_ENABLE, &tp->flags);
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3254
			if (tp->speed & LINK_STATUS)
3255
				rtl_start_rx(tp);
H
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3256 3257 3258
		} else {
			tp->rtl_ops.up(tp);
			rtl8152_set_speed(tp, AUTONEG_ENABLE,
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3259 3260 3261
					  tp->mii.supports_gmii ?
					  SPEED_1000 : SPEED_100,
					  DUPLEX_FULL);
3262 3263 3264
			tp->speed = 0;
			netif_carrier_off(tp->netdev);
			set_bit(WORK_ENABLE, &tp->flags);
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3265
		}
3266
		usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3267 3268
	} else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
		clear_bit(SELECTIVE_SUSPEND, &tp->flags);
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3269 3270
	}

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3271 3272
	mutex_unlock(&tp->control);

H
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3273 3274 3275
	return 0;
}

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3276 3277 3278 3279
static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
{
	struct r8152 *tp = netdev_priv(dev);

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3280 3281 3282
	if (usb_autopm_get_interface(tp->intf) < 0)
		return;

H
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3283 3284
	mutex_lock(&tp->control);

H
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3285 3286
	wol->supported = WAKE_ANY;
	wol->wolopts = __rtl_get_wol(tp);
H
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3287

H
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3288 3289
	mutex_unlock(&tp->control);

H
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3290
	usb_autopm_put_interface(tp->intf);
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3291 3292 3293 3294 3295
}

static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
{
	struct r8152 *tp = netdev_priv(dev);
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3296 3297 3298 3299 3300
	int ret;

	ret = usb_autopm_get_interface(tp->intf);
	if (ret < 0)
		goto out_set_wol;
H
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3301

H
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3302 3303
	mutex_lock(&tp->control);

H
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3304 3305 3306
	__rtl_set_wol(tp, wol->wolopts);
	tp->saved_wolopts = wol->wolopts & WAKE_ANY;

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3307 3308
	mutex_unlock(&tp->control);

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3309 3310 3311 3312
	usb_autopm_put_interface(tp->intf);

out_set_wol:
	return ret;
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}

3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328
static u32 rtl8152_get_msglevel(struct net_device *dev)
{
	struct r8152 *tp = netdev_priv(dev);

	return tp->msg_enable;
}

static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
{
	struct r8152 *tp = netdev_priv(dev);

	tp->msg_enable = value;
}

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static void rtl8152_get_drvinfo(struct net_device *netdev,
				struct ethtool_drvinfo *info)
{
	struct r8152 *tp = netdev_priv(netdev);

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	strlcpy(info->driver, MODULENAME, sizeof(info->driver));
	strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
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	usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
}

static
int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
{
	struct r8152 *tp = netdev_priv(netdev);
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	int ret;
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3344 3345 3346 3347

	if (!tp->mii.mdio_read)
		return -EOPNOTSUPP;

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3348 3349 3350 3351
	ret = usb_autopm_get_interface(tp->intf);
	if (ret < 0)
		goto out;

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3352 3353
	mutex_lock(&tp->control);

H
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3354 3355
	ret = mii_ethtool_gset(&tp->mii, cmd);

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3356 3357
	mutex_unlock(&tp->control);

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3358 3359 3360 3361
	usb_autopm_put_interface(tp->intf);

out:
	return ret;
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}

static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	struct r8152 *tp = netdev_priv(dev);
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3367 3368 3369 3370 3371
	int ret;

	ret = usb_autopm_get_interface(tp->intf);
	if (ret < 0)
		goto out;
H
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H
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3373 3374
	mutex_lock(&tp->control);

H
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3375 3376
	ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);

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3377 3378
	mutex_unlock(&tp->control);

H
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3379 3380 3381 3382
	usb_autopm_put_interface(tp->intf);

out:
	return ret;
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3383 3384
}

3385 3386 3387 3388 3389 3390 3391 3392 3393 3394 3395 3396 3397 3398 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416
static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
	"tx_packets",
	"rx_packets",
	"tx_errors",
	"rx_errors",
	"rx_missed",
	"align_errors",
	"tx_single_collisions",
	"tx_multi_collisions",
	"rx_unicast",
	"rx_broadcast",
	"rx_multicast",
	"tx_aborted",
	"tx_underrun",
};

static int rtl8152_get_sset_count(struct net_device *dev, int sset)
{
	switch (sset) {
	case ETH_SS_STATS:
		return ARRAY_SIZE(rtl8152_gstrings);
	default:
		return -EOPNOTSUPP;
	}
}

static void rtl8152_get_ethtool_stats(struct net_device *dev,
				      struct ethtool_stats *stats, u64 *data)
{
	struct r8152 *tp = netdev_priv(dev);
	struct tally_counter tally;

3417 3418 3419
	if (usb_autopm_get_interface(tp->intf) < 0)
		return;

3420 3421
	generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);

3422 3423
	usb_autopm_put_interface(tp->intf);

3424 3425 3426 3427 3428 3429 3430 3431 3432 3433 3434 3435
	data[0] = le64_to_cpu(tally.tx_packets);
	data[1] = le64_to_cpu(tally.rx_packets);
	data[2] = le64_to_cpu(tally.tx_errors);
	data[3] = le32_to_cpu(tally.rx_errors);
	data[4] = le16_to_cpu(tally.rx_missed);
	data[5] = le16_to_cpu(tally.align_errors);
	data[6] = le32_to_cpu(tally.tx_one_collision);
	data[7] = le32_to_cpu(tally.tx_multi_collision);
	data[8] = le64_to_cpu(tally.rx_unicast);
	data[9] = le64_to_cpu(tally.rx_broadcast);
	data[10] = le32_to_cpu(tally.rx_multicast);
	data[11] = le16_to_cpu(tally.tx_aborted);
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	data[12] = le16_to_cpu(tally.tx_underrun);
3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447
}

static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
{
	switch (stringset) {
	case ETH_SS_STATS:
		memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
		break;
	}
}

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static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
{
	u32 ocp_data, lp, adv, supported = 0;
	u16 val;

	val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
	supported = mmd_eee_cap_to_ethtool_sup_t(val);

	val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
	adv = mmd_eee_adv_to_ethtool_adv_t(val);

	val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
	lp = mmd_eee_adv_to_ethtool_adv_t(val);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
	ocp_data &= EEE_RX_EN | EEE_TX_EN;

	eee->eee_enabled = !!ocp_data;
	eee->eee_active = !!(supported & adv & lp);
	eee->supported = supported;
	eee->advertised = adv;
	eee->lp_advertised = lp;

	return 0;
}

static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
{
	u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);

	r8152_eee_en(tp, eee->eee_enabled);

	if (!eee->eee_enabled)
		val = 0;

	r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);

	return 0;
}

static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
{
	u32 ocp_data, lp, adv, supported = 0;
	u16 val;

	val = ocp_reg_read(tp, OCP_EEE_ABLE);
	supported = mmd_eee_cap_to_ethtool_sup_t(val);

	val = ocp_reg_read(tp, OCP_EEE_ADV);
	adv = mmd_eee_adv_to_ethtool_adv_t(val);

	val = ocp_reg_read(tp, OCP_EEE_LPABLE);
	lp = mmd_eee_adv_to_ethtool_adv_t(val);

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
	ocp_data &= EEE_RX_EN | EEE_TX_EN;

	eee->eee_enabled = !!ocp_data;
	eee->eee_active = !!(supported & adv & lp);
	eee->supported = supported;
	eee->advertised = adv;
	eee->lp_advertised = lp;

	return 0;
}

static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
{
	u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);

	r8153_eee_en(tp, eee->eee_enabled);

	if (!eee->eee_enabled)
		val = 0;

	ocp_reg_write(tp, OCP_EEE_ADV, val);

	return 0;
}

static int
rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
{
	struct r8152 *tp = netdev_priv(net);
	int ret;

	ret = usb_autopm_get_interface(tp->intf);
	if (ret < 0)
		goto out;

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3538 3539
	mutex_lock(&tp->control);

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3540 3541
	ret = tp->rtl_ops.eee_get(tp, edata);

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3542 3543
	mutex_unlock(&tp->control);

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3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559
	usb_autopm_put_interface(tp->intf);

out:
	return ret;
}

static int
rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
{
	struct r8152 *tp = netdev_priv(net);
	int ret;

	ret = usb_autopm_get_interface(tp->intf);
	if (ret < 0)
		goto out;

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	mutex_lock(&tp->control);

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3562
	ret = tp->rtl_ops.eee_set(tp, edata);
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3563 3564
	if (!ret)
		ret = mii_nway_restart(&tp->mii);
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3565

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3566 3567
	mutex_unlock(&tp->control);

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3568 3569 3570 3571 3572 3573
	usb_autopm_put_interface(tp->intf);

out:
	return ret;
}

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3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594
static int rtl8152_nway_reset(struct net_device *dev)
{
	struct r8152 *tp = netdev_priv(dev);
	int ret;

	ret = usb_autopm_get_interface(tp->intf);
	if (ret < 0)
		goto out;

	mutex_lock(&tp->control);

	ret = mii_nway_restart(&tp->mii);

	mutex_unlock(&tp->control);

	usb_autopm_put_interface(tp->intf);

out:
	return ret;
}

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static struct ethtool_ops ops = {
	.get_drvinfo = rtl8152_get_drvinfo,
	.get_settings = rtl8152_get_settings,
	.set_settings = rtl8152_set_settings,
	.get_link = ethtool_op_get_link,
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	.nway_reset = rtl8152_nway_reset,
3601 3602
	.get_msglevel = rtl8152_get_msglevel,
	.set_msglevel = rtl8152_set_msglevel,
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	.get_wol = rtl8152_get_wol,
	.set_wol = rtl8152_set_wol,
3605 3606 3607
	.get_strings = rtl8152_get_strings,
	.get_sset_count = rtl8152_get_sset_count,
	.get_ethtool_stats = rtl8152_get_ethtool_stats,
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	.get_eee = rtl_ethtool_get_eee,
	.set_eee = rtl_ethtool_set_eee,
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};

static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
{
	struct r8152 *tp = netdev_priv(netdev);
	struct mii_ioctl_data *data = if_mii(rq);
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	int res;

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	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return -ENODEV;

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	res = usb_autopm_get_interface(tp->intf);
	if (res < 0)
		goto out;
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	switch (cmd) {
	case SIOCGMIIPHY:
		data->phy_id = R8152_PHY_ID; /* Internal PHY */
		break;

	case SIOCGMIIREG:
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		mutex_lock(&tp->control);
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		data->val_out = r8152_mdio_read(tp, data->reg_num);
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		mutex_unlock(&tp->control);
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		break;

	case SIOCSMIIREG:
		if (!capable(CAP_NET_ADMIN)) {
			res = -EPERM;
			break;
		}
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		mutex_lock(&tp->control);
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		r8152_mdio_write(tp, data->reg_num, data->val_in);
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		mutex_unlock(&tp->control);
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		break;

	default:
		res = -EOPNOTSUPP;
	}

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	usb_autopm_put_interface(tp->intf);

out:
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	return res;
}

3656 3657 3658 3659 3660 3661 3662 3663 3664 3665 3666 3667 3668 3669 3670 3671 3672 3673 3674 3675
static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
{
	struct r8152 *tp = netdev_priv(dev);

	switch (tp->version) {
	case RTL_VER_01:
	case RTL_VER_02:
		return eth_change_mtu(dev, new_mtu);
	default:
		break;
	}

	if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
		return -EINVAL;

	dev->mtu = new_mtu;

	return 0;
}

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static const struct net_device_ops rtl8152_netdev_ops = {
	.ndo_open		= rtl8152_open,
	.ndo_stop		= rtl8152_close,
	.ndo_do_ioctl		= rtl8152_ioctl,
	.ndo_start_xmit		= rtl8152_start_xmit,
	.ndo_tx_timeout		= rtl8152_tx_timeout,
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	.ndo_set_features	= rtl8152_set_features,
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	.ndo_set_rx_mode	= rtl8152_set_rx_mode,
	.ndo_set_mac_address	= rtl8152_set_mac_address,
3685
	.ndo_change_mtu		= rtl8152_change_mtu,
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	.ndo_validate_addr	= eth_validate_addr,
};

static void r8152b_get_version(struct r8152 *tp)
{
	u32	ocp_data;
	u16	version;

	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
	version = (u16)(ocp_data & VERSION_MASK);

	switch (version) {
	case 0x4c00:
		tp->version = RTL_VER_01;
		break;
	case 0x4c10:
		tp->version = RTL_VER_02;
		break;
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	case 0x5c00:
		tp->version = RTL_VER_03;
		tp->mii.supports_gmii = 1;
		break;
	case 0x5c10:
		tp->version = RTL_VER_04;
		tp->mii.supports_gmii = 1;
		break;
	case 0x5c20:
		tp->version = RTL_VER_05;
		tp->mii.supports_gmii = 1;
		break;
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	default:
		netif_info(tp, probe, tp->netdev,
			   "Unknown version 0x%04x\n", version);
		break;
	}
}

3723 3724
static void rtl8152_unload(struct r8152 *tp)
{
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	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

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	if (tp->version != RTL_VER_01)
		r8152_power_cut_en(tp, true);
3730 3731
}

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static void rtl8153_unload(struct r8152 *tp)
{
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	if (test_bit(RTL8152_UNPLUG, &tp->flags))
		return;

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3737
	r8153_power_cut_en(tp, false);
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3738 3739
}

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3740
static int rtl_ops_init(struct r8152 *tp)
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3741 3742
{
	struct rtl_ops *ops = &tp->rtl_ops;
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	int ret = 0;

	switch (tp->version) {
	case RTL_VER_01:
	case RTL_VER_02:
		ops->init		= r8152b_init;
		ops->enable		= rtl8152_enable;
		ops->disable		= rtl8152_disable;
		ops->up			= rtl8152_up;
		ops->down		= rtl8152_down;
		ops->unload		= rtl8152_unload;
		ops->eee_get		= r8152_get_eee;
		ops->eee_set		= r8152_set_eee;
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3756 3757
		break;

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3758 3759 3760 3761 3762 3763 3764 3765 3766 3767 3768
	case RTL_VER_03:
	case RTL_VER_04:
	case RTL_VER_05:
		ops->init		= r8153_init;
		ops->enable		= rtl8153_enable;
		ops->disable		= rtl8153_disable;
		ops->up			= rtl8153_up;
		ops->down		= rtl8153_down;
		ops->unload		= rtl8153_unload;
		ops->eee_get		= r8153_get_eee;
		ops->eee_set		= r8153_set_eee;
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		break;

	default:
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3772 3773
		ret = -ENODEV;
		netif_err(tp, probe, tp->netdev, "Unknown Device\n");
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		break;
	}

	return ret;
}

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static int rtl8152_probe(struct usb_interface *intf,
			 const struct usb_device_id *id)
{
	struct usb_device *udev = interface_to_usbdev(intf);
	struct r8152 *tp;
	struct net_device *netdev;
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3786
	int ret;
H
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3787

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3788 3789 3790 3791 3792 3793
	if (udev->actconfig->desc.bConfigurationValue != 1) {
		usb_driver_set_configuration(udev, 1);
		return -ENODEV;
	}

	usb_reset_device(udev);
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	netdev = alloc_etherdev(sizeof(struct r8152));
	if (!netdev) {
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3796
		dev_err(&intf->dev, "Out of memory\n");
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		return -ENOMEM;
	}

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3800
	SET_NETDEV_DEV(netdev, &intf->dev);
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3801 3802 3803
	tp = netdev_priv(netdev);
	tp->msg_enable = 0x7FFF;

3804 3805 3806 3807
	tp->udev = udev;
	tp->netdev = netdev;
	tp->intf = intf;

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3808
	r8152b_get_version(tp);
H
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3809
	ret = rtl_ops_init(tp);
3810 3811
	if (ret)
		goto out;
H
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3812

H
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3813
	tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
H
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3814
	mutex_init(&tp->control);
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	INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);

	netdev->netdev_ops = &rtl8152_netdev_ops;
	netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
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H
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	netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
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3821
			    NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
H
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3822 3823
			    NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
			    NETIF_F_HW_VLAN_CTAG_TX;
H
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3824
	netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
H
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3825
			      NETIF_F_TSO | NETIF_F_FRAGLIST |
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3826 3827 3828 3829 3830 3831
			      NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
			      NETIF_F_HW_VLAN_CTAG_RX |
			      NETIF_F_HW_VLAN_CTAG_TX;
	netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
				NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
				NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3832

3833
	netdev->ethtool_ops = &ops;
H
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3834
	netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
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3835 3836 3837 3838 3839 3840 3841 3842

	tp->mii.dev = netdev;
	tp->mii.mdio_read = read_mii_word;
	tp->mii.mdio_write = write_mii_word;
	tp->mii.phy_id_mask = 0x3f;
	tp->mii.reg_num_mask = 0x1f;
	tp->mii.phy_id = R8152_PHY_ID;

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3843 3844
	intf->needs_remote_wakeup = 1;

H
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3845
	tp->rtl_ops.init(tp);
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3846 3847 3848 3849
	set_ethernet_addr(tp);

	usb_set_intfdata(intf, tp);

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3850 3851
	ret = register_netdev(netdev);
	if (ret != 0) {
H
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3852
		netif_err(tp, probe, netdev, "couldn't register the device\n");
H
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3853
		goto out1;
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3854 3855
	}

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3856 3857 3858 3859 3860 3861
	tp->saved_wolopts = __rtl_get_wol(tp);
	if (tp->saved_wolopts)
		device_set_wakeup_enable(&udev->dev, true);
	else
		device_set_wakeup_enable(&udev->dev, false);

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3862 3863
	tasklet_disable(&tp->tl);

H
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3864
	netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
H
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3865 3866 3867 3868

	return 0;

out1:
H
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3869
	usb_set_intfdata(intf, NULL);
H
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3870
	tasklet_kill(&tp->tl);
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3871 3872
out:
	free_netdev(netdev);
H
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3873
	return ret;
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3874 3875 3876 3877 3878 3879 3880 3881
}

static void rtl8152_disconnect(struct usb_interface *intf)
{
	struct r8152 *tp = usb_get_intfdata(intf);

	usb_set_intfdata(intf, NULL);
	if (tp) {
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3882 3883 3884 3885 3886
		struct usb_device *udev = tp->udev;

		if (udev->state == USB_STATE_NOTATTACHED)
			set_bit(RTL8152_UNPLUG, &tp->flags);

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3887 3888
		tasklet_kill(&tp->tl);
		unregister_netdev(tp->netdev);
H
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3889
		tp->rtl_ops.unload(tp);
H
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3890 3891 3892 3893 3894 3895
		free_netdev(tp->netdev);
	}
}

/* table of devices that work with this driver */
static struct usb_device_id rtl8152_table[] = {
3896 3897 3898
	{USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
	{USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
	{USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
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	{}
};

MODULE_DEVICE_TABLE(usb, rtl8152_table);

static struct usb_driver rtl8152_driver = {
	.name =		MODULENAME,
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3906
	.id_table =	rtl8152_table,
H
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3907 3908 3909
	.probe =	rtl8152_probe,
	.disconnect =	rtl8152_disconnect,
	.suspend =	rtl8152_suspend,
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3910 3911
	.resume =	rtl8152_resume,
	.reset_resume =	rtl8152_resume,
H
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3912
	.supports_autosuspend = 1,
H
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3913
	.disable_hub_initiated_lpm = 1,
H
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3914 3915
};

3916
module_usb_driver(rtl8152_driver);
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3917 3918 3919 3920

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");