meson-axg-s400.dts

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
 */

/dts-v1/;

#include "meson-axg.dtsi"

/ {
	compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
	model = "Amlogic Meson AXG S400 Development Board";

	aliases {
		serial0 = &uart_AO;
		serial1 = &uart_A;
	};

	vddio_boot: regulator-vddio_boot {
		compatible = "regulator-fixed";
		regulator-name = "VDDIO_BOOT";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	vddao_3v3: regulator-vddao_3v3 {
		compatible = "regulator-fixed";
		regulator-name = "VDDAO_3V3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	vddio_ao18: regulator-vddio_ao18 {
		compatible = "regulator-fixed";
		regulator-name = "VDDIO_AO18";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	vcc_3v3: regulator-vcc_3v3 {
		compatible = "regulator-fixed";
		regulator-name = "VCC_3V3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	emmc_pwrseq: emmc-pwrseq {
		compatible = "mmc-pwrseq-emmc";
		reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
	};

	sdio_pwrseq: sdio-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
		clocks = <&wifi32k>;
		clock-names = "ext_clock";
	};

	wifi32k: wifi32k {
		compatible = "pwm-clock";
		#clock-cells = <0>;
		clock-frequency = <32768>;
		pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
	};
};

&ethmac {
	status = "okay";
	pinctrl-0 = <&eth_rgmii_y_pins>;
	pinctrl-names = "default";
	phy-handle = <&eth_phy0>;
	phy-mode = "rgmii";

	mdio {
		compatible = "snps,dwmac-mdio";
		#address-cells = <1>;
		#size-cells = <0>;

		eth_phy0: ethernet-phy@0 {
			/* Realtek RTL8211F (0x001cc916) */
			reg = <0>;
			eee-broken-1000t;
		};
	};
};

&uart_A {
	status = "okay";
	pinctrl-0 = <&uart_a_pins>;
	pinctrl-names = "default";
};

&uart_AO {
	status = "okay";
	pinctrl-0 = <&uart_ao_a_pins>;
	pinctrl-names = "default";
};

&ir {
	status = "okay";
	pinctrl-0 = <&remote_input_ao_pins>;
	pinctrl-names = "default";
};

&i2c1 {
	status = "okay";
	pinctrl-0 = <&i2c1_z_pins>;
	pinctrl-names = "default";
};

&i2c_AO {
	status = "okay";
	pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
	pinctrl-names = "default";
};

&pwm_ab {
	status = "okay";
	pinctrl-0 = <&pwm_a_x20_pins>;
	pinctrl-names = "default";
};

/* emmc storage */
&sd_emmc_c {
	status = "okay";
	pinctrl-0 = <&emmc_pins>;
	pinctrl-1 = <&emmc_clk_gate_pins>;
	pinctrl-names = "default", "clk-gate";

	bus-width = <8>;
	cap-sd-highspeed;
	cap-mmc-highspeed;
	max-frequency = <180000000>;
	non-removable;
	disable-wp;
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;

	vmmc-supply = <&vcc_3v3>;
	vqmmc-supply = <&vddio_boot>;
};

/* wifi module */
&sd_emmc_b {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	pinctrl-0 = <&sdio_pins>;
	pinctrl-1 = <&sdio_clk_gate_pins>;
	pinctrl-names = "default", "clk-gate";

	bus-width = <4>;
	cap-sd-highspeed;
	max-frequency = <100000000>;
	non-removable;
	disable-wp;

	mmc-pwrseq = <&sdio_pwrseq>;

	vmmc-supply = <&vddao_3v3>;
	vqmmc-supply = <&vddio_boot>;

	brcmf: wifi@1 {
		reg = <1>;
		compatible = "brcm,bcm4329-fmac";
	};
};