sdhci-pci-core.c 43.6 KB
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/*  linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
 *
 *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 *
 * Thanks to the following companies for their support:
 *
 *     - JMicron (hardware and technical support)
 */

#include <linux/delay.h>
#include <linux/highmem.h>
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#include <linux/module.h>
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#include <linux/pci.h>
#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <linux/device.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/mmc.h>
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#include <linux/scatterlist.h>
#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/pm_runtime.h>
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#include <linux/mmc/slot-gpio.h>
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#include <linux/mmc/sdhci-pci-data.h>
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#include "sdhci.h"
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#include "sdhci-pci.h"
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#include "sdhci-pci-o2micro.h"
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/*****************************************************************************\
 *                                                                           *
 * Hardware specific quirk handling                                          *
 *                                                                           *
\*****************************************************************************/

static int ricoh_probe(struct sdhci_pci_chip *chip)
{
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	if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
	    chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
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		chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
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	return 0;
}

static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
{
	slot->host->caps =
		((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
			& SDHCI_TIMEOUT_CLK_MASK) |
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		((0x21 << SDHCI_CLOCK_BASE_SHIFT)
			& SDHCI_CLOCK_BASE_MASK) |

		SDHCI_TIMEOUT_CLK_UNIT |
		SDHCI_CAN_VDD_330 |
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		SDHCI_CAN_DO_HISPD |
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		SDHCI_CAN_DO_SDMA;
	return 0;
}

static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
{
	/* Apply a delay to allow controller to settle */
	/* Otherwise it becomes confused if card state changed
		during suspend */
	msleep(500);
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	return 0;
}

static const struct sdhci_pci_fixes sdhci_ricoh = {
	.probe		= ricoh_probe,
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	.quirks		= SDHCI_QUIRK_32BIT_DMA_ADDR |
			  SDHCI_QUIRK_FORCE_DMA |
			  SDHCI_QUIRK_CLOCK_BEFORE_RESET,
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};

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static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
	.probe_slot	= ricoh_mmc_probe_slot,
	.resume		= ricoh_mmc_resume,
	.quirks		= SDHCI_QUIRK_32BIT_DMA_ADDR |
			  SDHCI_QUIRK_CLOCK_BEFORE_RESET |
			  SDHCI_QUIRK_NO_CARD_NO_RESET |
			  SDHCI_QUIRK_MISSING_CAPS
};

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static const struct sdhci_pci_fixes sdhci_ene_712 = {
	.quirks		= SDHCI_QUIRK_SINGLE_POWER_WRITE |
			  SDHCI_QUIRK_BROKEN_DMA,
};

static const struct sdhci_pci_fixes sdhci_ene_714 = {
	.quirks		= SDHCI_QUIRK_SINGLE_POWER_WRITE |
			  SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
			  SDHCI_QUIRK_BROKEN_DMA,
};

static const struct sdhci_pci_fixes sdhci_cafe = {
	.quirks		= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
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			  SDHCI_QUIRK_NO_BUSY_IRQ |
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			  SDHCI_QUIRK_BROKEN_CARD_DETECTION |
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			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
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};

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static const struct sdhci_pci_fixes sdhci_intel_qrk = {
	.quirks		= SDHCI_QUIRK_NO_HISPD_BIT,
};

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static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
{
	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
	return 0;
}

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/*
 * ADMA operation is disabled for Moorestown platform due to
 * hardware bugs.
 */
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static int mrst_hc_probe(struct sdhci_pci_chip *chip)
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{
	/*
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	 * slots number is fixed here for MRST as SDIO3/5 are never used and
	 * have hardware bugs.
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	 */
	chip->num_slots = 1;
	return 0;
}

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static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
{
	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
	return 0;
}

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#ifdef CONFIG_PM
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static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
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{
	struct sdhci_pci_slot *slot = dev_id;
	struct sdhci_host *host = slot->host;

	mmc_detect_change(host->mmc, msecs_to_jiffies(200));
	return IRQ_HANDLED;
}

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static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
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{
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	int err, irq, gpio = slot->cd_gpio;
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	slot->cd_gpio = -EINVAL;
	slot->cd_irq = -EINVAL;

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	if (!gpio_is_valid(gpio))
		return;

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	err = gpio_request(gpio, "sd_cd");
	if (err < 0)
		goto out;

	err = gpio_direction_input(gpio);
	if (err < 0)
		goto out_free;

	irq = gpio_to_irq(gpio);
	if (irq < 0)
		goto out_free;

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	err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
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			  IRQF_TRIGGER_FALLING, "sd_cd", slot);
	if (err)
		goto out_free;

	slot->cd_gpio = gpio;
	slot->cd_irq = irq;

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	return;
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out_free:
	gpio_free(gpio);
out:
	dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
}

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static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
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{
	if (slot->cd_irq >= 0)
		free_irq(slot->cd_irq, slot);
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	if (gpio_is_valid(slot->cd_gpio))
		gpio_free(slot->cd_gpio);
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}

#else

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static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
{
}

static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
{
}
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#endif

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static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
{
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	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
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	slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
				  MMC_CAP2_HC_ERASE_SZ;
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	return 0;
}

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static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
{
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	slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
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	return 0;
}

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static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
	.quirks		= SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
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	.probe_slot	= mrst_hc_probe_slot,
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};

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static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
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	.quirks		= SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
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	.probe		= mrst_hc_probe,
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};

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static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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	.allow_runtime_pm = true,
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	.own_cd_for_runtime_pm = true,
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};

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static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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	.quirks2	= SDHCI_QUIRK2_HOST_OFF_CARD_ON,
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	.allow_runtime_pm = true,
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	.probe_slot	= mfd_sdio_probe_slot,
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};

static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
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	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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	.allow_runtime_pm = true,
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	.probe_slot	= mfd_emmc_probe_slot,
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};

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static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
	.quirks		= SDHCI_QUIRK_BROKEN_ADMA,
	.probe_slot	= pch_hc_probe_slot,
};

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static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
{
	u8 reg;

	reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
	reg |= 0x10;
	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
	/* For eMMC, minimum is 1us but give it 9us for good measure */
	udelay(9);
	reg &= ~0x10;
	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
	/* For eMMC, minimum is 200us but give it 300us for good measure */
	usleep_range(300, 1000);
}

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static int spt_select_drive_strength(struct sdhci_host *host,
				     struct mmc_card *card,
				     unsigned int max_dtr,
				     int host_drv, int card_drv, int *drv_type)
{
	int drive_strength;

	if (sdhci_pci_spt_drive_strength > 0)
		drive_strength = sdhci_pci_spt_drive_strength & 0xf;
	else
		drive_strength = 1; /* 33-ohm */

	if ((mmc_driver_type_mask(drive_strength) & card_drv) == 0)
		drive_strength = 0; /* Default 50-ohm */

	return drive_strength;
}

/* Try to read the drive strength from the card */
static void spt_read_drive_strength(struct sdhci_host *host)
{
	u32 val, i, t;
	u16 m;

	if (sdhci_pci_spt_drive_strength)
		return;

	sdhci_pci_spt_drive_strength = -1;

	m = sdhci_readw(host, SDHCI_HOST_CONTROL2) & 0x7;
	if (m != 3 && m != 5)
		return;
	val = sdhci_readl(host, SDHCI_PRESENT_STATE);
	if (val & 0x3)
		return;
	sdhci_writel(host, 0x007f0023, SDHCI_INT_ENABLE);
	sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
	sdhci_writew(host, 0x10, SDHCI_TRANSFER_MODE);
	sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
	sdhci_writew(host, 512, SDHCI_BLOCK_SIZE);
	sdhci_writew(host, 1, SDHCI_BLOCK_COUNT);
	sdhci_writel(host, 0, SDHCI_ARGUMENT);
	sdhci_writew(host, 0x83b, SDHCI_COMMAND);
	for (i = 0; i < 1000; i++) {
		val = sdhci_readl(host, SDHCI_INT_STATUS);
		if (val & 0xffff8000)
			return;
		if (val & 0x20)
			break;
		udelay(1);
	}
	val = sdhci_readl(host, SDHCI_PRESENT_STATE);
	if (!(val & 0x800))
		return;
	for (i = 0; i < 47; i++)
		val = sdhci_readl(host, SDHCI_BUFFER);
	t = val & 0xf00;
	if (t != 0x200 && t != 0x300)
		return;

	sdhci_pci_spt_drive_strength = 0x10 | ((val >> 12) & 0xf);
}

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static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
{
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	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
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				 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
				 MMC_CAP_BUS_WIDTH_TEST |
				 MMC_CAP_WAIT_WHILE_BUSY;
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	slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
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	slot->hw_reset = sdhci_pci_int_hw_reset;
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	if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
		slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
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	if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_SPT_EMMC) {
		spt_read_drive_strength(slot->host);
		slot->select_drive_strength = spt_select_drive_strength;
	}
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	return 0;
}

static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
{
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	slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
				 MMC_CAP_BUS_WIDTH_TEST |
				 MMC_CAP_WAIT_WHILE_BUSY;
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	return 0;
}

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static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
{
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	slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST |
				 MMC_CAP_WAIT_WHILE_BUSY;
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	slot->cd_con_id = NULL;
	slot->cd_idx = 0;
	slot->cd_override_level = true;
	return 0;
}

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static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
	.allow_runtime_pm = true,
	.probe_slot	= byt_emmc_probe_slot,
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	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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	.quirks2	= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
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			  SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
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			  SDHCI_QUIRK2_STOP_WITH_TC,
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};

static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
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	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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	.quirks2	= SDHCI_QUIRK2_HOST_OFF_CARD_ON |
			SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
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	.allow_runtime_pm = true,
	.probe_slot	= byt_sdio_probe_slot,
};

static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
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	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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	.quirks2	= SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
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			  SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
			  SDHCI_QUIRK2_STOP_WITH_TC,
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	.allow_runtime_pm = true,
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	.own_cd_for_runtime_pm = true,
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	.probe_slot	= byt_sd_probe_slot,
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};

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/* Define Host controllers for Intel Merrifield platform */
#define INTEL_MRFL_EMMC_0	0
#define INTEL_MRFL_EMMC_1	1

static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot)
{
	if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_0) &&
	    (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_1))
		/* SD support is not ready yet */
		return -ENODEV;

	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
				 MMC_CAP_1_8V_DDR;

	return 0;
}

static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = {
	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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	.quirks2	= SDHCI_QUIRK2_BROKEN_HS200 |
			SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
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	.allow_runtime_pm = true,
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	.probe_slot	= intel_mrfl_mmc_probe_slot,
};

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/* O2Micro extra registers */
#define O2_SD_LOCK_WP		0xD3
#define O2_SD_MULTI_VCC3V	0xEE
#define O2_SD_CLKREQ		0xEC
#define O2_SD_CAPS		0xE0
#define O2_SD_ADMA1		0xE2
#define O2_SD_ADMA2		0xE7
#define O2_SD_INF_MOD		0xF1

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static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
{
	u8 scratch;
	int ret;

	ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
	if (ret)
		return ret;

	/*
	 * Turn PMOS on [bit 0], set over current detection to 2.4 V
	 * [bit 1:2] and enable over current debouncing [bit 6].
	 */
	if (on)
		scratch |= 0x47;
	else
		scratch &= ~0x47;

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	return pci_write_config_byte(chip->pdev, 0xAE, scratch);
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}

static int jmicron_probe(struct sdhci_pci_chip *chip)
{
	int ret;
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	u16 mmcdev = 0;
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	if (chip->pdev->revision == 0) {
		chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
			  SDHCI_QUIRK_32BIT_DMA_SIZE |
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			  SDHCI_QUIRK_32BIT_ADMA_SIZE |
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			  SDHCI_QUIRK_RESET_AFTER_REQUEST |
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			  SDHCI_QUIRK_BROKEN_SMALL_PIO;
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	}

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	/*
	 * JMicron chips can have two interfaces to the same hardware
	 * in order to work around limitations in Microsoft's driver.
	 * We need to make sure we only bind to one of them.
	 *
	 * This code assumes two things:
	 *
	 * 1. The PCI code adds subfunctions in order.
	 *
	 * 2. The MMC interface has a lower subfunction number
	 *    than the SD interface.
	 */
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	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
		mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
	else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
		mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;

	if (mmcdev) {
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		struct pci_dev *sd_dev;

		sd_dev = NULL;
		while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
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						mmcdev, sd_dev)) != NULL) {
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			if ((PCI_SLOT(chip->pdev->devfn) ==
				PCI_SLOT(sd_dev->devfn)) &&
				(chip->pdev->bus == sd_dev->bus))
				break;
		}

		if (sd_dev) {
			pci_dev_put(sd_dev);
			dev_info(&chip->pdev->dev, "Refusing to bind to "
				"secondary interface.\n");
			return -ENODEV;
		}
	}

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	/*
	 * JMicron chips need a bit of a nudge to enable the power
	 * output pins.
	 */
	ret = jmicron_pmos(chip, 1);
	if (ret) {
		dev_err(&chip->pdev->dev, "Failure enabling card power\n");
		return ret;
	}

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	/* quirk for unsable RO-detection on JM388 chips */
	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
	    chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
		chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;

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	return 0;
}

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static void jmicron_enable_mmc(struct sdhci_host *host, int on)
{
	u8 scratch;

	scratch = readb(host->ioaddr + 0xC0);

	if (on)
		scratch |= 0x01;
	else
		scratch &= ~0x01;

	writeb(scratch, host->ioaddr + 0xC0);
}

static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
{
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	if (slot->chip->pdev->revision == 0) {
		u16 version;

		version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
		version = (version & SDHCI_VENDOR_VER_MASK) >>
			SDHCI_VENDOR_VER_SHIFT;

		/*
		 * Older versions of the chip have lots of nasty glitches
		 * in the ADMA engine. It's best just to avoid it
		 * completely.
		 */
		if (version < 0xAC)
			slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
	}

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	/* JM388 MMC doesn't support 1.8V while SD supports it */
	if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
		slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
			MMC_VDD_29_30 | MMC_VDD_30_31 |
			MMC_VDD_165_195; /* allow 1.8V */
		slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
			MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
	}

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	/*
	 * The secondary interface requires a bit set to get the
	 * interrupts.
	 */
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	if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
	    slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
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		jmicron_enable_mmc(slot->host, 1);

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	slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;

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	return 0;
}

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Pierre Ossman 已提交
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static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
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{
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Pierre Ossman 已提交
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	if (dead)
		return;

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	if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
	    slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
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		jmicron_enable_mmc(slot->host, 0);
}

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static int jmicron_suspend(struct sdhci_pci_chip *chip)
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{
	int i;

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	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
	    chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
588
		for (i = 0; i < chip->num_slots; i++)
589 590 591 592 593 594
			jmicron_enable_mmc(chip->slots[i]->host, 0);
	}

	return 0;
}

595 596
static int jmicron_resume(struct sdhci_pci_chip *chip)
{
597 598
	int ret, i;

599 600
	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
	    chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
601
		for (i = 0; i < chip->num_slots; i++)
602 603
			jmicron_enable_mmc(chip->slots[i]->host, 1);
	}
604 605 606 607 608 609 610 611 612 613

	ret = jmicron_pmos(chip, 1);
	if (ret) {
		dev_err(&chip->pdev->dev, "Failure enabling card power\n");
		return ret;
	}

	return 0;
}

614
static const struct sdhci_pci_fixes sdhci_o2 = {
615 616
	.probe = sdhci_pci_o2_probe,
	.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
617
	.quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD,
618 619
	.probe_slot = sdhci_pci_o2_probe_slot,
	.resume = sdhci_pci_o2_resume,
620 621
};

622
static const struct sdhci_pci_fixes sdhci_jmicron = {
623 624
	.probe		= jmicron_probe,

625 626 627 628
	.probe_slot	= jmicron_probe_slot,
	.remove_slot	= jmicron_remove_slot,

	.suspend	= jmicron_suspend,
629
	.resume		= jmicron_resume,
630 631
};

632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698
/* SysKonnect CardBus2SDIO extra registers */
#define SYSKT_CTRL		0x200
#define SYSKT_RDFIFO_STAT	0x204
#define SYSKT_WRFIFO_STAT	0x208
#define SYSKT_POWER_DATA	0x20c
#define   SYSKT_POWER_330	0xef
#define   SYSKT_POWER_300	0xf8
#define   SYSKT_POWER_184	0xcc
#define SYSKT_POWER_CMD		0x20d
#define   SYSKT_POWER_START	(1 << 7)
#define SYSKT_POWER_STATUS	0x20e
#define   SYSKT_POWER_STATUS_OK	(1 << 0)
#define SYSKT_BOARD_REV		0x210
#define SYSKT_CHIP_REV		0x211
#define SYSKT_CONF_DATA		0x212
#define   SYSKT_CONF_DATA_1V8	(1 << 2)
#define   SYSKT_CONF_DATA_2V5	(1 << 1)
#define   SYSKT_CONF_DATA_3V3	(1 << 0)

static int syskt_probe(struct sdhci_pci_chip *chip)
{
	if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
		chip->pdev->class &= ~0x0000FF;
		chip->pdev->class |= PCI_SDHCI_IFDMA;
	}
	return 0;
}

static int syskt_probe_slot(struct sdhci_pci_slot *slot)
{
	int tm, ps;

	u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
	u8  chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
	dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
					 "board rev %d.%d, chip rev %d.%d\n",
					 board_rev >> 4, board_rev & 0xf,
					 chip_rev >> 4,  chip_rev & 0xf);
	if (chip_rev >= 0x20)
		slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;

	writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
	writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
	udelay(50);
	tm = 10;  /* Wait max 1 ms */
	do {
		ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
		if (ps & SYSKT_POWER_STATUS_OK)
			break;
		udelay(100);
	} while (--tm);
	if (!tm) {
		dev_err(&slot->chip->pdev->dev,
			"power regulator never stabilized");
		writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
		return -ENODEV;
	}

	return 0;
}

static const struct sdhci_pci_fixes sdhci_syskt = {
	.quirks		= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
	.probe		= syskt_probe,
	.probe_slot	= syskt_probe_slot,
};

699 700 701 702 703 704 705 706 707 708 709 710
static int via_probe(struct sdhci_pci_chip *chip)
{
	if (chip->pdev->revision == 0x10)
		chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;

	return 0;
}

static const struct sdhci_pci_fixes sdhci_via = {
	.probe		= via_probe,
};

711 712 713 714 715 716 717 718
static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
{
	slot->host->mmc->caps2 |= MMC_CAP2_HS200;
	return 0;
}

static const struct sdhci_pci_fixes sdhci_rtsx = {
	.quirks2	= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
719
			SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
720 721 722 723
			SDHCI_QUIRK2_BROKEN_DDR50,
	.probe_slot	= rtsx_probe_slot,
};

724 725 726 727 728 729 730 731
/*AMD chipset generation*/
enum amd_chipset_gen {
	AMD_CHIPSET_BEFORE_ML,
	AMD_CHIPSET_CZ,
	AMD_CHIPSET_NL,
	AMD_CHIPSET_UNKNOWN,
};

732 733 734
static int amd_probe(struct sdhci_pci_chip *chip)
{
	struct pci_dev	*smbus_dev;
735
	enum amd_chipset_gen gen;
736 737 738

	smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
			PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
739 740 741 742 743 744 745 746 747 748 749 750 751 752
	if (smbus_dev) {
		gen = AMD_CHIPSET_BEFORE_ML;
	} else {
		smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
				PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
		if (smbus_dev) {
			if (smbus_dev->revision < 0x51)
				gen = AMD_CHIPSET_CZ;
			else
				gen = AMD_CHIPSET_NL;
		} else {
			gen = AMD_CHIPSET_UNKNOWN;
		}
	}
753

754
	if ((gen == AMD_CHIPSET_BEFORE_ML) || (gen == AMD_CHIPSET_CZ)) {
755
		chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
756 757
		chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
	}
758 759 760 761 762 763 764 765

	return 0;
}

static const struct sdhci_pci_fixes sdhci_amd = {
	.probe		= amd_probe,
};

766
static const struct pci_device_id pci_ids[] = {
767 768 769
	{
		.vendor		= PCI_VENDOR_ID_RICOH,
		.device		= PCI_DEVICE_ID_RICOH_R5C822,
770
		.subvendor	= PCI_ANY_ID,
771
		.subdevice	= PCI_ANY_ID,
772
		.driver_data	= (kernel_ulong_t)&sdhci_ricoh,
773 774
	},

775 776 777 778 779 780 781 782
	{
		.vendor         = PCI_VENDOR_ID_RICOH,
		.device         = 0x843,
		.subvendor      = PCI_ANY_ID,
		.subdevice      = PCI_ANY_ID,
		.driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
	},

783 784 785 786 787 788 789 790
	{
		.vendor         = PCI_VENDOR_ID_RICOH,
		.device         = 0xe822,
		.subvendor      = PCI_ANY_ID,
		.subdevice      = PCI_ANY_ID,
		.driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
	},

791 792 793 794 795 796 797 798
	{
		.vendor         = PCI_VENDOR_ID_RICOH,
		.device         = 0xe823,
		.subvendor      = PCI_ANY_ID,
		.subdevice      = PCI_ANY_ID,
		.driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
	},

799 800 801 802 803
	{
		.vendor		= PCI_VENDOR_ID_ENE,
		.device		= PCI_DEVICE_ID_ENE_CB712_SD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
804
		.driver_data	= (kernel_ulong_t)&sdhci_ene_712,
805 806 807 808 809 810 811
	},

	{
		.vendor		= PCI_VENDOR_ID_ENE,
		.device		= PCI_DEVICE_ID_ENE_CB712_SD_2,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
812
		.driver_data	= (kernel_ulong_t)&sdhci_ene_712,
813 814 815 816 817 818 819
	},

	{
		.vendor		= PCI_VENDOR_ID_ENE,
		.device		= PCI_DEVICE_ID_ENE_CB714_SD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
820
		.driver_data	= (kernel_ulong_t)&sdhci_ene_714,
821 822 823 824 825 826 827
	},

	{
		.vendor		= PCI_VENDOR_ID_ENE,
		.device		= PCI_DEVICE_ID_ENE_CB714_SD_2,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
828
		.driver_data	= (kernel_ulong_t)&sdhci_ene_714,
829 830 831 832
	},

	{
		.vendor         = PCI_VENDOR_ID_MARVELL,
833
		.device         = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
834 835
		.subvendor      = PCI_ANY_ID,
		.subdevice      = PCI_ANY_ID,
836
		.driver_data    = (kernel_ulong_t)&sdhci_cafe,
837 838 839 840 841 842 843
	},

	{
		.vendor		= PCI_VENDOR_ID_JMICRON,
		.device		= PCI_DEVICE_ID_JMICRON_JMB38X_SD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
844
		.driver_data	= (kernel_ulong_t)&sdhci_jmicron,
845 846
	},

847 848 849 850 851 852
	{
		.vendor		= PCI_VENDOR_ID_JMICRON,
		.device		= PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_jmicron,
853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868
	},

	{
		.vendor		= PCI_VENDOR_ID_JMICRON,
		.device		= PCI_DEVICE_ID_JMICRON_JMB388_SD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_jmicron,
	},

	{
		.vendor		= PCI_VENDOR_ID_JMICRON,
		.device		= PCI_DEVICE_ID_JMICRON_JMB388_ESD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_jmicron,
869 870
	},

871 872 873 874 875 876 877 878
	{
		.vendor		= PCI_VENDOR_ID_SYSKONNECT,
		.device		= 0x8000,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_syskt,
	},

879 880 881 882 883 884
	{
		.vendor		= PCI_VENDOR_ID_VIA,
		.device		= 0x95d0,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_via,
885 886 887 888 889 890 891 892
	},

	{
		.vendor		= PCI_VENDOR_ID_REALTEK,
		.device		= 0x5250,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_rtsx,
893 894
	},

895 896 897 898 899 900 901 902
	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_QRK_SD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_qrk,
	},

903 904
	{
		.vendor		= PCI_VENDOR_ID_INTEL,
905 906 907 908 909 910 911 912 913 914 915
		.device		= PCI_DEVICE_ID_INTEL_MRST_SD0,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mrst_hc0,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_MRST_SD1,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
916 917 918 919 920 921 922 923 924
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_MRST_SD2,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
925 926 927 928
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
929 930 931 932 933 934 935 936 937 938 939
		.device		= PCI_DEVICE_ID_INTEL_MFD_SD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_sd,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_MFD_SDIO1,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
940
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_sdio,
941 942 943 944 945 946 947
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_MFD_SDIO2,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
948
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_sdio,
949 950 951 952 953 954 955
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_MFD_EMMC0,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
956
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_emmc,
957 958 959 960 961 962 963
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_MFD_EMMC1,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
964
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_emmc,
965 966
	},

967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982
	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_PCH_SDIO0,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_pch_sdio,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_PCH_SDIO1,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_pch_sdio,
	},

983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006
	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_BYT_EMMC,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_emmc,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_BYT_SDIO,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_sdio,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_BYT_SD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_sd,
	},

1007 1008 1009 1010 1011 1012 1013 1014
	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_BYT_EMMC2,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_emmc,
	},

1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037
	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_BSW_EMMC,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_emmc,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_BSW_SDIO,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_sdio,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_BSW_SD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_sd,
	},
1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_CLV_SDIO0,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_sd,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_CLV_SDIO1,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_sdio,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_CLV_SDIO2,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_sdio,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_CLV_EMMC0,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_emmc,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_CLV_EMMC1,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mfd_emmc,
	},

1079 1080 1081 1082 1083 1084 1085
	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_MRFL_MMC,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_mrfl_mmc,
	},
1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_SPT_EMMC,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_emmc,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_SPT_SDIO,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_sdio,
	},

	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_SPT_SD,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_sd,
	},

1111 1112 1113 1114 1115 1116 1117 1118
	{
		.vendor		= PCI_VENDOR_ID_INTEL,
		.device		= PCI_DEVICE_ID_INTEL_DNV_EMMC,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_emmc,
	},

1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158
	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_8120,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},

	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_8220,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},

	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_8221,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},

	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_8320,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},

	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_8321,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},

1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197
	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_FUJIN2,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},

	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_SDS0,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},

	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_SDS1,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},

	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_SEABIRD0,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},

	{
		.vendor		= PCI_VENDOR_ID_O2,
		.device		= PCI_DEVICE_ID_O2_SEABIRD1,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_o2,
	},
1198 1199 1200 1201 1202 1203 1204 1205 1206
	{
		.vendor		= PCI_VENDOR_ID_AMD,
		.device		= PCI_ANY_ID,
		.class		= PCI_CLASS_SYSTEM_SDHCI << 8,
		.class_mask	= 0xFFFF00,
		.subvendor	= PCI_ANY_ID,
		.subdevice	= PCI_ANY_ID,
		.driver_data	= (kernel_ulong_t)&sdhci_amd,
	},
1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225
	{	/* Generic SD host controller */
		PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
	},

	{ /* end: all zeroes */ },
};

MODULE_DEVICE_TABLE(pci, pci_ids);

/*****************************************************************************\
 *                                                                           *
 * SDHCI core callbacks                                                      *
 *                                                                           *
\*****************************************************************************/

static int sdhci_pci_enable_dma(struct sdhci_host *host)
{
	struct sdhci_pci_slot *slot;
	struct pci_dev *pdev;
1226
	int ret = -1;
1227 1228 1229 1230 1231 1232

	slot = sdhci_priv(host);
	pdev = slot->chip->pdev;

	if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
		((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1233
		(host->flags & SDHCI_USE_SDMA)) {
1234 1235 1236 1237
		dev_warn(&pdev->dev, "Will use DMA mode even though HW "
			"doesn't fully claim to support it.\n");
	}

1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248
	if (host->flags & SDHCI_USE_64_BIT_DMA) {
		if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) {
			host->flags &= ~SDHCI_USE_64_BIT_DMA;
		} else {
			ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
			if (ret)
				dev_warn(&pdev->dev, "Failed to set 64-bit DMA mask\n");
		}
	}
	if (ret)
		ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1249 1250 1251 1252 1253 1254 1255 1256
	if (ret)
		return ret;

	pci_set_master(pdev);

	return 0;
}

1257
static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279
{
	u8 ctrl;

	ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);

	switch (width) {
	case MMC_BUS_WIDTH_8:
		ctrl |= SDHCI_CTRL_8BITBUS;
		ctrl &= ~SDHCI_CTRL_4BITBUS;
		break;
	case MMC_BUS_WIDTH_4:
		ctrl |= SDHCI_CTRL_4BITBUS;
		ctrl &= ~SDHCI_CTRL_8BITBUS;
		break;
	default:
		ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
		break;
	}

	sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
}

1280
static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294
{
	struct sdhci_pci_slot *slot = sdhci_priv(host);
	int rst_n_gpio = slot->rst_n_gpio;

	if (!gpio_is_valid(rst_n_gpio))
		return;
	gpio_set_value_cansleep(rst_n_gpio, 0);
	/* For eMMC, minimum is 1us but give it 10us for good measure */
	udelay(10);
	gpio_set_value_cansleep(rst_n_gpio, 1);
	/* For eMMC, minimum is 200us but give it 300us for good measure */
	usleep_range(300, 1000);
}

1295 1296 1297 1298 1299 1300 1301 1302
static void sdhci_pci_hw_reset(struct sdhci_host *host)
{
	struct sdhci_pci_slot *slot = sdhci_priv(host);

	if (slot->hw_reset)
		slot->hw_reset(host);
}

1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316
static int sdhci_pci_select_drive_strength(struct sdhci_host *host,
					   struct mmc_card *card,
					   unsigned int max_dtr, int host_drv,
					   int card_drv, int *drv_type)
{
	struct sdhci_pci_slot *slot = sdhci_priv(host);

	if (!slot->select_drive_strength)
		return 0;

	return slot->select_drive_strength(host, card, max_dtr, host_drv,
					   card_drv, drv_type);
}

1317
static const struct sdhci_ops sdhci_pci_ops = {
1318
	.set_clock	= sdhci_set_clock,
1319
	.enable_dma	= sdhci_pci_enable_dma,
1320
	.set_bus_width	= sdhci_pci_set_bus_width,
1321
	.reset		= sdhci_reset,
1322
	.set_uhs_signaling = sdhci_set_uhs_signaling,
1323
	.hw_reset		= sdhci_pci_hw_reset,
1324
	.select_drive_strength	= sdhci_pci_select_drive_strength,
1325 1326 1327 1328 1329 1330 1331 1332 1333 1334
};

/*****************************************************************************\
 *                                                                           *
 * Suspend/resume                                                            *
 *                                                                           *
\*****************************************************************************/

#ifdef CONFIG_PM

1335
static int sdhci_pci_suspend(struct device *dev)
1336
{
1337
	struct pci_dev *pdev = to_pci_dev(dev);
1338 1339
	struct sdhci_pci_chip *chip;
	struct sdhci_pci_slot *slot;
1340
	mmc_pm_flag_t slot_pm_flags;
1341
	mmc_pm_flag_t pm_flags = 0;
1342 1343 1344 1345 1346 1347
	int i, ret;

	chip = pci_get_drvdata(pdev);
	if (!chip)
		return 0;

1348
	for (i = 0; i < chip->num_slots; i++) {
1349 1350 1351 1352
		slot = chip->slots[i];
		if (!slot)
			continue;

1353
		ret = sdhci_suspend_host(slot->host);
1354

1355 1356
		if (ret)
			goto err_pci_suspend;
1357

1358 1359 1360 1361 1362
		slot_pm_flags = slot->host->mmc->pm_flags;
		if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
			sdhci_enable_irq_wakeups(slot->host);

		pm_flags |= slot_pm_flags;
1363 1364
	}

1365
	if (chip->fixes && chip->fixes->suspend) {
1366
		ret = chip->fixes->suspend(chip);
1367 1368
		if (ret)
			goto err_pci_suspend;
1369 1370
	}

1371
	if (pm_flags & MMC_PM_KEEP_POWER) {
1372 1373 1374 1375 1376 1377
		if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
			device_init_wakeup(dev, true);
		else
			device_init_wakeup(dev, false);
	} else
		device_init_wakeup(dev, false);
1378 1379

	return 0;
1380 1381 1382 1383 1384

err_pci_suspend:
	while (--i >= 0)
		sdhci_resume_host(chip->slots[i]->host);
	return ret;
1385 1386
}

1387
static int sdhci_pci_resume(struct device *dev)
1388
{
1389
	struct pci_dev *pdev = to_pci_dev(dev);
1390 1391 1392 1393 1394 1395 1396 1397
	struct sdhci_pci_chip *chip;
	struct sdhci_pci_slot *slot;
	int i, ret;

	chip = pci_get_drvdata(pdev);
	if (!chip)
		return 0;

1398 1399 1400 1401 1402 1403
	if (chip->fixes && chip->fixes->resume) {
		ret = chip->fixes->resume(chip);
		if (ret)
			return ret;
	}

1404
	for (i = 0; i < chip->num_slots; i++) {
1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416
		slot = chip->slots[i];
		if (!slot)
			continue;

		ret = sdhci_resume_host(slot->host);
		if (ret)
			return ret;
	}

	return 0;
}

1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434
static int sdhci_pci_runtime_suspend(struct device *dev)
{
	struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
	struct sdhci_pci_chip *chip;
	struct sdhci_pci_slot *slot;
	int i, ret;

	chip = pci_get_drvdata(pdev);
	if (!chip)
		return 0;

	for (i = 0; i < chip->num_slots; i++) {
		slot = chip->slots[i];
		if (!slot)
			continue;

		ret = sdhci_runtime_suspend_host(slot->host);

1435 1436
		if (ret)
			goto err_pci_runtime_suspend;
1437 1438 1439
	}

	if (chip->fixes && chip->fixes->suspend) {
1440
		ret = chip->fixes->suspend(chip);
1441 1442
		if (ret)
			goto err_pci_runtime_suspend;
1443 1444 1445
	}

	return 0;
1446 1447 1448 1449 1450

err_pci_runtime_suspend:
	while (--i >= 0)
		sdhci_runtime_resume_host(chip->slots[i]->host);
	return ret;
1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482
}

static int sdhci_pci_runtime_resume(struct device *dev)
{
	struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
	struct sdhci_pci_chip *chip;
	struct sdhci_pci_slot *slot;
	int i, ret;

	chip = pci_get_drvdata(pdev);
	if (!chip)
		return 0;

	if (chip->fixes && chip->fixes->resume) {
		ret = chip->fixes->resume(chip);
		if (ret)
			return ret;
	}

	for (i = 0; i < chip->num_slots; i++) {
		slot = chip->slots[i];
		if (!slot)
			continue;

		ret = sdhci_runtime_resume_host(slot->host);
		if (ret)
			return ret;
	}

	return 0;
}

1483 1484 1485 1486 1487 1488
#else /* CONFIG_PM */

#define sdhci_pci_suspend NULL
#define sdhci_pci_resume NULL

#endif /* CONFIG_PM */
1489 1490

static const struct dev_pm_ops sdhci_pci_pm_ops = {
1491 1492
	.suspend = sdhci_pci_suspend,
	.resume = sdhci_pci_resume,
1493
	SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend,
1494
			sdhci_pci_runtime_resume, NULL)
1495 1496
};

1497 1498 1499 1500 1501 1502
/*****************************************************************************\
 *                                                                           *
 * Device probing/removal                                                    *
 *                                                                           *
\*****************************************************************************/

1503
static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1504 1505
	struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
	int slotno)
1506 1507 1508
{
	struct sdhci_pci_slot *slot;
	struct sdhci_host *host;
1509
	int ret, bar = first_bar + slotno;
1510 1511 1512 1513 1514 1515

	if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
		dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
		return ERR_PTR(-ENODEV);
	}

1516
	if (pci_resource_len(pdev, bar) < 0x100) {
1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532
		dev_err(&pdev->dev, "Invalid iomem size. You may "
			"experience problems.\n");
	}

	if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
		dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
		return ERR_PTR(-ENODEV);
	}

	if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
		dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
		return ERR_PTR(-ENODEV);
	}

	host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
	if (IS_ERR(host)) {
1533
		dev_err(&pdev->dev, "cannot allocate host\n");
1534
		return ERR_CAST(host);
1535 1536 1537 1538 1539 1540 1541
	}

	slot = sdhci_priv(host);

	slot->chip = chip;
	slot->host = host;
	slot->pci_bar = bar;
1542
	slot->rst_n_gpio = -EINVAL;
1543
	slot->cd_gpio = -EINVAL;
1544
	slot->cd_idx = -1;
1545

1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557
	/* Retrieve platform data if there is any */
	if (*sdhci_pci_get_data)
		slot->data = sdhci_pci_get_data(pdev, slotno);

	if (slot->data) {
		if (slot->data->setup) {
			ret = slot->data->setup(slot->data);
			if (ret) {
				dev_err(&pdev->dev, "platform setup failed\n");
				goto free;
			}
		}
1558 1559
		slot->rst_n_gpio = slot->data->rst_n_gpio;
		slot->cd_gpio = slot->data->cd_gpio;
1560 1561
	}

1562 1563 1564
	host->hw_name = "PCI";
	host->ops = &sdhci_pci_ops;
	host->quirks = chip->quirks;
1565
	host->quirks2 = chip->quirks2;
1566 1567 1568 1569 1570 1571

	host->irq = pdev->irq;

	ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
	if (ret) {
		dev_err(&pdev->dev, "cannot request region\n");
1572
		goto cleanup;
1573 1574
	}

1575
	host->ioaddr = pci_ioremap_bar(pdev, bar);
1576 1577
	if (!host->ioaddr) {
		dev_err(&pdev->dev, "failed to remap registers\n");
1578
		ret = -ENOMEM;
1579 1580 1581
		goto release;
	}

1582 1583 1584 1585 1586 1587
	if (chip->fixes && chip->fixes->probe_slot) {
		ret = chip->fixes->probe_slot(slot);
		if (ret)
			goto unmap;
	}

1588 1589 1590 1591
	if (gpio_is_valid(slot->rst_n_gpio)) {
		if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
			gpio_direction_output(slot->rst_n_gpio, 1);
			slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1592
			slot->hw_reset = sdhci_pci_gpio_hw_reset;
1593 1594 1595 1596 1597 1598
		} else {
			dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
			slot->rst_n_gpio = -EINVAL;
		}
	}

1599
	host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1600
	host->mmc->slotno = slotno;
1601
	host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1602

1603 1604 1605 1606 1607 1608 1609
	if (slot->cd_idx >= 0 &&
	    mmc_gpiod_request_cd(host->mmc, slot->cd_con_id, slot->cd_idx,
				 slot->cd_override_level, 0, NULL)) {
		dev_warn(&pdev->dev, "failed to setup card detect gpio\n");
		slot->cd_idx = -1;
	}

1610 1611
	ret = sdhci_add_host(host);
	if (ret)
1612
		goto remove;
1613

1614 1615
	sdhci_pci_add_own_cd(slot);

1616 1617 1618 1619 1620
	/*
	 * Check if the chip needs a separate GPIO for card detect to wake up
	 * from runtime suspend.  If it is not there, don't allow runtime PM.
	 * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
	 */
1621
	if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1622
	    !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0)
1623 1624
		chip->allow_runtime_pm = false;

1625 1626
	return slot;

1627
remove:
1628 1629 1630
	if (gpio_is_valid(slot->rst_n_gpio))
		gpio_free(slot->rst_n_gpio);

1631
	if (chip->fixes && chip->fixes->remove_slot)
P
Pierre Ossman 已提交
1632
		chip->fixes->remove_slot(slot, 0);
1633

1634 1635 1636 1637 1638
unmap:
	iounmap(host->ioaddr);

release:
	pci_release_region(pdev, bar);
1639

1640 1641 1642 1643
cleanup:
	if (slot->data && slot->data->cleanup)
		slot->data->cleanup(slot->data);

1644
free:
1645 1646 1647 1648 1649 1650 1651
	sdhci_free_host(host);

	return ERR_PTR(ret);
}

static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
{
P
Pierre Ossman 已提交
1652 1653 1654
	int dead;
	u32 scratch;

1655 1656
	sdhci_pci_remove_own_cd(slot);

P
Pierre Ossman 已提交
1657 1658 1659 1660 1661 1662
	dead = 0;
	scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
	if (scratch == (u32)-1)
		dead = 1;

	sdhci_remove_host(slot->host, dead);
1663

1664 1665 1666
	if (gpio_is_valid(slot->rst_n_gpio))
		gpio_free(slot->rst_n_gpio);

1667
	if (slot->chip->fixes && slot->chip->fixes->remove_slot)
P
Pierre Ossman 已提交
1668
		slot->chip->fixes->remove_slot(slot, dead);
1669

1670 1671 1672
	if (slot->data && slot->data->cleanup)
		slot->data->cleanup(slot->data);

1673
	pci_release_region(slot->chip->pdev, slot->pci_bar);
1674

1675 1676 1677
	sdhci_free_host(slot->host);
}

1678
static void sdhci_pci_runtime_pm_allow(struct device *dev)
1679 1680 1681 1682 1683 1684 1685 1686
{
	pm_runtime_put_noidle(dev);
	pm_runtime_allow(dev);
	pm_runtime_set_autosuspend_delay(dev, 50);
	pm_runtime_use_autosuspend(dev);
	pm_suspend_ignore_children(dev, 1);
}

1687
static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1688 1689 1690 1691 1692
{
	pm_runtime_forbid(dev);
	pm_runtime_get_noresume(dev);
}

1693
static int sdhci_pci_probe(struct pci_dev *pdev,
1694 1695 1696 1697 1698
				     const struct pci_device_id *ent)
{
	struct sdhci_pci_chip *chip;
	struct sdhci_pci_slot *slot;

1699
	u8 slots, first_bar;
1700 1701 1702 1703 1704 1705
	int ret, i;

	BUG_ON(pdev == NULL);
	BUG_ON(ent == NULL);

	dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1706
		 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740

	ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
	if (ret)
		return ret;

	slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
	dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
	if (slots == 0)
		return -ENODEV;

	BUG_ON(slots > MAX_SLOTS);

	ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
	if (ret)
		return ret;

	first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;

	if (first_bar > 5) {
		dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
		return -ENODEV;
	}

	ret = pci_enable_device(pdev);
	if (ret)
		return ret;

	chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
	if (!chip) {
		ret = -ENOMEM;
		goto err;
	}

	chip->pdev = pdev;
1741
	chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1742
	if (chip->fixes) {
1743
		chip->quirks = chip->fixes->quirks;
1744
		chip->quirks2 = chip->fixes->quirks2;
1745 1746
		chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
	}
1747 1748 1749 1750
	chip->num_slots = slots;

	pci_set_drvdata(pdev, chip);

1751 1752 1753 1754 1755 1756
	if (chip->fixes && chip->fixes->probe) {
		ret = chip->fixes->probe(chip);
		if (ret)
			goto free;
	}

1757 1758
	slots = chip->num_slots;	/* Quirk may have changed this */

1759
	for (i = 0; i < slots; i++) {
1760
		slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1761
		if (IS_ERR(slot)) {
1762
			for (i--; i >= 0; i--)
1763 1764 1765 1766 1767 1768 1769 1770
				sdhci_pci_remove_slot(chip->slots[i]);
			ret = PTR_ERR(slot);
			goto free;
		}

		chip->slots[i] = slot;
	}

1771 1772
	if (chip->allow_runtime_pm)
		sdhci_pci_runtime_pm_allow(&pdev->dev);
1773

1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784
	return 0;

free:
	pci_set_drvdata(pdev, NULL);
	kfree(chip);

err:
	pci_disable_device(pdev);
	return ret;
}

1785
static void sdhci_pci_remove(struct pci_dev *pdev)
1786 1787 1788 1789 1790 1791 1792
{
	int i;
	struct sdhci_pci_chip *chip;

	chip = pci_get_drvdata(pdev);

	if (chip) {
1793 1794 1795
		if (chip->allow_runtime_pm)
			sdhci_pci_runtime_pm_forbid(&pdev->dev);

1796
		for (i = 0; i < chip->num_slots; i++)
1797 1798 1799 1800 1801 1802 1803 1804 1805 1806
			sdhci_pci_remove_slot(chip->slots[i]);

		pci_set_drvdata(pdev, NULL);
		kfree(chip);
	}

	pci_disable_device(pdev);
}

static struct pci_driver sdhci_driver = {
1807
	.name =		"sdhci-pci",
1808
	.id_table =	pci_ids,
1809
	.probe =	sdhci_pci_probe,
1810
	.remove =	sdhci_pci_remove,
1811 1812 1813
	.driver =	{
		.pm =   &sdhci_pci_pm_ops
	},
1814 1815
};

1816
module_pci_driver(sdhci_driver);
1817

1818
MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1819 1820
MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
MODULE_LICENSE("GPL");
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