未验证 提交 cd8a9b67 编写于 作者: B Bernard Xiong 提交者: GitHub

Merge pull request #2410 from misonyo/change

[bsp/lpc408x]更新旧启动机制
......@@ -7,20 +7,31 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
CONFIG_RT_TICK_PER_SECOND=1000
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_DEBUG_INIT=0
CONFIG_RT_DEBUG_THREAD=0
CONFIG_RT_USING_HOOK=y
CONFIG_IDLE_THREAD_STACK_SIZE=512
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_USING_TIMER_SOFT is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
......@@ -38,29 +49,33 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
CONFIG_RT_USING_MEMPOOL=y
CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SMALL_MEM is not set
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_VER_NUM=0x40001
CONFIG_ARCH_ARM=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M4=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
# CONFIG_RT_USING_COMPONENTS_INIT is not set
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
......@@ -76,13 +91,15 @@ CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
# CONFIG_FINSH_USING_MSH_ONLY is not set
CONFIG_FINSH_USING_MSH_ONLY=y
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
......@@ -92,6 +109,7 @@ CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=2
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
CONFIG_DFS_FD_MAX=16
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_RT_USING_DFS_ELMFAT=y
#
......@@ -110,30 +128,40 @@ CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_NET is not set
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
# CONFIG_RT_USING_DFS_NFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_USING_CAN=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
#
# Using WiFi
#
# CONFIG_RT_USING_WIFI is not set
#
......@@ -145,28 +173,36 @@ CONFIG_RT_USING_PIN=y
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
CONFIG_RT_USING_PTHREADS=y
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_HAVE_SYS_SIGNALS is not set
# CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_USING_PTHREADS is not set
#
# Network stack
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
# CONFIG_RT_USING_LWIP141 is not set
# CONFIG_RT_USING_LWIP202 is not set
# CONFIG_RT_USING_LWIP210 is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
......@@ -177,43 +213,33 @@ CONFIG_RT_USING_POSIX=y
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
#
# ARM CMSIS
#
# CONFIG_RT_USING_CMSIS_OS is not set
# CONFIG_RT_USING_RTT_CMSIS is not set
# CONFIG_RT_USING_LWP is not set
#
# RT-Thread online packages
#
#
# system packages
#
#
# RT-Thread GUI Engine
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
#
# Wi-Fi
......@@ -231,6 +257,17 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
#
# security packages
......@@ -242,6 +279,7 @@ CONFIG_RT_USING_POSIX=y
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
......@@ -249,27 +287,99 @@ CONFIG_RT_USING_POSIX=y
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_IPERF is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_MPU6XXX is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
#
# example package: hello
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_VI is not set
CONFIG_SOC_LPC4088=y
# CONFIG_RT_USING_UART0 is not set
CONFIG_RT_USING_UART1=y
#
# Hardware Drivers Config
#
#
# On-chip Peripheral Drivers
#
# CONFIG_BSP_USING_EMAC is not set
# CONFIG_BSP_USING_HWTIMER0 is not set
#
# UART Drivers
#
CONFIG_BSP_USING_UART0=y
# CONFIG_BSP_USING_UART2 is not set
#
# Onboard Peripheral Drivers
#
# CONFIG_BSP_USING_SDRAM is not set
# CONFIG_BSP_USING_LED is not set
#
# Offboard Peripheral Drivers
#
# LPC408x
# LPC408x BSP 使用说明
## 简介
LPC408x是RT-Thread推出的一款基于LPC408x系列的评估板,板载资源主要如下:
LPC408x 是 RT-Thread 推出的一款基于 LPC408x 系列的评估板,板载资源主要如下:
| 硬件 | 描述 |
| --------- | ------------- |
| 芯片型号 | LPC4088FET208 |
| CPU | ARM Cortex M4 |
| 主频 | 120M |
| 片内SRAM | 64K |
| 片外SDRAM | 32M |
| 片内FLASH | 512K |
| 片内 SRAM | 64K |
| 片外 SDRAM | 32M |
| 片内 FLASH | 512K |
## 编译说明
LPC408x板级包支持MDK4﹑MDK5开发环境和GCC编译器,以下是具体版本信息:
LPC408x 板级包支持 MDK4﹑MDK5 开发环境和 GCC 编译器,以下是具体版本信息:
| IDE/编译器 | 已测试版本 |
| IDE / 编译器 | 已测试版本 |
| ---------- | ---------------------------- |
| MDK4 | MDK4.74 |
| MDK5 | MDK524a |
......@@ -25,15 +25,15 @@ LPC408x板级包支持MDK4﹑MDK5开发环境和GCC编译器,以下是具体
## 烧写及执行
供电方式:使用方口USB 连接电脑和开发板。
供电方式:使用方口 USB 连接电脑和开发板。
下载程序:使用JLink/ULink等等仿真器连接到板子上的20Pin仿真口。
下载程序:使用 JLink/ULink 等等仿真器连接到板子上的 20Pin 仿真口。
串口连接:板载CP2102,连接了USB后打开相应的串口即可。
串口连接:板载 CP2102,连接了 USB 后打开相应的串口即可。
### 运行结果
如果编译 & 烧写无误,当复位设备后,会在串口上看到RT-Thread的启动logo信息:
如果编译 & 烧写无误,当复位设备后,会在串口上看到 RT-Thread 的启动 logo 信息:
```bash
\ | /
......@@ -47,14 +47,14 @@ finsh />
| 驱动 | 支持情况 | 备注 |
| ----- | -------- | :------------: |
| UART | 支持 | UART0~4 |
| UART | 支持 | UART0/2 |
| ETH | 支持 | |
| LCD | 支持 | |
| SDRAM | 支持 | |
### IO在板级支持包中的映射情况
### IO 在板级支持包中的映射情况
| IO号 | 板级包中的定义 |
| IO 号 | 板级包中的定义 |
| ----- | -------------- |
| P3_14 | LED1 |
| P3_3 | LED2 |
......
from building import *
cwd = str(Dir('#'))
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
......
......@@ -10,7 +10,7 @@ else:
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread-%s.%s' % (rtconfig.BOARD_NAME, rtconfig.TARGET_EXT)
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
......@@ -20,11 +20,16 @@ env = Environment(tools = ['mingw'],
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT)
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# make a building
DoBuilding(TARGET, objs)
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
cwd = GetCurrentDir()
CPPPATH = [cwd, str(Dir('#'))]
src = Glob('*.c')
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2014-01-02 xiaonong the first version for lpc408x
*/
#include <rtthread.h>
#ifdef RT_USING_FINSH
#include <shell.h>
#include <finsh.h>
#endif
/* thread phase init */
void rt_init_thread_entry(void *parameter)
{
/* Initialization RT-Thread Components */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_init();
#elif defined(RT_USING_FINSH)
finsh_system_init();
#endif
}
int rt_application_init(void)
{
rt_thread_t tid;
tid = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX / 3, 20);
if (tid != RT_NULL) rt_thread_startup(tid);
return 0;
}
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-05-14 aubrcool@qq.com first version
*/
#include <board.h>
#include <rtthread.h>
#include <rtdevice.h>
#ifdef RT_USING_CAN
#include "drv_lpccan.h"
struct can_app_struct
{
const char* name;
struct rt_can_filter_config * filter;
rt_uint8_t eventopt;
struct rt_semaphore sem;
};
static struct can_app_struct can_data[1];
struct rt_can_filter_item filter1item[4] =
{
LPC_CAN_AF_STD_INIT(1),
LPC_CAN_AF_STD_GRP_INIT(3,5),
LPC_CAN_AF_EXT_INIT(2),
LPC_CAN_AF_EXT_GRP_INIT(4,6),
};
struct rt_can_filter_config filter1 =
{
4,
1,
filter1item,
};
static struct can_app_struct can_data[1] = {
{
"lpccan1",
&filter1,
RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
},
};
static rt_err_t lpccanind(rt_device_t dev, rt_size_t size)
{
rt_sem_release(&can_data[0].sem);
}
void rt_can_thread_entry(void* parameter)
{
struct rt_can_msg msg;
struct can_app_struct* canpara = (struct can_app_struct*) parameter;
rt_device_t candev;
candev = rt_device_find(canpara->name);
RT_ASSERT(candev);
rt_sem_init(&canpara->sem, canpara->name, 0, RT_IPC_FLAG_FIFO);
rt_device_open(candev, (RT_DEVICE_OFLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX));
rt_device_control(candev,RT_CAN_CMD_SET_FILTER,canpara->filter);
rt_device_set_rx_indicate(candev, lpccanind);
while(1) {
rt_sem_take(&canpara->sem, RT_WAITING_FOREVER);
while (rt_device_read(candev, 0, &msg, sizeof(msg)) == sizeof(msg)) {
rt_device_write(candev, 0, &msg, sizeof(msg));
}
}
}
int rt_can_app_init(void)
{
rt_thread_t tid;
tid = rt_thread_create("canapp1",
rt_can_thread_entry, &can_data[0],
512, RT_THREAD_PRIORITY_MAX /3 - 1, 20);
if (tid != RT_NULL) rt_thread_startup(tid);
return 0;
}
INIT_APP_EXPORT(rt_can_app_init);
#endif /*RT_USING_CAN*/
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 armink first version
*/
#include <rtthread.h>
#include <rtdevice.h>
int main(void)
{
rt_kprintf("Hello RT-Thread!\n");
return RT_EOK;
}
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-05-19 Bernard The first version for LPC40xx
*/
#include "sram.h"
#include "board.h"
#include <rtthread.h>
#ifdef LPC_EXT_SDRAM
struct rt_memheap system_heap;
void sram_init(void)
{
/* initialize the built-in SRAM as a memory heap */
rt_memheap_init(&system_heap,
"system",
(void *)HEAP_BEGIN,
(rt_uint32_t)HEAP_END - (rt_uint32_t)HEAP_BEGIN);
}
void *sram_malloc(unsigned long size)
{
return rt_memheap_alloc(&system_heap, size);
}
void sram_free(void *ptr)
{
rt_memheap_free(ptr);
}
void *sram_realloc(void *ptr, unsigned long size)
{
return rt_memheap_realloc(&system_heap, ptr, size);
}
#endif
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-05-19 Bernard The first version for LPC40xx
*/
#ifndef __SRAM_H__
#define __SRAM_H__
void *sram_malloc(unsigned long nbytes);
void sram_free(void *ptr);
void *sram_realloc(void *ptr, unsigned long nbytes);
#endif
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first implementation
* 2010-03-04 Magicoe for LPC17xx
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
extern int rt_application_init(void);
extern void sram_init(void);
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* initialize board */
rt_hw_board_init();
/* show version */
rt_show_version();
#ifdef RT_USING_HEAP
#if LPC_EXT_SDRAM
rt_system_heap_init((void *)LPC_EXT_SDRAM_BEGIN, (void *)LPC_EXT_SDRAM_END);
sram_init();
#else
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
#endif
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize system timer*/
rt_system_timer_init();
/* initialize application */
rt_application_init();
/* initialize timer thread */
rt_system_timer_thread_init();
/* initialize idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
config RT_USING_UART0
bool "Enable UART0"
default y
menu "Hardware Drivers Config"
config RT_USING_UART2
bool "Enable UART2"
default n
menu "On-chip Peripheral Drivers"
config RT_USING_UART4
bool "Enable UART4"
default n
config BSP_USING_EMAC
bool "EMAC driver"
select RT_USING_LWIP
default n
config BSP_DRV_CLCD
bool "CLCD driver"
depends on PKG_USING_GUIENGINE
default y
config BSP_USING_HWTIMER0
bool "Using timer0"
select RT_USING_HWTIMER
default n
config BSP_DRV_EMAC
bool "EMAC driver"
depends on RT_USING_LWIP
default y
menu "UART Drivers"
config BSP_USING_UART0
bool "Enable UART0 P0.2/P0.3(T/R)"
select RT_USING_SERIAL
default y
config BSP_USING_UART2
bool "Enable UART2 P2.8/P0.11(T/R)"
select RT_USING_SERIAL
default n
endmenu
endmenu
menu "Onboard Peripheral Drivers"
config BSP_USING_SDRAM
bool "Enable sdram"
default n
config BSP_USING_LED
bool "Enable LED"
default n
endmenu
menu "Offboard Peripheral Drivers"
endmenu
endmenu
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
# remove no need file.
if GetDepend('RT_USING_LWIP') == False:
SrcRemove(src, 'drv_emac.c')
# add the general drivers.
src = Split("""
board.c
""")
CPPPATH = [cwd]
if GetDepend(['BSP_USING_EMAC']):
src += ['drv_emac.c']
if GetDepend(['BSP_USING_HWTIMER0']):
src += ['drv_hwtimer.c']
if GetDepend(['BSP_USING_LED']):
src += ['drv_led.c']
if GetDepend(['BSP_USING_SDRAM']):
src += ['drv_sdram.c']
if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART2'):
src += ['drv_uart.c']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
......
......@@ -8,19 +8,14 @@
* 2009-01-05 Bernard first implementation
*/
#include <rthw.h>
#include <rtthread.h>
#include <board.h>
#include "board.h"
#include "drv_uart.h"
#ifdef LPC_EXT_SDRAM
#include "drv_sdram.h"
#if defined(BSP_USING_SDRAM) && defined(RT_USING_MEMHEAP_AS_HEAP)
#include "drv_sdram.h"
extern void rt_hw_sdram_init(void);
static struct rt_memheap system_heap;
#endif
/**
* This is the timer interrupt service routine.
*
*/
void SysTick_Handler(void)
{
/* enter interrupt */
......@@ -52,14 +47,22 @@ void rt_hw_board_init()
/* set pend exception priority */
NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
/*init uart device*/
rt_hw_uart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#ifdef RT_USING_HEAP
#ifdef LPC_EXT_SDRAM
rt_kprintf("Initialize SDRAM ...");
lpc_sdram_hw_init();
rt_kprintf("done!\n");
#if defined(BSP_USING_SDRAM) && defined(RT_USING_MEMHEAP_AS_HEAP)
rt_hw_sdram_init();
rt_system_heap_init((void *)EXT_SDRAM_BEGIN, (void *)EXT_SDRAM_END);
rt_memheap_init(&system_heap, "sdram", (void *)HEAP_BEGIN, ((rt_uint32_t)HEAP_END - (rt_uint32_t)HEAP_BEGIN));
#else
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
#endif /* RT_USING_HEAP */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
// rt_components_board_init();
}
......@@ -16,48 +16,35 @@
#include "LPC407x_8x_177x_8x.h"
#include <rtthread.h>
#ifdef __cplusplus
extern "C" {
#endif
/* SRAM allocation for Peripherals */
#define USB_RAM_BASE 0x20000000
#define MCI_RAM_BASE 0x20002000
#define ETH_RAM_BASE 0x20004000
/* use SDRAM in default */
#define LPC_EXT_SDRAM 1
/* disable SDRAM in default */
#ifndef LPC_EXT_SDRAM
#define LPC_EXT_SDRAM 0
#endif
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// <integer name="LPC_EXT_SDRAM" description="Begin Address of External SDRAM" default="0xA0000000" />
#define LPC_EXT_SDRAM_BEGIN 0xA0000000
// <integer name="LPC_EXT_SDRAM_END" description="End Address of External SDRAM" default="0xA2000000" />
#define LPC_EXT_SDRAM_END 0xA2000000
// <bool name="RT_USING_UART0" description="Using UART0" default="true" />
#define RT_USING_UART0
// <bool name="RT_USING_UART1" description="Using UART1" default="true" />
//#define RT_USING_UART1
// <bool name="RT_USING_UART2" description="Using UART2" default="true" />
#define RT_USING_UART2
// </RDTConfigurator>
/* Internal SRAM memory size[Kbytes] <16-256>, Default: 64*/
#define SRAM_SIZE 64 * 1024
#define SRAM_END (0x10000000 + SRAM_SIZE)
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
#else
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END (void*)(0x10000000 + 0x10000)
#define HEAP_END SRAM_END
#define FINSH_DEVICE_NAME RT_CONSOLE_DEVICE_NAME
void rt_hw_board_init(void);
#ifdef __cplusplus
}
#endif
#endif /* __BOARD_H__ */
......@@ -459,7 +459,7 @@ struct pbuf *lpc_emac_rx(rt_device_t dev)
return p;
}
int lpc_emac_hw_init(void)
int rt_hw_emac_init(void)
{
rt_event_init(&tx_event, "tx_event", RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
......@@ -490,7 +490,7 @@ int lpc_emac_hw_init(void)
eth_device_init(&(lpc_emac_device.parent), "e0");
return 0;
}
INIT_DEVICE_EXPORT(lpc_emac_hw_init);
INIT_DEVICE_EXPORT(rt_hw_emac_init);
#ifdef RT_USING_FINSH
#include <finsh.h>
......
......@@ -8,8 +8,8 @@
* 2013-05-19 Bernard porting from LPC17xx drivers.
*/
#ifndef __DRV_EMAC_H__
#define __DRV_EMAC_H__
#ifndef DRV_EMAC_H__
#define DRV_EMAC_H__
#include "board.h"
......@@ -20,7 +20,6 @@
#define ETH_MAX_FLEN 1536 /* Max. Ethernet Frame Size */
/* MAC Configuration Register 1 */
#define MAC1_REC_EN 0x00000001 /* Receive Enable */
#define MAC1_PASS_ALL 0x00000002 /* Pass All Receive Frames */
......@@ -282,6 +281,6 @@
#define DP83848C_DEF_ADR 0x0F00 /* Default PHY device address */
#define DP83848C_ID 0x20005C90 /* PHY Identifier */
int lpc_emac_hw_init(void);
int rt_hw_emac_init(void);
#endif
#endif /* DRV_EMAC_H__ */
......@@ -50,7 +50,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_
match.MatchChannel = 0;
match.IntOnMatch = ENABLE;
match.ResetOnMatch = ENABLE;
match.StopOnMatch = (opmode == HWTIMER_MODE_ONESHOT)? ENABLE : DISABLE;
match.StopOnMatch = (opmode == HWTIMER_MODE_ONESHOT) ? ENABLE : DISABLE;
match.ExtMatchOutputType = 0;
match.MatchValue = t;
......@@ -84,7 +84,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
uint32_t pre;
clk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER);
pre = clk / *((uint32_t*)arg) - 1;
pre = clk / *((uint32_t *)arg) - 1;
tim->PR = pre;
}
break;
......@@ -126,7 +126,7 @@ static const struct rt_hwtimer_ops _ops =
static rt_hwtimer_t _timer0;
int lpc_hwtimer_init(void)
int rt_hw_hwtimer_init(void)
{
_timer0.info = &_info;
_timer0.ops = &_ops;
......@@ -145,5 +145,6 @@ void TIMER0_IRQHandler(void)
}
}
INIT_BOARD_EXPORT(lpc_hwtimer_init);
#endif
INIT_BOARD_EXPORT(rt_hw_hwtimer_init);
#endif /* RT_USING_HWTIMER */
#ifndef __DRV_HWTIMER_H__
#define __DRV_HWTIMER_H__
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-09-02 heyuanjie87 the first version
*/
#ifndef DRV_HWTIMER_H__
#define DRV_HWTIMER_H__
int stm32_hwtimer_init(void);
int rt_hw_hwtimer_init(void);
#endif
#endif /* DRV_HWTIMER_H__ */
......@@ -122,7 +122,7 @@ static rt_err_t rt_led_control(rt_device_t dev, int cmd, void *args)
return RT_EOK;
}
int rt_led_hw_init(void)
int rt_hw_led_init(void)
{
led.parent.type = RT_Device_Class_Char;
led.parent.rx_indicate = RT_NULL;
......@@ -141,7 +141,8 @@ int rt_led_hw_init(void)
rt_led_init(&led.parent);
return 0;
}
INIT_DEVICE_EXPORT(rt_led_hw_init);
INIT_DEVICE_EXPORT(rt_hw_led_init);
#ifdef RT_USING_FINSH
#include <finsh.h>
void led_test(rt_uint32_t led_num, rt_uint32_t value)
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-09-02 heyuanjie87 the first version
*/
#ifndef DRV_LED_H__
#define DRV_LED_H__
int rt_hw_led_init(void);
#endif
此差异已折叠。
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2015-06-30 aubrcool@qq.com first version
*/
#ifndef DRV_LPCCAN_H_
#define DRV_LPCCAN_H_
#include <rthw.h>
#include <rtdevice.h>
#define LPC_CAN_AF_STD_INIT(id) \
RT_CAN_FILTER_ITEM_INIT(id,0,0,0,0xFFFFFFFF)
#define LPC_CAN_AF_EXT_INIT(id) \
RT_CAN_FILTER_ITEM_INIT(id,1,0,0,0xFFFFFFFF)
#define LPC_CAN_AF_STD_GRP_INIT(id1,id2) \
RT_CAN_FILTER_ITEM_INIT(id1,0,0,1,id2)
#define LPC_CAN_AF_EXT_GRP_INIT(id1,id2) \
RT_CAN_FILTER_ITEM_INIT(id1,1,0,1,id2)
#endif /*DRV_LPCCAN_H_*/
......@@ -8,20 +8,14 @@
* 2013-05-19 Bernard The first version for LPC40xx
*/
#include <rtthread.h>
#ifdef BSP_USING_SDRAM
#include "drv_sdram.h"
#include <lpc_emc.h>
#include <lpc_timer.h>
#define SDRAM_BASE_ADDR 0xA0000000
#define SDRAM_SIZE 0x2000000
/*******************************************************************************************
* @函数名:sdram_gpio_config()
* @参数 :void
* @返回值:void
* @描述 :SDRAM管脚配置函数,内部调用
*********************************************************************************************/
static void sdram_gpio_config(void)
{
LPC_IOCON->P3_0 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D0 @ P3.0 */
......@@ -78,7 +72,7 @@ static void sdram_gpio_config(void)
LPC_IOCON->P2_29 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* DQM[1] @ P2.29 */
}
void lpc_sdram_hw_init(void)
void rt_hw_sdram_init(void)
{
volatile uint32_t i;
volatile uint32_t dwtemp;
......@@ -88,7 +82,7 @@ void lpc_sdram_hw_init(void)
TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
TIM_ConfigStruct.PrescaleValue = 1;
// Set configuration for Tim_config and Tim_MatchConfig
/* Set configuration for Tim_config and Tim_MatchConfig */
TIM_Init(LPC_TIM0, TIM_TIMER_MODE, &TIM_ConfigStruct);
LPC_SC->PCONP |= 0x00000800;
......@@ -97,53 +91,55 @@ void lpc_sdram_hw_init(void)
LPC_EMC->Config = 0x00000000;
sdram_gpio_config();
//LPC_SC->EMCCLKSEL = 1; //跑主频的一般频率,60Mhz
LPC_EMC->DynamicRP = EMC_NS2CLK(20); /* 20ns, */
LPC_EMC->DynamicRAS = /*EMC_NS2CLK(42, nsPerClk);*/ 15; /* 42ns to 100K ns, */
LPC_EMC->DynamicSREX = 1 - 1; /* tSRE, 1clk, */
LPC_EMC->DynamicAPR = 2 - 1; /* Not found!!! Estimated as 2clk, */
LPC_EMC->DynamicDAL = EMC_NS2CLK(20) + 2; /* tDAL = tRP + tDPL = 20ns + 2clk */
LPC_EMC->DynamicWR = 2 - 1; /* 2CLK, */
LPC_EMC->DynamicRC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRC=63ns(min)*/
LPC_EMC->DynamicRFC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRFC=tRC */
LPC_EMC->DynamicXSR = 0x0000000F; /* exit self-refresh to active, 不知道,设为最久 */
LPC_EMC->DynamicRRD = EMC_NS2CLK(63); /* 3clk, tRRD=15ns(min) */
LPC_EMC->DynamicMRD = 2 - 1; /* 2clk, tMRD=2clk(min) */
LPC_EMC->DynamicReadConfig = 0x00000001; /* Command delayed strategy, using EMCCLKDELAY */
LPC_EMC->DynamicRP = EMC_NS2CLK(20); /* 20ns */
LPC_EMC->DynamicRAS = 15; /* EMC_NS2CLK(42, nsPerClk),42ns to 100K ns */
LPC_EMC->DynamicSREX = 1 - 1; /* tSRE, 1clk */
LPC_EMC->DynamicAPR = 2 - 1; /* Not found!!! Estimated as 2clk */
LPC_EMC->DynamicDAL = EMC_NS2CLK(20) + 2; /* tDAL = tRP + tDPL = 20ns + 2clk */
LPC_EMC->DynamicWR = 2 - 1; /* 2CLK */
LPC_EMC->DynamicRC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRC=63ns(min)*/
LPC_EMC->DynamicRFC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRFC=tRC */
LPC_EMC->DynamicXSR = 0x0000000F; /* exit self-refresh to active */
LPC_EMC->DynamicRRD = EMC_NS2CLK(63); /* 3clk, tRRD=15ns(min) */
LPC_EMC->DynamicMRD = 2 - 1; /* 2clk, tMRD=2clk(min) */
LPC_EMC->DynamicReadConfig = 0x00000001; /* Command delayed strategy, using EMCCLKDELAY */
/* H57V2562GTR-75C: tCL=3CLK, tRCD=20ns(min), 3 CLK=24ns */
LPC_EMC->DynamicRasCas0 = 0x303;
/* For Manley lpc1778 SDRAM: H57V2562GTR-75C, 256Mb, 16Mx16, 4 banks, row=13, column=9 */
#ifdef SDRAM_CONFIG_16BIT
LPC_EMC->DynamicConfig0 = 0x680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
LPC_EMC->DynamicConfig0 = 0x680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
#elif defined SDRAM_CONFIG_32BIT
LPC_EMC->DynamicConfig0 = 0x4680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
LPC_EMC->DynamicConfig0 = 0x4680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
#endif
TIM_Waitms(100);
LPC_EMC->DynamicControl = 0x00000183; /* Issue NOP command */
TIM_Waitms(200); /* wait 200ms */
LPC_EMC->DynamicControl = 0x00000183; /* Issue NOP command */
TIM_Waitms(200); /* wait 200ms */
LPC_EMC->DynamicControl = 0x00000103; /* Issue PALL command */
LPC_EMC->DynamicControl = 0x00000103; /* Issue PALL command */
LPC_EMC->DynamicRefresh = 0x00000002; /* ( n * 16 ) -> 32 clock cycles */
for (i = 0; i < 0x80; i++); /* wait 128 AHB clock cycles */
LPC_EMC->DynamicRefresh = 0x00000002; /* ( n * 16 ) -> 32 clock cycles */
for (i = 0; i < 0x80; i++); /* wait 128 AHB clock cycles */
LPC_EMC->DynamicRefresh = EMC_SDRAM_REFRESH(64);
LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */
LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */
#ifdef SDRAM_CONFIG_16BIT
wtemp = *((volatile uint16_t *)(SDRAM_BASE | (0x33 << 12))); /* 8 burst, 3 CAS latency */
wtemp = *((volatile uint16_t *)(EXT_SDRAM_BEGIN | (0x33 << 12))); /* 8 burst, 3 CAS latency */
#elif defined SDRAM_CONFIG_32BIT
dwtemp = *((volatile uint32_t *)(SDRAM_BASE | (0x32 << 13))); /* 4 burst, 3 CAS latency */
dwtemp = *((volatile uint32_t *)(SDRAM_BASE | (0x32 << 13))); /* 4 burst, 3 CAS latency */
#endif
LPC_EMC->DynamicControl = 0x00000000; /* Issue NORMAL command */
LPC_EMC->DynamicControl = 0x00000000; /* Issue NORMAL command */
LPC_EMC->DynamicConfig0 |= 0x80000; /* enable buffer */
LPC_EMC->DynamicConfig0 |= 0x80000; /* enable buffer */
TIM_Waitms(1);
TIM_DeInit(LPC_TIM0);
}
#endif /* BSP_USING_SDRAM */
......@@ -8,24 +8,25 @@
* 2013-05-19 Bernard The first version for LPC40xx
*/
#ifndef __DRV_SDRAM_H__
#define __DRV_SDRAM_H__
#ifndef DRV_SDRAM_H__
#define DRV_SDRAM_H__
#include <board.h>
#define SDRAM_CONFIG_16BIT //use the 16 bitSDRAM
//#define SDRAM_CONFIG_32BIT //use the 32 bitSDRAM
#define SDRAM_CONFIG_16BIT /* use the 16 bitSDRAM */
//#define SDRAM_CONFIG_32BIT /* use the 32 bitSDRAM */
#ifdef SDRAM_CONFIG_16BIT
#define SDRAM_SIZE 0x2000000 // 256Mbit
#elif defined SDRAM_CONFIG_32BIT //
#define SDRAM_SIZE 0x4000000 // 512Mbit
#define EXT_SDRAM_SIZE 0x2000000 /* 256Mbit */
#elif defined SDRAM_CONFIG_32BIT
#define EXT_SDRAM_SIZE 0x4000000 /* 512Mbit */
#else
error Wrong SDRAM config, check ex_sdram.h
error Wrong SDRAM config, check ex_sdram.h
#endif
#define SDRAM_BASE 0xA0000000 /* CS0 */
#define EXT_SDRAM_BEGIN 0xA0000000 /* CS0 */
#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + EXT_SDRAM_SIZE)
void lpc_sdram_hw_init(void);
void rt_hw_sdram_init(void);
#endif
#endif /* DRV_SDRAM_H__ */
......@@ -8,12 +8,12 @@
* 2013-05-18 Bernard The first version for LPC40xx
*/
#include <rthw.h>
#include <rtthread.h>
#include <rtdevice.h>
#include "board.h"
#ifdef RT_USING_SERIAL
struct lpc_uart
{
LPC_UART_TypeDef *UART;
......@@ -48,7 +48,6 @@ static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_con
/*enable and reset FIFO*/
uart->UART->FCR = 0x07;
return RT_EOK;
}
......@@ -104,11 +103,7 @@ static const struct rt_uart_ops lpc_uart_ops =
lpc_getc,
};
#ifdef RT_USING_UART0
/* UART0 device driver structure */
#if RTTHREAD_VERSION < 20000 /* RT-Thread 1.x */
struct serial_ringbuffer uart0_int_rx;
#endif
#ifdef BSP_USING_UART0
struct lpc_uart uart0 =
{
......@@ -128,14 +123,9 @@ void UART0_IRQHandler(void)
IIR &= 0x0e;
switch (IIR)
{
case 0x04:
case 0x0C:
#if RTTHREAD_VERSION < 20000
rt_hw_serial_isr(&serial0);
#else
rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
#endif
break;
case 0x06:
tmp = LPC_UART0->LSR;
......@@ -148,11 +138,8 @@ void UART0_IRQHandler(void)
rt_interrupt_leave();
}
#endif
#ifdef RT_USING_UART2
/* UART2 device driver structure */
#if RTTHREAD_VERSION < 20000 /* RT-Thread 1.x */
struct serial_ringbuffer uart2_int_rx;
#endif
#ifdef BSP_USING_UART2
struct lpc_uart uart2 =
{
......@@ -174,11 +161,7 @@ void UART2_IRQHandler(void)
{
case 0x04:
case 0x0C:
#if RTTHREAD_VERSION < 20000
rt_hw_serial_isr(&serial2);
#else
rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
#endif
break;
case 0x06:
tmp = LPC_UART2->LSR;
......@@ -193,66 +176,19 @@ void UART2_IRQHandler(void)
}
#endif
#ifdef RT_USING_UART4
/* UART4 device driver structure */
#if RTTHREAD_VERSION < 20000 /* RT-Thread 1.x */
struct serial_ringbuffer uart4_int_rx;
#endif
struct lpc_uart uart4 =
{
LPC_UART4,
UART4_IRQn,
};
struct rt_serial_device serial4;
void UART4_IRQHandler(void)
{
volatile uint32_t IIR, tmp;
/* enter interrupt */
rt_interrupt_enter();
IIR = LPC_UART4->IIR;
IIR &= 0x0e;
switch (IIR)
{
case 0x04:
case 0x0C:
#if RTTHREAD_VERSION < 20000
rt_hw_serial_isr(&serial4);
#else
rt_hw_serial_isr(&serial4, RT_SERIAL_EVENT_RX_IND);
#endif
break;
case 0x06:
tmp = LPC_UART4->LSR;
break;
default :
tmp = LPC_UART4->LSR;
break;
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
void rt_hw_uart_init(void)
int rt_hw_uart_init(void)
{
rt_err_t ret = RT_EOK;
struct lpc_uart *uart;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef RT_USING_UART0
#ifdef BSP_USING_UART0
uart = &uart0;
serial0.ops = &lpc_uart_ops;
serial0.config = config;
#if RTTHREAD_VERSION < 20000
serial0.int_rx = &uart0_int_rx;
#endif
serial0.parent.user_data = uart;
/*
* Initialize UART0 pin connect
* P0.2: U0_TXD
......@@ -273,19 +209,16 @@ void rt_hw_uart_init(void)
NVIC_EnableIRQ(uart->UART_IRQn);
/* register UART0 device */
rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
uart);
ret = rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
uart);
#endif
#ifdef RT_USING_UART2
#ifdef BSP_USING_UART2
uart = &uart2;
serial2.ops = &lpc_uart_ops;
serial2.config = config;
#if RTTHREAD_VERSION < 20000
serial2.int_rx = &uart2_int_rx;
#endif
serial2.parent.user_data = uart;
/*
......@@ -307,42 +240,13 @@ void rt_hw_uart_init(void)
NVIC_EnableIRQ(uart->UART_IRQn);
/* register UART2 device */
rt_hw_serial_register(&serial2, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
uart);
ret = rt_hw_serial_register(&serial2, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
uart);
#endif
#ifdef RT_USING_UART4
uart = &uart4;
serial4.ops = &lpc_uart_ops;
serial4.config = config;
#if RTTHREAD_VERSION < 20000
serial4.int_rx = &uart4_int_rx;
#endif
serial4.parent.user_data = uart;
/*
* Initialize UART2 pin connect
* P5.4: U2_TXD
* P5.3: U2_RXD
*/
LPC_IOCON->P5_4 &= ~0x07;
LPC_IOCON->P5_3 &= ~0x07;
LPC_IOCON->P5_4 |= 0x04;
LPC_IOCON->P5_3 |= 0x04;
/* enable the uart4 power and clock */
LPC_SC->PCONP |= 0x01 << 8;
/* preemption = 1, sub-priority = 1 */
NVIC_SetPriority(uart->UART_IRQn, ((0x01 << 3) | 0x01));
/* Enable Interrupt for UART channel */
NVIC_EnableIRQ(uart->UART_IRQn);
/* register UART2 device */
rt_hw_serial_register(&serial4, "uart4",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
uart);
#endif
return ret;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);
#endif /* RT_USING_SERIAL */
......@@ -8,8 +8,8 @@
* 2014-01-05 NongXiaoming The first version for LPC40xx
*/
#ifndef __UART_H__
#define __UART_H__
#ifndef DRV_UART_H__
#define DRV_UART_H__
void rt_hw_uart_init(void);
......
......@@ -6,8 +6,8 @@
/* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{
CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
DATA (rw) : ORIGIN = 0x10000000, LENGTH = 0x00010000
CODE (rx) : ORIGIN = 0x00000000, LENGTH = 512k /* 512k flash */
DATA (rw) : ORIGIN = 0x10000000, LENGTH = 64k /* 64k sram */
}
ENTRY(Reset_Handler)
_system_stack_size = 0x200;
......@@ -38,6 +38,7 @@ SECTIONS
__vsymtab_end = .;
. = ALIGN(4);
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
......
......@@ -21,7 +21,7 @@
</DaveTm>
<Target>
<TargetName>RT-Thread LPC408x</TargetName>
<TargetName>rtthread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
......@@ -43,7 +43,7 @@
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\</ListingPath>
<ListingPath>.\build\keil\List\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
......@@ -75,17 +75,7 @@
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>0</CpuCode>
<DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments>-MPU</SimDllArguments>
<SimDlgDllName>DCM.DLL</SimDlgDllName>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments>-MPU</TargetDllArguments>
<TargetDlgDllName>TCM.DLL</TargetDlgDllName>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOpt>
<CpuCode>8</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
......@@ -97,16 +87,19 @@
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>0</tGomain>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<tPdscDbg>0</tPdscDbg>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>7</nTsel>
<nTsel>6</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
......@@ -123,7 +116,12 @@
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U4294967295 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO11 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000</Name>
<Name>-U30000299 -O4303 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-O4303 -S0 -C0 -FO7 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
......
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>rtthread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\keil\List\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>8</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>4</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U30000299 -O14 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD10000000 -FCFE0 -FN1 -FF0LPC_IAP_512.FLM -FS00 -FL080000 -FP0($$Device:LPC4088FET208$Flash\LPC_IAP_512.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FN1 -FCFE0 -FD10000000 -FF0LPC_IAP_512 -FL080000 -FS00 -FP0($$Device:LPC4088FET208$Flash\LPC_IAP_512.FLM)</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
</ProjectOpt>
此差异已折叠。
此差异已折叠。
此差异已折叠。
......@@ -4,14 +4,13 @@ import os
ARCH='arm'
CPU='cortex-m4'
CROSS_TOOL='keil'
BOARD_NAME = 'lpc408x'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = r'D:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin'
EXEC_PATH = r'D:/xxx'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'D:/Keil'
......@@ -33,17 +32,18 @@ if PLATFORM == 'gcc':
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'g++'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcpu=cortex-m4 -mthumb'
DEVICE = ' -mcpu=' + CPU + ' -mthumb '
CFLAGS = DEVICE
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread-' + BOARD_NAME + '.map,-cref,-u,Reset_Handler -T rtthread-' + BOARD_NAME + '.ld'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T drivers/linker_scripts/link.lds'
CXXFLAGS = CFLAGS
CPATH = ''
LPATH = ''
......@@ -53,8 +53,6 @@ if PLATFORM == 'gcc':
else:
CFLAGS += ' -O2'
CXXFLAGS = CFLAGS
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
elif PLATFORM == 'armcc':
......@@ -66,17 +64,16 @@ elif PLATFORM == 'armcc':
LINK = 'armlink'
TARGET_EXT = 'axf'
DEVICE = ' --cpu Cortex-M4.fp'
CFLAGS = DEVICE + ' --apcs=interwork'
AFLAGS = DEVICE
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread_' + \
BOARD_NAME + '.map --scatter rtthread-' + BOARD_NAME + '.sct'
DEVICE = ' --cpu ' + CPU + '.fp '
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork'
AFLAGS = DEVICE + ' --apcs=interwork '
LFLAGS = DEVICE + ' --scatter "drivers/linker_scripts/link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/INC'
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/ARMCC/LIB'
CXXFLAGS = CFLAGS
EXEC_PATH += '/arm/bin40/'
EXEC_PATH += '/arm/armcc/bin/'
if BUILD == 'debug':
CFLAGS += ' -g -O0'
......
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
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