提交 b588d819 编写于 作者: L lizhen9880

cleanup some files

上级 1da83c5c
// <<< Use Configuration Wizard in Context Menu >>>
// <h>Debug MCU Configuration
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 Freeze
// <o.0> DBG_TIM2_STOP <i> Timer 2 Stopped when Core is halted
// <o.1> DBG_TIM3_STOP <i> Timer 3 Stopped when Core is halted
// <o.2> DBG_TIM4_STOP <i> Timer 4 Stopped when Core is halted
// <o.3> DBG_TIM5_STOP <i> Timer 5 Stopped when Core is halted
// <o.4> DBG_TIM6_STOP <i> Timer 6 Stopped when Core is halted
// <o.5> DBG_TIM7_STOP <i> Timer 7 Stopped when Core is halted
// <o.6> DBG_TIM12_STOP <i> Timer 12 Stopped when Core is halted
// <o.7> DBG_TIM13_STOP <i> Timer 13 Stopped when Core is halted
// <o.8> DBG_TIM14_STOP <i> Timer 14 Stopped when Core is halted
// <o.10> DBG_RTC_STOP <i> RTC Stopped when Core is halted
// <o.11> DBG_WWDG_STOP <i> Window Watchdog Stopped when Core is halted
// <o.12> DBG_IWDG_STOP <i> Independent Watchdog Stopped when Core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS Timeout Mode Stopped when Core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS Timeout Mode Stopped when Core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS Timeout Mode Stopped when Core is halted
// <o.25> DBG_CAN1_STOP <i> CAN1 Stopped when Core is halted
// <o.26> DBG_CAN2_STOP <i> CAN2 Stopped when Core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 Freeze
// <o.0> DBG_TIM1_STOP <i> Timer 1 Stopped when Core is halted
// <o.1> DBG_TIM8_STOP <i> Timer 8 Stopped when Core is halted
// <o.16> DBG_TIM9_STOP <i> Timer 9 Stopped when Core is halted
// <o.17> DBG_TIM10_STOP <i> Timer 10 Stopped when Core is halted
// <o.18> DBG_TIM11_STOP <i> Timer 11 Stopped when Core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>
\ No newline at end of file
// <<< Use Configuration Wizard in Context Menu >>>
// <h>Debug MCU Configuration
// <o.0> DBG_SLEEP <i> Debug Sleep Mode
// <o.1> DBG_STOP <i> Debug Stop Mode
// <o.2> DBG_STANDBY <i> Debug Standby Mode
// </h>
DbgMCU_CR = 0x00000007;
// <h> Debug MCU APB1 Freeze
// <o.0> DBG_TIM2_STOP <i> Timer 2 Stopped when Core is halted
// <o.1> DBG_TIM3_STOP <i> Timer 3 Stopped when Core is halted
// <o.2> DBG_TIM4_STOP <i> Timer 4 Stopped when Core is halted
// <o.3> DBG_TIM5_STOP <i> Timer 5 Stopped when Core is halted
// <o.10> DBG_RTC_STOP <i> RTC Stopped when Core is halted
// <o.11> DBG_WWDG_STOP <i> Window Watchdog Stopped when Core is halted
// <o.12> DBG_IWDG_STOP <i> Independent Watchdog Stopped when Core is halted
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS Timeout Mode Stopped when Core is halted
// <o.22> DBG_I2C2_SMBUS_TIMEOUT <i> I2C2 SMBUS Timeout Mode Stopped when Core is halted
// <o.23> DBG_I2C3_SMBUS_TIMEOUT <i> I2C3 SMBUS Timeout Mode Stopped when Core is halted
// </h>
DbgMCU_APB1_Fz = 0x00000000;
// <h> Debug MCU APB2 Freeze
// <o.0> DBG_TIM1_STOP <i> Timer 1 Stopped when Core is halted
// <o.16> DBG_TIM9_STOP <i> Timer 9 Stopped when Core is halted
// <o.17> DBG_TIM10_STOP <i> Timer 10 Stopped when Core is halted
// <o.18> DBG_TIM11_STOP <i> Timer 11 Stopped when Core is halted
// </h>
DbgMCU_APB2_Fz = 0x00000000;
// <<< end of configuration section >>>
\ No newline at end of file
[BREAKPOINTS]
ForceImpTypeAny = 0
ShowInfoWin = 1
EnableFlashBP = 2
BPDuringExecution = 0
[CFI]
CFISize = 0x00
CFIAddr = 0x00
[CPU]
LowPowerHandlingMode = 0
OverrideMemMap = 0
AllowSimulation = 1
ScriptFile=""
[FLASH]
CacheExcludeSize = 0x00
CacheExcludeAddr = 0x00
MinNumBytesFlashDL = 0
SkipProgOnCRCMatch = 1
VerifyDownload = 1
AllowCaching = 1
EnableFlashDL = 2
Override = 0
Device="ARM7"
[GENERAL]
WorkRAMSize = 0x00
WorkRAMAddr = 0x00
RAMUsageLimit = 0x00
[SWO]
SWOLogFile=""
[MEM]
RdOverrideOrMask = 0x00
RdOverrideAndMask = 0xFFFFFFFF
RdOverrideAddr = 0xFFFFFFFF
WrOverrideOrMask = 0x00
WrOverrideAndMask = 0xFFFFFFFF
WrOverrideAddr = 0xFFFFFFFF
del *.bak /s
del *.ddk /s
del *.edk /s
del *.lst /s
del *.lnp /s
del *.mpf /s
del *.mpj /s
del *.obj /s
del *.omf /s
::del *.opt /s ::²»ÔÊÐíɾ³ýJLINKµÄÉèÖÃ
del *.plg /s
del *.rpt /s
del *.tmp /s
del *.__i /s
del *.crf /s
del *.o /s
del *.d /s
del *.axf /s
del *.tra /s
del *.dep /s
del JLinkLog.txt /s
del *.iex /s
del *.htm /s
del *.sct /s
del *.map /s
exit
from building import *
Import('rtconfig')
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
group = DefineGroup('nftl', src, depend = ['RT_USING_NFTL', 'RT_USING_MTD_NAND', 'RT_USING_DFS', 'RT_USING_DFS_ELMFAT'], CPPPATH = CPPPATH)
Return('group')
/*
* File : nftl.h
* COPYRIGHT (C) 2012-2014, Shanghai Real-Thread Electronic Technology Co.,Ltd
*
* Change Logs:
* Date Author Notes
* 2012-03-01 Bernard the first version
* 2012-11-01 Bernard Add page mapping
* 2012-12-28 Bernard Use log trace for NFTL log.
* 2013-01-06 Bernard Fix oob issue when do a software page copy.
* 2013-02-15 Bernard Reduce memory usage
* 2013-06-10 Bernard Enable backup mapping block
* 2013-09-18 Bernard Fix the quick search issue in mapping table initialization.
* 2013-11-11 RealThread 1.0.13 version which supports none-os environment.
* 2013-12-25 RealThread 1.0.14 version which optimizes for memory/stack usage.
* 2014-01-20 RealThread 1.0.15 version which optimizes for the scan speed in boot.
* 2015-01-05 RealThread 1.0.16 version which addes NFTL manargement block protect with MPU.
* 2015-02-12 RealThread 1.0.17 version which fix the mapping block wear_leveling issue.
*/
#ifndef __NAND_FTL_H__
#define __NAND_FTL_H__
#include <rtthread.h>
#include <rtdevice.h>
/* NFTL version information */
#define NFTL_VERSION 1L /* major version number */
#define NFTL_SUBVERSION 0L /* minor version number */
#define NFTL_REVISION 17L /* revise version number */
/* NFTL options */
#define NFTL_BLOCKS_MAX 512 /* only 512 block for evaluation */
#define NFTL_PAGE_MAX 2048
#define NFTL_OOB_MAX 64
#define NFTL_PAGE_IN_BLOCK_MAX 64
#define NFTL_ERASE_BLANCE 10
#define NFTL_PLANE_MAX 4
#define NFTL_PM_CACHE_MAX 4
#define NFTL_BLOCKS_RECENT_MAX 32
#define NFTL_BACKUP_MAPPING_BLOCKS 4
/* using backup register to save the block number of mapping table. */
// #define NFTL_USING_BACKUP_MAPPING_BLOCK
// #define NFTL_USING_COMPATIBLE
/* using static memory for NFTl layer */
// #define NFTL_USING_STATIC
/* whether using MPU to protect NFTL core data */
// #define NFTL_USING_MPU
#define NFTL_MALLOC(sz) RT_KERNEL_MALLOC(sz)
#define NFTL_FREE(ptr) RT_KERNEL_FREE(ptr)
/* NFTL API for RT-Thread */
rt_err_t nftl_attach(const char* mtd_device);
/* NFTL API for diskio */
rt_err_t nftl_read_page(struct rt_mtd_nand_device *device,
rt_uint16_t block_offset,
rt_uint16_t page_offset,
rt_uint8_t *buffer);
rt_err_t nftl_write_page(struct rt_mtd_nand_device *device,
rt_uint16_t block_offset,
rt_uint16_t page_offset,
const rt_uint8_t *buffer);
rt_err_t nftl_read_multi_page(struct rt_mtd_nand_device *device,
rt_uint16_t block_offset,
rt_uint16_t page_offset,
rt_uint8_t *buffer,
rt_size_t count);
rt_err_t nftl_write_multi_page(struct rt_mtd_nand_device *device,
rt_uint16_t block_offset,
rt_uint16_t page_offset,
const rt_uint8_t *buffer,
rt_size_t count);
rt_err_t nftl_erase_pages(struct rt_mtd_nand_device* device, rt_uint32_t page_begin, rt_uint32_t page_end);
rt_err_t nftl_mapping_flush(struct rt_mtd_nand_device* device, rt_bool_t protect);
rt_err_t nftl_layer_init(struct rt_mtd_nand_device* device);
/* NFTL API for None-OS */
rt_err_t nftl_layer_attach_nand(struct rt_mtd_nand_device* device);
/* software ECC API */
int nftl_ecc_verify256(rt_uint8_t *data, rt_uint32_t size, const rt_uint8_t *code);
void nftl_ecc_compute256(const rt_uint8_t *data, rt_uint32_t size, rt_uint8_t *code);
#endif
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