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ad05e65c
编写于
10月 29, 2019
作者:
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SummerGift
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bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Include/cmsis_os2.h
...2/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Include/cmsis_os2.h
+0
-756
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Include/os_tick.h
...m32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Include/os_tick.h
+0
-71
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Source/os_systick.c
...2/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Source/os_systick.c
+0
-132
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Source/os_tick_gtim.c
...libraries/STM32H7xx_HAL/CMSIS/RTOS2/Source/os_tick_gtim.c
+0
-187
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Source/os_tick_ptim.c
...libraries/STM32H7xx_HAL/CMSIS/RTOS2/Source/os_tick_ptim.c
+0
-165
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Template/cmsis_os.h
...2/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Template/cmsis_os.h
+0
-922
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Template/cmsis_os1.c
.../libraries/STM32H7xx_HAL/CMSIS/RTOS2/Template/cmsis_os1.c
+0
-361
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bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Include/cmsis_os2.h
已删除
100644 → 0
浏览文件 @
5a1349ab
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点击以展开。
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Include/os_tick.h
已删除
100644 → 0
浏览文件 @
5a1349ab
/**************************************************************************//**
* @file os_tick.h
* @brief CMSIS OS Tick header file
* @version V1.0.1
* @date 24. November 2017
******************************************************************************/
/*
* Copyright (c) 2017-2017 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef OS_TICK_H
#define OS_TICK_H
#include <stdint.h>
/// IRQ Handler.
#ifndef IRQHANDLER_T
#define IRQHANDLER_T
typedef
void
(
*
IRQHandler_t
)
(
void
);
#endif
/// Setup OS Tick timer to generate periodic RTOS Kernel Ticks
/// \param[in] freq tick frequency in Hz
/// \param[in] handler tick IRQ handler
/// \return 0 on success, -1 on error.
int32_t
OS_Tick_Setup
(
uint32_t
freq
,
IRQHandler_t
handler
);
/// Enable OS Tick timer interrupt
void
OS_Tick_Enable
(
void
);
/// Disable OS Tick timer interrupt
void
OS_Tick_Disable
(
void
);
/// Acknowledge execution of OS Tick timer interrupt
void
OS_Tick_AcknowledgeIRQ
(
void
);
/// Get OS Tick timer IRQ number
/// \return OS Tick IRQ number
int32_t
OS_Tick_GetIRQn
(
void
);
/// Get OS Tick timer clock frequency
/// \return OS Tick timer clock frequency in Hz
uint32_t
OS_Tick_GetClock
(
void
);
/// Get OS Tick timer interval reload value
/// \return OS Tick timer interval reload value
uint32_t
OS_Tick_GetInterval
(
void
);
/// Get OS Tick timer counter value
/// \return OS Tick timer counter value
uint32_t
OS_Tick_GetCount
(
void
);
/// Get OS Tick timer overflow status
/// \return OS Tick overflow status (1 - overflow, 0 - no overflow).
uint32_t
OS_Tick_GetOverflow
(
void
);
#endif
/* OS_TICK_H */
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Source/os_systick.c
已删除
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浏览文件 @
5a1349ab
/**************************************************************************//**
* @file os_systick.c
* @brief CMSIS OS Tick SysTick implementation
* @version V1.0.1
* @date 24. November 2017
******************************************************************************/
/*
* Copyright (c) 2017-2017 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "os_tick.h"
//lint -emacro((923,9078),SCB,SysTick) "cast from unsigned long to pointer"
#include "RTE_Components.h"
#include CMSIS_device_header
#ifdef SysTick
#ifndef SYSTICK_IRQ_PRIORITY
#define SYSTICK_IRQ_PRIORITY 0xFFU
#endif
static
uint8_t
PendST
;
// Setup OS Tick.
__WEAK
int32_t
OS_Tick_Setup
(
uint32_t
freq
,
IRQHandler_t
handler
)
{
uint32_t
load
;
(
void
)
handler
;
if
(
freq
==
0U
)
{
//lint -e{904} "Return statement before end of function"
return
(
-
1
);
}
load
=
(
SystemCoreClock
/
freq
)
-
1U
;
if
(
load
>
0x00FFFFFFU
)
{
//lint -e{904} "Return statement before end of function"
return
(
-
1
);
}
// Set SysTick Interrupt Priority
#if ((defined(__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ != 0)) || \
(defined(__CORTEX_M) && (__CORTEX_M == 7U)))
SCB
->
SHPR
[
11
]
=
SYSTICK_IRQ_PRIORITY
;
#elif (defined(__ARM_ARCH_8M_BASE__) && (__ARM_ARCH_8M_BASE__ != 0))
SCB
->
SHPR
[
1
]
|=
((
uint32_t
)
SYSTICK_IRQ_PRIORITY
<<
24
);
#elif ((defined(__ARM_ARCH_7M__) && (__ARM_ARCH_7M__ != 0)) || \
(defined(__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ != 0)))
SCB
->
SHP
[
11
]
=
SYSTICK_IRQ_PRIORITY
;
#elif (defined(__ARM_ARCH_6M__) && (__ARM_ARCH_6M__ != 0))
SCB
->
SHP
[
1
]
|=
((
uint32_t
)
SYSTICK_IRQ_PRIORITY
<<
24
);
#else
#error "Unknown ARM Core!"
#endif
SysTick
->
CTRL
=
SysTick_CTRL_CLKSOURCE_Msk
|
SysTick_CTRL_TICKINT_Msk
;
SysTick
->
LOAD
=
load
;
SysTick
->
VAL
=
0U
;
PendST
=
0U
;
return
(
0
);
}
/// Enable OS Tick.
__WEAK
void
OS_Tick_Enable
(
void
)
{
if
(
PendST
!=
0U
)
{
PendST
=
0U
;
SCB
->
ICSR
=
SCB_ICSR_PENDSTSET_Msk
;
}
SysTick
->
CTRL
|=
SysTick_CTRL_ENABLE_Msk
;
}
/// Disable OS Tick.
__WEAK
void
OS_Tick_Disable
(
void
)
{
SysTick
->
CTRL
&=
~
SysTick_CTRL_ENABLE_Msk
;
if
((
SCB
->
ICSR
&
SCB_ICSR_PENDSTSET_Msk
)
!=
0U
)
{
SCB
->
ICSR
=
SCB_ICSR_PENDSTCLR_Msk
;
PendST
=
1U
;
}
}
// Acknowledge OS Tick IRQ.
__WEAK
void
OS_Tick_AcknowledgeIRQ
(
void
)
{
(
void
)
SysTick
->
CTRL
;
}
// Get OS Tick IRQ number.
__WEAK
int32_t
OS_Tick_GetIRQn
(
void
)
{
return
((
int32_t
)
SysTick_IRQn
);
}
// Get OS Tick clock.
__WEAK
uint32_t
OS_Tick_GetClock
(
void
)
{
return
(
SystemCoreClock
);
}
// Get OS Tick interval.
__WEAK
uint32_t
OS_Tick_GetInterval
(
void
)
{
return
(
SysTick
->
LOAD
+
1U
);
}
// Get OS Tick count value.
__WEAK
uint32_t
OS_Tick_GetCount
(
void
)
{
uint32_t
load
=
SysTick
->
LOAD
;
return
(
load
-
SysTick
->
VAL
);
}
// Get OS Tick overflow status.
__WEAK
uint32_t
OS_Tick_GetOverflow
(
void
)
{
return
((
SysTick
->
CTRL
>>
16
)
&
1U
);
}
#endif // SysTick
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Source/os_tick_gtim.c
已删除
100644 → 0
浏览文件 @
5a1349ab
/**************************************************************************//**
* @file os_tick_gtim.c
* @brief CMSIS OS Tick implementation for Generic Timer
* @version V1.0.1
* @date 24. November 2017
******************************************************************************/
/*
* Copyright (c) 2017 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "os_tick.h"
#include "irq_ctrl.h"
#include "RTE_Components.h"
#include CMSIS_device_header
#ifndef GTIM_IRQ_PRIORITY
#define GTIM_IRQ_PRIORITY 0xFFU
#endif
#ifndef GTIM_IRQ_NUM
#define GTIM_IRQ_NUM SecurePhyTimer_IRQn
#endif
// Timer interrupt pending flag
static
uint8_t
GTIM_PendIRQ
;
// Timer tick frequency
static
uint32_t
GTIM_Clock
;
// Timer load value
static
uint32_t
GTIM_Load
;
// Setup OS Tick.
int32_t
OS_Tick_Setup
(
uint32_t
freq
,
IRQHandler_t
handler
)
{
uint32_t
prio
,
bits
;
if
(
freq
==
0U
)
{
return
(
-
1
);
}
GTIM_PendIRQ
=
0U
;
// Get timer clock
#ifdef SCTR_BASE
GTIM_Clock
=
*
(
uint32_t
*
)(
SCTR_BASE
+
0x20
);
#else
// FVP REFCLK CNTControl 100MHz
GTIM_Clock
=
100000000UL
;
#endif
PL1_SetCounterFrequency
(
GTIM_Clock
);
// Calculate load value
GTIM_Load
=
(
GTIM_Clock
/
freq
)
-
1U
;
// Disable Generic Timer and set load value
PL1_SetControl
(
0U
);
PL1_SetLoadValue
(
GTIM_Load
);
// Disable corresponding IRQ
IRQ_Disable
(
GTIM_IRQ_NUM
);
IRQ_ClearPending
(
GTIM_IRQ_NUM
);
// Determine number of implemented priority bits
IRQ_SetPriority
(
GTIM_IRQ_NUM
,
0xFFU
);
prio
=
IRQ_GetPriority
(
GTIM_IRQ_NUM
);
// At least bits [7:4] must be implemented
if
((
prio
&
0xF0U
)
==
0U
)
{
return
(
-
1
);
}
for
(
bits
=
0
;
bits
<
4
;
bits
++
)
{
if
((
prio
&
0x01
)
!=
0
)
{
break
;
}
prio
>>=
1
;
}
// Adjust configured priority to the number of implemented priority bits
prio
=
(
GTIM_IRQ_PRIORITY
<<
bits
)
&
0xFFUL
;
// Set Private Timer interrupt priority
IRQ_SetPriority
(
GTIM_IRQ_NUM
,
prio
-
1U
);
// Set edge-triggered IRQ
IRQ_SetMode
(
GTIM_IRQ_NUM
,
IRQ_MODE_TRIG_EDGE
);
// Register tick interrupt handler function
IRQ_SetHandler
(
GTIM_IRQ_NUM
,
handler
);
// Enable corresponding interrupt
IRQ_Enable
(
GTIM_IRQ_NUM
);
// Enable system counter and timer control
#ifdef SCTR_BASE
*
(
uint32_t
*
)
SCTR_BASE
|=
3U
;
#endif
// Enable timer control
PL1_SetControl
(
1U
);
return
(
0
);
}
/// Enable OS Tick.
void
OS_Tick_Enable
(
void
)
{
uint32_t
ctrl
;
// Set pending interrupt if flag set
if
(
GTIM_PendIRQ
!=
0U
)
{
GTIM_PendIRQ
=
0U
;
IRQ_SetPending
(
GTIM_IRQ_NUM
);
}
// Start the Private Timer
ctrl
=
PL1_GetControl
();
// Set bit: Timer enable
ctrl
|=
1U
;
PL1_SetControl
(
ctrl
);
}
/// Disable OS Tick.
void
OS_Tick_Disable
(
void
)
{
uint32_t
ctrl
;
// Stop the Private Timer
ctrl
=
PL1_GetControl
();
// Clear bit: Timer enable
ctrl
&=
~
1U
;
PL1_SetControl
(
ctrl
);
// Remember pending interrupt flag
if
(
IRQ_GetPending
(
GTIM_IRQ_NUM
)
!=
0
)
{
IRQ_ClearPending
(
GTIM_IRQ_NUM
);
GTIM_PendIRQ
=
1U
;
}
}
// Acknowledge OS Tick IRQ.
void
OS_Tick_AcknowledgeIRQ
(
void
)
{
IRQ_ClearPending
(
GTIM_IRQ_NUM
);
PL1_SetLoadValue
(
GTIM_Load
);
}
// Get OS Tick IRQ number.
int32_t
OS_Tick_GetIRQn
(
void
)
{
return
(
GTIM_IRQ_NUM
);
}
// Get OS Tick clock.
uint32_t
OS_Tick_GetClock
(
void
)
{
return
(
GTIM_Clock
);
}
// Get OS Tick interval.
uint32_t
OS_Tick_GetInterval
(
void
)
{
return
(
GTIM_Load
+
1U
);
}
// Get OS Tick count value.
uint32_t
OS_Tick_GetCount
(
void
)
{
return
(
GTIM_Load
-
PL1_GetCurrentValue
());
}
// Get OS Tick overflow status.
uint32_t
OS_Tick_GetOverflow
(
void
)
{
CNTP_CTL_Type
cntp_ctl
;
cntp_ctl
.
w
=
PL1_GetControl
();
return
(
cntp_ctl
.
b
.
ISTATUS
);
}
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Source/os_tick_ptim.c
已删除
100644 → 0
浏览文件 @
5a1349ab
/**************************************************************************//**
* @file os_tick_ptim.c
* @brief CMSIS OS Tick implementation for Private Timer
* @version V1.0.2
* @date 02. March 2018
******************************************************************************/
/*
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "RTE_Components.h"
#include CMSIS_device_header
#if defined(PTIM)
#include "os_tick.h"
#include "irq_ctrl.h"
#ifndef PTIM_IRQ_PRIORITY
#define PTIM_IRQ_PRIORITY 0xFFU
#endif
static
uint8_t
PTIM_PendIRQ
;
// Timer interrupt pending flag
// Setup OS Tick.
int32_t
OS_Tick_Setup
(
uint32_t
freq
,
IRQHandler_t
handler
)
{
uint32_t
load
;
uint32_t
prio
;
uint32_t
bits
;
if
(
freq
==
0U
)
{
return
(
-
1
);
}
PTIM_PendIRQ
=
0U
;
// Private Timer runs with the system frequency
load
=
(
SystemCoreClock
/
freq
)
-
1U
;
// Disable Private Timer and set load value
PTIM_SetControl
(
0U
);
PTIM_SetLoadValue
(
load
);
// Disable corresponding IRQ
IRQ_Disable
(
PrivTimer_IRQn
);
IRQ_ClearPending
(
PrivTimer_IRQn
);
// Determine number of implemented priority bits
IRQ_SetPriority
(
PrivTimer_IRQn
,
0xFFU
);
prio
=
IRQ_GetPriority
(
PrivTimer_IRQn
);
// At least bits [7:4] must be implemented
if
((
prio
&
0xF0U
)
==
0U
)
{
return
(
-
1
);
}
for
(
bits
=
0
;
bits
<
4
;
bits
++
)
{
if
((
prio
&
0x01
)
!=
0
)
{
break
;
}
prio
>>=
1
;
}
// Adjust configured priority to the number of implemented priority bits
prio
=
(
PTIM_IRQ_PRIORITY
<<
bits
)
&
0xFFUL
;
// Set Private Timer interrupt priority
IRQ_SetPriority
(
PrivTimer_IRQn
,
prio
-
1U
);
// Set edge-triggered IRQ
IRQ_SetMode
(
PrivTimer_IRQn
,
IRQ_MODE_TRIG_EDGE
);
// Register tick interrupt handler function
IRQ_SetHandler
(
PrivTimer_IRQn
,
handler
);
// Enable corresponding interrupt
IRQ_Enable
(
PrivTimer_IRQn
);
// Set bits: IRQ enable and Auto reload
PTIM_SetControl
(
0x06U
);
return
(
0
);
}
/// Enable OS Tick.
void
OS_Tick_Enable
(
void
)
{
uint32_t
ctrl
;
// Set pending interrupt if flag set
if
(
PTIM_PendIRQ
!=
0U
)
{
PTIM_PendIRQ
=
0U
;
IRQ_SetPending
(
PrivTimer_IRQn
);
}
// Start the Private Timer
ctrl
=
PTIM_GetControl
();
// Set bit: Timer enable
ctrl
|=
1U
;
PTIM_SetControl
(
ctrl
);
}
/// Disable OS Tick.
void
OS_Tick_Disable
(
void
)
{
uint32_t
ctrl
;
// Stop the Private Timer
ctrl
=
PTIM_GetControl
();
// Clear bit: Timer enable
ctrl
&=
~
1U
;
PTIM_SetControl
(
ctrl
);
// Remember pending interrupt flag
if
(
IRQ_GetPending
(
PrivTimer_IRQn
)
!=
0
)
{
IRQ_ClearPending
(
PrivTimer_IRQn
);
PTIM_PendIRQ
=
1U
;
}
}
// Acknowledge OS Tick IRQ.
void
OS_Tick_AcknowledgeIRQ
(
void
)
{
PTIM_ClearEventFlag
();
}
// Get OS Tick IRQ number.
int32_t
OS_Tick_GetIRQn
(
void
)
{
return
(
PrivTimer_IRQn
);
}
// Get OS Tick clock.
uint32_t
OS_Tick_GetClock
(
void
)
{
return
(
SystemCoreClock
);
}
// Get OS Tick interval.
uint32_t
OS_Tick_GetInterval
(
void
)
{
return
(
PTIM_GetLoadValue
()
+
1U
);
}
// Get OS Tick count value.
uint32_t
OS_Tick_GetCount
(
void
)
{
uint32_t
load
=
PTIM_GetLoadValue
();
return
(
load
-
PTIM_GetCurrentValue
());
}
// Get OS Tick overflow status.
uint32_t
OS_Tick_GetOverflow
(
void
)
{
return
(
PTIM
->
ISR
&
1
);
}
#endif // PTIM
bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Template/cmsis_os.h
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bsp/stm32/libraries/STM32H7xx_HAL/CMSIS/RTOS2/Template/cmsis_os1.c
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/*
* Copyright (c) 2013-2017 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* ----------------------------------------------------------------------
*
* $Date: 10. January 2017
* $Revision: V1.2
*
* Project: CMSIS-RTOS API V1
* Title: cmsis_os_v1.c V1 module file
*---------------------------------------------------------------------------*/
#include <string.h>
#include "cmsis_os.h"
#if (osCMSIS >= 0x20000U)
// Thread
osThreadId
osThreadCreate
(
const
osThreadDef_t
*
thread_def
,
void
*
argument
)
{
if
(
thread_def
==
NULL
)
{
return
(
osThreadId
)
NULL
;
}
return
osThreadNew
((
osThreadFunc_t
)
thread_def
->
pthread
,
argument
,
&
thread_def
->
attr
);
}
// Signals
#define SignalMask ((1U<<osFeature_Signals)-1U)
int32_t
osSignalSet
(
osThreadId
thread_id
,
int32_t
signals
)
{
uint32_t
flags
;
flags
=
osThreadFlagsSet
(
thread_id
,
(
uint32_t
)
signals
);
if
((
flags
&
0x80000000U
)
!=
0U
)
{
return
((
int32_t
)
0x80000000U
);
}
return
((
int32_t
)(
flags
&
~
((
uint32_t
)
signals
)));
}
int32_t
osSignalClear
(
osThreadId
thread_id
,
int32_t
signals
)
{
uint32_t
flags
;
if
(
thread_id
!=
osThreadGetId
())
{
return
((
int32_t
)
0x80000000U
);
}
flags
=
osThreadFlagsClear
((
uint32_t
)
signals
);
if
((
flags
&
0x80000000U
)
!=
0U
)
{
return
((
int32_t
)
0x80000000U
);
}
return
((
int32_t
)
flags
);
}
osEvent
osSignalWait
(
int32_t
signals
,
uint32_t
millisec
)
{
osEvent
event
;
uint32_t
flags
;
if
(
signals
!=
0
)
{
flags
=
osThreadFlagsWait
((
uint32_t
)
signals
,
osFlagsWaitAll
,
millisec
);
}
else
{
flags
=
osThreadFlagsWait
(
SignalMask
,
osFlagsWaitAny
,
millisec
);
}
if
((
flags
>
0U
)
&&
(
flags
<
0x80000000U
))
{
event
.
status
=
osEventSignal
;
event
.
value
.
signals
=
(
int32_t
)
flags
;
}
else
{
switch
((
int32_t
)
flags
)
{
case
osErrorResource
:
event
.
status
=
osOK
;
break
;
case
osErrorTimeout
:
event
.
status
=
osEventTimeout
;
break
;
case
osErrorParameter
:
event
.
status
=
osErrorValue
;
break
;
default:
event
.
status
=
(
osStatus
)
flags
;
break
;
}
}
return
event
;
}
// Timer
osTimerId
osTimerCreate
(
const
osTimerDef_t
*
timer_def
,
os_timer_type
type
,
void
*
argument
)
{
if
(
timer_def
==
NULL
)
{
return
(
osTimerId
)
NULL
;
}
return
osTimerNew
((
osTimerFunc_t
)
timer_def
->
ptimer
,
type
,
argument
,
&
timer_def
->
attr
);
}
// Mutex
osMutexId
osMutexCreate
(
const
osMutexDef_t
*
mutex_def
)
{
if
(
mutex_def
==
NULL
)
{
return
(
osMutexId
)
NULL
;
}
return
osMutexNew
(
mutex_def
);
}
// Semaphore
#if (defined (osFeature_Semaphore) && (osFeature_Semaphore != 0U))
osSemaphoreId
osSemaphoreCreate
(
const
osSemaphoreDef_t
*
semaphore_def
,
int32_t
count
)
{
if
(
semaphore_def
==
NULL
)
{
return
(
osSemaphoreId
)
NULL
;
}
return
osSemaphoreNew
((
uint32_t
)
count
,
(
uint32_t
)
count
,
semaphore_def
);
}
int32_t
osSemaphoreWait
(
osSemaphoreId
semaphore_id
,
uint32_t
millisec
)
{
osStatus_t
status
;
uint32_t
count
;
status
=
osSemaphoreAcquire
(
semaphore_id
,
millisec
);
switch
(
status
)
{
case
osOK
:
count
=
osSemaphoreGetCount
(
semaphore_id
);
return
((
int32_t
)
count
+
1
);
case
osErrorResource
:
case
osErrorTimeout
:
return
0
;
default:
break
;
}
return
-
1
;
}
#endif // Semaphore
// Memory Pool
#if (defined(osFeature_Pool) && (osFeature_Pool != 0))
osPoolId
osPoolCreate
(
const
osPoolDef_t
*
pool_def
)
{
if
(
pool_def
==
NULL
)
{
return
(
osPoolId
)
NULL
;
}
return
((
osPoolId
)(
osMemoryPoolNew
(
pool_def
->
pool_sz
,
pool_def
->
item_sz
,
&
pool_def
->
attr
)));
}
void
*
osPoolAlloc
(
osPoolId
pool_id
)
{
return
osMemoryPoolAlloc
((
osMemoryPoolId_t
)
pool_id
,
0U
);
}
void
*
osPoolCAlloc
(
osPoolId
pool_id
)
{
void
*
block
;
uint32_t
block_size
;
block_size
=
osMemoryPoolGetBlockSize
((
osMemoryPoolId_t
)
pool_id
);
if
(
block_size
==
0U
)
{
return
NULL
;
}
block
=
osMemoryPoolAlloc
((
osMemoryPoolId_t
)
pool_id
,
0U
);
if
(
block
!=
NULL
)
{
memset
(
block
,
0
,
block_size
);
}
return
block
;
}
osStatus
osPoolFree
(
osPoolId
pool_id
,
void
*
block
)
{
return
osMemoryPoolFree
((
osMemoryPoolId_t
)
pool_id
,
block
);
}
#endif // Memory Pool
// Message Queue
#if (defined(osFeature_MessageQ) && (osFeature_MessageQ != 0))
osMessageQId
osMessageCreate
(
const
osMessageQDef_t
*
queue_def
,
osThreadId
thread_id
)
{
(
void
)
thread_id
;
if
(
queue_def
==
NULL
)
{
return
(
osMessageQId
)
NULL
;
}
return
((
osMessageQId
)(
osMessageQueueNew
(
queue_def
->
queue_sz
,
sizeof
(
uint32_t
),
&
queue_def
->
attr
)));
}
osStatus
osMessagePut
(
osMessageQId
queue_id
,
uint32_t
info
,
uint32_t
millisec
)
{
return
osMessageQueuePut
((
osMessageQueueId_t
)
queue_id
,
&
info
,
0U
,
millisec
);
}
osEvent
osMessageGet
(
osMessageQId
queue_id
,
uint32_t
millisec
)
{
osStatus_t
status
;
osEvent
event
;
uint32_t
message
;
status
=
osMessageQueueGet
((
osMessageQueueId_t
)
queue_id
,
&
message
,
NULL
,
millisec
);
switch
(
status
)
{
case
osOK
:
event
.
status
=
osEventMessage
;
event
.
value
.
v
=
message
;
break
;
case
osErrorResource
:
event
.
status
=
osOK
;
break
;
case
osErrorTimeout
:
event
.
status
=
osEventTimeout
;
break
;
default:
event
.
status
=
status
;
break
;
}
return
event
;
}
#endif // Message Queue
// Mail Queue
#if (defined(osFeature_MailQ) && (osFeature_MailQ != 0))
typedef
struct
os_mail_queue_s
{
osMemoryPoolId_t
mp_id
;
osMessageQueueId_t
mq_id
;
}
os_mail_queue_t
;
osMailQId
osMailCreate
(
const
osMailQDef_t
*
queue_def
,
osThreadId
thread_id
)
{
os_mail_queue_t
*
ptr
;
(
void
)
thread_id
;
if
(
queue_def
==
NULL
)
{
return
(
osMailQId
)
NULL
;
}
ptr
=
queue_def
->
mail
;
if
(
ptr
==
NULL
)
{
return
(
osMailQId
)
NULL
;
}
ptr
->
mp_id
=
osMemoryPoolNew
(
queue_def
->
queue_sz
,
queue_def
->
item_sz
,
&
queue_def
->
mp_attr
);
ptr
->
mq_id
=
osMessageQueueNew
(
queue_def
->
queue_sz
,
sizeof
(
void
*
),
&
queue_def
->
mq_attr
);
if
((
ptr
->
mp_id
==
(
osMemoryPoolId_t
)
NULL
)
||
(
ptr
->
mq_id
==
(
osMessageQueueId_t
)
NULL
))
{
if
(
ptr
->
mp_id
!=
(
osMemoryPoolId_t
)
NULL
)
{
osMemoryPoolDelete
(
ptr
->
mp_id
);
}
if
(
ptr
->
mq_id
!=
(
osMessageQueueId_t
)
NULL
)
{
osMessageQueueDelete
(
ptr
->
mq_id
);
}
return
(
osMailQId
)
NULL
;
}
return
(
osMailQId
)
ptr
;
}
void
*
osMailAlloc
(
osMailQId
queue_id
,
uint32_t
millisec
)
{
os_mail_queue_t
*
ptr
=
(
os_mail_queue_t
*
)
queue_id
;
if
(
ptr
==
NULL
)
{
return
NULL
;
}
return
osMemoryPoolAlloc
(
ptr
->
mp_id
,
millisec
);
}
void
*
osMailCAlloc
(
osMailQId
queue_id
,
uint32_t
millisec
)
{
os_mail_queue_t
*
ptr
=
(
os_mail_queue_t
*
)
queue_id
;
void
*
block
;
uint32_t
block_size
;
if
(
ptr
==
NULL
)
{
return
NULL
;
}
block_size
=
osMemoryPoolGetBlockSize
(
ptr
->
mp_id
);
if
(
block_size
==
0U
)
{
return
NULL
;
}
block
=
osMemoryPoolAlloc
(
ptr
->
mp_id
,
millisec
);
if
(
block
!=
NULL
)
{
memset
(
block
,
0
,
block_size
);
}
return
block
;
}
osStatus
osMailPut
(
osMailQId
queue_id
,
const
void
*
mail
)
{
os_mail_queue_t
*
ptr
=
(
os_mail_queue_t
*
)
queue_id
;
if
(
ptr
==
NULL
)
{
return
osErrorParameter
;
}
if
(
mail
==
NULL
)
{
return
osErrorValue
;
}
return
osMessageQueuePut
(
ptr
->
mq_id
,
&
mail
,
0U
,
0U
);
}
osEvent
osMailGet
(
osMailQId
queue_id
,
uint32_t
millisec
)
{
os_mail_queue_t
*
ptr
=
(
os_mail_queue_t
*
)
queue_id
;
osStatus_t
status
;
osEvent
event
;
void
*
mail
;
if
(
ptr
==
NULL
)
{
event
.
status
=
osErrorParameter
;
return
event
;
}
status
=
osMessageQueueGet
(
ptr
->
mq_id
,
&
mail
,
NULL
,
millisec
);
switch
(
status
)
{
case
osOK
:
event
.
status
=
osEventMail
;
event
.
value
.
p
=
mail
;
break
;
case
osErrorResource
:
event
.
status
=
osOK
;
break
;
case
osErrorTimeout
:
event
.
status
=
osEventTimeout
;
break
;
default:
event
.
status
=
status
;
break
;
}
return
event
;
}
osStatus
osMailFree
(
osMailQId
queue_id
,
void
*
mail
)
{
os_mail_queue_t
*
ptr
=
(
os_mail_queue_t
*
)
queue_id
;
if
(
ptr
==
NULL
)
{
return
osErrorParameter
;
}
if
(
mail
==
NULL
)
{
return
osErrorValue
;
}
return
osMemoryPoolFree
(
ptr
->
mp_id
,
mail
);
}
#endif // Mail Queue
#endif // osCMSIS
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