net: hns3: add int_gl_idx setup for VF

Just like PF, if the int_gl_idx of VF does not be set, the default
interrupt coalesce index of VF is 0. But it should be GL1 for TX
queues and GL0 for RX queues.

This patch adds the int_gl_idx setup for VF.

Fixes: 200ecda42598 ("net: hns3: Add HNS3 VF HCL(Hardware Compatibility Layer) Support")
Signed-off-by: NFuyun Liang <liangfuyun1@huawei.com>
Signed-off-by: NPeng Li <lipeng321@huawei.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c

@@ -116,6 +116,9 @@ static int hclge_get_ring_chain_from_mbx(
 	hnae_set_bit(ring_chain->flag, HNAE3_RING_TYPE_B, req->msg[3]);
 	ring_chain->tqp_index =
 			hclge_get_queue_id(vport->nic.kinfo.tqp[req->msg[4]]);
+	hnae_set_field(ring_chain->int_gl_idx, HCLGE_INT_GL_IDX_M,
+		       HCLGE_INT_GL_IDX_S,
+		       req->msg[5]);
 
 	cur_chain = ring_chain;
 
@@ -133,6 +136,11 @@ static int hclge_get_ring_chain_from_mbx(
 			[req->msg[HCLGE_RING_NODE_VARIABLE_NUM * i +
 			HCLGE_RING_MAP_MBX_BASIC_MSG_NUM + 1]]);
 
+		hnae_set_field(new_chain->int_gl_idx, HCLGE_INT_GL_IDX_M,
+			       HCLGE_INT_GL_IDX_S,
+			       req->msg[HCLGE_RING_NODE_VARIABLE_NUM * i +
+			       HCLGE_RING_MAP_MBX_BASIC_MSG_NUM + 2]);
+
 		cur_chain->next = new_chain;
 		cur_chain = new_chain;
 	}

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c

@@ -565,6 +565,11 @@ static int hclgevf_bind_ring_to_vector(struct hnae3_handle *handle, bool en,
 				hnae_get_bit(node->flag, HNAE3_RING_TYPE_B);
 		req->msg[HCLGEVF_RING_NODE_VARIABLE_NUM * i + 1] =
 				node->tqp_index;
+		req->msg[HCLGEVF_RING_NODE_VARIABLE_NUM * i + 2] =
+				hnae_get_field(node->int_gl_idx,
+					       HNAE3_RING_GL_IDX_M,
+					       HNAE3_RING_GL_IDX_S);
+
 		if (i == (HCLGE_MBX_VF_MSG_DATA_NUM -
 		    HCLGEVF_RING_MAP_MBX_BASIC_MSG_NUM) /
 		    HCLGEVF_RING_NODE_VARIABLE_NUM) {