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体验新版 GitCode,发现更多精彩内容 >>
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ebe21c47
编写于
6月 04, 2015
作者:
B
Bernard Xiong
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差异文件
Merge pull request #493 from aozima/pulls
update libcpu:arm926
上级
0ac07f9f
314379cc
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
54 addition
and
16 deletion
+54
-16
libcpu/arm/arm926/start_gcc.S
libcpu/arm/arm926/start_gcc.S
+7
-5
libcpu/arm/arm926/start_iar.S
libcpu/arm/arm926/start_iar.S
+7
-5
libcpu/arm/arm926/start_rvds.S
libcpu/arm/arm926/start_rvds.S
+40
-6
未找到文件。
libcpu/arm/arm926/start_gcc.S
浏览文件 @
ebe21c47
...
...
@@ -22,6 +22,7 @@
*
2011
-
01
-
13
weety
first
version
*
2015
-
04
-
15
ArdaFu
Split
from
AT91SAM9260
BSP
*
2015
-
04
-
21
ArdaFu
Remove
remap
code
.
Using
mmu
to
map
vector
table
*
2015
-
06
-
04
aozima
Align
stack
address
to
8
byte
.
*/
#define S_FRAME_SIZE (18*4) //72
...
...
@@ -61,31 +62,32 @@
.
section
.
nobss
,
"w"
.
space
UND_STK_SIZE
.
align
3
.
global
UND_STACK_START
UND_STACK_START
:
.
space
ABT_STK_SIZE
.
align
2
.
align
3
.
global
ABT_STACK_START
ABT_STACK_START
:
.
space
FIQ_STK_SIZE
.
align
2
.
align
3
.
global
FIQ_STACK_START
FIQ_STACK_START
:
.
space
IRQ_STK_SIZE
.
align
2
.
align
3
.
global
IRQ_STACK_START
IRQ_STACK_START
:
.
skip
SYS_STK_SIZE
.
align
2
.
align
3
.
global
SYS_STACK_START
SYS_STACK_START
:
.
space
SVC_STK_SIZE
.
align
2
.
align
3
.
global
SVC_STACK_START
SVC_STACK_START
:
...
...
libcpu/arm/arm926/start_iar.S
浏览文件 @
ebe21c47
...
...
@@ -22,6 +22,7 @@
; * 2011-01-13 weety first version
; * 2015-04-15 ArdaFu Split from AT91SAM9260 BSP
; * 2015-04-21 ArdaFu Remove remap code. Using mmu to map vector table
; * 2015-06-04 aozima Align stack address to 8 byte.
; */
#define S_FRAME_SIZE (18*4) ;72
...
...
@@ -62,31 +63,32 @@
SECTION
.
noinit
:
DATA
:
NOROOT
(
3
)
DATA
ALIGNRAM
3
DS8
UND_STK_SIZE
PUBLIC
UND_STACK_START
UND_STACK_START
:
ALIGNRAM
2
ALIGNRAM
3
DS8
ABT_STK_SIZE
PUBLIC
ABT_STACK_START
ABT_STACK_START
:
ALIGNRAM
2
ALIGNRAM
3
DS8
FIQ_STK_SIZE
PUBLIC
FIQ_STACK_START
FIQ_STACK_START
:
ALIGNRAM
2
ALIGNRAM
3
DS8
IRQ_STK_SIZE
PUBLIC
IRQ_STACK_START
IRQ_STACK_START
:
ALIGNRAM
2
ALIGNRAM
3
DS8
SYS_STK_SIZE
PUBLIC
SYS_STACK_START
SYS_STACK_START
:
ALIGNRAM
2
ALIGNRAM
3
DS8
SVC_STK_SIZE
PUBLIC
SVC_STACK_START
SVC_STACK_START
:
...
...
libcpu/arm/arm926/start_rvds.S
浏览文件 @
ebe21c47
...
...
@@ -22,6 +22,7 @@
; * 2011-08-14 weety first version
; * 2015-04-15 ArdaFu Split from AT91SAM9260 BSP
; * 2015-04-21 ArdaFu Remove remap code. Using mmu to map vector table
; * 2015-06-04 aozima Align stack address to 8 byte.
; */
S_FRAME_SIZE
EQU
(
18
*
4
)
;72
...
...
@@ -60,38 +61,44 @@ NOINT EQU 0xC0
GET
rt_low_level_keil.inc
;----------------------- Stack and Heap Definitions ----------------------------
AREA
STACK
,
NOINIT
,
READWRITE
,
ALIGN
=
2
AREA
STACK
,
NOINIT
,
READWRITE
,
ALIGN
=
3
Stack_Mem
SPACE
UND_STK_SIZE
EXPORT
UND_STACK_START
UND_STACK_START
ALIGN
4
ALIGN
8
SPACE
ABT_STK_SIZE
EXPORT
ABT_STACK_START
ABT_STACK_START
ALIGN
4
ALIGN
8
SPACE
FIQ_STK_SIZE
EXPORT
FIQ_STACK_START
FIQ_STACK_START
ALIGN
4
ALIGN
8
SPACE
IRQ_STK_SIZE
EXPORT
IRQ_STACK_START
IRQ_STACK_START
ALIGN
4
ALIGN
8
SPACE
SYS_STK_SIZE
EXPORT
SYS_STACK_START
SYS_STACK_START
ALIGN
4
ALIGN
8
SPACE
SVC_STK_SIZE
EXPORT
SVC_STACK_START
SVC_STACK_START
Stack_Top
__initial_sp
__heap_base
Heap_Mem
SPACE
Heap_Size
__heap_limit
PRESERVE8
;--------------Jump vector table------------------------------------------------
EXPORT
Entry_Point
...
...
@@ -291,4 +298,31 @@ rt_hw_context_switch_interrupt_do PROC
LDMFD
SP
!,
{
R0
-
R12
,
LR
,
PC
}^
; pop new task's R0-R12,LR & PC SPSR to CPSR
ENDP
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF
:DEF:
__MICROLIB
EXPORT
__initial_sp
EXPORT
__heap_base
EXPORT
__heap_limit
ELSE
IMPORT
__use_two_region_memory
EXPORT
__user_initial_stackheap
__user_initial_stackheap
LDR
R0
,
=
Heap_Mem
; heap base
LDR
R1
,
=
SVC_STACK_START
; stack base (top-address)
LDR
R2
,
=
(
Heap_Mem
+
Heap_Size
)
; heap limit
LDR
R3
,
=
(
SVC_STACK_START
-
SVC_STK_SIZE
)
; stack limit (low-address)
BX
LR
ALIGN
ENDIF
END
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