提交 56ffec85 编写于 作者: M me-no-dev

Update IDF libraries

上级 161a2245
......@@ -30,7 +30,7 @@ import base64
import zlib
import shlex
__version__ = "2.0-beta1"
__version__ = "2.0-beta2"
MAX_UINT32 = 0xffffffff
MAX_UINT24 = 0xffffff
......@@ -281,6 +281,62 @@ class ESPLoader(object):
for i in range(7):
self.command()
def _connect_attempt(self, mode='default_reset', esp32r0_delay=False):
""" A single connection attempt, with esp32r0 workaround options """
# esp32r0_delay is a workaround for bugs with the most common auto reset
# circuit and Windows, if the EN pin on the dev board does not have
# enough capacitance.
#
# Newer dev boards shouldn't have this problem (higher value capacitor
# on the EN pin), and ESP32 revision 1 can't use this workaround as it
# relies on a silicon bug.
#
# Details: https://github.com/espressif/esptool/issues/136
last_error = None
# issue reset-to-bootloader:
# RTS = either CH_PD/EN or nRESET (both active low = chip in reset
# DTR = GPIO0 (active low = boot to flasher)
#
# DTR & RTS are active low signals,
# ie True = pin @ 0V, False = pin @ VCC.
if mode != 'no_reset':
self._port.setDTR(False) # IO0=HIGH
self._port.setRTS(True) # EN=LOW, chip in reset
time.sleep(0.1)
if esp32r0_delay:
# Some chips are more likely to trigger the esp32r0
# watchdog reset silicon bug if they're held with EN=LOW
# for a longer period
time.sleep(1.2)
self._port.setDTR(True) # IO0=LOW
self._port.setRTS(False) # EN=HIGH, chip out of reset
if esp32r0_delay:
# Sleep longer after reset.
# This workaround only works on revision 0 ESP32 chips,
# it exploits a silicon bug spurious watchdog reset.
time.sleep(0.4) # allow watchdog reset to occur
time.sleep(0.05)
self._port.setDTR(False) # IO0=HIGH, done
self._port.timeout = 0.1
for _ in range(5):
try:
self.flush_input()
self._port.flushOutput()
self.sync()
self._port.timeout = 5
return None
except FatalError as e:
if esp32r0_delay:
print('_', end='')
else:
print('.', end='')
sys.stdout.flush()
time.sleep(0.05)
last_error = e
return last_error
def connect(self, mode='default_reset'):
""" Try connecting repeatedly until successful, or giving up """
print('Connecting...', end='')
......@@ -289,44 +345,12 @@ class ESPLoader(object):
try:
for _ in range(10):
# issue reset-to-bootloader:
# RTS = either CH_PD/EN or nRESET (both active low = chip in reset
# DTR = GPIO0 (active low = boot to flasher)
#
# DTR & RTS are active low signals,
# ie True = pin @ 0V, False = pin @ VCC.
if mode != 'no_reset':
self._port.setDTR(False) # IO0=HIGH
self._port.setRTS(True) # EN=LOW, chip in reset
time.sleep(0.05)
self._port.setDTR(True) # IO0=LOW
self._port.setRTS(False) # EN=HIGH, chip out of reset
if mode == 'esp32r0':
# this is a workaround for a bug with the most
# common auto reset circuit and Windows, if the EN
# pin on the dev board does not have enough
# capacitance. This workaround only works on
# revision 0 ESP32 chips, it exploits a silicon
# bug spurious watchdog reset.
#
# Details: https://github.com/espressif/esptool/issues/136
time.sleep(0.4) # allow watchdog reset to occur
time.sleep(0.05)
self._port.setDTR(False) # IO0=HIGH, done
self._port.timeout = 0.1
for _ in range(4):
try:
self.flush_input()
self._port.flushOutput()
self.sync()
self._port.timeout = 5
return
except FatalError as e:
print('.', end='')
sys.stdout.flush()
time.sleep(0.05)
last_error = e
last_error = self._connect_attempt(mode=mode, esp32r0_delay=False)
if last_error is None:
return
last_error = self._connect_attempt(mode=mode, esp32r0_delay=True)
if last_error is None:
return
finally:
print('') # end 'Connecting...' line
raise FatalError('Failed to connect to %s: %s' % (self.CHIP_NAME, last_error))
......@@ -653,8 +677,7 @@ class ESPLoader(object):
if data_bits == 0:
self.write_reg(SPI_W0_REG, 0) # clear data register before we read it
else:
if len(data) % 4 != 0: # pad to 32-bit multiple
data += b'\0' * (4 - (len(data) % 4))
data = pad_to(data, 4, b'\00') # pad to 32-bit multiple
words = struct.unpack("I" * (len(data) // 4), data)
next_reg = SPI_W0_REG
for word in words:
......@@ -901,11 +924,11 @@ class ESP32ROM(ESPLoader):
def read_mac(self):
""" Read MAC from EFUSE region """
words = [self.read_efuse(1), self.read_efuse(2)]
words = [self.read_efuse(2), self.read_efuse(1)]
bitstring = struct.pack(">II", *words)
bitstring = bitstring[:6] # trim 2 byte CRC
bitstring = bitstring[2:8] # trim the 2 byte CRC
try:
return tuple(ord(b) for b in bitstring) # trim 2 byte CRC
return tuple(ord(b) for b in bitstring)
except TypeError: # Python 3, bitstring elements are already bytes
return tuple(bitstring)
......@@ -964,10 +987,7 @@ class ImageSegment(object):
def __init__(self, addr, data, file_offs=None):
self.addr = addr
# pad all ImageSegments to at least 4 bytes length
pad_mod = len(data) % 4
if pad_mod != 0:
data += b"\x00" * (4 - pad_mod)
self.data = data
self.data = pad_to(data, 4, b'\x00')
self.file_offs = file_offs
self.include_in_checksum = True
......@@ -1210,15 +1230,13 @@ class ESP32FirmwareImage(BaseFirmwareImage):
self.flash_mode = 0
self.flash_size_freq = 0
self.version = 1
self.encrypt_flag = False
if load_file is not None:
segments = self.load_common_header(load_file, ESPLoader.ESP_IMAGE_MAGIC)
additional_header = list(struct.unpack("B" * 16, load_file.read(16)))
self.encrypt_flag = (additional_header[0] == 0x01)
# check remaining 14 bytes are unused
if additional_header[2:] != [0] * 14:
# check these bytes are unused
if additional_header != [0] * 16:
print("WARNING: ESP32 image header contains unknown flags. Possibly this image is from a newer version of esptool.py")
for _ in range(segments):
......@@ -1241,9 +1259,9 @@ class ESP32FirmwareImage(BaseFirmwareImage):
with open(filename, 'wb') as f:
self.write_common_header(f, self.segments)
f.write(b'\x01' if self.encrypt_flag else b'\x00')
# remaining 15 bytes of header are unused
f.write(b'\x00' * 15)
# first 4 bytes of header are read by ROM bootloader for SPI
# config, but currently unused
f.write(b'\x00' * 16)
checksum = ESPLoader.ESP_CHECKSUM_MAGIC
last_addr = None
......@@ -1464,6 +1482,14 @@ def unhexify(hs):
return s
def pad_to(data, alignment, pad_character=b'\xFF'):
""" Pad to the next alignment boundary """
pad_mod = len(data) % alignment
if pad_mod != 0:
data += pad_character * (alignment - pad_mod)
return data
class FatalError(RuntimeError):
"""
Wrapper class for runtime errors that aren't caused by internal bugs, but by
......@@ -1590,7 +1616,7 @@ def write_flash(esp, args):
for address, argfile in args.addr_filename:
if args.no_stub:
print('Erasing flash...')
image = argfile.read()
image = pad_to(argfile.read(), 4)
image = _update_image_flash_params(esp, address, flash_params, image)
calcmd5 = hashlib.md5(image).hexdigest()
uncsize = len(image)
......@@ -1689,10 +1715,6 @@ def elf2image(args):
print("Creating image for ESP8266...")
args.chip == 'esp8266'
if args.chip != 'esp32':
if args.set_encrypt_flag:
raise FatalError("--encrypt-flag only applies to ESP32 images")
if args.chip == 'esp32':
image = ESP32FirmwareImage()
elif args.version == '1': # ESP8266
......@@ -1704,7 +1726,6 @@ def elf2image(args):
image.flash_mode = {'qio':0, 'qout':1, 'dio':2, 'dout': 3}[args.flash_mode]
image.flash_size_freq = image.ROM_LOADER.FLASH_SIZES[args.flash_size]
image.flash_size_freq += {'40m':0, '26m':1, '20m':2, '80m': 0xf}[args.flash_freq]
image.encrypt_flag = args.set_encrypt_flag
if args.output is None:
args.output = image.default_output_name(args.input)
......@@ -1776,7 +1797,7 @@ def _verify_flash(esp, args):
flash_params = _get_flash_params(esp, args)
for address, argfile in args.addr_filename:
image = argfile.read()
image = pad_to(argfile.read(), 4)
argfile.seek(0) # rewind in case we need it again
image = _update_image_flash_params(esp, address, flash_params, image)
......@@ -1853,7 +1874,7 @@ def main():
parser.add_argument(
'--before',
help='What to do before connecting to the chip',
choices=['default_reset', 'no_reset', 'esp32r0'],
choices=['default_reset', 'no_reset'],
default=os.environ.get('ESPTOOL_BEFORE', 'default_reset'))
parser.add_argument(
......@@ -1946,7 +1967,6 @@ def main():
parser_elf2image.add_argument('input', help='Input ELF file')
parser_elf2image.add_argument('--output', '-o', help='Output filename prefix (for version 1 image), or filename (for version 2 single image)', type=str)
parser_elf2image.add_argument('--version', '-e', help='Output image version', choices=['1','2'], default='1')
parser_elf2image.add_argument('--set-encrypt-flag', help='Flag image to be encrypted by bootloader after flashing.', action="store_true")
add_spi_flash_subparsers(parser_elf2image)
......@@ -2152,6 +2172,19 @@ class AddrFilenamePairAction(argparse.Action):
except IndexError:
raise argparse.ArgumentError(self,'Must be pairs of an address and the binary filename to write there')
pairs.append((address, argfile))
# Sort the addresses and check for overlapping
end = 0
for address, argfile in sorted(pairs):
argfile.seek(0,2) # seek to end
size = argfile.tell()
argfile.seek(0)
sector_start = address & ~(ESPLoader.FLASH_SECTOR_SIZE - 1)
sector_end = ((address + size + ESPLoader.FLASH_SECTOR_SIZE - 1) & ~(ESPLoader.FLASH_SECTOR_SIZE - 1)) - 1
if sector_start < end:
message = 'Detected overlap at address: 0x%x for file: %s' % (address, argfile.name)
raise argparse.ArgumentError(self, message)
end = sector_end
setattr(namespace, self.dest, pairs)
......
......@@ -27,57 +27,76 @@ extern "C"
{
#endif
#define OTA_SIZE_UNKNOWN 0xffffffff
#define OTA_SIZE_UNKNOWN 0xffffffff /*!< Used for esp_ota_begin() if new image size is unknown */
#define ESP_ERR_OTA_BASE 0x1500 /*!< base error code for ota_ops api */
#define ESP_ERR_OTA_PARTITION_CONFLICT (ESP_ERR_OTA_BASE + 0x01) /*!< want to write or erase current running partition */
#define ESP_ERR_OTA_SELECT_INFO_INVALID (ESP_ERR_OTA_BASE + 0x02) /*!< ota data partition info is error */
#define ESP_ERR_OTA_VALIDATE_FAILED (ESP_ERR_OTA_BASE + 0x03) /*!< validate ota image failed */
#define ESP_ERR_OTA_BASE 0x1500 /*!< Base error code for ota_ops api */
#define ESP_ERR_OTA_PARTITION_CONFLICT (ESP_ERR_OTA_BASE + 0x01) /*!< Error if request was to write or erase the current running partition */
#define ESP_ERR_OTA_SELECT_INFO_INVALID (ESP_ERR_OTA_BASE + 0x02) /*!< Error if OTA data partition contains invalid content */
#define ESP_ERR_OTA_VALIDATE_FAILED (ESP_ERR_OTA_BASE + 0x03) /*!< Error if OTA app image is invalid */
/**
* @brief Opaque handle for application update obtained from app_ops.
* @brief Opaque handle for an application OTA update
*
* esp_ota_begin() returns a handle which is then used for subsequent
* calls to esp_ota_write() and esp_ota_end().
*/
typedef uint32_t esp_ota_handle_t;
/**
* @brief format input partition in flash to 0xFF as input image size,
* if unkown image size ,pass 0x0 or 0xFFFFFFFF, it will erase all the
* partition ,Otherwise, erase the required range
*
* @param partition Pointer to partition structure which need to be updated
* Must be non-NULL.
* @param image_size size of image need to be updated
* @param out_handle handle which should be used for esp_ota_write or esp_ota_end call
* @return:
* - ESP_OK: if format ota image OK
* - ESP_ERR_OTA_PARTITION_CONFLICT: operate current running bin
* - ESP_ERR_OTA_SELECT_INFO_INVALID: ota bin select info invalid
* @brief Commence an OTA update writing to the specified partition.
* The specified partition is erased to the specified image size.
*
* If image size is not yet known, pass OTA_SIZE_UNKNOWN which will
* cause the entire partition to be erased.
*
* On success, this function allocates memory that remains in use
* until esp_ota_end() is called with the returned handle.
*
* @param partition Pointer to info for partition which will receive the OTA update. Required.
* @param image_size Size of new OTA app image. Partition will be erased in order to receive this size of image. If 0 or OTA_SIZE_UNKNOWN, the entire partition is erased.
* @param out_handle On success, returns a handle which should be used for subsequent esp_ota_write() and esp_ota_end() calls.
* @return
* - ESP_OK: OTA operation commenced successfully.
* - ESP_ERR_INVALID_ARG: partition or out_handle arguments were NULL, or partition doesn't point to an OTA app partition.
* - ESP_ERR_NO_MEM: Cannot allocate memory for OTA operation.
* - ESP_ERR_OTA_PARTITION_CONFLICT: Partition holds the currently running firmware, cannot update in place.
* - ESP_ERR_NOT_FOUND: Partition argument not found in partition table.
* - ESP_ERR_OTA_SELECT_INFO_INVALID: The OTA data partition contains invalid data.
* - ESP_ERR_INVALID_SIZE: Partition doesn't fit in configured flash size.
* - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
*/
esp_err_t esp_ota_begin(const esp_partition_t* partition, size_t image_size, esp_ota_handle_t* out_handle);
/**
* @brief Write data to input input partition
* @brief Write OTA update data to partition
*
* This function can be called multiple times as
* data is received during the OTA operation. Data is written
* sequentially to the partition.
*
* @param handle Handle obtained from esp_ota_begin
* @param data Pointer to data write to flash
* @param size data size of recieved data
* @param handle Handle obtained from esp_ota_begin
* @param data Data buffer to write
* @param size Size of data buffer in bytes.
*
* @return:
* - ESP_OK: if write flash data OK
* - ESP_ERR_OTA_PARTITION_CONFLICT: operate current running bin
* - ESP_ERR_OTA_SELECT_INFO_INVALID: ota bin select info invalid
* @return
* - ESP_OK: Data was written to flash successfully.
* - ESP_ERR_INVALID_ARG: handle is invalid.
* - ESP_ERR_OTA_VALIDATE_FAILED: First byte of image contains invalid app image magic byte.
* - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash write failed.
* - ESP_ERR_OTA_SELECT_INFO_INVALID: OTA data partition has invalid contents
*/
esp_err_t esp_ota_write(esp_ota_handle_t handle, const void* data, size_t size);
/**
* @brief Finish the update and validate written data
* @brief Finish OTA update and validate newly written app image.
*
* @param handle Handle obtained from esp_ota_begin.
* @param handle Handle obtained from esp_ota_begin().
*
* @note After calling esp_ota_end(), the handle is no longer valid and any memory associated with it is freed (regardless of result).
*
* @return:
* @return
* - ESP_OK: Newly written OTA app image is valid.
* - ESP_ERR_NOT_FOUND: OTA handle was not found.
* - ESP_ERR_INVALID_ARG: Handle was never written to.
......@@ -87,27 +106,61 @@ esp_err_t esp_ota_write(esp_ota_handle_t handle, const void* data, size_t size);
esp_err_t esp_ota_end(esp_ota_handle_t handle);
/**
* @brief Set next boot partition, call system_restart() will switch to run it
* @brief Configure OTA data for a new boot partition
*
* @note if you want switch to run a bin file
* has never been checked before,please validate it's signature firstly
* @note If this function returns ESP_OK, calling esp_restart() will boot the newly configured app partition.
*
* @param partition Pointer to partition structure which need to boot
* @param partition Pointer to info for partition containing app image to boot.
*
* @return:
* - ESP_OK: if set next boot partition OK
* - ESP_ERR_OTA_SELECT_INFO_INVALID: ota bin select info invalid
* @return
* - ESP_OK: OTA data updated, next reboot will use specified partition.
* - ESP_ERR_INVALID_ARG: partition argument was NULL or didn't point to a valid OTA partition of type "app".
* - ESP_ERR_OTA_VALIDATE_FAILED: Partition contained invalid app image. Also returned if secure boot is enabled and signature validation failed.
* - ESP_ERR_NOT_FOUND: OTA data partition not found.
* - ESP_ERR_FLASH_OP_TIMEOUT or ESP_ERR_FLASH_OP_FAIL: Flash erase or write failed.
*/
esp_err_t esp_ota_set_boot_partition(const esp_partition_t* partition);
/**
* @brief Get partition info of current running image
*
* @return pointer to esp_partition_t structure, or NULL if no partition is found or
* operate flash failed,This pointer is valid for the lifetime of the application.
* @brief Get partition info of currently configured boot app
*
* If esp_ota_set_boot_partition() has been called, the partition which was set by that function will be returned.
*
* If esp_ota_set_boot_partition() has not been called, the result is
* equivalent to esp_ota_get_running_partition().
*
* @return Pointer to info for partition structure, or NULL if no partition is found or flash read operation failed. Returned pointer is valid for the lifetime of the application.
*/
const esp_partition_t* esp_ota_get_boot_partition(void);
/**
* @brief Get partition info of currently running app
*
* This function is different to esp_ota_get_boot_partition() in that
* it ignores any change of selected boot partition caused by
* esp_ota_set_boot_partition(). Only the app whose code is currently
* running will have its partition information returned.
*
* @return Pointer to info for partition structure, or NULL if no partition is found or flash read operation failed. Returned pointer is valid for the lifetime of the application.
*/
const esp_partition_t* esp_ota_get_running_partition(void);
/**
* @brief Return the next OTA app partition which should be written with a new firmware.
*
* Call this function to find an OTA app partition which can be passed to esp_ota_begin().
*
* Finds next partition round-robin, starting from the current running partition.
*
* @param start_from If set, treat this partition info as describing the current running partition. Can be NULL, in which case esp_ota_get_running_partition() is used to find the currently running partition. The result of this function is never the same as this argument.
*
* @return Pointer to info for partition which should be updated next. NULL result indicates invalid OTA data partition, or that no eligible OTA app slot partition was found.
*
*/
const esp_partition_t* esp_ota_get_next_update_partition(const esp_partition_t *start_from);
#ifdef __cplusplus
}
#endif
......
......@@ -400,6 +400,8 @@ typedef struct {
typedef void (tBTA_SET_ADV_DATA_CMPL_CBACK) (tBTA_STATUS status);
typedef void (tBTA_START_ADV_CMPL_CBACK) (tBTA_STATUS status);
/* advertising channel map */
#define BTA_BLE_ADV_CHNL_37 BTM_BLE_ADV_CHNL_37
#define BTA_BLE_ADV_CHNL_38 BTM_BLE_ADV_CHNL_38
......@@ -1095,6 +1097,8 @@ typedef void (tBTA_BLE_SCAN_SETUP_CBACK) (tBTA_BLE_BATCH_SCAN_EVT evt,
tBTA_DM_BLE_REF_VALUE ref_value,
tBTA_STATUS status);
typedef void (tBTA_START_SCAN_CMPL_CBACK) (tBTA_STATUS status);
typedef void (tBTA_BLE_TRACK_ADV_CMPL_CBACK)(int action, tBTA_STATUS status,
tBTA_DM_BLE_PF_AVBL_SPACE avbl_space,
tBTA_DM_BLE_REF_VALUE ref_value);
......@@ -1891,7 +1895,7 @@ extern void BTA_DmSetBleAdvParams (UINT16 adv_int_min, UINT16 adv_int_max,
extern void BTA_DmSetBleAdvParamsAll (UINT16 adv_int_min, UINT16 adv_int_max,
UINT8 adv_type, tBLE_ADDR_TYPE addr_type_own,
tBTM_BLE_ADV_CHNL_MAP chnl_map, tBTM_BLE_AFP adv_fil_pol,
tBLE_BD_ADDR *p_dir_bda);
tBLE_BD_ADDR *p_dir_bda, tBTA_START_ADV_CMPL_CBACK p_start_adv_cb);
/*******************************************************************************
......@@ -1997,7 +2001,8 @@ extern void BTA_DmSetEncryption(BD_ADDR bd_addr, tBTA_TRANSPORT transport,
**
*******************************************************************************/
extern void BTA_DmBleObserve(BOOLEAN start, UINT8 duration,
tBTA_DM_SEARCH_CBACK *p_results_cb);
tBTA_DM_SEARCH_CBACK *p_results_cb,
tBTA_START_SCAN_CMPL_CBACK *p_start_scan_cb);
extern void BTA_DmBleStopAdvertising(void);
......
......@@ -46,6 +46,8 @@ typedef enum {
ESP_GAP_BLE_SCAN_RESULT_EVT, /*!< When one scan result ready, the event comes each time */
ESP_GAP_BLE_ADV_DATA_RAW_SET_COMPLETE_EVT, /*!< When raw advertising data set complete, the event comes */
ESP_GAP_BLE_SCAN_RSP_DATA_RAW_SET_COMPLETE_EVT, /*!< When raw advertising data set complete, the event comes */
ESP_GAP_BLE_ADV_START_COMPLETE_EVT, /*!< When start advertising complete, the event comes */
ESP_GAP_BLE_SCAN_START_COMPLETE_EVT, /*!< When start scan complete, the event comes */
} esp_gap_ble_cb_event_t;
/// Advertising data maximum length
......@@ -284,6 +286,18 @@ typedef union {
struct ble_scan_rsp_data_raw_cmpl_evt_param {
esp_bt_status_t status; /*!< Indicate the set raw advertising data operation success status */
} scan_rsp_data_raw_cmpl; /*!< Event parameter of ESP_GAP_BLE_SCAN_RSP_DATA_RAW_SET_COMPLETE_EVT */
/**
* @brief ESP_GAP_BLE_ADV_START_COMPLETE_EVT
*/
struct ble_adv_start_cmpl_evt_param {
esp_bt_status_t status; /*!< Indicate advertising start operation success status */
} adv_start_cmpl; /*!< Event parameter of ESP_GAP_BLE_ADV_START_COMPLETE_EVT */
/**
* @brief ESP_GAP_BLE_SCAN_START_COMPLETE_EVT
*/
struct ble_scan_start_cmpl_evt_param {
esp_bt_status_t status; /*!< Indicate scan start operation success status */
} scan_start_cmpl; /*!< Event parameter of ESP_GAP_BLE_SCAN_START_COMPLETE_EVT */
} esp_ble_gap_cb_param_t;
/**
......
......@@ -20,7 +20,7 @@
#include "freertos/FreeRTOS.h"
#include "freertos/queue.h"
#include "freertos/task.h"
#include "esp_task.h"
#include "bt_defs.h"
#define portBASE_TYPE int
......@@ -43,25 +43,25 @@ enum {
SIG_BTIF_WORK = 0xff
};
#define HCI_HOST_TASK_STACK_SIZE 1500
#define HCI_HOST_TASK_PRIO (configMAX_PRIORITIES - 2)
#define HCI_HOST_TASK_NAME "hciHostT"
#define HCI_HOST_QUEUE_NUM 40
#define HCI_HOST_TASK_STACK_SIZE (2048 + BT_TASK_EXTRA_STACK_SIZE)
#define HCI_HOST_TASK_PRIO (configMAX_PRIORITIES - 2)
#define HCI_HOST_TASK_NAME "hciHostT"
#define HCI_HOST_QUEUE_NUM 40
#define HCI_H4_TASK_STACK_SIZE 1500
#define HCI_H4_TASK_PRIO (configMAX_PRIORITIES - 3)
#define HCI_H4_TASK_NAME "hciH4T"
#define HCI_H4_QUEUE_NUM 60
#define HCI_H4_TASK_STACK_SIZE (2048 + BT_TASK_EXTRA_STACK_SIZE)
#define HCI_H4_TASK_PRIO (configMAX_PRIORITIES - 3)
#define HCI_H4_TASK_NAME "hciH4T"
#define HCI_H4_QUEUE_NUM 60
#define BTU_TASK_STACK_SIZE 4096
#define BTU_TASK_PRIO (configMAX_PRIORITIES - 4)
#define BTU_TASK_NAME "btuT"
#define BTU_QUEUE_NUM 50
#define BTU_TASK_STACK_SIZE (3584 + BT_TASK_EXTRA_STACK_SIZE)
#define BTU_TASK_PRIO (configMAX_PRIORITIES - 4)
#define BTU_TASK_NAME "btuT"
#define BTU_QUEUE_NUM 50
#define BTC_TASK_STACK_SIZE CONFIG_BTC_TASK_STACK_SIZE //by menuconfig
#define BTC_TASK_NAME "btcT"
#define BTC_TASK_PRIO (configMAX_PRIORITIES - 5)
#define BTC_TASK_QUEUE_NUM 20
#define BTC_TASK_STACK_SIZE (CONFIG_BTC_TASK_STACK_SIZE + BT_TASK_EXTRA_STACK_SIZE) //by menuconfig
#define BTC_TASK_NAME "btcT"
#define BTC_TASK_PRIO (configMAX_PRIORITIES - 5)
#define BTC_TASK_QUEUE_NUM 20
void btu_task_post(uint32_t sig);
void hci_host_task_post(void);
......
......@@ -7,7 +7,9 @@
#define CONFIG_ESP32_PHY_MAX_TX_POWER 20
#define CONFIG_PHY_ENABLED 1
#define CONFIG_TRACEMEM_RESERVE_DRAM 0x0
#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE 1
#define CONFIG_FOUR_MAC_ADDRESS_FROM_EFUSE 1
#define CONFIG_ESPTOOLPY_FLASHSIZE_4MB 1
#define CONFIG_ESPTOOLPY_FLASHFREQ "80m"
#define CONFIG_NEWLIB_STDOUT_ADDCR 1
......@@ -18,6 +20,7 @@
#define CONFIG_INT_WDT 1
#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1
#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 10
#define CONFIG_BT_RESERVE_DRAM 0x10000
#define CONFIG_LOG_BOOTLOADER_LEVEL_ERROR 1
#define CONFIG_CONSOLE_UART_BAUDRATE 115200
......@@ -28,6 +31,7 @@
#define CONFIG_INT_WDT_CHECK_CPU1 1
#define CONFIG_ESPTOOLPY_AFTER_RESET 1
#define CONFIG_TOOLPREFIX "xtensa-esp32-elf-"
#define CONFIG_ESP32_WIFI_AMPDU_ENABLED 1
#define CONFIG_CONSOLE_UART_NUM 0
#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC 1
#define CONFIG_LWIP_THREAD_LOCAL_STORAGE_INDEX 0
......@@ -46,10 +50,11 @@
#define CONFIG_BTC_TASK_STACK_SIZE 2048
#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
#define CONFIG_LOG_DEFAULT_LEVEL 1
#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 0
#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER 20
#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
#define CONFIG_ULP_COPROC_ENABLED 1
#define CONFIG_DMA_RX_BUF_NUM 10
#define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
#define CONFIG_TCP_SYNMAXRTX 6
#define CONFIG_PYTHON "python"
#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 1
......@@ -57,12 +62,15 @@
#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
#define CONFIG_NUMBER_OF_MAC_ADDRESS_GENERATED_FROM_EFUSE 4
#define CONFIG_WIFI_ENABLED 1
#define CONFIG_FLASHMODE_QIO 1
#define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1
#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE 2048
#define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY 0
#define CONFIG_PHY_DATA_OFFSET 0xf000
#define CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET 0x10000
#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM 32
#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ 240
#define CONFIG_MBEDTLS_HARDWARE_AES 1
#define CONFIG_FREERTOS_HZ 1000
......@@ -88,7 +96,6 @@
#define CONFIG_OPENSSL_ASSERT_DO_NOTHING 1
#define CONFIG_OPTIMIZATION_LEVEL_DEBUG 1
#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE 32
#define CONFIG_ESP32_WIFI_RX_BUFFER_NUM 25
#define CONFIG_ESPTOOLPY_BAUD_921600B 1
#define CONFIG_APP_OFFSET 0x10000
#define CONFIG_MEMMAP_SMP 1
......
......@@ -50,10 +50,12 @@ extern "C" {
typedef struct {
gpio_num_t gpio_cd; ///< GPIO number of card detect signal
gpio_num_t gpio_wp; ///< GPIO number of write protect signal
uint8_t width; ///< Bus width used by the slot (might be less than the max width supported)
} sdmmc_slot_config_t;
#define SDMMC_SLOT_NO_CD ((gpio_num_t) -1) ///< indicates that card detect line is not used
#define SDMMC_SLOT_NO_WP ((gpio_num_t) -1) ///< indicates that write protect line is not used
#define SDMMC_SLOT_WIDTH_DEFAULT 0 ///< use the default width for the slot (8 for slot 0, 4 for slot 1)
/**
* Macro defining default configuration of SDMMC host slot
......@@ -61,6 +63,7 @@ typedef struct {
#define SDMMC_SLOT_CONFIG_DEFAULT() {\
.gpio_cd = SDMMC_SLOT_NO_CD, \
.gpio_wp = SDMMC_SLOT_NO_WP, \
.width = SDMMC_SLOT_WIDTH_DEFAULT, \
}
/**
......
......@@ -478,7 +478,8 @@ esp_err_t uart_intr_config(uart_port_t uart_num, const uart_intr_config_t *intr_
* @param uart_queue UART event queue handle (out param). On success, a new queue handle is written here to provide
* access to UART events. If set to NULL, driver will not use an event queue.
* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info. Do not set ESP_INTR_FLAG_IRAM here
* (the driver's ISR handler is not located in IRAM)
*
* @return
* - ESP_OK Success
......
......@@ -17,6 +17,7 @@
#include <stdint.h>
#include "esp_err.h"
#include "driver/gpio.h"
#include "driver/touch_pad.h"
#ifdef __cplusplus
extern "C" {
......@@ -50,12 +51,28 @@ typedef enum {
ESP_PD_OPTION_AUTO //!< Keep power domain enabled in deep sleep, if it is needed by one of the wakeup options. Otherwise power it down.
} esp_deep_sleep_pd_option_t;
/**
* @brief Deep sleep wakeup cause
*/
typedef enum {
ESP_DEEP_SLEEP_WAKEUP_UNDEFINED, //! Wakeup was not caused by deep sleep
ESP_DEEP_SLEEP_WAKEUP_EXT0, //! Wakeup caused by external signal using RTC_IO
ESP_DEEP_SLEEP_WAKEUP_EXT1, //! Wakeup caused by external signal using RTC_CNTL
ESP_DEEP_SLEEP_WAKEUP_TIMER, //! Wakeup caused by timer
ESP_DEEP_SLEEP_WAKEUP_TOUCHPAD, //! Wakeup caused by touchpad
ESP_DEEP_SLEEP_WAKEUP_ULP, //! Wakeup caused by ULP program
} esp_deep_sleep_wakeup_cause_t;
/**
* @brief Enable wakeup by ULP coprocessor
* @note In revisions 0 and 1 of the ESP32, ULP wakeup source
* can not be used when RTC_PERIPH power domain is forced
* to be powered on (ESP_PD_OPTION_ON) or when ext0 wakeup
* source is used.
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled.
* - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled or if wakeup triggers conflict
*/
esp_err_t esp_deep_sleep_enable_ulp_wakeup();
......@@ -68,6 +85,29 @@ esp_err_t esp_deep_sleep_enable_ulp_wakeup();
*/
esp_err_t esp_deep_sleep_enable_timer_wakeup(uint64_t time_in_us);
/**
* @brief Enable wakeup by touch sensor
*
* @note In revisions 0 and 1 of the ESP32, touch wakeup source
* can not be used when RTC_PERIPH power domain is forced
* to be powered on (ESP_PD_OPTION_ON) or when ext0 wakeup
* source is used.
*
* @return
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if wakeup triggers conflict
*/
esp_err_t esp_deep_sleep_enable_touchpad_wakeup();
/**
* @brief Get the touch pad which caused wakeup
*
* If wakeup was caused by another source, this function will return TOUCH_PAD_MAX;
*
* @return touch pad which caused wakeup
*/
touch_pad_t esp_deep_sleep_get_touchpad_wakeup_status();
/**
* @brief Enable wakeup using a pin
*
......@@ -81,6 +121,9 @@ esp_err_t esp_deep_sleep_enable_timer_wakeup(uint64_t time_in_us);
* configured in esp_deep_sleep_start, immediately before
* entering deep sleep.
*
* @note In revisions 0 and 1 of the ESP32, ext0 wakeup source
* can not be used together with touch or ULP wakeup sources.
*
* @param gpio_num GPIO number used as wakeup source. Only GPIOs which are have RTC
* functionality can be used: 0,2,4,12-15,25-27,32-39.
* @param level input level which will trigger wakeup (0=low, 1=high)
......@@ -88,6 +131,7 @@ esp_err_t esp_deep_sleep_enable_timer_wakeup(uint64_t time_in_us);
* - ESP_OK on success
* - ESP_ERR_INVALID_ARG if the selected GPIO is not an RTC GPIO,
* or the mode is invalid
* - ESP_ERR_INVALID_STATE if wakeup triggers conflict
*/
esp_err_t esp_deep_sleep_enable_ext0_wakeup(gpio_num_t gpio_num, int level);
......@@ -188,6 +232,15 @@ void esp_deep_sleep(uint64_t time_in_us) __attribute__((noreturn));
*/
void system_deep_sleep(uint64_t time_in_us) __attribute__((noreturn, deprecated));
/**
* @brief Get the source which caused deep sleep wakeup
*
* @return wakeup cause, or ESP_DEEP_SLEEP_WAKEUP_UNDEFINED if reset reason is other than deep sleep reset.
*/
esp_deep_sleep_wakeup_cause_t esp_deep_sleep_get_wakeup_cause();
/**
* @brief Default stub to run on wake from deep sleep.
*
......
......@@ -11,10 +11,10 @@
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef __ESP_ERR_H__
#define __ESP_ERR_H__
#pragma once
#include <stdint.h>
#include <stdio.h>
#include <assert.h>
#ifdef __cplusplus
......@@ -40,15 +40,38 @@ typedef int32_t esp_err_t;
#define ESP_ERR_WIFI_BASE 0x3000 /*!< Starting number of WiFi error codes */
void _esp_error_check_failed(esp_err_t rc, const char *file, int line, const char *function, const char *expression) __attribute__((noreturn));
#ifndef __ASSERT_FUNC
/* This won't happen on IDF, which defines __ASSERT_FUNC in assert.h, but it does happen when building on the host which
uses /usr/include/assert.h or equivalent.
*/
#ifdef __ASSERT_FUNCTION
#define __ASSERT_FUNC __ASSERT_FUNCTION /* used in glibc assert.h */
#else
#define __ASSERT_FUNC "??"
#endif
#endif
/**
* Macro which can be used to check the error code,
* and terminate the program in case the code is not ESP_OK.
* Prints the failed statement to serial output.
* Prints the error code, error location, and the failed statement to serial output.
*
* Disabled if assertions are disabled.
*/
#define ESP_ERROR_CHECK(x) do { esp_err_t rc = (x); if (rc != ESP_OK) { assert(0 && #x);} } while(0);
#ifdef NDEBUG
#define ESP_ERROR_CHECK(x) do { (x); } while (0)
#else
#define ESP_ERROR_CHECK(x) do { \
esp_err_t rc = (x); \
if (rc != ESP_OK) { \
_esp_error_check_failed(rc, __FILE__, __LINE__, \
__ASSERT_FUNC, #x); \
} \
} while(0);
#endif
#ifdef __cplusplus
}
#endif
#endif /* __ESP_ERR_H__ */
......@@ -24,6 +24,17 @@
extern "C" {
#endif
typedef enum {
ESP_MAC_WIFI_STA,
ESP_MAC_WIFI_SOFTAP,
ESP_MAC_BT,
ESP_MAC_ETH,
} esp_mac_type_t;
#define TWO_MAC_ADDRESS_FROM_EFUSE 2
#define FOUR_MAC_ADDRESS_FROM_EFUSE 4
#define NUM_MAC_ADDRESS_FROM_EFUSE CONFIG_NUMBER_OF_MAC_ADDRESS_GENERATED_FROM_EFUSE
/**
* @attention application don't need to call this function anymore. It do nothing and will
* be removed in future version.
......@@ -115,6 +126,47 @@ esp_err_t esp_efuse_read_mac(uint8_t* mac);
*/
esp_err_t system_efuse_read_mac(uint8_t mac[6]) __attribute__ ((deprecated));
/**
* @brief Read hardware MAC address and set MAC address of the interface.
*
* This function first reads hardware MAC address from efuse. Then set the MAC address of the interface
* including wifi station, wifi softap, bluetooth and ethernet.
*
* @param mac MAC address of the interface, length: 6 bytes.
* @param type type of MAC address, 0:wifi station, 1:wifi softap, 2:bluetooth, 3:ethernet.
*
* @return ESP_OK on success
*/
esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type);
/**
* @brief Derive MAC address.
*
* This function derives a local MAC address from an universal MAC address.
* Addresses can either be universally administered addresses or locally administered addresses.
* A universally administered address is uniquely assigned to a device by its manufacturer.
* The first three octets (in transmission order) identify the organization that issued the identifier
* and are known as the Organizationally Unique Identifier (OUI).[4] The remainder of the address
* (three octets for MAC-48 and EUI-48 or five for EUI-64) are assigned by that organization in nearly
* any manner they please, subject to the constraint of uniqueness. A locally administered address is
* assigned to a device by a network administrator, overriding the burned-in address.
* Universally administered and locally administered addresses are distinguished by setting
* the second-least-significant bit of the first octet of the address. This bit is also referred to
* as the U/L bit, short for Universal/Local, which identifies how the address is administered.
* If the bit is 0, the address is universally administered. If it is 1, the address is locally administered.
* In the example address 06-00-00-00-00-00 the first octet is 06 (hex), the binary form of which is 00000110,
* where the second-least-significant bit is 1. Therefore, it is a locally administered address.[7] Consequently,
* this bit is 0 in all OUIs.
* In ESP32, universal MAC address is generated from the hardware MAC address in efuse.
* Local MAC address is derived from the universal MAC address.
*
* @param dst_mac Derived local MAC address, length: 6 bytes.
* @param src_mac Source universal MAC address, length: 6 bytes.
*
* @return ESP_OK on success
*/
esp_err_t esp_derive_mac(uint8_t* dst_mac, const uint8_t* src_mac);
/**
* Get SDK version
*
......
......@@ -31,22 +31,16 @@
#define ESP_TASK_PRIO_MAX (configMAX_PRIORITIES)
#define ESP_TASK_PRIO_MIN (0)
/* Wifi library task */
#define ESP_TASKD_WATCHDOG_PRIO (ESP_TASK_PRIO_MAX - 1)
#define ESP_TASKD_WATCHDOG_STACK 2048
#define ESP_TASK_WPA2_PRIO (ESP_TASK_PRIO_MAX - 1)
#define ESP_TASK_WPA2_STACK 2048
#define ESP_TASKD_WIFI_PRIO (ESP_TASK_PRIO_MAX - 2)
#define ESP_TASKD_WIFI_STACK 8196
#define ESP_TASKD_WIFI_TIMER_PRIO (ESP_TASK_PRIO_MAX - 3)
#define ESP_TASKD_WIFI_TIMER_STACK 2048
#define ESP_TASK_WPS_PRIO (ESP_TASK_PRIO_MIN + 2)
#define ESP_TASK_WPS_STACK 2048
/* Bt contoller Task */
/* controller */
#define ESP_TASK_BT_CONTROLLER_PRIO (ESP_TASK_PRIO_MAX - 1)
#define ESP_TASK_BT_CONTROLLER_STACK 4096
#ifdef CONFIG_NEWLIB_NANO_FORMAT
#define BT_TASK_EXTRA_STACK_SIZE (0)
#else
#define BT_TASK_EXTRA_STACK_SIZE (512)
#endif
#define ESP_TASK_BT_CONTROLLER_STACK (3584 + BT_TASK_EXTRA_STACK_SIZE)
/* idf task */
#define ESP_TASKD_EVENT_PRIO (ESP_TASK_PRIO_MAX - 5)
......
......@@ -94,14 +94,45 @@ extern "C" {
* @brief WiFi stack configuration parameters passed to esp_wifi_init call.
*/
typedef struct {
system_event_handler_t event_handler; /**< WiFi event handler */
uint32_t rx_buf_num; /**< WiFi RX buffer number */
system_event_handler_t event_handler; /**< WiFi event handler */
int static_rx_buf_num; /**< WiFi static RX buffer number */
int dynamic_rx_buf_num; /**< WiFi dynamic RX buffer number */
int dynamic_tx_buf_num; /**< WiFi dynamic TX buffer number */
int ampdu_enable; /**< WiFi AMPDU feature enable flag */
int nvs_enable; /**< WiFi NVS flash enable flag */
int nano_enable; /**< Nano option for printf/scan family enable flag */
int magic; /**< WiFi init magic number, it should be the last field */
} wifi_init_config_t;
#if CONFIG_ESP32_WIFI_AMPDU_ENABLED
#define WIFI_AMPDU_ENABLED 1
#else
#define WIFI_AMPDU_ENABLED 0
#endif
#if CONFIG_ESP32_WIFI_NVS_ENABLED
#define WIFI_NVS_ENABLED 1
#else
#define WIFI_NVS_ENABLED 0
#endif
#if CONFIG_NEWLIB_NANO_FORMAT
#define WIFI_NANO_FORMAT_ENABLED 1
#else
#define WIFI_NANO_FORMAT_ENABLED 0
#endif
#define WIFI_INIT_CONFIG_MAGIC 0x1F2F3F4F
#ifdef CONFIG_WIFI_ENABLED
#define WIFI_INIT_CONFIG_DEFAULT() { \
.event_handler = &esp_event_send, \
.rx_buf_num = CONFIG_ESP32_WIFI_RX_BUFFER_NUM, \
.static_rx_buf_num = CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM,\
.dynamic_rx_buf_num = CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM,\
.dynamic_tx_buf_num = CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM,\
.ampdu_enable = WIFI_AMPDU_ENABLED,\
.nvs_enable = WIFI_NVS_ENABLED,\
.nano_enable = WIFI_NANO_FORMAT_ENABLED,\
.magic = WIFI_INIT_CONFIG_MAGIC\
};
#else
#define WIFI_INIT_CONFIG_DEFAULT #error Wifi is disabled in config, WIFI_INIT_CONFIG_DEFAULT will not work
......@@ -113,8 +144,11 @@ typedef struct {
* WiFi NVS structure etc, this WiFi also start WiFi task
*
* @attention 1. This API must be called before all other WiFi API can be called
* @attention 2. event_handler field in cfg should be set to a valid event handler function.
* In most cases, use the WIFI_INIT_CONFIG_DEFAULT macro which sets esp_event_send().
* @attention 2. Always use WIFI_INIT_CONFIG_DEFAULT macro to init the config to default values, this can
* guarantee all the fields got correct value when more fields are added into wifi_init_config_t
* in future release. If you want to set your owner initial values, overwrite the default values
* which are set by WIFI_INIT_CONFIG_DEFAULT, please be notified that the field 'magic' of
* wifi_init_config_t should always be WIFI_INIT_CONFIG_MAGIC!
*
* @param config provide WiFi init configuration
*
......@@ -422,6 +456,7 @@ esp_err_t esp_wifi_get_bandwidth(wifi_interface_t ifx, wifi_bandwidth_t *bw);
* @brief Set primary/secondary channel of ESP32
*
* @attention 1. This is a special API for sniffer
* @attention 2. This API should be called after esp_wifi_start() or esp_wifi_set_promiscuous()
*
* @param primary for HT20, primary is the channel number, for HT40, primary is the primary channel
* @param second for HT20, second is ignored, for HT40, second is the second channel
......
......@@ -504,12 +504,25 @@ void SPI_Write_Encrypt_Disable(void);
* @param uint32_t len : Length to write, should be 32 bytes aligned.
*
* @return SPI_FLASH_RESULT_OK : Data written successfully.
* SPI_FLASH_RESULT_ERR : Encrypto write error.
* SPI_FLASH_RESULT_ERR : Encryption write error.
* SPI_FLASH_RESULT_TIMEOUT : Encrypto write timeout.
*/
SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, uint32_t *data, uint32_t len);
/** @brief Wait until SPI flash write operation is complete
*
* @note Please do not call this function in SDK.
*
* Reads the Write In Progress bit of the SPI flash status register,
* repeats until this bit is zero (indicating write complete).
*
* @return SPI_FLASH_RESULT_OK : Write is complete
* SPI_FLASH_RESULT_ERR : Error while reading status.
*/
SpiFlashOpResult SPI_Wait_Idle(SpiFlashChip *spi);
/** @brief Global SpiFlashChip structure used by ROM functions
*
*/
......
......@@ -36,16 +36,6 @@ static inline void *get_sp()
return sp;
}
/* Return true if the CPU is in an interrupt context
(PS.UM == 0)
*/
static inline bool cpu_in_interrupt_context(void)
{
uint32_t ps;
RSR(PS, ps);
return (ps & PS_UM) == 0;
}
/* Functions to set page attributes for Region Protection option in the CPU.
* See Xtensa ISA Reference manual for explanation of arguments (section 4.6.3.2).
*/
......
......@@ -1035,11 +1035,27 @@
#define DPORT_WIFI_CLK_EN_V 0xFFFFFFFF
#define DPORT_WIFI_CLK_EN_S 0
/* Mask for all Wifi clock bits - 0, 1, 2, 3, 6, 7, 8, 9, 10, 15 */
#define DPORT_WIFI_CLK_WIFI_EN 0x000007cf
#define DPORT_WIFI_CLK_WIFI_EN_M ((DPORT_WIFI_CLK_WIFI_EN_V)<<(DPORT_WIFI_CLK_WIFI_EN_S))
#define DPORT_WIFI_CLK_WIFI_EN_V 0x1FF
#define DPORT_WIFI_CLK_WIFI_EN_S 0
/* Mask for all Bluetooth clock bits - 11, 16, 17 */
#define DPORT_WIFI_CLK_BT_EN 0x61
#define DPORT_WIFI_CLK_BT_EN_M ((DPORT_WIFI_CLK_BT_EN_V)<<(DPORT_WIFI_CLK_BT_EN_S))
#define DPORT_WIFI_CLK_BT_EN_V 0x61
#define DPORT_WIFI_CLK_BT_EN_S 11
/* Remaining single bit clock masks */
#define DPORT_WIFI_CLK_SDIOSLAVE_EN BIT(4)
#define DPORT_WIFI_CLK_SDIO_HOST_EN BIT(13)
#define DPORT_WIFI_CLK_EMAC_EN BIT(14)
#define DPORT_WIFI_CLK_RNG_EN BIT(15)
#define DPORT_CORE_RST_EN_REG (DR_REG_DPORT_BASE + 0x0D0)
/* DPORT_CORE_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
/*description: */
#define DPROT_RW_BTLP_RST (BIT(10))
#define DPROT_RW_BTMAC_RST (BIT(9))
#define DPORT_RW_BTLP_RST (BIT(10))
#define DPORT_RW_BTMAC_RST (BIT(9))
#define DPORT_MACPWR_RST (BIT(8))
#define DPORT_EMAC_RST (BIT(7))
#define DPORT_SDIO_HOST_RST (BIT(6))
......
......@@ -88,7 +88,7 @@ static inline void __attribute__ ((deprecated)) PIN_PULLDWN_EN(uint32_t PIN_NAME
#define FUNC_GPIO0_GPIO0_0 0
#define PERIPHS_IO_MUX_U0TXD_U (DR_REG_IO_MUX_BASE +0x88)
#define FUNC_U0TXD_EMAC_RXD2 3
#define FUNC_U0TXD_EMAC_RXD2 5
#define FUNC_U0TXD_GPIO1 2
#define FUNC_U0TXD_CLK_OUT3 1
#define FUNC_U0TXD_U0TXD 0
......@@ -181,7 +181,7 @@ static inline void __attribute__ ((deprecated)) PIN_PULLDWN_EN(uint32_t PIN_NAME
#define PERIPHS_IO_MUX_MTMS_U (DR_REG_IO_MUX_BASE +0x30)
#define FUNC_MTMS_EMAC_TXD2 5
#define FUNC_MTMS_SD_CLK 4
#define FUNC_MTMS_HS2_CLk 3
#define FUNC_MTMS_HS2_CLK 3
#define FUNC_MTMS_GPIO14 2
#define FUNC_MTMS_HSPICLK 1
#define FUNC_MTMS_MTMS 0
......
......@@ -240,7 +240,7 @@
#define RTC_CNTL_TIME_VALID_S 30
/* frequency of RTC slow clock, Hz */
#define RTC_CTNL_SLOWCLK_FREQ 150000
#define RTC_CNTL_SLOWCLK_FREQ 150000
#define RTC_CNTL_TIME0_REG (DR_REG_RTCCNTL_BASE + 0x10)
/* RTC_CNTL_TIME_LO : RO ;bitpos:[31:0] ;default: 32'h0 ; */
......
......@@ -187,7 +187,7 @@
#define configAPPLICATION_ALLOCATED_HEAP 1
#define configTOTAL_HEAP_SIZE (&_heap_end - &_heap_start)//( ( size_t ) (64 * 1024) )
#define configMAX_TASK_NAME_LEN ( 16 )
#define configMAX_TASK_NAME_LEN ( CONFIG_FREERTOS_MAX_TASK_NAME_LEN )
#define configUSE_TRACE_FACILITY 0 /* Used by vTaskList in main.c */
#define configUSE_STATS_FORMATTING_FUNCTIONS 0 /* Used by vTaskList in main.c */
#define configUSE_TRACE_FACILITY_2 0 /* Provided by Xtensa port patch */
......
......@@ -194,6 +194,12 @@ void vPortYieldOtherCore( BaseType_t coreid) PRIVILEGED_FUNCTION;
*/
void vPortSetStackWatchpoint( void* pxStackStart );
/*
* Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
* aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
*/
BaseType_t xPortInIsrContext();
/*
* The structures and methods of manipulating the MPU are contained within the
* port layer.
......
......@@ -45,7 +45,7 @@ extern "C" {
#endif
/** period (in seconds) of the application calling dhcp_coarse_tmr() */
#define DHCP_COARSE_TIMER_SECS 60
#define DHCP_COARSE_TIMER_SECS 1
/** period (in milliseconds) of the application calling dhcp_coarse_tmr() */
#define DHCP_COARSE_TIMER_MSECS (DHCP_COARSE_TIMER_SECS * 1000UL)
/** period (in milliseconds) of the application calling dhcp_fine_tmr() */
......@@ -76,12 +76,12 @@ struct dhcp
struct dhcp_msg *msg_out; /* outgoing msg */
u16_t options_out_len; /* outgoing msg options length */
u16_t request_timeout; /* #ticks with period DHCP_FINE_TIMER_SECS for request timeout */
u16_t t1_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */
u16_t t2_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */
u16_t t1_renew_time; /* #ticks with period DHCP_COARSE_TIMER_SECS until next renew try */
u16_t t2_rebind_time; /* #ticks with period DHCP_COARSE_TIMER_SECS until next rebind try */
u16_t lease_used; /* #ticks with period DHCP_COARSE_TIMER_SECS since last received DHCP ack */
u16_t t0_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for lease time */
u32_t t1_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */
u32_t t2_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */
u32_t t1_renew_time; /* #ticks with period DHCP_COARSE_TIMER_SECS until next renew try */
u32_t t2_rebind_time; /* #ticks with period DHCP_COARSE_TIMER_SECS until next rebind try */
u32_t lease_used; /* #ticks with period DHCP_COARSE_TIMER_SECS since last received DHCP ack */
u32_t t0_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for lease time */
ip_addr_t server_ip_addr; /* dhcp server address that offered this lease (ip_addr_t because passed to UDP) */
ip4_addr_t offered_ip_addr;
ip4_addr_t offered_sn_mask;
......
......@@ -330,6 +330,10 @@ struct netif {
u16_t loop_cnt_current;
#endif /* LWIP_LOOPBACK_MAX_PBUFS */
#endif /* ENABLE_LOOPBACK */
#if ESP_LWIP
void (*l2_buffer_free_notify)(void *user_buf); /* Allows LWIP to notify driver when a L2-supplied pbuf can be freed */
#endif
};
#if LWIP_CHECKSUM_CTRL_PER_NETIF
......
......@@ -105,12 +105,6 @@ typedef enum {
/** indicates this pbuf includes a TCP FIN flag */
#define PBUF_FLAG_TCP_FIN 0x20U
#if ESP_LWIP
#define PBUF_USER_FLAG_OWNER_NULL 0
#define PBUF_USER_FLAG_OWNER_WIFI 1
#define PBUF_USER_FLAG_OWNER_ETH 2
#endif
struct pbuf {
/** next pbuf in singly linked pbuf chain */
struct pbuf *next;
......@@ -142,10 +136,10 @@ struct pbuf {
* the stack itself, or pbuf->next pointers from a chain.
*/
u16_t ref;
#if ESP_LWIP
void *user_buf;
u8_t user_flag;
struct netif *l2_owner;
void *l2_buf;
#endif
};
......
......@@ -602,6 +602,7 @@
#define ESP_LIGHT_SLEEP 1
#define ESP_L2_TO_L3_COPY CONFIG_L2_TO_L3_COPY
#define ESP_CNT_DEBUG 0
#define ESP_DHCP_TIMER 1
#define TCP_WND_DEFAULT (4*TCP_MSS)
#define TCP_SND_BUF_DEFAULT (2*TCP_MSS)
......
......@@ -602,6 +602,7 @@
#define ESP_LIGHT_SLEEP 1
#define ESP_L2_TO_L3_COPY CONFIG_L2_TO_L3_COPY
#define ESP_CNT_DEBUG 0
#define ESP_DHCP_TIMER 1
#define TCP_WND_DEFAULT (4*TCP_MSS)
#define TCP_SND_BUF_DEFAULT (2*TCP_MSS)
......
......@@ -29,6 +29,7 @@
#include MBEDTLS_CONFIG_FILE
#endif
#include "platform.h"
#include "bignum.h"
#include "ecp.h"
......
......@@ -63,7 +63,7 @@ typedef enum {
ESP_PARTITION_SUBTYPE_APP_OTA_13 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 13,//!< OTA partition 13
ESP_PARTITION_SUBTYPE_APP_OTA_14 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 14,//!< OTA partition 14
ESP_PARTITION_SUBTYPE_APP_OTA_15 = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 15,//!< OTA partition 15
ESP_PARTITION_SUBTYPE_APP_OTA_MAX = 15, //!< Max subtype of OTA partition
ESP_PARTITION_SUBTYPE_APP_OTA_MAX = ESP_PARTITION_SUBTYPE_APP_OTA_MIN + 16,//!< Max subtype of OTA partition
ESP_PARTITION_SUBTYPE_APP_TEST = 0x20, //!< Test application partition
ESP_PARTITION_SUBTYPE_DATA_OTA = 0x00, //!< OTA selection partition
......@@ -165,6 +165,26 @@ esp_partition_iterator_t esp_partition_next(esp_partition_iterator_t iterator);
*/
void esp_partition_iterator_release(esp_partition_iterator_t iterator);
/**
* @brief Verify partition data
*
* Given a pointer to partition data, verify this partition exists in the partition table (all fields match.)
*
* This function is also useful to take partition data which may be in a RAM buffer and convert it to a pointer to the
* permanent partition data stored in flash.
*
* Pointers returned from this function can be compared directly to the address of any pointer returned from
* esp_partition_get(), as a test for equality.
*
* @param partition Pointer to partition data to verify. Must be non-NULL. All fields of this structure must match the
* partition table entry in flash for this function to return a successful match.
*
* @return
* - If partition not found, returns NULL.
* - If found, returns a pointer to the esp_partition_t structure in flash. This pointer is always valid for the lifetime of the application.
*/
const esp_partition_t *esp_partition_verify(const esp_partition_t *partition);
/**
* @brief Read data from the partition
*
......
......@@ -197,6 +197,48 @@ void spi_flash_munmap(spi_flash_mmap_handle_t handle);
*/
void spi_flash_mmap_dump();
#define SPI_FLASH_CACHE2PHYS_FAIL UINT32_MAX /*<! Result from spi_flash_cache2phys() if flash cache address is invalid */
/**
* @brief Given a memory address where flash is mapped, return the corresponding physical flash offset.
*
* Cache address does not have have been assigned via spi_flash_mmap(), any address in flash map space can be looked up.
*
* @param cached Pointer to flashed cached memory.
*
* @return
* - SPI_FLASH_CACHE2PHYS_FAIL If cache address is outside flash cache region, or the address is not mapped.
* - Otherwise, returns physical offset in flash
*/
size_t spi_flash_cache2phys(const void *cached);
/** @brief Given a physical offset in flash, return the address where it is mapped in the memory space.
*
* Physical address does not have to have been assigned via spi_flash_mmap(), any address in flash can be looked up.
*
* @note Only the first matching cache address is returned. If MMU flash cache table is configured so multiple entries
* point to the same physical address, there may be more than one cache address corresponding to that physical
* address. It is also possible for a single physical address to be mapped to both the IROM and DROM regions.
*
* @note This function doesn't impose any alignment constraints, but if memory argument is SPI_FLASH_MMAP_INST and
* phys_offs is not 4-byte aligned, then reading from the returned pointer will result in a crash.
*
* @param phys_offs Physical offset in flash memory to look up.
* @param memory Memory type to look up a flash cache address mapping for (IROM or DROM)
*
* @return
* - NULL if the physical address is invalid or not mapped to flash cache of the specified memory type.
* - Cached memory address (in IROM or DROM space) corresponding to phys_offs.
*/
const void *spi_flash_phys2cache(size_t phys_offs, spi_flash_mmap_memory_t memory);
/** @brief Check at runtime if flash cache is enabled on both CPUs
*
* @return true if both CPUs have flash cache enabled, false otherwise.
*/
bool spi_flash_cache_enabled();
/**
* @brief SPI flash critical section enter function.
*/
......
......@@ -81,7 +81,7 @@ extern "C" {
#define B_CMP_L 0 /*!< Branch if R0 is less than an immediate */
#define B_CMP_GE 1 /*!< Branch if R0 is greater than or equal to an immediate */
#define OPCODE_END 9 /*!< Stop executing the program (not implemented yet) */
#define OPCODE_END 9 /*!< Stop executing the program */
#define SUB_OPCODE_END 0 /*!< Stop executing the program and optionally wake up the chip */
#define SUB_OPCODE_SLEEP 1 /*!< Stop executing the program and run it again after selected interval */
......@@ -222,7 +222,7 @@ typedef union {
struct {
uint32_t dreg : 2; /*!< Register where to store temperature measurement result */
uint32_t wait_delay: 14; /*!< Cycles to wait after measurement is done */
uint32_t cycles: 12; /*!< Cycles used to perform measurement */
uint32_t reserved: 12; /*!< Reserved, set to 0 */
uint32_t opcode: 4; /*!< Opcode (OPCODE_TSENS) */
} tsens; /*!< Format of TSENS instruction */
......@@ -271,7 +271,12 @@ _Static_assert(sizeof(ulp_insn_t) == 4, "ULP coprocessor instruction size should
.cycles = cycles_ } }
/**
* Halt the coprocessor
* Halt the coprocessor.
*
* This instruction halts the coprocessor, but keeps ULP timer active.
* As such, ULP program will be restarted again by timer.
* To stop the program and prevent the timer from restarting the program,
* use I_END(0) instruction.
*/
#define I_HALT() { .halt = {\
.unused = 0, \
......@@ -307,7 +312,7 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
* This instruction can access RTC_CNTL_, RTC_IO_, and SENS_ peripheral registers.
*/
#define I_WR_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
.addr = reg & 0xff, \
.addr = (reg & 0xff) / sizeof(uint32_t), \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.data = val, \
.low = low_bit, \
......@@ -320,8 +325,8 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
* R0 = reg[high_bit : low_bit]
* This instruction can access RTC_CNTL_, RTC_IO_, and SENS_ peripheral registers.
*/
#define I_RD_REG(reg, low_bit, high_bit, val) {.wr_reg = {\
.addr = reg & 0xff, \
#define I_RD_REG(reg, low_bit, high_bit) {.rd_reg = {\
.addr = (reg & 0xff) / sizeof(uint32_t), \
.periph_sel = SOC_REG_TO_ULP_PERIPH_SEL(reg), \
.unused = 0, \
.low = low_bit, \
......@@ -329,25 +334,105 @@ static inline uint32_t SOC_REG_TO_ULP_PERIPH_SEL(uint32_t reg) {
.opcode = OPCODE_RD_REG } }
/**
* End program.
* Set or clear a bit in the peripheral register.
*
* Sets bit (1 << shift) of register reg to value val.
* This instruction can access RTC_CNTL_, RTC_IO_, and SENS_ peripheral registers.
*/
#define I_WR_REG_BIT(reg, shift, val) I_WR_REG(reg, shift, shift, val)
/**
* Wake the SoC from deep sleep.
*
* This instruction initiates wake up from deep sleep.
* Use esp_deep_sleep_enable_ulp_wakeup to enable deep sleep wakeup
* triggered by the ULP before going into deep sleep.
* Note that ULP program will still keep running until the I_HALT
* instruction, and it will still be restarted by timer at regular
* intervals, even when the SoC is woken up.
*
* If wake == 1, wake up main CPU.
* To stop the ULP program, use I_HALT instruction.
*
* To disable the timer which start ULP program, use I_END()
* instruction. I_END instruction clears the
* RTC_CNTL_ULP_CP_SLP_TIMER_EN_S bit of RTC_CNTL_STATE0_REG
* register, which controls the ULP timer.
*/
#define I_END(wake) { .end = { \
.wakeup = wake, \
#define I_WAKE() { .end = { \
.wakeup = 1, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_END, \
.opcode = OPCODE_END } }
/**
* Stop ULP program timer.
*
* This is a convenience macro which disables the ULP program timer.
* Once this instruction is used, ULP program will not be restarted
* anymore until ulp_run function is called.
*
* ULP program will continue running after this instruction. To stop
* the currently running program, use I_HALT().
*/
#define I_END() \
I_WR_REG_BIT(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN_S, 0)
/**
* Select the time interval used to run ULP program.
*
* This instructions selects which of the SENS_SLEEP_CYCLES_Sx
* registers' value is used by the ULP program timer.
* When the ULP program stops at I_HALT instruction, ULP program
* timer start counting. When the counter reaches the value of
* the selected SENS_SLEEP_CYCLES_Sx register, ULP program
* start running again from the start address (passed to the ulp_run
* function).
* There are 5 SENS_SLEEP_CYCLES_Sx registers, so 0 <= timer_idx < 5.
*
* By default, SENS_SLEEP_CYCLES_S0 register is used by the ULP
* program timer.
*/
#define I_SLEEP_CYCLE_SEL(timer_idx) { .sleep = { \
.cycle_sel = timer_idx, \
.unused = 0, \
.sub_opcode = SUB_OPCODE_SLEEP, \
.opcode = OPCODE_END } }
/**
* Perform temperature sensor measurement and store it into reg_dest.
*
* Delay can be set between 1 and ((1 << 14) - 1). Higher values give
* higher measurement resolution.
*/
#define I_TSENS(reg_dest, delay) { .tsens = { \
.dreg = reg_dest, \
.wait_delay = delay, \
.reserved = 0, \
.opcode = OPCODE_TSENS } }
/**
* Perform ADC measurement and store result in reg_dest.
*
* adc_idx selects ADC (0 or 1).
* pad_idx selects ADC pad (0 - 7).
*/
#define I_ADC(reg_dest, adc_idx, pad_idx) { .adc = {\
.dreg = reg_dest, \
.mux = pad_idx + 1, \
.sar_sel = adc_idx, \
.unused1 = 0, \
.cycles = 0, \
.unused2 = 0, \
.opcode = OPCODE_ADC } }
/**
* Store value from register reg_val into RTC memory.
*
* The value is written to an offset calculated by adding value of
* reg_addr register and offset_ field (this offset is expressed in 32-bit words).
* 32 bits written to RTC memory are built as follows:
* - 5 MSBs are zero
* - next 11 bits hold the PC of current instruction, expressed in 32-bit words
* - next 16 bits hold the actual value to be written
* - bits [31:21] hold the PC of current instruction, expressed in 32-bit words
* - bits [20:16] = 5'b1
* - bits [15:0] are assigned the contents of reg_val
*
* RTC_SLOW_MEM[addr + offset_] = { 5'b0, insn_PC[10:0], val[15:0] }
*/
......
......@@ -1563,6 +1563,8 @@ PROVIDE ( SPI_Write_Encrypt_Disable = 0x40062e60 );
PROVIDE ( SPI_Write_Encrypt_Enable = 0x40062df4 );
/* This is static function, but can be used, not generated by script*/
PROVIDE ( SPI_write_status = 0x400622f0 );
/* This is static function, but can be used, not generated by script */
PROVIDE ( SPI_Wait_Idle = 0x400622c0 );
PROVIDE ( srand = 0x40001004 );
PROVIDE ( __sread = 0x40001118 );
PROVIDE ( __srefill_r = 0x400593d4 );
......
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