提交 03808e3b 编写于 作者: M me-no-dev

Remove xtensa headers and adjust includes

上级 40d85ce5
/* This header is supposed to be obtained from <board>/xtensa/board.h
using a -I directive passed to the compiler. */
#error "Unspecified board. Missing -I directive to select supported Xtensa board, usually -I XTENSA_TOOLS_ROOT/xtensa-elf/include/xtensa/<BOARD> (XTENSA_TOOLS_ROOT is root of Xtensa Tools install, see xt-run --show-config=xttools)"
/*
* Copyright (c) 2013 Tensilica Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
此差异已折叠。
/* Xtensa Debug-FileSystem definitions */
/*
* Copyright (c) 2005-2009 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
#ifndef __DEBUGFS_H__
#define __DEBUGFS_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <unistd.h>
#include <fcntl.h>
#include <stdlib.h>
int xt_dbfs_open(const char *pathname, int flags, mode_t mode);
int xt_dbfs_ftruncate(int fd, off_t length);
int xt_dbfs_truncate(const char * filename, off_t length);
int xt_dbfs_creat(const char *pathname, mode_t mode);
int xt_dbfs_errno(void);
int xt_dbfs_lseek(int fd, off_t offset, int whence);
ssize_t xt_dbfs_write(int fd, const void * buf, size_t bytes);
ssize_t xt_dbfs_open_append_close(const char * filename, int align,
const void * buf, size_t bytes);
ssize_t xt_dbfs_read(int fd, void * buf, size_t bytes);
int xt_dbfs_close(int fd);
int xt_dbfs_unlink(const char *pathname);
/* By default, this function is a wrapper around sbrk, and follows
sbrk semantics:
On success, it returns increment bytes of memory allocated from
system memory.
On failure, it returns 0xFFFFFFFF
If you want to use a method of allocating memory other than sbrk,
implement xt_dbfs_sbrk in your own sources, and the linker will
automatically use that copy.
*/
void * xt_dbfs_sbrk(int increment);
#ifdef REPLACE_FS_WITH_DBFS
#define open xt_dbfs_open
#define close xt_dbfs_close
#define creat xt_dbfs_creat
#define lseek xt_dbfs_lseek
#define write xt_dbfs_write
#define read xt_dbfs_read
#define close xt_dbfs_close
#define unlink xt_dbfs_unlink
#define rmdir NOT_IMPLEMENTED_IN_DBFS
#define opendir NOT_IMPLEMENTED_IN_DBFS
#define closedir NOT_IMPLEMENTED_IN_DBFS
#define dirfs NOT_IMPLEMENTED_IN_DBFS
#define readdir NOT_IMPLEMENTED_IN_DBFS
#define scandir NOT_IMPLEMENTED_IN_DBFS
#define seekdir NOT_IMPLEMENTED_IN_DBFS
#define telldir NOT_IMPLEMENTED_IN_DBFS
#define fcntl NOT_IMPLEMENTED_IN_DBFS
#define dup2 NOT_IMPLEMENTED_IN_DBFS
#define dup NOT_IMPLEMENTED_IN_DBFS
#define flock NOT_IMPLEMENTED_IN_DBFS
#define lockf NOT_IMPLEMENTED_IN_DBFS
#define link NOT_IMPLEMENTED_IN_DBFS
#define stat NOT_IMPLEMENTED_IN_DBFS
#define fstat NOT_IMPLEMENTED_IN_DBFS
#define lstat NOT_IMPLEMENTED_IN_DBFS
#define chmod NOT_IMPLEMENTED_IN_DBFS
#define fchmod NOT_IMPLEMENTED_IN_DBFS
#define chmown NOT_IMPLEMENTED_IN_DBFS
#define lchown NOT_IMPLEMENTED_IN_DBFS
#define fchown NOT_IMPLEMENTED_IN_DBFS
#endif
#ifdef __cplusplus
}
#endif
#endif
/*
* Copyright (c) 2013 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
#ifndef __XT_FEEDBACK_INCLUDED__
#define __XT_FEEDBACK_INCLUDED__
#ifdef __cplusplus
extern "C" {
#endif
/* xt_feedback_save_and_reset
Save and reset the accumulated feedback data.
*/
extern void xt_feedback_save_and_reset(void);
/* xt_feedback_enable
Turn on feedback accumulation. Ordinarily, feedback accumulation is on
by default. If you turn it off using xt_feedback_disable, You can turn
it on again via this function.
*/
extern void xt_feedback_enable (void);
/* xt_feedback_disable
Turn off feedback accumulation. If you don't want to gather feedback for a
portion of your code, use this function and then xt_feedback_enable when
you want to start again.
*/
extern void xt_feedback_disable (void);
#ifdef __cplusplus
}
#endif
#endif /* __XT_FEEDBACK_INCLUDED__ */
/* Xtensa Debug-FileSystem definitions
*
* Copyright (c) 2006-2009 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
#ifndef __DEBUGFS_H__
#define __DEBUGFS_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <unistd.h>
#include <fcntl.h>
#include <stdlib.h>
#include <errno.h>
int _gdbio_open_r(void * ptr, const char *pathname, int flags, mode_t mode);
int _gdbio_creat_r(void * ptr, const char *pathname, mode_t mode);
int _gdbio_lseek_r(void * ptr, int fd, off_t offset, int whence);
ssize_t _gdbio_write_r(void * ptr, int fd, const void * buf, size_t bytes);
ssize_t _gdbio_read_r(void * ptr, int fd, void * buf, size_t bytes);
int _gdbio_close_r(void * ptr, int fd);
int _gdbio_unlink_r(void * ptr, const char * pathname);
static inline
int gdbio_open(const char *pathname, int flags, mode_t mode) {
return _gdbio_open_r(&errno, pathname, flags, mode);
}
static inline int
gdbio_creat(const char *pathname, mode_t mode) {
return _gdbio_open_r(&errno, pathname, O_CREAT|O_WRONLY|O_TRUNC, mode);
}
static inline int
gdbio_errno(void) {
return errno;
}
static inline int
gdbio_lseek(int fd, off_t offset, int whence) {
return _gdbio_lseek_r(&errno, fd, offset, whence);
}
static inline
ssize_t gdbio_write(int fd, const void * buf, size_t bytes) {
return _gdbio_write_r(&errno, fd, buf, bytes);
}
static inline
ssize_t gdbio_read(int fd, void * buf, size_t bytes) {
return _gdbio_read_r(&errno, fd, buf, bytes);
}
static inline int
gdbio_close(int fd) {
return _gdbio_close_r(&errno, fd);
}
static inline int
gdbio_unlink(const char * pathname) {
return _gdbio_unlink_r(&errno, pathname);
}
#ifdef REPLACE_FS_WITH_GDBIO
#define open gdbio_open
#define close gdbio_close
#define creat gdbio_creat
#define lseek gdbio_lseek
#define write gdbio_write
#define read gdbio_read
#define close gdbio_close
#define unlink gdbio_unlink
#endif
#ifdef __cplusplus
}
#endif
#endif
/* Copyright (c) 2011-2012 Tensilica Inc. ALL RIGHTS RESERVED.
// These coded instructions, statements, and computer programs are the
// copyrighted works and confidential proprietary information of Tensilica Inc.
// They may not be modified, copied, reproduced, distributed, or disclosed to
// third parties in any manner, medium, or form, in whole or in part, without
// the prior written consent of Tensilica Inc.
*/
#ifndef _JTAG_XTENSA_H_
#define _JTAG_XTENSA_H_
/* ---------------- JTAG registers ------------------ */
/* -- ER and later JTAG registers */
typedef enum {
regIR,
regBypass,
regNAR,
regNDR,
regIdcode,
regPWRCTL,
regPWRSTAT,
regJtagMAX,
} xtensaJtagReg;
/* -- pre-ER JTAG registers */
typedef enum {
regOldIR,
regOldBypass,
regOldDIRW,
regOldDIR,
regOldDDR,
regOldDOSR,
regOldESR,
regOldDCR,
regOldTraxNDR,
regOldTraxNAR,
regOldMAX
} xtensaOldJtagReg;
/* ---------------- JTAG Instructions ------------------ */
/* -- pre-ER JTAG instructions */
typedef enum {
ji_EnableOCD = 0x11,
ji_DebugInt,
ji_RetDebugInt, // TBD: remove
ji_DisRetOCD, // TBD: remove
ji_ExecuteDI,
ji_LoadDI,
ji_ScanDDR,
ji_ReadDOSR,
ji_ScanDCR,
ji_LoadWDI,
ji_TRAX = 0x1c,
ji_BYPASS = 0x1f,
} xtensaJtagInstruction;
typedef enum {
OCDNormalMode,
OCDRunMode,
OCDHaltMode,
OCDStepMode
} xtensaMode;
typedef struct {
xtensaMode mode;
int DRsel;
XTMP_core core;
XTMP_tap tap;
int core_num;
jtagReg_t *jtagRegs;
void *dap; // used for ARM DAP only
bool isBig;
int dir_array_option; // used by pre-ER devices only
// for testing, below - FIXME - delete later
int ocdReg;
unsigned int wr_data;
XTMP_event start_OCD_trans;
bool data_cycle;
bool data_pending;
} coreSlaveData_t;
enum OCD_ACCESS_TYPE{
NEXUS_ACCESS,
CS_ACCESS,
};
// pre-ER Xtensa initializiation
EXTERN XTMP_deviceStatus
XTMP_jtagCoreSlaveEX(XTMP_component component, XTMP_jtagSlave slave, void* mydata);
extern char *OCDrd;
extern char *OCDwr;
#endif
/*******************************************************************************
Copyright (c) 2009-2013 by Tensilica Inc. ALL RIGHTS RESERVED.
These coded instructions, statements, and computer programs are the
copyrighted works and confidential proprietary information of Tensilica Inc.
They may not be modified, copied, reproduced, distributed, or disclosed to
third parties in any manner, medium, or form, in whole or in part, without
the prior written consent of Tensilica Inc.
--------------------------------------------------------------------------------
lcd-splc780d-4bitmode-board.h Board-specific LCD info for these boards:
Avnet AV110 (XT-AV110)
Xilinx ML605 (XT-ML605)
Xilinx KC705 (XT-KC705)
Interface between board-independent driver and board-specific header.
This is used by a board-independent SPLC780D LCD controller (4 bit mode)
driver to obtain board-specific information about LCD displays on the board,
such as the controller register base address and spacing (a function of how
the address lines are connected on the board) and length of the visible window
of the display (a function of the LCD panel the controller drives).
The driver doesnot refer directly to the board-specific header, which therefore is not
constrained to use macro names consistent with other boards.
!! Must not contain any board-specific macro names (only controller specific) !!
Included at compile-time via an include path specific to the board.
The listed boards contain a single MYTech MOC-16216B-B display driven by
a Sunplus SPLC870D controller.
*******************************************************************************/
#ifndef _LCD_SPLC780D_4BIT_BOARD_H
#define _LCD_SPLC780D_4BIT_BOARD_H
#include <xtensa/board.h> /* Board info */
/* Base address of the controller's registers. */
#ifdef SPLC780D_4BIT_VADDR
#define SPLC780D_4BIT_REGBASE SPLC780D_4BIT_VADDR
#endif
/*
The controller's registers are connected at word addresses on these boards.
Each byte-wide register appears as the least-significant-byte (LSB) of the
word regardless of the endianness of the processor (so if using word accesses
then endianness doesn't matter).
*/
#define SPLC780D_4BIT_REGSPACING 4
typedef unsigned splc780d_4bit_reg_t;
/* Include generic information shared by all boards that use this device. */
#include <xtensa/lcd-splc780d-4bitmode.h>
/* Display limits of the LCD panel. */
#define DISPLAY_VISIBLE_LEN 16 /* length (chars) of visible window */
#endif /* _LCD_SPLC780D_4BIT_BOARD_H */
/*******************************************************************************
Copyright (c) 2009-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
These coded instructions, statements, and computer programs are the
copyrighted works and confidential proprietary information of Tensilica Inc.
They may not be modified, copied, reproduced, distributed, or disclosed to
third parties in any manner, medium, or form, in whole or in part, without
the prior written consent of Tensilica Inc.
--------------------------------------------------------------------------------
lcd-SPLC780D-4bitmode.h Generic definitions for Sunplus SPLC780D LCD Controller
operating in 4 bit mode.
This is used by board-support-packages with one or more LCD displays that use
a SPLC780D controller in 4 bit mode. A BSP provides a base address for each
instance of an SPLC780D LCD controller on the board.
Note that LCD display operation is almost totally independent of the LCD
display, depending almost entirely on the controller. However the display
may limit the number of characters of the controller's RAM buffer that are
actually visible at one time. The length of the display's visible window
is not specifified in this controller-specific header, but comes to the
driver from the board-specific "display.h" header.
*******************************************************************************/
#ifndef _LCD_SPLC780D_4BIT_H_
#define _LCD_SPLC780D_4BIT_H_
/* Offsets to controller registers from base. */
#define SPLC780D_4BIT_INST 0
#define SPLC780D_4BIT_DATA (SPLC780D_4BIT_INST + SPLC780D_4BIT_REGSPACING)
#define SPLC780D_4BIT_INST_INIT1 0xFF /* First command in
init sequence */
#define SPLC780D_4BIT_INST_INIT2 0x30 /* Second command in
init sequence,
issued 3 times */
#define SPLC780D_4BIT_INST_INIT3 0x20 /* Third and last command
in init sequence */
#define SPLC780D_4BIT_INST_CLEAR 0x01 /* clear (blank) display) */
#define SPLC780D_4BIT_INST_SET_MODE 0x28 /* Set LCD mode. Supported
setting is 4 bit data
length, 2 lines, 5*8 */
#define SPLC780D_4BIT_INST_DSPLY_ON 0x0C /* Set Display ON */
#define SPLC780D_4BIT_INST_CRSR_INC 0x06 /* Set cursor moving direction
as increment */
#define SPLC780D_4BIT_LINET_ADDR 0x80 /* clear (blank) display) */
#define SPLC780D_4BIT_LINEB_ADDR 0xC0 /* clear (blank) display) */
#ifndef __ASSEMBLER__
/* C interface to controller registers. */
struct splc780d_4bit_s {
splc780d_4bit_reg_t inst; /* instruction register */
splc780d_4bit_reg_t data; /* data register */
};
typedef volatile struct splc780d_4bit_s splc780d_4bit_t;
/*
Prototypes of high level driver functions.
*/
/* Write an instruction byte to LCD, result in two back to back writes since the
* LCD is hooked up in 4 bit mode*/
extern void lcd_write_inst_byte(splc780d_4bit_t *lcd, unsigned char inst);
/* Write a data byte to LCD, result in two back to back writes since the
* LCD is hooked up in 4 bit mode*/
extern void lcd_write_data_byte(splc780d_4bit_t *lcd, unsigned char data);
/*
Initialize the display with default settings.
*/
extern void splc780d_4bit_init_default(splc780d_4bit_t *lcd);
/*
Write a single character at a given position (chars from left, starting at 0).
Wait long enough afterward for the controller to be ready for more input.
Positions beyond the end of the display are ignored.
*/
extern void splc780d_4bit_write_char(splc780d_4bit_t *lcd, unsigned pos, const char c);
/*
Write a string to the display starting at the left (position 0).
Blank-pad to or truncate at the end of the display (overwrites any previous
string so don't need to blank the display first).
Wait long enough after each char for the controller to be ready for more input.
*/
extern void splc780d_4bit_write_string(splc780d_4bit_t *lcd, const char *s);
/*
Blank (clear) the entire display.
Wait long enough afterward for the controller to be ready for more input.
*/
extern void splc780d_4bit_blank(splc780d_4bit_t *lcd);
#endif /* __ASSEMBLER__ */
#endif /* _LCD_SPLC780D_4BIT_H_ */
/*******************************************************************************
Copyright (c) 2006-2007 by Tensilica Inc. ALL RIGHTS RESERVED.
These coded instructions, statements, and computer programs are the
copyrighted works and confidential proprietary information of Tensilica Inc.
They may not be modified, copied, reproduced, distributed, or disclosed to
third parties in any manner, medium, or form, in whole or in part, without
the prior written consent of Tensilica Inc.
--------------------------------------------------------------------------------
lcd-SPLC780D.h Generic definitions for Sunplus SPLC780D LCD Controller
This is used by board-support-packages with one or more LCD displays that use
a SPLC780D controller. A BSP provides a base address for each instance of an
SPLC780D LCD controller on the board.
Note that LCD display operation is almost totally independent of the LCD
display, depending almost entirely on the controller. However the display
may limit the number of characters of the controller's RAM buffer that are
actually visible at one time. The length of the display's visible window
is not specifified in this controller-specific header, but comes to the
driver from the board-specific "display.h" header.
*******************************************************************************/
#ifndef _LCD_SPLC780D_H_
#define _LCD_SPLC780D_H_
/* Offsets to controller registers from base. */
#define SPLC780D_INST 0
#define SPLC780D_DATA (SPLC780D_INST + SPLC780D_REGSPACING)
/*
Bit fields and their values in the instruction register.
These fields are NOT orthogonal - they overlap!
Thus only one field may be written at a time, determined by the
most-significant 1 bit in the pattern (the field selector).
All less significant bits are part of the value of the selected field.
The fields and their values are grouped together to emphasize this format.
Field selector macro names end in '_' (implying something more needs
to be ORed) and the value macros are indented. The pattern written to a
bitfield is a bitwise OR of a field selector and one or more values, eg.
(SPLC780D_INST_ON_ | SPLC780D_INST_ON_DISPLAY | SPLC780D_INST_ON_CURSOR)
A single bit field (eg. SPCL780D_INST_HOME) need not have a value.
NOTE: Controller requires a software delay after writing to the control
or data registers. For the data register it is 38us. For the control
register it is 38us for most bit fields, with the following exceptions:
SPLC780D_FUNC_ 100us.
SPLC780D_INST_CLEAR, SPLC780D_INST_HOME 1520us.
For more details and reset timing, see the SUNPLUS SPLC780D data sheet.
*/
#define SPLC780D_INST_CLEAR_ 0x1 /* clear (blank) display) */
#define SPLC780D_INST_HOME_ 0x2 /* home cursor and shift pos */
#define SPLC780D_INST_ENTRY_ 0x4 /* combine *ENTRY_* flags below */
#define SPLC780D_INST_ENTRY_SHIFT 0x1 /* display shift on entry / not */
#define SPLC780D_INST_ENTRY_INCR 0x2 /* cursor incr / decr */
#define SPLC780D_INST_ENTRY_DECR 0 /* cursor incr / decr */
#define SPLC780D_INST_ON_ 0x8 /* combine *ON_* flags below */
#define SPLC780D_INST_ON_DISPLAY 0x4 /* display on / off */
#define SPLC780D_INST_ON_CURSOR 0x2 /* cursor on / off */
#define SPLC780D_INST_ON_BLINK 0x1 /* blink on / off */
#define SPLC780D_INST_SHIFT_ 0x10 /* combine *SHIFT_* flags below */
#define SPLC780D_INST_SHIFT_DISP 0x8 /* shift display / move cursor */
#define SPLC780D_INST_SHIFT_CURS 0 /* shift display / move cursor */
#define SPLC780D_INST_SHIFT_RIGHT 0x4 /* shift right / left */
#define SPLC780D_INST_SHIFT_LEFT 0 /* shift right / left */
#define SPLC780D_INST_FUNC_ 0x20 /* combine *FUNC_* flags below */
#define SPLC780D_INST_FUNC_8BIT 0x10 /* data length 8 bit / 4 bit */
#define SPLC780D_INST_FUNC_4BIT 0 /* data length 8 bit / 4 bit */
#define SPLC780D_INST_FUNC_2LINE 0x08 /* display lines 2 / 1 */
#define SPLC780D_INST_FUNC_1LINE 0 /* display lines 2 / 1 */
#define SPLC780D_INST_FUNC_F5x10 0x04 /* character font 5x10 / 5x8 */
#define SPLC780D_INST_FUNC_F5x8 0 /* character font 5x10 / 5x8 */
/* font must be 5x8 for 2 lines */
#define SPLC780D_INST_CGEN_ 0x40 /* set char generator address */
#define SPLC780D_INST_CGEN_ADDR 0x3F /* to address in this field */
#define SPLC780D_INST_DRAM_ 0x80 /* set display data RAM address */
#define SPLC780D_INST_DRAM_ADDR 0x7F /* to address in this field */
#define SPLC780D_INST_DRAM_LINE2 0x40 /* address offset to line 2 */
/* Controller limits */
#define SPLC780D_RAMLEN_1LINE 0x50 /* length of line in RAM (1 line) */
#define SPLC780D_RAMLEN_2LINE 0x28 /* length of line in RAM (2 line) */
#ifndef __ASSEMBLER__
/* C interface to controller registers. */
struct splc780d_s {
splc780d_reg_t inst; /* instruction register */
splc780d_reg_t data; /* data register */
};
typedef volatile struct splc780d_s splc780d_t;
/*
Prototypes of high level driver functions.
*/
/*
Initialize the display with the FUNC_, ENTRY_ and ON_ fields as specified in
terms of the values above. The splc780d_init_default() macro is an example.
*/
extern void splc780d_init(splc780d_t *lcd,
unsigned func, unsigned entry, unsigned on);
/*
Initialize the display to default mode: 8-bit interface, 2 line, 5x8 font,
increment cursor on entry, display on (cursor and blinking off).
*/
#define splc780d_init_default(lcd) \
splc780d_init( lcd, \
SPLC780D_INST_FUNC_8BIT \
| SPLC780D_INST_FUNC_2LINE \
| SPLC780D_INST_FUNC_F5x8, \
SPLC780D_INST_ENTRY_INCR, \
SPLC780D_INST_ON_DISPLAY \
)
/*
Write a single character at a given position (chars from left, starting at 0).
Wait long enough afterward for the controller to be ready for more input.
Positions beyond the end of the display are ignored.
*/
extern void splc780d_write_char(splc780d_t *lcd, unsigned pos, const char c);
/*
Write a string to the display starting at the left (position 0).
Blank-pad to or truncate at the end of the display (overwrites any previous
string so don't need to blank the display first).
Wait long enough after each char for the controller to be ready for more input.
*/
extern void splc780d_write_string(splc780d_t *lcd, const char *s);
/*
Blank (clear) the entire display.
Wait long enough afterward for the controller to be ready for more input.
*/
extern void splc780d_blank(splc780d_t *lcd);
#endif /* __ASSEMBLER__ */
#endif /* _LCD_SPLC780D_H_ */
// overlay.h -- Overlay manager header file
// $Id$
// Copyright (c) 2013 Tensilica Inc.
//
// Permission is hereby granted, free of charge, to any person obtaining
// a copy of this software and associated documentation files (the
// "Software"), to deal in the Software without restriction, including
// without limitation the rights to use, copy, modify, merge, publish,
// distribute, sublicense, and/or sell copies of the Software, and to
// permit persons to whom the Software is furnished to do so, subject to
// the following conditions:
//
// The above copyright notice and this permission notice shall be included
// in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef OVERLAY_H
#define OVERLAY_H
#include <xtensa/xtruntime.h>
#ifdef __cplusplus
extern "C" {
#endif
// Define this to turn off overlay support
#ifdef XT_DISABLE_OVERLAYS
#define OVERLAY(n)
#define DECLARE_OVERLAY(n)
#define xt_overlay_map(ov_id)
#define xt_overlay_map_async(ov_id) 0
#define xt_overlay_map_in_progress() 0
#define xt_overlay_get_id() 0
#define xt_overlay_get_state(pc) 0
#define xt_overlay_check_map(pc,ps,ovstate,sp) 0
#else
// Shorthand for convenience and portability.
#define OVERLAY(n) __attribute__((overlay(n)))
// Structure of the overlay table required by gdb and the overlay
// manager. Should not be accessed by user code unless overriding
// the load process.
struct ovly_table {
void * vma; // The overlay's mapped address.
unsigned int size; // The size of the overlay, in bytes.
void * lma; // The overlay's load address.
unsigned int mapped; // Non-zero if overlay is currently mapped; zero otherwise.
};
// Constructed by the linker. Required for gdb and for the overlay
// manager. Should not be accessed by user code unless overriding
// the load process.
extern struct ovly_table _ovly_table[];
// Functions.
void xt_overlay_map(int ov_id);
int xt_overlay_map_async(int ov_id);
int xt_overlay_map_in_progress(void);
unsigned int xt_overlay_get_state(unsigned int pc);
unsigned int xt_overlay_check_map(unsigned int * pc, unsigned int * ps,
unsigned int ovstate, unsigned int sp);
int xt_overlay_start_map(void * dst, void * src, unsigned int len, int ov_id);
int xt_overlay_is_mapping(int ov_id);
void xt_overlay_fatal_error(int ov_id);
// Returns the current overlay ID. If no overlay is mapped or an overlay
// is in the middle of being mapped, returns -1. Inlined to avoid calling
// out of overlay (wastes cycles, can end up reading wrong ID on interrupt
// activity).
//
static inline int xt_overlay_get_id(void)
{
#pragma always_inline
extern short _mapping_id;
extern short _ovly_id;
int ret;
unsigned int flags = XTOS_SET_INTLEVEL(15);
if (_mapping_id >= 0) {
ret = -1;
}
else {
ret = _ovly_id;
}
XTOS_RESTORE_INTLEVEL(flags);
return ret;
}
// The following macros are used to declare numbered overlays and generate
// the corresponding call stubs. Use as follows:
//
// DECLARE_OVERLAY(n)
//
// See documentation for more details.
//#include <xtensa/config/core-isa.h>
// At this time overlays are not supported without windowing.
#if defined(__XTENSA_WINDOWED_ABI__)
#define xstr(x) str(x)
#define str(x) #x
// At entry, register a8 holds the return address and a9 holds the target
// function address. This stub saves a8 on the stack at (SP - 20) which
// is the only location that is safe for us to use. Then it allocates 32
// bytes on the stack for working storage, loads the overlay number into
// a8, and jumps to the common handler. The common handler will make sure
// that the called function is loaded into memory before calling it.
// NOTE: we are using the stack area normally reserved for nested functions.
// This means nested functions cannot be used when overlays are in use.
#define CALL_IN(num) \
asm(".section .gnu.linkonce.t.overlay.call." xstr(num) ".text, \"ax\"\n" \
".global _overlay_call_in_" xstr(num) "_\n" \
".align 4\n" \
"_overlay_call_in_" xstr(num) "_:\n" \
"s32e a8, a1, -20\n" \
"addi a8, a1, -32\n" \
"movsp a1, a8\n" \
"movi a8, " xstr(num) "\n" \
"j _overlay_call_in_common\n" \
".size _overlay_call_in_" xstr(num) "_, . - _overlay_call_in_" xstr(num) "_\n");
// The call-out stub first calls the target function, then loads the overlay
// number into register a14 and jumps to the common handler. The handler will
// make sure that the caller function is present in memory before returning.
// Note that registers a10-a13 may contain return values so must be preserved.
//
// Because we came here via a call4, the return address is in a4, and the top
// 2 bits are set to the window increment. We'll restore the top 2 bits of
// the return address from the called function's address, assuming that both
// are in the same 1 GB segment. For now this is always true.
#define CALL_OUT(num) \
asm(".section .gnu.linkonce.t.overlay.call." xstr(num) ".text, \"ax\"\n" \
".global _overlay_call_out_" xstr(num) "_\n" \
".align 4\n" \
"_overlay_call_out_" xstr(num) "_:\n" \
"slli a4, a4, 2\n" \
"srli a4, a4, 2\n" \
"extui a8, a9, 30, 2\n" \
"slli a8, a8, 30\n" \
"or a4, a4, a8\n" \
"callx8 a9\n" \
"movi a14, " xstr(num) "\n" \
"j _overlay_call_out_common\n" \
".size _overlay_call_out_" xstr(num) "_, . - _overlay_call_out_" xstr(num) "_\n");
// Generate a call-in and a call-out stub for each overlay.
#define DECLARE_OVERLAY(num) \
CALL_IN(num) \
CALL_OUT(num)
#endif // defined(__XTENSA_WINDOWED_ABI__)
#endif // XT_DISABLE_OVERLAYS
#ifdef __cplusplus
}
#endif
#endif // OVERLAY_H
// overlay_os_asm.h -- Overlay manager assembly macros for OS use.
// $Id$
// Copyright (c) 2013 Tensilica Inc.
//
// Permission is hereby granted, free of charge, to any person obtaining
// a copy of this software and associated documentation files (the
// "Software"), to deal in the Software without restriction, including
// without limitation the rights to use, copy, modify, merge, publish,
// distribute, sublicense, and/or sell copies of the Software, and to
// permit persons to whom the Software is furnished to do so, subject to
// the following conditions:
//
// The above copyright notice and this permission notice shall be included
// in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef OVERLAY_OS_ASM_H
#define OVERLAY_OS_ASM_H
// The macros in here are intended to be used by RTOS task switch code
// to check overlay status. Such code is usually in assembly and cannot
// call C code without penalty. For C code usage, it is best to use the
// corresponding C functions from the library.
// Inline assembly version of xt_overlay_get_state(). The arguments are
// three AR registers (a0-a15):
//
// "pcreg" - should contain the outgoing task's PC, i.e. the point at
// which the task got interrupted. The return value is also
// returned in this register.
// "sr1/2" - Scratch registers. These must be distinct from "pcreg".
//
// The return value is a 32-bit result that should be saved with the
// task context and passed as-is to xt_overlay_check_map.
.macro _xt_overlay_get_state pcreg sr1 sr2
movi \sr1, _mapping_id
movi \sr2, _ovly_id
l16si \sr1, \sr1, 0
l16ui \sr2, \sr2, 0
slli \sr1, \sr1, 16
or \pcreg, \sr1, \sr2
.endm
// Inline assembly version of xt_overlay_check_map(). It requires 5 AR
// registers (a0-a15) as arguments.
//
// "pcreg" - should contain the interrupted task's PC, i.e. the point
// at which the task got interrupted. This will be adjusted
// if required.
// "psreg" - should contain the interrupted task's PS. This will be
// adjusted if required.
// "ovreg" - should contain the overlay state on entry. Contents may
// be clobbered.
// "spreg" - should contain the tasks stack pointer on entry.
// "sr1" - Scratch register. Must be distinct from any of the above.
//
// The return values are "pcreg" and "psreg" and these must be used
// to update the task's PC and PS.
// Note that this macro may store data below the "spreg" pointer. If
// it does, then it will also disable interrupts via the PS, so that
// the task resumes with all interrupts disabled (to avoid corrupting
// this data).
//
// (SP - 24) Overlay ID to restore
// (SP - 28) Task PC
// (SP - 32) Task PS
.macro _xt_overlay_check_map pcreg psreg ovreg spreg sr1
// There are four cases to deal with:
//
// _ovly_id = -1, _mapping_id = -1
// No overlay is mapped or mapping, nothing to do.
//
// _ovly_id >= 0, _mapping_id = -1
// An overlay was mapped, check PC to see if we need a restore.
//
// _ovly_id = -1, _mapping_id >= 0
// An overlay is being mapped. Either it belongs to this task, which
// implies that the PC is in the mapping function, or it does not
// belong to this task. Either way there is nothing to do.
//
// _ovly_id >= 0, _mapping_id >= 0
// Illegal, cannot happen by design. Don't need to handle this.
//
// So, the logic is to check _ovly_id first. If this is >= 0, then
// we check the task PC. If the PC is in the regions of interest then
// we'll patch the return PC to invoke xt_overlay_restore.
.L1:
extui \sr1, \ovreg, 0, 16 // Extract _ovly_id
bbsi.l \sr1, 15, .Lno // If -1 then we're done
mov \ovreg, \sr1 // Restore this one
// Next check the PC to see if it falls within the ranges of interest.
.L2:
movi \sr1, _overlay_vma // Is PC < VMA range ?
bltu \pcreg, \sr1, .L3
movi \sr1, _overlay_vma_end // Is PC > VMA range ?
bgeu \pcreg, \sr1, .L3
j .L4 // PC is in VMA range
.L3:
movi \sr1, _overlay_call_stubs_start // Is PC < call stubs range ?
bltu \pcreg, \sr1, .Lno
movi \sr1, _overlay_call_stubs_end // Is PC > call stubs range ?
bgeu \pcreg, \sr1, .Lno
// If we get here then a restore is needed. Save the overlay ID, PC and PS.
// Return modified PC and PS so that xt_overlay_restore() will execute in
// the context of the task when resumed. Note that the OS resumption code
// may expect PS.EXCM to be set so we leave it as is in the return value.
.L4:
s32e \ovreg, \spreg, -24 // Save overlay ID
s32e \pcreg, \spreg, -28 // Save task PC
s32e \psreg, \spreg, -32 // Save task PS
movi \pcreg, xt_overlay_restore // Adjust resumption PC
movi \sr1, 15
or \psreg, \psreg, \sr1 // Set intlevel to highest
.Lno:
.endm
#endif // OVERLAY_OS_ASM_H
/* Copyright (c) 2004-2006 by Tensilica Inc. ALL RIGHTS RESERVED.
/ These coded instructions, statements, and computer programs are the
/ copyrighted works and confidential proprietary information of Tensilica Inc.
/ They may not be modified, copied, reproduced, distributed, or disclosed to
/ third parties in any manner, medium, or form, in whole or in part, without
/ the prior written consent of Tensilica Inc.
*/
/* sim.h
*
* Definitions and prototypes for specific ISS SIMCALLs
* (ie. outside the standard C library).
*/
#ifndef _INC_SIM_H_
#define _INC_SIM_H_
#ifdef __cplusplus
extern "C" {
#endif
/* Shortcuts for enabling/disabling profiling in the Xtensa ISS */
extern void xt_iss_profile_enable(void);
extern void xt_iss_profile_disable(void);
/* Shortcut for setting the trace level in the Xtensa ISS */
extern void xt_iss_trace_level(unsigned level);
/* Generic interface for passing client commands in the Xtensa ISS:
* returns 0 on success, -1 on failure.
*/
extern int xt_iss_client_command(const char *client, const char *command);
/* Interface for switching simulation modes in the Xtensa ISS:
* returns 0 on success, -1 on failure.
*/
#define XT_ISS_CYCLE_ACCURATE 0
#define XT_ISS_FUNCTIONAL 1
extern int xt_iss_switch_mode(int mode);
/* Interface for waiting on a system synchronization event */
extern void xt_iss_event_wait(unsigned event_id);
/* Interface for firing a system synchronization event */
extern void xt_iss_event_fire(unsigned event_id);
/* Interface for invoking a user simcall action,
* which can be registered in XTMP or XTSC.
*/
extern int xt_iss_simcall(int arg1, int arg2, int arg3,
int arg4, int arg5, int arg6);
#ifdef __cplusplus
}
#endif
#endif /*_INC_SIM_H_*/
/*
* Copyright (c) 2001 Tensilica Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
/* simboard.h - Xtensa ISS "Board" specific definitions */
#ifndef _INC_SIMBOARD_H_
#define _INC_SIMBOARD_H_
#include <xtensa/config/core.h>
#include <xtensa/config/system.h>
/*
* Device addresses.
*/
/* System ROM: */
#define XTBOARD_ROM_SIZE XSHAL_ROM_SIZE
#ifdef XSHAL_ROM_VADDR
#define XTBOARD_ROM_VADDR XSHAL_ROM_VADDR
#endif
#ifdef XSHAL_ROM_PADDR
#define XTBOARD_ROM_PADDR XSHAL_ROM_PADDR
#endif
/* System RAM: */
#define XTBOARD_RAM_SIZE XSHAL_RAM_SIZE
#ifdef XSHAL_RAM_VADDR
#define XTBOARD_RAM_VADDR XSHAL_RAM_VADDR
#endif
#ifdef XSHAL_RAM_PADDR
#define XTBOARD_RAM_PADDR XSHAL_RAM_PADDR
#endif
/*
* Things that depend on device addresses.
*/
#define XTBOARD_CACHEATTR_WRITEBACK XSHAL_ISS_CACHEATTR_WRITEBACK
#define XTBOARD_CACHEATTR_WRITEALLOC XSHAL_ISS_CACHEATTR_WRITEALLOC
#define XTBOARD_CACHEATTR_WRITETHRU XSHAL_ISS_CACHEATTR_WRITETHRU
#define XTBOARD_CACHEATTR_BYPASS XSHAL_ISS_CACHEATTR_BYPASS
#define XTBOARD_CACHEATTR_DEFAULT XSHAL_ISS_CACHEATTR_DEFAULT
#define XTBOARD_BUSINT_PIPE_REGIONS 0
#define XTBOARD_BUSINT_SDRAM_REGIONS 0
#endif /*_INC_SIMBOARD_H_*/
/* Error numbers for Xtensa ISS semihosting. */
/* Copyright (c) 2003 by Tensilica Inc. ALL RIGHTS RESERVED.
These coded instructions, statements, and computer programs are the
copyrighted works and confidential proprietary information of Tensilica Inc.
They may not be modified, copied, reproduced, distributed, or disclosed to
third parties in any manner, medium, or form, in whole or in part, without
the prior written consent of Tensilica Inc. */
#ifndef _SIMCALL_ERRNO_H
#define _SIMCALL_ERRNO_H
/* Define the error numbers (using the default newlib values) with prefixes
so they can be used in ISS without conflicting with the host values. */
#define _SIMC_EPERM 1
#define _SIMC_ENOENT 2
#define _SIMC_ESRCH 3
#define _SIMC_EINTR 4
#define _SIMC_EIO 5
#define _SIMC_ENXIO 6
#define _SIMC_E2BIG 7
#define _SIMC_ENOEXEC 8
#define _SIMC_EBADF 9
#define _SIMC_ECHILD 10
#define _SIMC_EAGAIN 11
#define _SIMC_ENOMEM 12
#define _SIMC_EACCES 13
#define _SIMC_EFAULT 14
#define _SIMC_ENOTBLK 15
#define _SIMC_EBUSY 16
#define _SIMC_EEXIST 17
#define _SIMC_EXDEV 18
#define _SIMC_ENODEV 19
#define _SIMC_ENOTDIR 20
#define _SIMC_EISDIR 21
#define _SIMC_EINVAL 22
#define _SIMC_ENFILE 23
#define _SIMC_EMFILE 24
#define _SIMC_ENOTTY 25
#define _SIMC_ETXTBSY 26
#define _SIMC_EFBIG 27
#define _SIMC_ENOSPC 28
#define _SIMC_ESPIPE 29
#define _SIMC_EROFS 30
#define _SIMC_EMLINK 31
#define _SIMC_EPIPE 32
#define _SIMC_EDOM 33
#define _SIMC_ERANGE 34
#define _SIMC_ENOMSG 35
#define _SIMC_EIDRM 36
#define _SIMC_ECHRNG 37
#define _SIMC_EL2NSYNC 38
#define _SIMC_EL3HLT 39
#define _SIMC_EL3RST 40
#define _SIMC_ELNRNG 41
#define _SIMC_EUNATCH 42
#define _SIMC_ENOCSI 43
#define _SIMC_EL2HLT 44
#define _SIMC_EDEADLK 45
#define _SIMC_ENOLCK 46
#define _SIMC_EBADE 50
#define _SIMC_EBADR 51
#define _SIMC_EXFULL 52
#define _SIMC_ENOANO 53
#define _SIMC_EBADRQC 54
#define _SIMC_EBADSLT 55
#define _SIMC_EDEADLOCK 56
#define _SIMC_EBFONT 57
#define _SIMC_ENOSTR 60
#define _SIMC_ENODATA 61
#define _SIMC_ETIME 62
#define _SIMC_ENOSR 63
#define _SIMC_ENONET 64
#define _SIMC_ENOPKG 65
#define _SIMC_EREMOTE 66
#define _SIMC_ENOLINK 67
#define _SIMC_EADV 68
#define _SIMC_ESRMNT 69
#define _SIMC_ECOMM 70
#define _SIMC_EPROTO 71
#define _SIMC_EMULTIHOP 74
#define _SIMC_ELBIN 75
#define _SIMC_EDOTDOT 76
#define _SIMC_EBADMSG 77
#define _SIMC_EFTYPE 79
#define _SIMC_ENOTUNIQ 80
#define _SIMC_EBADFD 81
#define _SIMC_EREMCHG 82
#define _SIMC_ELIBACC 83
#define _SIMC_ELIBBAD 84
#define _SIMC_ELIBSCN 85
#define _SIMC_ELIBMAX 86
#define _SIMC_ELIBEXEC 87
#define _SIMC_ENOSYS 88
#define _SIMC_ENMFILE 89
#define _SIMC_ENOTEMPTY 90
#define _SIMC_ENAMETOOLONG 91
#define _SIMC_ELOOP 92
#define _SIMC_EOPNOTSUPP 95
#define _SIMC_EPFNOSUPPORT 96
#define _SIMC_ECONNRESET 104
#define _SIMC_ENOBUFS 105
#define _SIMC_EAFNOSUPPORT 106
#define _SIMC_EPROTOTYPE 107
#define _SIMC_ENOTSOCK 108
#define _SIMC_ENOPROTOOPT 109
#define _SIMC_ESHUTDOWN 110
#define _SIMC_ECONNREFUSED 111
#define _SIMC_EADDRINUSE 112
#define _SIMC_ECONNABORTED 113
#define _SIMC_ENETUNREACH 114
#define _SIMC_ENETDOWN 115
#define _SIMC_ETIMEDOUT 116
#define _SIMC_EHOSTDOWN 117
#define _SIMC_EHOSTUNREACH 118
#define _SIMC_EINPROGRESS 119
#define _SIMC_EALREADY 120
#define _SIMC_EDESTADDRREQ 121
#define _SIMC_EMSGSIZE 122
#define _SIMC_EPROTONOSUPPORT 123
#define _SIMC_ESOCKTNOSUPPORT 124
#define _SIMC_EADDRNOTAVAIL 125
#define _SIMC_ENETRESET 126
#define _SIMC_EISCONN 127
#define _SIMC_ENOTCONN 128
#define _SIMC_ETOOMANYREFS 129
#define _SIMC_EPROCLIM 130
#define _SIMC_EUSERS 131
#define _SIMC_EDQUOT 132
#define _SIMC_ESTALE 133
#define _SIMC_ENOTSUP 134
#define _SIMC_ENOMEDIUM 135
#define _SIMC_ENOSHARE 136
#define _SIMC_ECASECLASH 137
#define _SIMC_EILSEQ 138
#define _SIMC_EOVERFLOW 139
#endif /* ! _SIMCALL_ERRNO_H */
/* File control operations for Xtensa ISS semihosting. */
/* Copyright (c) 2003 by Tensilica Inc. ALL RIGHTS RESERVED.
These coded instructions, statements, and computer programs are the
copyrighted works and confidential proprietary information of Tensilica Inc.
They may not be modified, copied, reproduced, distributed, or disclosed to
third parties in any manner, medium, or form, in whole or in part, without
the prior written consent of Tensilica Inc. */
#ifndef _SIMCALL_FCNTL_H
#define _SIMCALL_FCNTL_H
#define _SIMC_O_APPEND 0x0008
#define _SIMC_O_NONBLOCK 0x0080
#define _SIMC_O_CREAT 0x0100
#define _SIMC_O_TRUNC 0x0200
#define _SIMC_O_EXCL 0x0400
#define _SIMC_O_TEXT 0x4000
#define _SIMC_O_BINARY 0x8000
#endif /* ! _SIMCALL_FCNTL_H */
/*
* simcall.h - Simulator call numbers
*
* Software that runs on a simulated Xtensa processor using
* the instruction set simulator (ISS) can invoke simulator
* services using the SIMCALL instruction. The a2 register
* is set prior to executing SIMCALL to a "simcall number",
* indicating which service to invoke. This file defines the
* simcall numbers defined and/or supported by the Xtensa ISS.
*
* IMPORTANT NOTE: These numbers are highly subject to change!
*
* Copyright (c) 2002-2007 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
#ifndef SIMCALL_INCLUDED
#define SIMCALL_INCLUDED
/*
* System call like services offered by the simulator host.
* These are modeled after the Linux 2.4 kernel system calls
* for Xtensa processors. However not all system calls and
* not all functionality of a given system call are implemented,
* or necessarily have well defined or equivalent semantics in
* the context of a simulation (as opposed to a Unix kernel).
*
* These services behave largely as if they had been invoked
* as a task in the simulator host's operating system
* (eg. files accessed are those of the simulator host).
* However, these SIMCALLs model a virtual operating system
* so that various definitions, bit assignments etc
* (eg. open mode bits, errno values, etc) are independent
* of the host operating system used to run the simulation.
* Rather these definitions are specific to the Xtensa ISS.
* This way Xtensa ISA code written to use these SIMCALLs
* can (in principle) be simulated on any host.
*
* Up to 6 parameters are passed in registers a3 to a8
* (note the 6th parameter isn't passed on the stack,
* unlike windowed function calling conventions).
* The return value is in a2. A negative value in the
* range -4096 to -1 indicates a negated error code to be
* reported in errno with a return value of -1, otherwise
* the value in a2 is returned as is.
*/
/* These #defines need to match what's in Xtensa/OS/vxworks/xtiss/simcalls.c */
#define SYS_nop 0 /* n/a - setup; used to flush register windows */
#define SYS_exit 1 /*x*/
#define SYS_fork 2
#define SYS_read 3 /*x*/
#define SYS_write 4 /*x*/
#define SYS_open 5 /*x*/
#define SYS_close 6 /*x*/
#define SYS_rename 7 /*x 38 - waitpid */
#define SYS_creat 8 /*x*/
#define SYS_link 9 /*x (not implemented on WIN32) */
#define SYS_unlink 10 /*x*/
#define SYS_execv 11 /* n/a - execve */
#define SYS_execve 12 /* 11 - chdir */
#define SYS_pipe 13 /* 42 - time */
#define SYS_stat 14 /* 106 - mknod */
#define SYS_chmod 15
#define SYS_chown 16 /* 202 - lchown */
#define SYS_utime 17 /* 30 - break */
#define SYS_wait 18 /* n/a - oldstat */
#define SYS_lseek 19 /*x*/
#define SYS_getpid 20
#define SYS_isatty 21 /* n/a - mount */
#define SYS_fstat 22 /* 108 - oldumount */
#define SYS_time 23 /* 13 - setuid */
#define SYS_gettimeofday 24 /*x 78 - getuid (not implemented on WIN32) */
#define SYS_times 25 /*X 43 - stime (Xtensa-specific implementation) */
#define SYS_socket 26
#define SYS_sendto 27
#define SYS_recvfrom 28
#define SYS_select_one 29 /* not compitible select, one file descriptor at the time */
#define SYS_bind 30
#define SYS_ioctl 31
/*
* Other...
*/
#define SYS_iss_argc 1000 /* returns value of argc */
#define SYS_iss_argv_size 1001 /* bytes needed for argv & arg strings */
#define SYS_iss_set_argv 1002 /* saves argv & arg strings at given addr */
#define SYS_memset 1004 /* fill a range of memory (fast) */
/*
* SIMCALLs for the ferret memory debugger. All are invoked by
* libferret.a ... ( Xtensa/Target-Libs/ferret )
*/
#define SYS_ferret 1010
#define SYS_malloc 1011
#define SYS_free 1012
#define SYS_more_heap 1013
#define SYS_no_heap 1014
#define SYS_enter_ferret 1015
#define SYS_leave_ferret 1016
/*
* SIMCALLs for ISS client commands
*/
#define SYS_profile_enable 1020
#define SYS_profile_disable 1021
#define SYS_trace_level 1022
#define SYS_client_command 1023
/*
* SIMCALL for simulation mode switching
*/
#define SYS_sim_mode_switch 1030
/*
* SIMCALLs for XTMP/XTSC event notify and core stall
*/
#define SYS_event_fire 1040
#define SYS_event_stall 1041
/*
* SIMCALLs for callbacks registered in XTMP/XTSC
*/
#define SYS_callback_first 100
#define SYS_callback_last 999
/*
* User defined simcall
*/
#define SYS_user_simcall 100
#define SYS_xmpa_errinfo 200
#define SYS_xmpa_proc_status 201
#define SYS_xmpa_proc_start 202
#define SYS_xmpa_proc_stop 203
#define SYS_xmpa_proc_mem_read 204
#define SYS_xmpa_proc_mem_write 205
#define SYS_xmpa_proc_mem_fill 206
#define SYS_xmpa_proc_reg_read 207
#define SYS_xmpa_proc_reg_write 208
/*
* Extra SIMCALLs for GDB:
*/
#define SYS_gdb_break -1 /* invoked by XTOS on user exceptions if EPC points
to a break.n/break, regardless of cause! */
#define SYS_xmon_out -2 /* invoked by XMON: ... */
#define SYS_xmon_in -3 /* invoked by XMON: ... */
#define SYS_xmon_flush -4 /* invoked by XMON: ... */
#define SYS_gdb_abort -5 /* invoked by XTOS in _xtos_panic() */
#define SYS_gdb_illegal_inst -6 /* invoked by XTOS for illegal instructions (too deeply) */
#define SYS_xmon_init -7 /* invoked by XMON: ... */
#define SYS_gdb_enter_sktloop -8 /* invoked by XTOS on debug exceptions */
#define SYS_unhandled_kernel_exc -9 /* invoked by XTOS for unhandled kernel exceptions */
#define SYS_unhandled_user_exc -10 /* invoked by XTOS for unhandled user exceptions */
#define SYS_unhandled_double_exc -11 /* invoked by XTOS for unhandled double exceptions */
#define SYS_unhandled_highpri_interrupt -12 /* invoked by XTOS for unhandled high-priority interrupts */
#define SYS_xmon_close -13 /* invoked by XMON: ... */
/*
* SIMCALLs for vxWorks xtiss BSP:
*/
#define SYS_setup_ppp_pipes -83
#define SYS_log_msg -84
/*
* SYS_select_one specifiers
*/
#define XTISS_SELECT_ONE_READ 1
#define XTISS_SELECT_ONE_WRITE 2
#define XTISS_SELECT_ONE_EXCEPT 3
/*
* SIMCALL for client calling arbitrary code in a client plug in.
* see clients/xcc_instr to see how this works.
*/
#define SYS_client 0xC0DECAFE
#endif /* !SIMCALL_INCLUDED */
/* Definitions for the xt_DFP_assist TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_DFP_assist_HEADER
#define _XTENSA_xt_DFP_assist_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern void _TIE_xt_DFP_assist_F64ITER(unsigned arr /*inout*/, unsigned ars, unsigned art, immediate oper, immediate noshift);
extern unsigned _TIE_xt_DFP_assist_F64RND(unsigned ars, unsigned art, immediate mode);
extern void _TIE_xt_DFP_assist_F64ADDC(unsigned art /*inout*/, unsigned ars, immediate immZ, immediate immC);
extern void _TIE_xt_DFP_assist_F64SUBC(unsigned art /*inout*/, unsigned ars, immediate immZ, immediate immC);
extern unsigned _TIE_xt_DFP_assist_F64SIG(unsigned ars);
extern unsigned _TIE_xt_DFP_assist_F64CMPL(unsigned ars, unsigned art);
extern unsigned _TIE_xt_DFP_assist_F64CMPH(unsigned ars, unsigned art, immediate oper);
extern unsigned _TIE_xt_DFP_assist_F64NORM(unsigned ars, unsigned art, immediate mode);
extern unsigned _TIE_xt_DFP_assist_F64SEXP(unsigned ars, unsigned art);
extern unsigned _TIE_xt_DFP_assist_RF64R(immediate hilo);
extern void _TIE_xt_DFP_assist_WF64R(unsigned ars, unsigned art, immediate hilo);
extern unsigned _TIE_xt_DFP_assist_RUR_F64R_LO(void);
extern unsigned _TIE_xt_DFP_assist_RUR_F64R_HI(void);
extern void _TIE_xt_DFP_assist_WUR_F64R_LO(unsigned art);
extern void _TIE_xt_DFP_assist_WUR_F64R_HI(unsigned art);
extern unsigned _TIE_xt_DFP_assist_RUR_F64S(void);
extern void _TIE_xt_DFP_assist_WUR_F64S(unsigned art);
#define F64ITER _TIE_xt_DFP_assist_F64ITER
#define F64RND _TIE_xt_DFP_assist_F64RND
#define F64ADDC _TIE_xt_DFP_assist_F64ADDC
#define F64SUBC _TIE_xt_DFP_assist_F64SUBC
#define F64SIG _TIE_xt_DFP_assist_F64SIG
#define F64CMPL _TIE_xt_DFP_assist_F64CMPL
#define F64CMPH _TIE_xt_DFP_assist_F64CMPH
#define F64NORM _TIE_xt_DFP_assist_F64NORM
#define F64SEXP _TIE_xt_DFP_assist_F64SEXP
#define RF64R _TIE_xt_DFP_assist_RF64R
#define WF64R _TIE_xt_DFP_assist_WF64R
#define RUR_F64R_LO _TIE_xt_DFP_assist_RUR_F64R_LO
#define RF64R_LO _TIE_xt_DFP_assist_RUR_F64R_LO
#define RUR234 _TIE_xt_DFP_assist_RUR_F64R_LO
#define RUR_F64R_HI _TIE_xt_DFP_assist_RUR_F64R_HI
#define RF64R_HI _TIE_xt_DFP_assist_RUR_F64R_HI
#define RUR235 _TIE_xt_DFP_assist_RUR_F64R_HI
#define WUR_F64R_LO _TIE_xt_DFP_assist_WUR_F64R_LO
#define WF64R_LO _TIE_xt_DFP_assist_WUR_F64R_LO
#define WUR234 _TIE_xt_DFP_assist_WUR_F64R_LO
#define WUR_F64R_HI _TIE_xt_DFP_assist_WUR_F64R_HI
#define WF64R_HI _TIE_xt_DFP_assist_WUR_F64R_HI
#define WUR235 _TIE_xt_DFP_assist_WUR_F64R_HI
#define RUR_F64S _TIE_xt_DFP_assist_RUR_F64S
#define RF64S _TIE_xt_DFP_assist_RUR_F64S
#define RUR236 _TIE_xt_DFP_assist_RUR_F64S
#define WUR_F64S _TIE_xt_DFP_assist_WUR_F64S
#define WF64S _TIE_xt_DFP_assist_WUR_F64S
#define WUR236 _TIE_xt_DFP_assist_WUR_F64S
#ifndef RUR
#define RUR(NUM) RUR##NUM()
#endif
#ifndef WUR
#define WUR(VAL, NUM) WUR##NUM(VAL)
#endif
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_DFP_assist_HEADER */
/* Definitions for the xt_FP TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_FP_HEADER
#define _XTENSA_xt_FP_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
#include <xtensa/tie/xt_booleans.h>
typedef float _TIE_xt_FP_xtfloat;
typedef _TIE_xt_FP_xtfloat xtfloat;
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern unsigned _TIE_xt_FP_RUR_FCR(void);
extern void _TIE_xt_FP_WUR_FCR(unsigned v);
extern unsigned _TIE_xt_FP_RUR_FSR(void);
extern void _TIE_xt_FP_WUR_FSR(unsigned v);
extern xtfloat _TIE_xt_FP_xtfloat_loadi(const xtfloat * p, immediate imm8x4);
extern void _TIE_xt_FP_xtfloat_storei(xtfloat t, xtfloat * p, immediate imm8x4);
extern void _TIE_xt_FP_xtfloat_loadip(xtfloat t /*out*/, const xtfloat * p /*inout*/, immediate imm8x4);
extern void _TIE_xt_FP_xtfloat_storeip(xtfloat t, xtfloat * p /*inout*/, immediate imm8x4);
extern xtfloat _TIE_xt_FP_xtfloat_loadx(const xtfloat * p, int imm8x4);
extern void _TIE_xt_FP_xtfloat_storex(xtfloat t, xtfloat * p, int imm8x4);
extern void _TIE_xt_FP_xtfloat_loadxp(xtfloat t /*out*/, const xtfloat * p /*inout*/, int imm8x4);
extern void _TIE_xt_FP_xtfloat_storexp(xtfloat t, xtfloat * p /*inout*/, int imm8x4);
extern xtfloat _TIE_xt_FP_xtfloat_move(xtfloat r);
extern int _TIE_xt_FP_ROUND_S(xtfloat s, immediate t);
extern int _TIE_xt_FP_TRUNC_S(xtfloat s, immediate t);
extern unsigned _TIE_xt_FP_UTRUNC_S(xtfloat s, immediate t);
extern int _TIE_xt_FP_FLOOR_S(xtfloat s, immediate t);
extern int _TIE_xt_FP_CEIL_S(xtfloat s, immediate t);
extern xtfloat _TIE_xt_FP_LSI(const xtfloat * p, immediate imm8x4);
extern void _TIE_xt_FP_SSI(xtfloat t, xtfloat * p, immediate imm8x4);
extern void _TIE_xt_FP_LSIP(xtfloat t /*out*/, const xtfloat * p /*inout*/, immediate imm8x4);
extern void _TIE_xt_FP_SSIP(xtfloat t, xtfloat * p /*inout*/, immediate imm8x4);
extern xtfloat _TIE_xt_FP_LSX(const xtfloat * p, int imm8x4);
extern void _TIE_xt_FP_SSX(xtfloat t, xtfloat * p, int imm8x4);
extern void _TIE_xt_FP_LSXP(xtfloat t /*out*/, const xtfloat * p /*inout*/, int imm8x4);
extern void _TIE_xt_FP_SSXP(xtfloat t, xtfloat * p /*inout*/, int imm8x4);
extern xtfloat _TIE_xt_FP_ABS_S(xtfloat s);
extern xtfloat _TIE_xt_FP_NEG_S(xtfloat s);
extern xtfloat _TIE_xt_FP_MOV_S(xtfloat s);
extern void _TIE_xt_FP_MOVEQZ_S(xtfloat r /*inout*/, xtfloat s, int t);
extern void _TIE_xt_FP_MOVNEZ_S(xtfloat r /*inout*/, xtfloat s, int t);
extern void _TIE_xt_FP_MOVLTZ_S(xtfloat r /*inout*/, xtfloat s, int t);
extern void _TIE_xt_FP_MOVGEZ_S(xtfloat r /*inout*/, xtfloat s, int t);
extern void _TIE_xt_FP_MOVF_S(xtfloat r /*inout*/, xtfloat s, xtbool t);
extern void _TIE_xt_FP_MOVT_S(xtfloat r /*inout*/, xtfloat s, xtbool t);
extern unsigned _TIE_xt_FP_RFR(xtfloat s);
extern xtfloat _TIE_xt_FP_WFR(unsigned s);
extern xtfloat _TIE_xt_FP_FLOAT_S(int s, immediate t);
extern xtfloat _TIE_xt_FP_UFLOAT_S(unsigned s, immediate t);
extern xtbool _TIE_xt_FP_OEQ_S(xtfloat s, xtfloat t);
extern xtbool _TIE_xt_FP_OLE_S(xtfloat s, xtfloat t);
extern xtbool _TIE_xt_FP_OLT_S(xtfloat s, xtfloat t);
extern xtbool _TIE_xt_FP_UEQ_S(xtfloat s, xtfloat t);
extern xtbool _TIE_xt_FP_ULE_S(xtfloat s, xtfloat t);
extern xtbool _TIE_xt_FP_ULT_S(xtfloat s, xtfloat t);
extern xtbool _TIE_xt_FP_UN_S(xtfloat s, xtfloat t);
extern xtfloat _TIE_xt_FP_ADD_S(xtfloat s, xtfloat t);
extern xtfloat _TIE_xt_FP_SUB_S(xtfloat s, xtfloat t);
extern xtfloat _TIE_xt_FP_MUL_S(xtfloat s, xtfloat t);
extern void _TIE_xt_FP_MADD_S(xtfloat r /*inout*/, xtfloat s, xtfloat t);
extern void _TIE_xt_FP_MSUB_S(xtfloat r /*inout*/, xtfloat s, xtfloat t);
extern xtfloat _TIE_xt_FP_RECIP0_S(xtfloat s);
extern xtfloat _TIE_xt_FP_DIV0_S(xtfloat s);
extern xtfloat _TIE_xt_FP_NEXP01_S(xtfloat s);
extern xtfloat _TIE_xt_FP_CONST_S(immediate s);
extern void _TIE_xt_FP_MKDADJ_S(xtfloat r /*inout*/, xtfloat s);
extern xtfloat _TIE_xt_FP_MKSADJ_S(xtfloat s);
extern void _TIE_xt_FP_ADDEXPM_S(xtfloat r /*inout*/, xtfloat s);
extern void _TIE_xt_FP_ADDEXP_S(xtfloat r /*inout*/, xtfloat s);
extern void _TIE_xt_FP_DIVN_S(xtfloat r /*inout*/, xtfloat s, xtfloat t);
extern xtfloat _TIE_xt_FP_RSQRT0_S(xtfloat s);
extern xtfloat _TIE_xt_FP_SQRT0_S(xtfloat s);
extern void _TIE_xt_FP_MADDN_S(xtfloat r /*inout*/, xtfloat s, xtfloat t);
extern xtfloat _TIE_xt_FP_DIV_S(xtfloat s, xtfloat t);
extern xtfloat _TIE_xt_FP_SQRT_S(xtfloat s);
extern xtfloat _TIE_xt_FP_RECIP_S(xtfloat s);
extern xtfloat _TIE_xt_FP_RSQRT_S(xtfloat s);
extern xtfloat _TIE_xt_FP_FSQRT_S(xtfloat s);
#define XT_RUR_FCR _TIE_xt_FP_RUR_FCR
#define RFCR _TIE_xt_FP_RUR_FCR
#define RUR232 _TIE_xt_FP_RUR_FCR
#define XT_WUR_FCR _TIE_xt_FP_WUR_FCR
#define WFCR _TIE_xt_FP_WUR_FCR
#define WUR232 _TIE_xt_FP_WUR_FCR
#define XT_RUR_FSR _TIE_xt_FP_RUR_FSR
#define RFSR _TIE_xt_FP_RUR_FSR
#define RUR233 _TIE_xt_FP_RUR_FSR
#define XT_WUR_FSR _TIE_xt_FP_WUR_FSR
#define WFSR _TIE_xt_FP_WUR_FSR
#define WUR233 _TIE_xt_FP_WUR_FSR
#define XT_xtfloat_loadi _TIE_xt_FP_xtfloat_loadi
#define XT_xtfloat_storei _TIE_xt_FP_xtfloat_storei
#define XT_xtfloat_loadip _TIE_xt_FP_xtfloat_loadip
#define XT_xtfloat_storeip _TIE_xt_FP_xtfloat_storeip
#define XT_xtfloat_loadx _TIE_xt_FP_xtfloat_loadx
#define XT_xtfloat_storex _TIE_xt_FP_xtfloat_storex
#define XT_xtfloat_loadxp _TIE_xt_FP_xtfloat_loadxp
#define XT_xtfloat_storexp _TIE_xt_FP_xtfloat_storexp
#define XT_xtfloat_move _TIE_xt_FP_xtfloat_move
#define XT_ROUND_S _TIE_xt_FP_ROUND_S
#define XT_TRUNC_S _TIE_xt_FP_TRUNC_S
#define XT_UTRUNC_S _TIE_xt_FP_UTRUNC_S
#define XT_FLOOR_S _TIE_xt_FP_FLOOR_S
#define XT_CEIL_S _TIE_xt_FP_CEIL_S
#define XT_LSI _TIE_xt_FP_LSI
#define XT_SSI _TIE_xt_FP_SSI
#define XT_LSIP _TIE_xt_FP_LSIP
#define XT_SSIP _TIE_xt_FP_SSIP
#define XT_LSX _TIE_xt_FP_LSX
#define XT_SSX _TIE_xt_FP_SSX
#define XT_LSXP _TIE_xt_FP_LSXP
#define XT_SSXP _TIE_xt_FP_SSXP
#define XT_ABS_S _TIE_xt_FP_ABS_S
#define XT_NEG_S _TIE_xt_FP_NEG_S
#define XT_MOV_S _TIE_xt_FP_MOV_S
#define XT_MOVEQZ_S _TIE_xt_FP_MOVEQZ_S
#define XT_MOVNEZ_S _TIE_xt_FP_MOVNEZ_S
#define XT_MOVLTZ_S _TIE_xt_FP_MOVLTZ_S
#define XT_MOVGEZ_S _TIE_xt_FP_MOVGEZ_S
#define XT_MOVF_S _TIE_xt_FP_MOVF_S
#define XT_MOVT_S _TIE_xt_FP_MOVT_S
#define XT_RFR _TIE_xt_FP_RFR
#define XT_WFR _TIE_xt_FP_WFR
#define XT_FLOAT_S _TIE_xt_FP_FLOAT_S
#define XT_UFLOAT_S _TIE_xt_FP_UFLOAT_S
#define XT_OEQ_S _TIE_xt_FP_OEQ_S
#define XT_OLE_S _TIE_xt_FP_OLE_S
#define XT_OLT_S _TIE_xt_FP_OLT_S
#define XT_UEQ_S _TIE_xt_FP_UEQ_S
#define XT_ULE_S _TIE_xt_FP_ULE_S
#define XT_ULT_S _TIE_xt_FP_ULT_S
#define XT_UN_S _TIE_xt_FP_UN_S
#define XT_ADD_S _TIE_xt_FP_ADD_S
#define XT_SUB_S _TIE_xt_FP_SUB_S
#define XT_MUL_S _TIE_xt_FP_MUL_S
#define XT_MADD_S _TIE_xt_FP_MADD_S
#define XT_MSUB_S _TIE_xt_FP_MSUB_S
#define XT_RECIP0_S _TIE_xt_FP_RECIP0_S
#define XT_DIV0_S _TIE_xt_FP_DIV0_S
#define XT_NEXP01_S _TIE_xt_FP_NEXP01_S
#define XT_CONST_S _TIE_xt_FP_CONST_S
#define XT_MKDADJ_S _TIE_xt_FP_MKDADJ_S
#define XT_MKSADJ_S _TIE_xt_FP_MKSADJ_S
#define XT_ADDEXPM_S _TIE_xt_FP_ADDEXPM_S
#define XT_ADDEXP_S _TIE_xt_FP_ADDEXP_S
#define XT_DIVN_S _TIE_xt_FP_DIVN_S
#define XT_RSQRT0_S _TIE_xt_FP_RSQRT0_S
#define XT_SQRT0_S _TIE_xt_FP_SQRT0_S
#define XT_MADDN_S _TIE_xt_FP_MADDN_S
#define XT_DIV_S _TIE_xt_FP_DIV_S
#define XT_SQRT_S _TIE_xt_FP_SQRT_S
#define XT_RECIP_S _TIE_xt_FP_RECIP_S
#define XT_RSQRT_S _TIE_xt_FP_RSQRT_S
#define XT_FSQRT_S _TIE_xt_FP_FSQRT_S
#ifndef RUR
#define RUR(NUM) RUR##NUM()
#endif
#ifndef WUR
#define WUR(VAL, NUM) WUR##NUM(VAL)
#endif
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_FP_HEADER */
/* Definitions for the xt_MAC16 TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_MAC16_HEADER
#define _XTENSA_xt_MAC16_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
#include <xtensa/tie/xt_mul.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern void _TIE_xt_MAC16_UMUL_AA_HH(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_UMUL_AA_LH(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_UMUL_AA_HL(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_UMUL_AA_LL(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MUL_AA_HH(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MUL_AA_LH(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MUL_AA_HL(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MUL_AA_LL(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MUL_AD_HH(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MUL_AD_LH(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MUL_AD_HL(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MUL_AD_LL(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MUL_DA_HH(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MUL_DA_LH(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MUL_DA_HL(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MUL_DA_LL(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MUL_DD_HH(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MUL_DD_LH(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MUL_DD_HL(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MUL_DD_LL(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MULS_AA_HH(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MULS_AA_LH(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MULS_AA_HL(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MULS_AA_LL(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MULA_AA_HH(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MULA_AA_LH(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MULA_AA_HL(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MULA_AA_LL(unsigned ars, unsigned art);
extern void _TIE_xt_MAC16_MULS_AD_HH(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MULS_AD_LH(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MULS_AD_HL(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MULS_AD_LL(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MULA_AD_HH(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MULA_AD_LH(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MULA_AD_HL(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MULA_AD_LL(unsigned ars, immediate my);
extern void _TIE_xt_MAC16_MULS_DA_HH(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MULS_DA_LH(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MULS_DA_HL(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MULS_DA_LL(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MULA_DA_HH(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MULA_DA_LH(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MULA_DA_HL(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MULA_DA_LL(immediate mx, unsigned art);
extern void _TIE_xt_MAC16_MULS_DD_HH(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MULS_DD_LH(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MULS_DD_HL(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MULS_DD_LL(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MULA_DD_HH(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MULA_DD_LH(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MULA_DD_HL(immediate mx, immediate my);
extern void _TIE_xt_MAC16_MULA_DD_LL(immediate mx, immediate my);
extern unsigned _TIE_xt_MAC16_RSR_M0(void);
extern void _TIE_xt_MAC16_WSR_M0(unsigned art);
extern void _TIE_xt_MAC16_XSR_M0(unsigned art /*inout*/);
extern unsigned _TIE_xt_MAC16_RSR_M1(void);
extern void _TIE_xt_MAC16_WSR_M1(unsigned art);
extern void _TIE_xt_MAC16_XSR_M1(unsigned art /*inout*/);
extern unsigned _TIE_xt_MAC16_RSR_M2(void);
extern void _TIE_xt_MAC16_WSR_M2(unsigned art);
extern void _TIE_xt_MAC16_XSR_M2(unsigned art /*inout*/);
extern unsigned _TIE_xt_MAC16_RSR_M3(void);
extern void _TIE_xt_MAC16_WSR_M3(unsigned art);
extern void _TIE_xt_MAC16_XSR_M3(unsigned art /*inout*/);
extern unsigned _TIE_xt_MAC16_RSR_ACCLO(void);
extern void _TIE_xt_MAC16_WSR_ACCLO(unsigned art);
extern void _TIE_xt_MAC16_XSR_ACCLO(unsigned art /*inout*/);
extern unsigned _TIE_xt_MAC16_RSR_ACCHI(void);
extern void _TIE_xt_MAC16_WSR_ACCHI(unsigned art);
extern void _TIE_xt_MAC16_XSR_ACCHI(unsigned art /*inout*/);
extern void _TIE_xt_MAC16_MULA_DA_LL_LDDEC(immediate w, const short * s /*inout*/, immediate x, int t);
extern void _TIE_xt_MAC16_MULA_DA_LL_LDINC(immediate w, const short * s /*inout*/, immediate x, int t);
extern void _TIE_xt_MAC16_MULA_DA_HL_LDDEC(immediate w, const short * s /*inout*/, immediate x, int t);
extern void _TIE_xt_MAC16_MULA_DA_HL_LDINC(immediate w, const short * s /*inout*/, immediate x, int t);
extern void _TIE_xt_MAC16_MULA_DA_LH_LDDEC(immediate w, const short * s /*inout*/, immediate x, int t);
extern void _TIE_xt_MAC16_MULA_DA_LH_LDINC(immediate w, const short * s /*inout*/, immediate x, int t);
extern void _TIE_xt_MAC16_MULA_DA_HH_LDDEC(immediate w, const short * s /*inout*/, immediate x, int t);
extern void _TIE_xt_MAC16_MULA_DA_HH_LDINC(immediate w, const short * s /*inout*/, immediate x, int t);
extern void _TIE_xt_MAC16_MULA_DD_LL_LDDEC(immediate w, const short * s /*inout*/, immediate x, immediate y);
extern void _TIE_xt_MAC16_MULA_DD_LL_LDINC(immediate w, const short * s /*inout*/, immediate x, immediate y);
extern void _TIE_xt_MAC16_MULA_DD_HL_LDDEC(immediate w, const short * s /*inout*/, immediate x, immediate y);
extern void _TIE_xt_MAC16_MULA_DD_HL_LDINC(immediate w, const short * s /*inout*/, immediate x, immediate y);
extern void _TIE_xt_MAC16_MULA_DD_LH_LDDEC(immediate w, const short * s /*inout*/, immediate x, immediate y);
extern void _TIE_xt_MAC16_MULA_DD_LH_LDINC(immediate w, const short * s /*inout*/, immediate x, immediate y);
extern void _TIE_xt_MAC16_MULA_DD_HH_LDDEC(immediate w, const short * s /*inout*/, immediate x, immediate y);
extern void _TIE_xt_MAC16_MULA_DD_HH_LDINC(immediate w, const short * s /*inout*/, immediate x, immediate y);
extern void _TIE_xt_MAC16_LDDEC(immediate w, const short * p /*inout*/);
extern void _TIE_xt_MAC16_ULDDEC(immediate w, const unsigned short * p /*inout*/);
extern void _TIE_xt_MAC16_SLDDEC(immediate w, const short * p /*inout*/);
extern void _TIE_xt_MAC16_LDINC(immediate w, const short * p /*inout*/);
extern void _TIE_xt_MAC16_ULDINC(immediate w, const unsigned short * p /*inout*/);
extern void _TIE_xt_MAC16_SLDINC(immediate w, const short * p /*inout*/);
extern int _TIE_xt_MAC16_RSR16(void);
extern void _TIE_xt_MAC16_WSR16(int t);
extern void _TIE_xt_MAC16_XSR16(int t /*inout*/);
extern int _TIE_xt_MAC16_RSR17(void);
extern void _TIE_xt_MAC16_WSR17(int t);
extern void _TIE_xt_MAC16_XSR17(int t /*inout*/);
#define XT_UMUL_AA_HH _TIE_xt_MAC16_UMUL_AA_HH
#define XT_UMUL_AA_LH _TIE_xt_MAC16_UMUL_AA_LH
#define XT_UMUL_AA_HL _TIE_xt_MAC16_UMUL_AA_HL
#define XT_UMUL_AA_LL _TIE_xt_MAC16_UMUL_AA_LL
#define XT_MUL_AA_HH _TIE_xt_MAC16_MUL_AA_HH
#define XT_MUL_AA_LH _TIE_xt_MAC16_MUL_AA_LH
#define XT_MUL_AA_HL _TIE_xt_MAC16_MUL_AA_HL
#define XT_MUL_AA_LL _TIE_xt_MAC16_MUL_AA_LL
#define XT_MUL_AD_HH _TIE_xt_MAC16_MUL_AD_HH
#define XT_MUL_AD_LH _TIE_xt_MAC16_MUL_AD_LH
#define XT_MUL_AD_HL _TIE_xt_MAC16_MUL_AD_HL
#define XT_MUL_AD_LL _TIE_xt_MAC16_MUL_AD_LL
#define XT_MUL_DA_HH _TIE_xt_MAC16_MUL_DA_HH
#define XT_MUL_DA_LH _TIE_xt_MAC16_MUL_DA_LH
#define XT_MUL_DA_HL _TIE_xt_MAC16_MUL_DA_HL
#define XT_MUL_DA_LL _TIE_xt_MAC16_MUL_DA_LL
#define XT_MUL_DD_HH _TIE_xt_MAC16_MUL_DD_HH
#define XT_MUL_DD_LH _TIE_xt_MAC16_MUL_DD_LH
#define XT_MUL_DD_HL _TIE_xt_MAC16_MUL_DD_HL
#define XT_MUL_DD_LL _TIE_xt_MAC16_MUL_DD_LL
#define XT_MULS_AA_HH _TIE_xt_MAC16_MULS_AA_HH
#define XT_MULS_AA_LH _TIE_xt_MAC16_MULS_AA_LH
#define XT_MULS_AA_HL _TIE_xt_MAC16_MULS_AA_HL
#define XT_MULS_AA_LL _TIE_xt_MAC16_MULS_AA_LL
#define XT_MULA_AA_HH _TIE_xt_MAC16_MULA_AA_HH
#define XT_MULA_AA_LH _TIE_xt_MAC16_MULA_AA_LH
#define XT_MULA_AA_HL _TIE_xt_MAC16_MULA_AA_HL
#define XT_MULA_AA_LL _TIE_xt_MAC16_MULA_AA_LL
#define XT_MULS_AD_HH _TIE_xt_MAC16_MULS_AD_HH
#define XT_MULS_AD_LH _TIE_xt_MAC16_MULS_AD_LH
#define XT_MULS_AD_HL _TIE_xt_MAC16_MULS_AD_HL
#define XT_MULS_AD_LL _TIE_xt_MAC16_MULS_AD_LL
#define XT_MULA_AD_HH _TIE_xt_MAC16_MULA_AD_HH
#define XT_MULA_AD_LH _TIE_xt_MAC16_MULA_AD_LH
#define XT_MULA_AD_HL _TIE_xt_MAC16_MULA_AD_HL
#define XT_MULA_AD_LL _TIE_xt_MAC16_MULA_AD_LL
#define XT_MULS_DA_HH _TIE_xt_MAC16_MULS_DA_HH
#define XT_MULS_DA_LH _TIE_xt_MAC16_MULS_DA_LH
#define XT_MULS_DA_HL _TIE_xt_MAC16_MULS_DA_HL
#define XT_MULS_DA_LL _TIE_xt_MAC16_MULS_DA_LL
#define XT_MULA_DA_HH _TIE_xt_MAC16_MULA_DA_HH
#define XT_MULA_DA_LH _TIE_xt_MAC16_MULA_DA_LH
#define XT_MULA_DA_HL _TIE_xt_MAC16_MULA_DA_HL
#define XT_MULA_DA_LL _TIE_xt_MAC16_MULA_DA_LL
#define XT_MULS_DD_HH _TIE_xt_MAC16_MULS_DD_HH
#define XT_MULS_DD_LH _TIE_xt_MAC16_MULS_DD_LH
#define XT_MULS_DD_HL _TIE_xt_MAC16_MULS_DD_HL
#define XT_MULS_DD_LL _TIE_xt_MAC16_MULS_DD_LL
#define XT_MULA_DD_HH _TIE_xt_MAC16_MULA_DD_HH
#define XT_MULA_DD_LH _TIE_xt_MAC16_MULA_DD_LH
#define XT_MULA_DD_HL _TIE_xt_MAC16_MULA_DD_HL
#define XT_MULA_DD_LL _TIE_xt_MAC16_MULA_DD_LL
#define XT_RSR_M0 _TIE_xt_MAC16_RSR_M0
#define XT_WSR_M0 _TIE_xt_MAC16_WSR_M0
#define XT_XSR_M0 _TIE_xt_MAC16_XSR_M0
#define XT_RSR_M1 _TIE_xt_MAC16_RSR_M1
#define XT_WSR_M1 _TIE_xt_MAC16_WSR_M1
#define XT_XSR_M1 _TIE_xt_MAC16_XSR_M1
#define XT_RSR_M2 _TIE_xt_MAC16_RSR_M2
#define XT_WSR_M2 _TIE_xt_MAC16_WSR_M2
#define XT_XSR_M2 _TIE_xt_MAC16_XSR_M2
#define XT_RSR_M3 _TIE_xt_MAC16_RSR_M3
#define XT_WSR_M3 _TIE_xt_MAC16_WSR_M3
#define XT_XSR_M3 _TIE_xt_MAC16_XSR_M3
#define XT_RSR_ACCLO _TIE_xt_MAC16_RSR_ACCLO
#define XT_WSR_ACCLO _TIE_xt_MAC16_WSR_ACCLO
#define XT_XSR_ACCLO _TIE_xt_MAC16_XSR_ACCLO
#define XT_RSR_ACCHI _TIE_xt_MAC16_RSR_ACCHI
#define XT_WSR_ACCHI _TIE_xt_MAC16_WSR_ACCHI
#define XT_XSR_ACCHI _TIE_xt_MAC16_XSR_ACCHI
#define XT_MULA_DA_LL_LDDEC _TIE_xt_MAC16_MULA_DA_LL_LDDEC
#define XT_MULA_DA_LL_LDINC _TIE_xt_MAC16_MULA_DA_LL_LDINC
#define XT_MULA_DA_HL_LDDEC _TIE_xt_MAC16_MULA_DA_HL_LDDEC
#define XT_MULA_DA_HL_LDINC _TIE_xt_MAC16_MULA_DA_HL_LDINC
#define XT_MULA_DA_LH_LDDEC _TIE_xt_MAC16_MULA_DA_LH_LDDEC
#define XT_MULA_DA_LH_LDINC _TIE_xt_MAC16_MULA_DA_LH_LDINC
#define XT_MULA_DA_HH_LDDEC _TIE_xt_MAC16_MULA_DA_HH_LDDEC
#define XT_MULA_DA_HH_LDINC _TIE_xt_MAC16_MULA_DA_HH_LDINC
#define XT_MULA_DD_LL_LDDEC _TIE_xt_MAC16_MULA_DD_LL_LDDEC
#define XT_MULA_DD_LL_LDINC _TIE_xt_MAC16_MULA_DD_LL_LDINC
#define XT_MULA_DD_HL_LDDEC _TIE_xt_MAC16_MULA_DD_HL_LDDEC
#define XT_MULA_DD_HL_LDINC _TIE_xt_MAC16_MULA_DD_HL_LDINC
#define XT_MULA_DD_LH_LDDEC _TIE_xt_MAC16_MULA_DD_LH_LDDEC
#define XT_MULA_DD_LH_LDINC _TIE_xt_MAC16_MULA_DD_LH_LDINC
#define XT_MULA_DD_HH_LDDEC _TIE_xt_MAC16_MULA_DD_HH_LDDEC
#define XT_MULA_DD_HH_LDINC _TIE_xt_MAC16_MULA_DD_HH_LDINC
#define XT_LDDEC _TIE_xt_MAC16_LDDEC
#define XT_ULDDEC _TIE_xt_MAC16_ULDDEC
#define XT_SLDDEC _TIE_xt_MAC16_SLDDEC
#define XT_LDINC _TIE_xt_MAC16_LDINC
#define XT_ULDINC _TIE_xt_MAC16_ULDINC
#define XT_SLDINC _TIE_xt_MAC16_SLDINC
#define XT_RSR16 _TIE_xt_MAC16_RSR16
#define XT_WSR16 _TIE_xt_MAC16_WSR16
#define XT_XSR16 _TIE_xt_MAC16_XSR16
#define XT_RSR17 _TIE_xt_MAC16_RSR17
#define XT_WSR17 _TIE_xt_MAC16_WSR17
#define XT_XSR17 _TIE_xt_MAC16_XSR17
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_MAC16_HEADER */
/* Definitions for the 32-bit Integer Multiply Option. */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2009 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* NOTE: This file exists only for backward compatibility with RB-200X.x
and earlier Xtensa releases. Starting with RC-2009.0 you should use
<xtensa/tie/xt_mul.h>. */
#ifndef _XTENSA_xt_MUL32_HEADER
#define _XTENSA_xt_MUL32_HEADER
#ifdef __XTENSA__
#include <xtensa/tie/xt_mul.h>
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_MUL32_HEADER */
/* Definitions for the xt_booleans TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_booleans_HEADER
#define _XTENSA_xt_booleans_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
typedef _TIE_xtbool xtbool;
typedef _TIE_xtbool2 xtbool2;
typedef _TIE_xtbool4 xtbool4;
typedef _TIE_xtbool8 xtbool8;
typedef _TIE_xtbool16 xtbool16;
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern xtbool _TIE_xt_booleans_XORB(xtbool bs, xtbool bt);
extern xtbool _TIE_xt_booleans_ORBC(xtbool bs, xtbool bt);
extern xtbool _TIE_xt_booleans_ORB(xtbool bs, xtbool bt);
extern xtbool _TIE_xt_booleans_ANDBC(xtbool bs, xtbool bt);
extern xtbool _TIE_xt_booleans_ANDB(xtbool bs, xtbool bt);
extern xtbool _TIE_xt_booleans_ALL4(xtbool4 bs4);
extern xtbool _TIE_xt_booleans_ANY4(xtbool4 bs4);
extern xtbool _TIE_xt_booleans_ALL8(xtbool8 bs8);
extern xtbool _TIE_xt_booleans_ANY8(xtbool8 bs8);
extern void _TIE_xt_booleans_MOVT(unsigned arr /*inout*/, unsigned ars, xtbool bt);
extern void _TIE_xt_booleans_MOVF(unsigned arr /*inout*/, unsigned ars, xtbool bt);
#define XT_XORB _TIE_xt_booleans_XORB
#define XT_ORBC _TIE_xt_booleans_ORBC
#define XT_ORB _TIE_xt_booleans_ORB
#define XT_ANDBC _TIE_xt_booleans_ANDBC
#define XT_ANDB _TIE_xt_booleans_ANDB
#define XT_ALL4 _TIE_xt_booleans_ALL4
#define XT_ANY4 _TIE_xt_booleans_ANY4
#define XT_ALL8 _TIE_xt_booleans_ALL8
#define XT_ANY8 _TIE_xt_booleans_ANY8
#define XT_MOVT _TIE_xt_booleans_MOVT
#define XT_MOVF _TIE_xt_booleans_MOVF
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_booleans_HEADER */
/* Definitions for the xt_coprocessors TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_coprocessors_HEADER
#define _XTENSA_xt_coprocessors_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern unsigned _TIE_xt_coprocessors_RSR_CPENABLE(void);
extern void _TIE_xt_coprocessors_WSR_CPENABLE(unsigned art);
extern void _TIE_xt_coprocessors_XSR_CPENABLE(unsigned art /*inout*/);
#define XT_RSR_CPENABLE _TIE_xt_coprocessors_RSR_CPENABLE
#define XT_WSR_CPENABLE _TIE_xt_coprocessors_WSR_CPENABLE
#define XT_XSR_CPENABLE _TIE_xt_coprocessors_XSR_CPENABLE
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_coprocessors_HEADER */
/* Definitions for the xt_core TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_core_HEADER
#define _XTENSA_xt_core_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern void _TIE_xt_core_ILL(void);
extern void _TIE_xt_core_NOP(void);
extern void _TIE_xt_core_SIMCALL(void);
extern void _TIE_xt_core_MEMW(void);
extern void _TIE_xt_core_EXTW(void);
extern void _TIE_xt_core_ISYNC(void);
extern void _TIE_xt_core_DSYNC(void);
extern void _TIE_xt_core_ESYNC(void);
extern void _TIE_xt_core_RSYNC(void);
extern unsigned _TIE_xt_core_RSR_LBEG(void);
extern void _TIE_xt_core_WSR_LBEG(unsigned art);
extern void _TIE_xt_core_XSR_LBEG(unsigned art /*inout*/);
extern unsigned _TIE_xt_core_RSR_CONFIGID0(void);
extern void _TIE_xt_core_WSR_CONFIGID0(unsigned art);
extern unsigned _TIE_xt_core_RSR_CONFIGID1(void);
extern unsigned _TIE_xt_core_RUR_THREADPTR(void);
extern void _TIE_xt_core_WUR_THREADPTR(unsigned v);
extern unsigned _TIE_xt_core_uint32_loadi(const unsigned * p, immediate o);
extern void _TIE_xt_core_uint32_storei(unsigned c, unsigned * p, immediate o);
extern unsigned _TIE_xt_core_uint32_move(unsigned b);
extern int _TIE_xt_core_ADDI(int s, immediate i);
extern int _TIE_xt_core_OR(int s, int t);
extern int _TIE_xt_core_L32I(const int * p, immediate i);
extern void _TIE_xt_core_S32I(int r, int * p, immediate i);
extern void _TIE_xt_core_S32NB(int r, int * p, immediate i);
extern unsigned char _TIE_xt_core_L8UI(const unsigned char * p, immediate i);
extern void _TIE_xt_core_S8I(signed char r, signed char * p, immediate i);
extern unsigned short _TIE_xt_core_L16UI(const unsigned short * p, immediate i);
extern short _TIE_xt_core_L16SI(const short * p, immediate i);
extern void _TIE_xt_core_S16I(short r, short * p, immediate i);
extern int _TIE_xt_core_ADDMI(int s, immediate i);
extern int _TIE_xt_core_ADD(int s, int t);
extern int _TIE_xt_core_ADDX2(int s, int t);
extern int _TIE_xt_core_ADDX4(int s, int t);
extern int _TIE_xt_core_ADDX8(int s, int t);
extern int _TIE_xt_core_SUB(int s, int t);
extern int _TIE_xt_core_SUBX2(int s, int t);
extern int _TIE_xt_core_SUBX4(int s, int t);
extern int _TIE_xt_core_SUBX8(int s, int t);
extern int _TIE_xt_core_AND(int s, int t);
extern int _TIE_xt_core_XOR(int s, int t);
extern unsigned _TIE_xt_core_EXTUI(unsigned t, immediate i, immediate o);
extern int _TIE_xt_core_MOVI(immediate i);
extern void _TIE_xt_core_MOVEQZ(int r /*inout*/, int s, int t);
extern void _TIE_xt_core_MOVNEZ(int r /*inout*/, int s, int t);
extern void _TIE_xt_core_MOVLTZ(int r /*inout*/, int s, int t);
extern void _TIE_xt_core_MOVGEZ(int r /*inout*/, int s, int t);
extern int _TIE_xt_core_NEG(int t);
extern int _TIE_xt_core_ABS(int t);
extern void _TIE_xt_core_SSR(int s);
extern void _TIE_xt_core_SSL(int s);
extern void _TIE_xt_core_SSA8L(int s);
extern void _TIE_xt_core_SSA8B(int s);
extern void _TIE_xt_core_SSAI(immediate i);
extern int _TIE_xt_core_SLL(int s);
extern int _TIE_xt_core_SRC(int s, int t);
extern unsigned _TIE_xt_core_SRL(unsigned t);
extern int _TIE_xt_core_SRA(int t);
extern int _TIE_xt_core_SLLI(int s, immediate i);
extern int _TIE_xt_core_SRAI(int t, immediate i);
extern unsigned _TIE_xt_core_SRLI(unsigned t, immediate i);
extern int _TIE_xt_core_SSAI_SRC(int src1, int src2, immediate amount);
extern int _TIE_xt_core_SSR_SRC(int src1, int src2, int amount);
extern int _TIE_xt_core_WSR_SAR_SRC(int src1, int src2, int amount);
extern int _TIE_xt_core_SSR_SRA(int src, int amount);
extern unsigned _TIE_xt_core_SSR_SRL(unsigned src, int amount);
extern int _TIE_xt_core_SSL_SLL(int src, int amount);
extern int _TIE_xt_core_RSIL(immediate t);
extern int _TIE_xt_core_RSR_LEND(void);
extern void _TIE_xt_core_WSR_LEND(int t);
extern void _TIE_xt_core_XSR_LEND(int t /*inout*/);
extern int _TIE_xt_core_RSR_LCOUNT(void);
extern void _TIE_xt_core_WSR_LCOUNT(int t);
extern void _TIE_xt_core_XSR_LCOUNT(int t /*inout*/);
extern unsigned _TIE_xt_core_RSR_SAR(void);
extern void _TIE_xt_core_WSR_SAR(unsigned t);
extern void _TIE_xt_core_XSR_SAR(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_MEMCTL(void);
extern void _TIE_xt_core_WSR_MEMCTL(unsigned t);
extern void _TIE_xt_core_XSR_MEMCTL(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_LITBASE(void);
extern void _TIE_xt_core_WSR_LITBASE(unsigned t);
extern void _TIE_xt_core_XSR_LITBASE(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_PS(void);
extern void _TIE_xt_core_WSR_PS(unsigned t);
extern void _TIE_xt_core_XSR_PS(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPC1(void);
extern void _TIE_xt_core_WSR_EPC1(unsigned t);
extern void _TIE_xt_core_XSR_EPC1(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EXCSAVE1(void);
extern void _TIE_xt_core_WSR_EXCSAVE1(unsigned t);
extern void _TIE_xt_core_XSR_EXCSAVE1(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPC2(void);
extern void _TIE_xt_core_WSR_EPC2(unsigned t);
extern void _TIE_xt_core_XSR_EPC2(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EXCSAVE2(void);
extern void _TIE_xt_core_WSR_EXCSAVE2(unsigned t);
extern void _TIE_xt_core_XSR_EXCSAVE2(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPC3(void);
extern void _TIE_xt_core_WSR_EPC3(unsigned t);
extern void _TIE_xt_core_XSR_EPC3(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EXCSAVE3(void);
extern void _TIE_xt_core_WSR_EXCSAVE3(unsigned t);
extern void _TIE_xt_core_XSR_EXCSAVE3(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPC4(void);
extern void _TIE_xt_core_WSR_EPC4(unsigned t);
extern void _TIE_xt_core_XSR_EPC4(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EXCSAVE4(void);
extern void _TIE_xt_core_WSR_EXCSAVE4(unsigned t);
extern void _TIE_xt_core_XSR_EXCSAVE4(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPC5(void);
extern void _TIE_xt_core_WSR_EPC5(unsigned t);
extern void _TIE_xt_core_XSR_EPC5(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EXCSAVE5(void);
extern void _TIE_xt_core_WSR_EXCSAVE5(unsigned t);
extern void _TIE_xt_core_XSR_EXCSAVE5(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPC6(void);
extern void _TIE_xt_core_WSR_EPC6(unsigned t);
extern void _TIE_xt_core_XSR_EPC6(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EXCSAVE6(void);
extern void _TIE_xt_core_WSR_EXCSAVE6(unsigned t);
extern void _TIE_xt_core_XSR_EXCSAVE6(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPC7(void);
extern void _TIE_xt_core_WSR_EPC7(unsigned t);
extern void _TIE_xt_core_XSR_EPC7(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EXCSAVE7(void);
extern void _TIE_xt_core_WSR_EXCSAVE7(unsigned t);
extern void _TIE_xt_core_XSR_EXCSAVE7(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_VECBASE(void);
extern void _TIE_xt_core_WSR_VECBASE(unsigned t);
extern void _TIE_xt_core_XSR_VECBASE(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPS2(void);
extern void _TIE_xt_core_WSR_EPS2(unsigned t);
extern void _TIE_xt_core_XSR_EPS2(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPS3(void);
extern void _TIE_xt_core_WSR_EPS3(unsigned t);
extern void _TIE_xt_core_XSR_EPS3(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPS4(void);
extern void _TIE_xt_core_WSR_EPS4(unsigned t);
extern void _TIE_xt_core_XSR_EPS4(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPS5(void);
extern void _TIE_xt_core_WSR_EPS5(unsigned t);
extern void _TIE_xt_core_XSR_EPS5(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPS6(void);
extern void _TIE_xt_core_WSR_EPS6(unsigned t);
extern void _TIE_xt_core_XSR_EPS6(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EPS7(void);
extern void _TIE_xt_core_WSR_EPS7(unsigned t);
extern void _TIE_xt_core_XSR_EPS7(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EXCCAUSE(void);
extern void _TIE_xt_core_WSR_EXCCAUSE(unsigned t);
extern void _TIE_xt_core_XSR_EXCCAUSE(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_EXCVADDR(void);
extern void _TIE_xt_core_WSR_EXCVADDR(unsigned t);
extern void _TIE_xt_core_XSR_EXCVADDR(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_DEPC(void);
extern void _TIE_xt_core_WSR_DEPC(unsigned t);
extern void _TIE_xt_core_XSR_DEPC(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_MISC0(void);
extern void _TIE_xt_core_WSR_MISC0(unsigned t);
extern void _TIE_xt_core_XSR_MISC0(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_MISC1(void);
extern void _TIE_xt_core_WSR_MISC1(unsigned t);
extern void _TIE_xt_core_XSR_MISC1(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_MISC2(void);
extern void _TIE_xt_core_WSR_MISC2(unsigned t);
extern void _TIE_xt_core_XSR_MISC2(unsigned t /*inout*/);
extern unsigned _TIE_xt_core_RSR_MISC3(void);
extern void _TIE_xt_core_WSR_MISC3(unsigned t);
extern void _TIE_xt_core_XSR_MISC3(unsigned t /*inout*/);
extern int _TIE_xt_core_RSR_PRID(void);
#define XT_ILL _TIE_xt_core_ILL
#define XT_NOP _TIE_xt_core_NOP
#define XT_SIMCALL _TIE_xt_core_SIMCALL
#define XT_MEMW _TIE_xt_core_MEMW
#define XT_EXTW _TIE_xt_core_EXTW
#define XT_ISYNC _TIE_xt_core_ISYNC
#define XT_DSYNC _TIE_xt_core_DSYNC
#define XT_ESYNC _TIE_xt_core_ESYNC
#define XT_RSYNC _TIE_xt_core_RSYNC
#define XT_RSR_LBEG _TIE_xt_core_RSR_LBEG
#define XT_WSR_LBEG _TIE_xt_core_WSR_LBEG
#define XT_XSR_LBEG _TIE_xt_core_XSR_LBEG
#define XT_RSR_CONFIGID0 _TIE_xt_core_RSR_CONFIGID0
#define XT_WSR_CONFIGID0 _TIE_xt_core_WSR_CONFIGID0
#define XT_RSR_CONFIGID1 _TIE_xt_core_RSR_CONFIGID1
#define XT_RUR_THREADPTR _TIE_xt_core_RUR_THREADPTR
#define RTHREADPTR _TIE_xt_core_RUR_THREADPTR
#define RUR231 _TIE_xt_core_RUR_THREADPTR
#define XT_WUR_THREADPTR _TIE_xt_core_WUR_THREADPTR
#define WTHREADPTR _TIE_xt_core_WUR_THREADPTR
#define WUR231 _TIE_xt_core_WUR_THREADPTR
#define XT_uint32_loadi _TIE_xt_core_uint32_loadi
#define XT_uint32_storei _TIE_xt_core_uint32_storei
#define XT_uint32_move _TIE_xt_core_uint32_move
#define XT_ADDI _TIE_xt_core_ADDI
#define XT_OR _TIE_xt_core_OR
#define XT_L32I _TIE_xt_core_L32I
#define XT_S32I _TIE_xt_core_S32I
#define XT_S32NB _TIE_xt_core_S32NB
#define XT_L8UI _TIE_xt_core_L8UI
#define XT_S8I _TIE_xt_core_S8I
#define XT_L16UI _TIE_xt_core_L16UI
#define XT_L16SI _TIE_xt_core_L16SI
#define XT_S16I _TIE_xt_core_S16I
#define XT_ADDMI _TIE_xt_core_ADDMI
#define XT_ADD _TIE_xt_core_ADD
#define XT_ADDX2 _TIE_xt_core_ADDX2
#define XT_ADDX4 _TIE_xt_core_ADDX4
#define XT_ADDX8 _TIE_xt_core_ADDX8
#define XT_SUB _TIE_xt_core_SUB
#define XT_SUBX2 _TIE_xt_core_SUBX2
#define XT_SUBX4 _TIE_xt_core_SUBX4
#define XT_SUBX8 _TIE_xt_core_SUBX8
#define XT_AND _TIE_xt_core_AND
#define XT_XOR _TIE_xt_core_XOR
#define XT_EXTUI _TIE_xt_core_EXTUI
#define XT_MOVI _TIE_xt_core_MOVI
#define XT_MOVEQZ _TIE_xt_core_MOVEQZ
#define XT_MOVNEZ _TIE_xt_core_MOVNEZ
#define XT_MOVLTZ _TIE_xt_core_MOVLTZ
#define XT_MOVGEZ _TIE_xt_core_MOVGEZ
#define XT_NEG _TIE_xt_core_NEG
#define XT_ABS _TIE_xt_core_ABS
#define XT_SSR _TIE_xt_core_SSR
#define XT_SSL _TIE_xt_core_SSL
#define XT_SSA8L _TIE_xt_core_SSA8L
#define XT_SSA8B _TIE_xt_core_SSA8B
#define XT_SSAI _TIE_xt_core_SSAI
#define XT_SLL _TIE_xt_core_SLL
#define XT_SRC _TIE_xt_core_SRC
#define XT_SRL _TIE_xt_core_SRL
#define XT_SRA _TIE_xt_core_SRA
#define XT_SLLI _TIE_xt_core_SLLI
#define XT_SRAI _TIE_xt_core_SRAI
#define XT_SRLI _TIE_xt_core_SRLI
#define XT_SSAI_SRC _TIE_xt_core_SSAI_SRC
#define XT_SSR_SRC _TIE_xt_core_SSR_SRC
#define XT_WSR_SAR_SRC _TIE_xt_core_WSR_SAR_SRC
#define XT_SSR_SRA _TIE_xt_core_SSR_SRA
#define XT_SSR_SRL _TIE_xt_core_SSR_SRL
#define XT_SSL_SLL _TIE_xt_core_SSL_SLL
#define XT_RSIL _TIE_xt_core_RSIL
#define XT_RSR_LEND _TIE_xt_core_RSR_LEND
#define XT_WSR_LEND _TIE_xt_core_WSR_LEND
#define XT_XSR_LEND _TIE_xt_core_XSR_LEND
#define XT_RSR_LCOUNT _TIE_xt_core_RSR_LCOUNT
#define XT_WSR_LCOUNT _TIE_xt_core_WSR_LCOUNT
#define XT_XSR_LCOUNT _TIE_xt_core_XSR_LCOUNT
#define XT_RSR_SAR _TIE_xt_core_RSR_SAR
#define XT_WSR_SAR _TIE_xt_core_WSR_SAR
#define XT_XSR_SAR _TIE_xt_core_XSR_SAR
#define XT_RSR_MEMCTL _TIE_xt_core_RSR_MEMCTL
#define XT_WSR_MEMCTL _TIE_xt_core_WSR_MEMCTL
#define XT_XSR_MEMCTL _TIE_xt_core_XSR_MEMCTL
#define XT_RSR_LITBASE _TIE_xt_core_RSR_LITBASE
#define XT_WSR_LITBASE _TIE_xt_core_WSR_LITBASE
#define XT_XSR_LITBASE _TIE_xt_core_XSR_LITBASE
#define XT_RSR_PS _TIE_xt_core_RSR_PS
#define XT_WSR_PS _TIE_xt_core_WSR_PS
#define XT_XSR_PS _TIE_xt_core_XSR_PS
#define XT_RSR_EPC1 _TIE_xt_core_RSR_EPC1
#define XT_WSR_EPC1 _TIE_xt_core_WSR_EPC1
#define XT_XSR_EPC1 _TIE_xt_core_XSR_EPC1
#define XT_RSR_EXCSAVE1 _TIE_xt_core_RSR_EXCSAVE1
#define XT_WSR_EXCSAVE1 _TIE_xt_core_WSR_EXCSAVE1
#define XT_XSR_EXCSAVE1 _TIE_xt_core_XSR_EXCSAVE1
#define XT_RSR_EPC2 _TIE_xt_core_RSR_EPC2
#define XT_WSR_EPC2 _TIE_xt_core_WSR_EPC2
#define XT_XSR_EPC2 _TIE_xt_core_XSR_EPC2
#define XT_RSR_EXCSAVE2 _TIE_xt_core_RSR_EXCSAVE2
#define XT_WSR_EXCSAVE2 _TIE_xt_core_WSR_EXCSAVE2
#define XT_XSR_EXCSAVE2 _TIE_xt_core_XSR_EXCSAVE2
#define XT_RSR_EPC3 _TIE_xt_core_RSR_EPC3
#define XT_WSR_EPC3 _TIE_xt_core_WSR_EPC3
#define XT_XSR_EPC3 _TIE_xt_core_XSR_EPC3
#define XT_RSR_EXCSAVE3 _TIE_xt_core_RSR_EXCSAVE3
#define XT_WSR_EXCSAVE3 _TIE_xt_core_WSR_EXCSAVE3
#define XT_XSR_EXCSAVE3 _TIE_xt_core_XSR_EXCSAVE3
#define XT_RSR_EPC4 _TIE_xt_core_RSR_EPC4
#define XT_WSR_EPC4 _TIE_xt_core_WSR_EPC4
#define XT_XSR_EPC4 _TIE_xt_core_XSR_EPC4
#define XT_RSR_EXCSAVE4 _TIE_xt_core_RSR_EXCSAVE4
#define XT_WSR_EXCSAVE4 _TIE_xt_core_WSR_EXCSAVE4
#define XT_XSR_EXCSAVE4 _TIE_xt_core_XSR_EXCSAVE4
#define XT_RSR_EPC5 _TIE_xt_core_RSR_EPC5
#define XT_WSR_EPC5 _TIE_xt_core_WSR_EPC5
#define XT_XSR_EPC5 _TIE_xt_core_XSR_EPC5
#define XT_RSR_EXCSAVE5 _TIE_xt_core_RSR_EXCSAVE5
#define XT_WSR_EXCSAVE5 _TIE_xt_core_WSR_EXCSAVE5
#define XT_XSR_EXCSAVE5 _TIE_xt_core_XSR_EXCSAVE5
#define XT_RSR_EPC6 _TIE_xt_core_RSR_EPC6
#define XT_WSR_EPC6 _TIE_xt_core_WSR_EPC6
#define XT_XSR_EPC6 _TIE_xt_core_XSR_EPC6
#define XT_RSR_EXCSAVE6 _TIE_xt_core_RSR_EXCSAVE6
#define XT_WSR_EXCSAVE6 _TIE_xt_core_WSR_EXCSAVE6
#define XT_XSR_EXCSAVE6 _TIE_xt_core_XSR_EXCSAVE6
#define XT_RSR_EPC7 _TIE_xt_core_RSR_EPC7
#define XT_WSR_EPC7 _TIE_xt_core_WSR_EPC7
#define XT_XSR_EPC7 _TIE_xt_core_XSR_EPC7
#define XT_RSR_EXCSAVE7 _TIE_xt_core_RSR_EXCSAVE7
#define XT_WSR_EXCSAVE7 _TIE_xt_core_WSR_EXCSAVE7
#define XT_XSR_EXCSAVE7 _TIE_xt_core_XSR_EXCSAVE7
#define XT_RSR_VECBASE _TIE_xt_core_RSR_VECBASE
#define XT_WSR_VECBASE _TIE_xt_core_WSR_VECBASE
#define XT_XSR_VECBASE _TIE_xt_core_XSR_VECBASE
#define XT_RSR_EPS2 _TIE_xt_core_RSR_EPS2
#define XT_WSR_EPS2 _TIE_xt_core_WSR_EPS2
#define XT_XSR_EPS2 _TIE_xt_core_XSR_EPS2
#define XT_RSR_EPS3 _TIE_xt_core_RSR_EPS3
#define XT_WSR_EPS3 _TIE_xt_core_WSR_EPS3
#define XT_XSR_EPS3 _TIE_xt_core_XSR_EPS3
#define XT_RSR_EPS4 _TIE_xt_core_RSR_EPS4
#define XT_WSR_EPS4 _TIE_xt_core_WSR_EPS4
#define XT_XSR_EPS4 _TIE_xt_core_XSR_EPS4
#define XT_RSR_EPS5 _TIE_xt_core_RSR_EPS5
#define XT_WSR_EPS5 _TIE_xt_core_WSR_EPS5
#define XT_XSR_EPS5 _TIE_xt_core_XSR_EPS5
#define XT_RSR_EPS6 _TIE_xt_core_RSR_EPS6
#define XT_WSR_EPS6 _TIE_xt_core_WSR_EPS6
#define XT_XSR_EPS6 _TIE_xt_core_XSR_EPS6
#define XT_RSR_EPS7 _TIE_xt_core_RSR_EPS7
#define XT_WSR_EPS7 _TIE_xt_core_WSR_EPS7
#define XT_XSR_EPS7 _TIE_xt_core_XSR_EPS7
#define XT_RSR_EXCCAUSE _TIE_xt_core_RSR_EXCCAUSE
#define XT_WSR_EXCCAUSE _TIE_xt_core_WSR_EXCCAUSE
#define XT_XSR_EXCCAUSE _TIE_xt_core_XSR_EXCCAUSE
#define XT_RSR_EXCVADDR _TIE_xt_core_RSR_EXCVADDR
#define XT_WSR_EXCVADDR _TIE_xt_core_WSR_EXCVADDR
#define XT_XSR_EXCVADDR _TIE_xt_core_XSR_EXCVADDR
#define XT_RSR_DEPC _TIE_xt_core_RSR_DEPC
#define XT_WSR_DEPC _TIE_xt_core_WSR_DEPC
#define XT_XSR_DEPC _TIE_xt_core_XSR_DEPC
#define XT_RSR_MISC0 _TIE_xt_core_RSR_MISC0
#define XT_WSR_MISC0 _TIE_xt_core_WSR_MISC0
#define XT_XSR_MISC0 _TIE_xt_core_XSR_MISC0
#define XT_RSR_MISC1 _TIE_xt_core_RSR_MISC1
#define XT_WSR_MISC1 _TIE_xt_core_WSR_MISC1
#define XT_XSR_MISC1 _TIE_xt_core_XSR_MISC1
#define XT_RSR_MISC2 _TIE_xt_core_RSR_MISC2
#define XT_WSR_MISC2 _TIE_xt_core_WSR_MISC2
#define XT_XSR_MISC2 _TIE_xt_core_XSR_MISC2
#define XT_RSR_MISC3 _TIE_xt_core_RSR_MISC3
#define XT_WSR_MISC3 _TIE_xt_core_WSR_MISC3
#define XT_XSR_MISC3 _TIE_xt_core_XSR_MISC3
#define XT_RSR_PRID _TIE_xt_core_RSR_PRID
#ifndef RUR
#define RUR(NUM) RUR##NUM()
#endif
#ifndef WUR
#define WUR(VAL, NUM) WUR##NUM(VAL)
#endif
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_core_HEADER */
/* Definitions for the xt_debug TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_debug_HEADER
#define _XTENSA_xt_debug_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern void _TIE_xt_debug_BREAK(immediate imms, immediate immt);
extern void _TIE_xt_debug_BREAK_N(immediate imms);
extern unsigned _TIE_xt_debug_RSR_DBREAKA0(void);
extern void _TIE_xt_debug_WSR_DBREAKA0(unsigned art);
extern void _TIE_xt_debug_XSR_DBREAKA0(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_DBREAKC0(void);
extern void _TIE_xt_debug_WSR_DBREAKC0(unsigned art);
extern void _TIE_xt_debug_XSR_DBREAKC0(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_DBREAKA1(void);
extern void _TIE_xt_debug_WSR_DBREAKA1(unsigned art);
extern void _TIE_xt_debug_XSR_DBREAKA1(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_DBREAKC1(void);
extern void _TIE_xt_debug_WSR_DBREAKC1(unsigned art);
extern void _TIE_xt_debug_XSR_DBREAKC1(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_IBREAKA0(void);
extern void _TIE_xt_debug_WSR_IBREAKA0(unsigned art);
extern void _TIE_xt_debug_XSR_IBREAKA0(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_IBREAKA1(void);
extern void _TIE_xt_debug_WSR_IBREAKA1(unsigned art);
extern void _TIE_xt_debug_XSR_IBREAKA1(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_IBREAKENABLE(void);
extern void _TIE_xt_debug_WSR_IBREAKENABLE(unsigned art);
extern void _TIE_xt_debug_XSR_IBREAKENABLE(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_DEBUGCAUSE(void);
extern void _TIE_xt_debug_WSR_DEBUGCAUSE(unsigned art);
extern void _TIE_xt_debug_XSR_DEBUGCAUSE(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_ICOUNT(void);
extern void _TIE_xt_debug_WSR_ICOUNT(unsigned art);
extern void _TIE_xt_debug_XSR_ICOUNT(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_ICOUNTLEVEL(void);
extern void _TIE_xt_debug_WSR_ICOUNTLEVEL(unsigned art);
extern void _TIE_xt_debug_XSR_ICOUNTLEVEL(unsigned art /*inout*/);
extern unsigned _TIE_xt_debug_RSR_DDR(void);
extern void _TIE_xt_debug_WSR_DDR(unsigned art);
extern void _TIE_xt_debug_XSR_DDR(unsigned art /*inout*/);
extern void _TIE_xt_debug_LDDR32_P(const void * ars /*inout*/);
extern void _TIE_xt_debug_SDDR32_P(void * ars /*inout*/);
#define XT_BREAK _TIE_xt_debug_BREAK
#define XT_BREAK_N _TIE_xt_debug_BREAK_N
#define XT_RSR_DBREAKA0 _TIE_xt_debug_RSR_DBREAKA0
#define XT_WSR_DBREAKA0 _TIE_xt_debug_WSR_DBREAKA0
#define XT_XSR_DBREAKA0 _TIE_xt_debug_XSR_DBREAKA0
#define XT_RSR_DBREAKC0 _TIE_xt_debug_RSR_DBREAKC0
#define XT_WSR_DBREAKC0 _TIE_xt_debug_WSR_DBREAKC0
#define XT_XSR_DBREAKC0 _TIE_xt_debug_XSR_DBREAKC0
#define XT_RSR_DBREAKA1 _TIE_xt_debug_RSR_DBREAKA1
#define XT_WSR_DBREAKA1 _TIE_xt_debug_WSR_DBREAKA1
#define XT_XSR_DBREAKA1 _TIE_xt_debug_XSR_DBREAKA1
#define XT_RSR_DBREAKC1 _TIE_xt_debug_RSR_DBREAKC1
#define XT_WSR_DBREAKC1 _TIE_xt_debug_WSR_DBREAKC1
#define XT_XSR_DBREAKC1 _TIE_xt_debug_XSR_DBREAKC1
#define XT_RSR_IBREAKA0 _TIE_xt_debug_RSR_IBREAKA0
#define XT_WSR_IBREAKA0 _TIE_xt_debug_WSR_IBREAKA0
#define XT_XSR_IBREAKA0 _TIE_xt_debug_XSR_IBREAKA0
#define XT_RSR_IBREAKA1 _TIE_xt_debug_RSR_IBREAKA1
#define XT_WSR_IBREAKA1 _TIE_xt_debug_WSR_IBREAKA1
#define XT_XSR_IBREAKA1 _TIE_xt_debug_XSR_IBREAKA1
#define XT_RSR_IBREAKENABLE _TIE_xt_debug_RSR_IBREAKENABLE
#define XT_WSR_IBREAKENABLE _TIE_xt_debug_WSR_IBREAKENABLE
#define XT_XSR_IBREAKENABLE _TIE_xt_debug_XSR_IBREAKENABLE
#define XT_RSR_DEBUGCAUSE _TIE_xt_debug_RSR_DEBUGCAUSE
#define XT_WSR_DEBUGCAUSE _TIE_xt_debug_WSR_DEBUGCAUSE
#define XT_XSR_DEBUGCAUSE _TIE_xt_debug_XSR_DEBUGCAUSE
#define XT_RSR_ICOUNT _TIE_xt_debug_RSR_ICOUNT
#define XT_WSR_ICOUNT _TIE_xt_debug_WSR_ICOUNT
#define XT_XSR_ICOUNT _TIE_xt_debug_XSR_ICOUNT
#define XT_RSR_ICOUNTLEVEL _TIE_xt_debug_RSR_ICOUNTLEVEL
#define XT_WSR_ICOUNTLEVEL _TIE_xt_debug_WSR_ICOUNTLEVEL
#define XT_XSR_ICOUNTLEVEL _TIE_xt_debug_XSR_ICOUNTLEVEL
#define XT_RSR_DDR _TIE_xt_debug_RSR_DDR
#define XT_WSR_DDR _TIE_xt_debug_WSR_DDR
#define XT_XSR_DDR _TIE_xt_debug_XSR_DDR
#define XT_LDDR32_P _TIE_xt_debug_LDDR32_P
#define XT_SDDR32_P _TIE_xt_debug_SDDR32_P
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_debug_HEADER */
/* Definitions for the xt_density TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_density_HEADER
#define _XTENSA_xt_density_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern void _TIE_xt_density_ILL_N(void);
extern void _TIE_xt_density_NOP_N(void);
extern int _TIE_xt_density_L32I_N(const int * p, immediate i);
extern void _TIE_xt_density_S32I_N(int t, int * p, immediate i);
extern int _TIE_xt_density_ADD_N(int s, int t);
extern int _TIE_xt_density_ADDI_N(int s, immediate i);
extern int _TIE_xt_density_MOV_N(int s);
extern int _TIE_xt_density_MOVI_N(immediate i);
#define XT_ILL_N _TIE_xt_density_ILL_N
#define XT_NOP_N _TIE_xt_density_NOP_N
#define XT_L32I_N _TIE_xt_density_L32I_N
#define XT_S32I_N _TIE_xt_density_S32I_N
#define XT_ADD_N _TIE_xt_density_ADD_N
#define XT_ADDI_N _TIE_xt_density_ADDI_N
#define XT_MOV_N _TIE_xt_density_MOV_N
#define XT_MOVI_N _TIE_xt_density_MOVI_N
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_density_HEADER */
/* Definitions for the xt_exceptions TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_exceptions_HEADER
#define _XTENSA_xt_exceptions_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern void _TIE_xt_exceptions_EXCW(void);
extern void _TIE_xt_exceptions_SYSCALL(void);
#define XT_EXCW _TIE_xt_exceptions_EXCW
#define XT_SYSCALL _TIE_xt_exceptions_SYSCALL
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_exceptions_HEADER */
/* Definitions for the xt_externalregisters TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_externalregisters_HEADER
#define _XTENSA_xt_externalregisters_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern unsigned _TIE_xt_externalregisters_RER(unsigned ars);
extern void _TIE_xt_externalregisters_WER(unsigned art, unsigned ars);
#define XT_RER _TIE_xt_externalregisters_RER
#define XT_WER _TIE_xt_externalregisters_WER
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_externalregisters_HEADER */
/* Definitions for the xt_integerdivide TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_integerdivide_HEADER
#define _XTENSA_xt_integerdivide_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern unsigned _TIE_xt_integerdivide_REMS(unsigned ars, unsigned art);
extern unsigned _TIE_xt_integerdivide_REMU(unsigned ars, unsigned art);
extern unsigned _TIE_xt_integerdivide_QUOS(unsigned ars, unsigned art);
extern unsigned _TIE_xt_integerdivide_QUOU(unsigned ars, unsigned art);
#define XT_REMS _TIE_xt_integerdivide_REMS
#define XT_REMU _TIE_xt_integerdivide_REMU
#define XT_QUOS _TIE_xt_integerdivide_QUOS
#define XT_QUOU _TIE_xt_integerdivide_QUOU
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_integerdivide_HEADER */
/* Definitions for the xt_interrupt TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_interrupt_HEADER
#define _XTENSA_xt_interrupt_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern void _TIE_xt_interrupt_WAITI(immediate s);
extern unsigned _TIE_xt_interrupt_RSR_INTERRUPT(void);
extern void _TIE_xt_interrupt_WSR_INTSET(unsigned art);
extern void _TIE_xt_interrupt_WSR_INTCLEAR(unsigned art);
extern unsigned _TIE_xt_interrupt_RSR_INTENABLE(void);
extern void _TIE_xt_interrupt_WSR_INTENABLE(unsigned art);
extern void _TIE_xt_interrupt_XSR_INTENABLE(unsigned art /*inout*/);
#define XT_WAITI _TIE_xt_interrupt_WAITI
#define XT_RSR_INTERRUPT _TIE_xt_interrupt_RSR_INTERRUPT
#define XT_WSR_INTSET _TIE_xt_interrupt_WSR_INTSET
#define XT_WSR_INTCLEAR _TIE_xt_interrupt_WSR_INTCLEAR
#define XT_RSR_INTENABLE _TIE_xt_interrupt_RSR_INTENABLE
#define XT_WSR_INTENABLE _TIE_xt_interrupt_WSR_INTENABLE
#define XT_XSR_INTENABLE _TIE_xt_interrupt_XSR_INTENABLE
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_interrupt_HEADER */
/* Definitions for the xt_ioports TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_ioports_HEADER
#define _XTENSA_xt_ioports_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern unsigned _TIE_xt_ioports_READ_IMPWIRE(void);
extern void _TIE_xt_ioports_SETB_EXPSTATE(immediate bitindex);
extern void _TIE_xt_ioports_CLRB_EXPSTATE(immediate bitindex);
extern void _TIE_xt_ioports_WRMSK_EXPSTATE(unsigned art, unsigned ars);
extern unsigned _TIE_xt_ioports_RUR_EXPSTATE(void);
extern void _TIE_xt_ioports_WUR_EXPSTATE(unsigned v);
#define READ_IMPWIRE _TIE_xt_ioports_READ_IMPWIRE
#define SETB_EXPSTATE _TIE_xt_ioports_SETB_EXPSTATE
#define CLRB_EXPSTATE _TIE_xt_ioports_CLRB_EXPSTATE
#define WRMSK_EXPSTATE _TIE_xt_ioports_WRMSK_EXPSTATE
#define RUR_EXPSTATE _TIE_xt_ioports_RUR_EXPSTATE
#define REXPSTATE _TIE_xt_ioports_RUR_EXPSTATE
#define RUR230 _TIE_xt_ioports_RUR_EXPSTATE
#define WUR_EXPSTATE _TIE_xt_ioports_WUR_EXPSTATE
#define WEXPSTATE _TIE_xt_ioports_WUR_EXPSTATE
#define WUR230 _TIE_xt_ioports_WUR_EXPSTATE
#ifndef RUR
#define RUR(NUM) RUR##NUM()
#endif
#ifndef WUR
#define WUR(VAL, NUM) WUR##NUM(VAL)
#endif
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_ioports_HEADER */
/* Definitions for the xt_misc TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_misc_HEADER
#define _XTENSA_xt_misc_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern int _TIE_xt_misc_CLAMPS(int s, immediate i);
extern int _TIE_xt_misc_MIN(int s, int t);
extern int _TIE_xt_misc_MAX(int s, int t);
extern unsigned _TIE_xt_misc_MINU(unsigned s, unsigned t);
extern unsigned _TIE_xt_misc_MAXU(unsigned s, unsigned t);
extern int _TIE_xt_misc_NSA(int s);
extern unsigned _TIE_xt_misc_NSAU(unsigned s);
extern int _TIE_xt_misc_SEXT(int s, immediate i);
#define XT_CLAMPS _TIE_xt_misc_CLAMPS
#define XT_MIN _TIE_xt_misc_MIN
#define XT_MAX _TIE_xt_misc_MAX
#define XT_MINU _TIE_xt_misc_MINU
#define XT_MAXU _TIE_xt_misc_MAXU
#define XT_NSA _TIE_xt_misc_NSA
#define XT_NSAU _TIE_xt_misc_NSAU
#define XT_SEXT _TIE_xt_misc_SEXT
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_misc_HEADER */
/* Definitions for the xt_mmu TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_mmu_HEADER
#define _XTENSA_xt_mmu_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern void _TIE_xt_mmu_IDTLB(unsigned ars);
extern unsigned _TIE_xt_mmu_RDTLB1(unsigned ars);
extern unsigned _TIE_xt_mmu_RDTLB0(unsigned ars);
extern unsigned _TIE_xt_mmu_PDTLB(unsigned ars);
extern void _TIE_xt_mmu_WDTLB(unsigned art, unsigned ars);
extern void _TIE_xt_mmu_IITLB(unsigned ars);
extern unsigned _TIE_xt_mmu_RITLB1(unsigned ars);
extern unsigned _TIE_xt_mmu_RITLB0(unsigned ars);
extern unsigned _TIE_xt_mmu_PITLB(unsigned ars);
extern void _TIE_xt_mmu_WITLB(unsigned art, unsigned ars);
#define XT_IDTLB _TIE_xt_mmu_IDTLB
#define XT_RDTLB1 _TIE_xt_mmu_RDTLB1
#define XT_RDTLB0 _TIE_xt_mmu_RDTLB0
#define XT_PDTLB _TIE_xt_mmu_PDTLB
#define XT_WDTLB _TIE_xt_mmu_WDTLB
#define XT_IITLB _TIE_xt_mmu_IITLB
#define XT_RITLB1 _TIE_xt_mmu_RITLB1
#define XT_RITLB0 _TIE_xt_mmu_RITLB0
#define XT_PITLB _TIE_xt_mmu_PITLB
#define XT_WITLB _TIE_xt_mmu_WITLB
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_mmu_HEADER */
/* Definitions for the xt_mul TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_mul_HEADER
#define _XTENSA_xt_mul_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern int _TIE_xt_mul_MUL16S(short s, short t);
extern unsigned _TIE_xt_mul_MUL16U(unsigned short s, unsigned short t);
extern int _TIE_xt_mul_MULL(int s, int t);
extern unsigned _TIE_xt_mul_MULUH(unsigned s, unsigned t);
extern int _TIE_xt_mul_MULSH(int s, int t);
#define XT_MUL16S _TIE_xt_mul_MUL16S
#define XT_MUL16U _TIE_xt_mul_MUL16U
#define XT_MULL _TIE_xt_mul_MULL
#define XT_MULUH _TIE_xt_mul_MULUH
#define XT_MULSH _TIE_xt_mul_MULSH
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_mul_HEADER */
/* Definitions for the xt_regwin TIE package */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_regwin_HEADER
#define _XTENSA_xt_regwin_HEADER
#ifdef __XTENSA__
#ifdef __XCC__
#include <xtensa/tie/xt_core.h>
/*
* The following prototypes describe intrinsic functions
* corresponding to TIE instructions. Some TIE instructions
* may produce multiple results (designated as "out" operands
* in the iclass section) or may have operands used as both
* inputs and outputs (designated as "inout"). However, the C
* and C++ languages do not provide syntax that can express
* the in/out/inout constraints of TIE intrinsics.
* Nevertheless, the compiler understands these constraints
* and will check that the intrinsic functions are used
* correctly. To improve the readability of these prototypes,
* the "out" and "inout" parameters are marked accordingly
* with comments.
*/
extern void _TIE_xt_regwin_ENTRY(unsigned ars /*inout*/, immediate uimm12x8);
extern void _TIE_xt_regwin_ROTW(immediate simm4);
extern int _TIE_xt_regwin_MOVSP(int s);
extern int _TIE_xt_regwin_L32E(const int * s, immediate o);
extern void _TIE_xt_regwin_S32E(int t, int * s, immediate o);
extern unsigned _TIE_xt_regwin_RSR_WINDOWBASE(void);
extern void _TIE_xt_regwin_WSR_WINDOWBASE(unsigned t);
extern void _TIE_xt_regwin_XSR_WINDOWBASE(unsigned t /*inout*/);
extern unsigned _TIE_xt_regwin_RSR_WINDOWSTART(void);
extern void _TIE_xt_regwin_WSR_WINDOWSTART(unsigned t);
extern void _TIE_xt_regwin_XSR_WINDOWSTART(unsigned t /*inout*/);
#define XT_ENTRY _TIE_xt_regwin_ENTRY
#define XT_ROTW _TIE_xt_regwin_ROTW
#define XT_MOVSP _TIE_xt_regwin_MOVSP
#define XT_L32E _TIE_xt_regwin_L32E
#define XT_S32E _TIE_xt_regwin_S32E
#define XT_RSR_WINDOWBASE _TIE_xt_regwin_RSR_WINDOWBASE
#define XT_WSR_WINDOWBASE _TIE_xt_regwin_WSR_WINDOWBASE
#define XT_XSR_WINDOWBASE _TIE_xt_regwin_XSR_WINDOWBASE
#define XT_RSR_WINDOWSTART _TIE_xt_regwin_RSR_WINDOWSTART
#define XT_WSR_WINDOWSTART _TIE_xt_regwin_WSR_WINDOWSTART
#define XT_XSR_WINDOWSTART _TIE_xt_regwin_XSR_WINDOWSTART
#endif /* __XCC__ */
#endif /* __XTENSA__ */
#endif /* !_XTENSA_xt_regwin_HEADER */
/*
* Customer ID=11657; Build=0x5fe96; Copyright (c) 2004-2010 by Tensilica Inc. ALL RIGHTS RESERVED.
* These coded instructions, statements, and computer programs are the
* copyrighted works and confidential proprietary information of Tensilica Inc.
* They may not be modified, copied, reproduced, distributed, or disclosed to
* third parties in any manner, medium, or form, in whole or in part, without
* the prior written consent of Tensilica Inc.
*/
/* Do not modify. This is automatically generated.*/
#ifndef _XTENSA_xt_scmpr_h_HEADER
#define _XTENSA_xt_scmpr_h_HEADER
/* Header includes start */
/* Header includes end */
#endif /* !_XTENSA_xt_scmpr_h_HEADER */
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......@@ -74,7 +74,6 @@ extern "C" {
#include <stdint.h>
#include <xtensa/tie/xt_core.h>
#include <xtensa/hal.h>
#include <xtensa/config/core.h>
#include <xtensa/config/system.h> /* required for XSHAL_CLIB */
......
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