【更新】STM32CubeMP1_V1.3.0

bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp1xx.h

@@ -70,7 +70,7 @@
   * @brief CMSIS Device version number
   */
 #define __STM32MP1xx_CMSIS_VERSION_MAIN   (0x01U) /*!< [31:24] main version */
-#define __STM32MP1xx_CMSIS_VERSION_SUB1   (0x02U) /*!< [23:16] sub1 version */
+#define __STM32MP1xx_CMSIS_VERSION_SUB1   (0x03U) /*!< [23:16] sub1 version */
 #define __STM32MP1xx_CMSIS_VERSION_SUB2   (0x00U) /*!< [15:8]  sub2 version */
 #define __STM32MP1xx_CMSIS_VERSION_RC     (0x00U) /*!< [7:0]  release candidate */
 #define __STM32MP1xx_CMSIS_VERSION        ((__CMSIS_DEVICE_VERSION_MAIN     << 24)\

bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp1xxxxx-generate-diff.sh

+#!/bin/bash
+
+# Generate all CMSIS files
+
+currdir=${PWD}
+export scriptPATH=${PWD}/../../../../../../../__INTERNAL__tools/tools/_CmsisDeviceGenerator
+
+if [ ! -d "${scriptPATH}" ] ; then
+  echo Input directory does not exist
+  return
+fi
+
+cd ${scriptPATH}
+
+perl DeviceGeneration.pl  --target STM32MP1xx -diff
+
+cd ${currdir}

bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp1xxxxx-generate-replace.sh

+#!/bin/bash
+
+# Generate all CMSIS files
+
+currdir=${PWD}
+export scriptPATH=${PWD}/../../../../../../../__INTERNAL__tools/tools/_CmsisDeviceGenerator
+
+if [ ! -d "${scriptPATH}" ] ; then
+  echo Input directory does not exist
+  return
+fi
+
+cd ${scriptPATH}
+
+perl DeviceGeneration.pl  --target STM32MP1xx -replace
+
+cd ${currdir}

bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Release_Notes.html

@@ -163,11 +163,11 @@ compliance with the License. You may obtain a copy of the License at:</p>
 </div>
 <div id="release_container" class="topic1">
 <div class="topic2" id="identification">
-<h3 style="width: 230px;">V1.2.0 / 03-Feb-2020</h3>
+<h3 style="width: 230px;">V1.3.0 / 20-oct-2020</h3>
 </div>
 <div style="margin-left: 20px; width: 974px;" class="topic3" id="changes">
 <h4>Main changes</h4>
-<ul><li>Header files:&nbsp;</li><ul><li>Add new Part Number for 800MHz</li><li>Update license with BSD 3-Clause template</li><li>Rework CMSIS for RTC/TAMP, GPIO and TIM</li><li>Rename TIM Break source bit definition</li></ul></ul><ul><li>Update Linker Template&nbsp;file for KEIL and IAR:</li><ul><li>Add OpenAMP region ( region present by default, to comment if needed )</li></ul></ul><br>
+<ul><li>Header files:&nbsp;</li><ul><li>Rename&nbsp;&nbsp;RCC bit definition&nbsp;to be more compliant with the name from RCC spec</li></ul></ul><ul><ul><li>Update STGEN register structure</li><li>Fix typo in MDMA register definition</li></ul></ul><br>
 </div>
 <div class="topic3" id="contents">
 <h4>Contents</h4>
@@ -181,7 +181,13 @@ History</button><br>
 </div>
 <div id="history" class="topic1" hidden="">
 <h2>Update History</h2>
-<br><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; margin-left: 26px; width: 174px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 10-Sept-2019</span><br></h3><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
+<br><br><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; margin-left: 26px; width: 174px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.0 / 03-Feb-2020</span><br></h3><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
+<h4>Main changes</h4>
+<ul><li>Header files:&nbsp;</li><ul><li>Add new Part Number for 800MHz</li><li>Update license with BSD 3-Clause template</li><li>Rework CMSIS for RTC/TAMP, GPIO and TIM</li><li>Rename TIM Break source bit definition</li></ul><li>Update Linker Template&nbsp;file for KEIL and IAR:</li><ul><li>Add OpenAMP region ( region present by default, to comment if needed )</li></ul></ul></div><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
+<h4>Contents</h4>
+<ul><li>CMSIS devices files for STM32MP<span style="font-weight: bold;">151C</span>xx ,STM32MP<span style="font-weight: bold;">151A</span>xx, STM32MP<span style="font-weight: bold;">153C</span>xx, STM32MP<span style="font-weight: bold;">153A</span>xx, STM32MP<span style="font-weight: bold;">157C</span>xx ,STM32MP<span style="font-weight: bold;">157A</span>xx</li></ul>
+<br>
+</div><br><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; margin-left: 26px; width: 174px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 10-Sept-2019</span><br></h3><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
 <h4>Main changes</h4>
 <ul><li>Header files:&nbsp;</li><ul><li>Update FMC bit definition</li><li>Update ETH&nbsp;bit definition</li><li>update EXTI_EXTICR&nbsp;bit definition</li><li>Update I2C&nbsp;bit definition</li><li>Update SPI&nbsp;bit definition (SPI_CR1_CRC33_17, SPI_RXCRC, SPI_IER, SPI_I2SCFGR)&nbsp;</li><li>TMPSENS IP renamed DTS</li><li>Update FDCAN TXBC&nbsp;bit definition</li><li>Update DAC_DHR8RD&nbsp;bit definition</li><li>Add CRYP in STM32MP151Cx and STM32MP153Cx</li><li>Update TIM / LPTIM&nbsp;bit definition + add missing macros</li></ul><li>Update system_stm32mp1xx.c</li><ul><li>Update SystemCoreClock</li></ul><li>Update startup file for KEIL and IAR</li></ul></div><div style="margin-left: 40px; width: 954px;" class="topic3" id="changes">
 <h4>Contents</h4>

bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/arm/startup_stm32mp15xx.s

@@ -14,8 +14,8 @@
 ;****************************************************************************** 
 ;* @attention
 ;*
-;* © Copyright (c) 2019 STMicroelectronics. 
-;* All rights reserved.
+;* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. 
+;* All rights reserved.</center></h2>
 ;*
 ;* This software component is licensed by ST under BSD 3-Clause license,
 ;* the "License"; You may not use this file except in compliance with the 
@@ -30,7 +30,7 @@
 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
 ; </h>
 
-Stack_Size      EQU     0x00000800
+Stack_Size      EQU     0x00000400
 
                 AREA    STACK, NOINIT, READWRITE, ALIGN=3
 __stack_limit

bsp/stm32/libraries/STM32MPxx_HAL/CMSIS/Device/ST/STM32MP1xx/Source/Templates/gcc/startup_stm32mp15xx.s

@@ -95,14 +95,8 @@ LoopFillZerobss:
  // ldr r0, =__libc_init_array
  // blx r0
 /* Call the application's entry point.*/
-  bl main
-  //ldr r0, =main
-  //blx r0
-
-LoopForever:
-    b LoopForever
-
-
+  bl entry
+  bx lr
 .size Reset_Handler, .-Reset_Handler
 
 /**

bsp/stm32/libraries/STM32MPxx_HAL/STM32MP1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

@@ -38,7 +38,6 @@
 #define AES_CLEARFLAG_CCF               CRYP_CLEARFLAG_CCF
 #define AES_CLEARFLAG_RDERR             CRYP_CLEARFLAG_RDERR
 #define AES_CLEARFLAG_WRERR             CRYP_CLEARFLAG_WRERR
-
 /**
   * @}
   */
@@ -315,6 +314,11 @@
 #if defined(STM32G0)
 #define DMA_REQUEST_DAC1_CHANNEL1                DMA_REQUEST_DAC1_CH1
 #define DMA_REQUEST_DAC1_CHANNEL2                DMA_REQUEST_DAC1_CH2
+#define DMA_REQUEST_TIM16_TRIG_COM               DMA_REQUEST_TIM16_COM
+#define DMA_REQUEST_TIM17_TRIG_COM               DMA_REQUEST_TIM17_COM
+
+#define LL_DMAMUX_REQ_TIM16_TRIG_COM             LL_DMAMUX_REQ_TIM16_COM
+#define LL_DMAMUX_REQ_TIM17_TRIG_COM             LL_DMAMUX_REQ_TIM17_COM
 #endif
 
 #if defined(STM32H7)
@@ -643,6 +647,10 @@
 #define HAL_HRTIM_ExternalEventCounterEnable    HAL_HRTIM_ExtEventCounterEnable
 #define HAL_HRTIM_ExternalEventCounterDisable   HAL_HRTIM_ExtEventCounterDisable
 #define HAL_HRTIM_ExternalEventCounterReset     HAL_HRTIM_ExtEventCounterReset
+#define HRTIM_TIMEEVENT_A                       HRTIM_EVENTCOUNTER_A
+#define HRTIM_TIMEEVENT_B                       HRTIM_EVENTCOUNTER_B
+#define HRTIM_TIMEEVENTRESETMODE_UNCONDITIONAL  HRTIM_EVENTCOUNTER_RSTMODE_UNCONDITIONAL
+#define HRTIM_TIMEEVENTRESETMODE_CONDITIONAL    HRTIM_EVENTCOUNTER_RSTMODE_CONDITIONAL
 #endif /* STM32G4 */
 
 #if defined(STM32H7)
@@ -887,7 +895,6 @@
 #define LPTIM_TRIGSAMPLETIME_2TRANSITION        LPTIM_TRIGSAMPLETIME_2TRANSITIONS
 #define LPTIM_TRIGSAMPLETIME_4TRANSITION        LPTIM_TRIGSAMPLETIME_4TRANSITIONS
 #define LPTIM_TRIGSAMPLETIME_8TRANSITION        LPTIM_TRIGSAMPLETIME_8TRANSITIONS
-
 /**
   * @}
   */
@@ -1014,7 +1021,7 @@
 /**
   * @}
   */
-
+  
 /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
   * @{
   */
@@ -1450,7 +1457,7 @@
 #define HASH_HMACKeyType_ShortKey  HASH_HMAC_KEYTYPE_SHORTKEY
 #define HASH_HMACKeyType_LongKey   HASH_HMAC_KEYTYPE_LONGKEY
 
-#if defined(STM32L4) || defined(STM32L5) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
+#if defined(STM32L4) || defined(STM32L5) || defined(STM32F2) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
 
 #define HAL_HASH_MD5_Accumulate                HAL_HASH_MD5_Accmlt
 #define HAL_HASH_MD5_Accumulate_End            HAL_HASH_MD5_Accmlt_End
@@ -1472,7 +1479,7 @@
 #define HAL_HASHEx_SHA256_Accumulate_IT        HAL_HASHEx_SHA256_Accmlt_IT
 #define HAL_HASHEx_SHA256_Accumulate_End_IT    HAL_HASHEx_SHA256_Accmlt_End_IT
 
-#endif  /* STM32L4 || STM32L5 || STM32F4 || STM32F7 || STM32H7 */
+#endif  /* STM32L4 || STM32L5 || STM32F2 || STM32F4 || STM32F7 || STM32H7 */
 /**
   * @}
   */
@@ -1531,18 +1538,18 @@
 
 #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
 
-#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)
+#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
 #define HAL_I2C_Master_Sequential_Transmit_IT  HAL_I2C_Master_Seq_Transmit_IT
 #define HAL_I2C_Master_Sequential_Receive_IT   HAL_I2C_Master_Seq_Receive_IT
 #define HAL_I2C_Slave_Sequential_Transmit_IT   HAL_I2C_Slave_Seq_Transmit_IT
 #define HAL_I2C_Slave_Sequential_Receive_IT    HAL_I2C_Slave_Seq_Receive_IT
-#endif /* STM32H7 || STM32WB  || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */
-#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)
+#endif /* STM32H7 || STM32WB  || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
+#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
 #define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
 #define HAL_I2C_Master_Sequential_Receive_DMA  HAL_I2C_Master_Seq_Receive_DMA
 #define HAL_I2C_Slave_Sequential_Transmit_DMA  HAL_I2C_Slave_Seq_Transmit_DMA
 #define HAL_I2C_Slave_Sequential_Receive_DMA   HAL_I2C_Slave_Seq_Receive_DMA
-#endif /* STM32H7 || STM32WB  || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */
+#endif /* STM32H7 || STM32WB  || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
 
 #if defined(STM32F4)
 #define HAL_FMPI2C_Master_Sequential_Transmit_IT  HAL_FMPI2C_Master_Seq_Transmit_IT
@@ -3243,9 +3250,8 @@
 #define RCC_MCOSOURCE_PLLCLK_NODIV  RCC_MCO1SOURCE_PLLCLK
 #define RCC_MCOSOURCE_PLLCLK_DIV2   RCC_MCO1SOURCE_PLLCLK_DIV2
 
-#if defined(STM32L4)
+#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5)
 #define RCC_RTCCLKSOURCE_NO_CLK     RCC_RTCCLKSOURCE_NONE
-#elif defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL)
 #else
 #define RCC_RTCCLKSOURCE_NONE       RCC_RTCCLKSOURCE_NO_CLK
 #endif
@@ -3373,7 +3379,7 @@
 /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
   * @{
   */
-#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5)
+#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4)
 #else
 #define __HAL_RTC_CLEAR_FLAG                      __HAL_RTC_EXTI_CLEAR_FLAG
 #endif
@@ -3751,7 +3757,7 @@
 /** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose
   * @{
   */
-#if defined (STM32L4) || defined (STM32F4) || defined (STM32F7)
+#if defined (STM32L4) || defined (STM32F4) || defined (STM32F7) || defined(STM32H7)
 #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE
 #endif /* STM32L4 || STM32F4 || STM32F7 */
 /**

bsp/stm32/libraries/STM32MPxx_HAL/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal.h

@@ -28,7 +28,6 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "stm32mp1xx_hal_conf.h"
-#include <stddef.h>
 
 /** @addtogroup STM32MP1xx_HAL_Driver
  * @{

bsp/stm32/libraries/STM32MPxx_HAL/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_adc_ex.h

@@ -396,7 +396,7 @@ typedef struct
   *         Usage of this macro is not the Standard way of multimode
   *         configuration and can lead to have HAL ADC handles status
   *         misaligned. Usage of this macro must be limited to cases
-  *         mentionned above.
+  *         mentioned above.
   * @param __HANDLE__ ADC handle.
   * @retval None
   */
@@ -439,7 +439,8 @@ typedef struct
   * @param __RANKNB__ Rank number.
   * @retval None
   */
-#define ADC_JSQR_RK(__CHANNELNB__, __RANKNB__) ((((__CHANNELNB__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
+#define ADC_JSQR_RK(__CHANNELNB__, __RANKNB__) ((((__CHANNELNB__)\
+                                                  & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
 
 /**
   * @brief Configure ADC injected context queue
@@ -509,7 +510,8 @@ typedef struct
   * @param __CALIBRATION_FACTOR__ Calibration factor value.
   * @retval None
   */
-#define ADC_CALFACT_DIFF_SET(__CALIBRATION_FACTOR__) (((__CALIBRATION_FACTOR__) & (ADC_CALFACT_CALFACT_D_Pos >> ADC_CALFACT_CALFACT_D_Pos) ) << ADC_CALFACT_CALFACT_D_Pos)
+#define ADC_CALFACT_DIFF_SET(__CALIBRATION_FACTOR__) (((__CALIBRATION_FACTOR__)\
+                                                       & (ADC_CALFACT_CALFACT_D_Pos >> ADC_CALFACT_CALFACT_D_Pos) ) << ADC_CALFACT_CALFACT_D_Pos)
 
 /**
   * @brief Calibration factor in differential mode to be retrieved from calibration register.
@@ -1078,7 +1080,8 @@ HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc);
   * @{
   */
 /* Peripheral Control functions ***********************************************/
-HAL_StatusTypeDef       HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc,ADC_InjectionConfTypeDef* sConfigInjected);
+HAL_StatusTypeDef       HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc,
+                                                        ADC_InjectionConfTypeDef *sConfigInjected);
 #if defined(ADC_MULTIMODE_SUPPORT)
 HAL_StatusTypeDef       HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
 #endif /* ADC_MULTIMODE_SUPPORT */

bsp/stm32/libraries/STM32MPxx_HAL/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_conf_template.h

@@ -58,9 +58,11 @@
 #define HAL_RTC_MODULE_ENABLED
 #define HAL_SAI_MODULE_ENABLED
 #define HAL_SD_MODULE_ENABLED
+#define HAL_SMARTCARD_MODULE_ENABLED
 #define HAL_SMBUS_MODULE_ENABLED
 #define HAL_SPDIFRX_MODULE_ENABLED
 #define HAL_SPI_MODULE_ENABLED
+#define HAL_SRAM_MODULE_ENABLED
 #define HAL_TIM_MODULE_ENABLED
 #define HAL_UART_MODULE_ENABLED
 #define HAL_USART_MODULE_ENABLED
@@ -76,6 +78,7 @@
 #define USE_HAL_I2C_REGISTER_CALLBACKS    0u
 #define USE_HAL_RNG_REGISTER_CALLBACKS    0u
 #define USE_HAL_SPI_REGISTER_CALLBACKS    0u
+#define USE_HAL_SRAM_REGISTER_CALLBACKS   0U
 #define USE_HAL_UART_REGISTER_CALLBACKS   0u
 #define USE_HAL_USART_REGISTER_CALLBACKS  0u
 #define USE_HAL_WWDG_REGISTER_CALLBACKS   0u
@@ -291,6 +294,10 @@
  #include "stm32mp1xx_hal_sd.h"
 #endif /* HAL_SD_MODULE_ENABLED */
 
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32mp1xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
 #ifdef HAL_SMBUS_MODULE_ENABLED
  #include "stm32mp1xx_hal_smbus.h"
 #endif /* HAL_SMBUS_MODULE_ENABLED */
@@ -303,6 +310,10 @@
  #include "stm32mp1xx_hal_spi.h"
 #endif /* HAL_SPI_MODULE_ENABLED */
 
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32mp1xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
 #ifdef HAL_TIM_MODULE_ENABLED
  #include "stm32mp1xx_hal_tim.h"
 #endif /* HAL_TIM_MODULE_ENABLED */

bsp/stm32/libraries/STM32MPxx_HAL/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_cryp.h

@@ -64,6 +64,9 @@ typedef struct
   uint32_t HeaderSize;                /*!< The size of header buffer in word  */
   uint32_t *B0;                       /*!< B0 is first authentication block used only  in AES CCM mode */
   uint32_t DataWidthUnit;             /*!< Data With Unit, this parameter can be value of @ref CRYP_Data_Width_Unit*/
+  uint32_t KeyIVConfigSkip;            /*!< CRYP peripheral Key and IV configuration skip, to config Key and Initialization
+                                           Vector only once and to skip configuration for consecutive processings.
+                                           This parameter can be a value of @ref CRYP_Configuration_Skip */
 
 } CRYP_ConfigTypeDef;
 
@@ -128,6 +131,13 @@ typedef struct
 
   uint32_t                          Version;          /*!< CRYP1 IP version*/
 
+  uint32_t                          KeyIVConfig;      /*!< CRYP peripheral Key and IV configuration flag, used when
+                                                           configuration can be skipped */
+
+  uint32_t                          SizesSum;         /*!< Sum of successive payloads lengths (in bytes), stored
+                                                           for a single signature computation after several
+                                                           messages processing */
+
 #if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1)
   void (*InCpltCallback)(struct __CRYP_HandleTypeDef *hcryp);      /*!< CRYP Input FIFO transfer completed callback  */
   void (*OutCpltCallback)(struct __CRYP_HandleTypeDef *hcryp);     /*!< CRYP Output FIFO transfer completed callback */
@@ -286,6 +296,16 @@ typedef  void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef *hcryp);    /*!< point
   * @}
   */
 
+/** @defgroup CRYP_Configuration_Skip CRYP Key and IV Configuration Skip Mode
+  * @{
+  */
+
+#define CRYP_KEYIVCONFIG_ALWAYS        0x00000000U            /*!< Peripheral Key and IV configuration to do systematically */
+#define CRYP_KEYIVCONFIG_ONCE          0x00000001U            /*!< Peripheral Key and IV configuration to do only once      */
+
+/**
+  * @}
+  */
 
 /**
   * @}
@@ -468,6 +488,9 @@ uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp);
                                    ((DATATYPE) == CRYP_DATATYPE_8B) || \
                                    ((DATATYPE) == CRYP_DATATYPE_1B))
 
+#define IS_CRYP_INIT(CONFIG)(((CONFIG) == CRYP_KEYIVCONFIG_ALWAYS) || \
+                             ((CONFIG) == CRYP_KEYIVCONFIG_ONCE))
+
 /**
   * @}
   */

bsp/stm32/libraries/STM32MPxx_HAL/STM32MP1xx_HAL_Driver/Inc/stm32mp1xx_hal_exti.h

@@ -254,7 +254,8 @@ typedef struct
 #define EXTI_REG_SHIFT                      16u
 #define EXTI_REG1                           (0x00uL << EXTI_REG_SHIFT)
 #define EXTI_REG2                           (0x01uL << EXTI_REG_SHIFT)
-#define EXTI_REG_MASK                       (EXTI_REG1 | EXTI_REG2)
+#define EXTI_REG3                           (0x02uL << EXTI_REG_SHIFT)
+#define EXTI_REG_MASK                       (EXTI_REG1 | EXTI_REG2 | EXTI_REG3)
 #define EXTI_PIN_MASK                       0x0000001Fu
 
 /**

bsp/stm32/libraries/STM32MPxx_HAL/STM32MP1xx_HAL_Driver/Src/stm32mp1xx_hal_cryp_ex.c

@@ -110,7 +110,7 @@ HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, u
 {
   uint32_t tickstart;
   uint64_t headerlength = (uint64_t)(hcryp->Init.HeaderSize) * 32U; /* Header length in bits */
-  uint64_t inputlength = (uint64_t)(hcryp->Size) * 8U; /* input length in bits */
+  uint64_t inputlength = (uint64_t)hcryp->SizesSum * 8U; /* input length in bits */
   uint32_t tagaddr = (uint32_t)AuthTag;
 
   if (hcryp->State == HAL_CRYP_STATE_READY)