提交 eff767a0 编写于 作者: S shaojinchun

remove rt_hw_mb define

sync smp skeleton
上级 f5426f4a
/*
* File : cpu.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2011-09-15 Bernard first version
* 2018-11-22 Jesven add rt_hw_cpu_id()
*/
#include <rthw.h>
#include <rtthread.h>
#include <board.h>
#ifdef RT_USING_SMP
int rt_hw_cpu_id(void)
{
int cpu_id;
__asm__ volatile (
"mrc p15, 0, %0, c0, c0, 5"
:"=r"(cpu_id)
);
cpu_id &= 0xf;
return cpu_id;
};
#endif
/**
* @addtogroup ARM CPU
*/
/*@{*/
/** shutdown CPU */
void rt_hw_cpu_shutdown()
{
rt_uint32_t level;
rt_kprintf("shutdown...\n");
level = rt_hw_interrupt_disable();
while (level)
{
RT_ASSERT(0);
}
}
/*@}*/
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2011-09-15 Bernard first version
* 2018-11-22 Jesven add rt_hw_cpu_id()
*/
#include <rthw.h>
#include <rtthread.h>
#include <board.h>
#ifdef RT_USING_SMP
int rt_hw_cpu_id(void)
{
int cpu_id;
__asm__ volatile (
"mrc p15, 0, %0, c0, c0, 5"
:"=r"(cpu_id)
);
cpu_id &= 0xf;
return cpu_id;
};
void rt_hw_spin_lock(rt_hw_spinlock_t *lock)
{
unsigned long tmp;
unsigned long newval;
rt_hw_spinlock_t lockval;
__asm__ __volatile__(
"pld [%0]"
::"r"(&lock->slock)
);
__asm__ __volatile__(
"1: ldrex %0, [%3]\n"
" add %1, %0, %4\n"
" strex %2, %1, [%3]\n"
" teq %2, #0\n"
" bne 1b"
: "=&r" (lockval), "=&r" (newval), "=&r" (tmp)
: "r" (&lock->slock), "I" (1 << 16)
: "cc");
while (lockval.tickets.next != lockval.tickets.owner) {
__asm__ __volatile__("wfe":::"memory");
lockval.tickets.owner = *(volatile unsigned short *)(&lock->tickets.owner);
}
__asm__ volatile ("dmb":::"memory");
}
void rt_hw_spin_unlock(rt_hw_spinlock_t *lock)
{
__asm__ volatile ("dmb":::"memory");
lock->tickets.owner++;
__asm__ volatile ("dsb ishst\nsev":::"memory");
}
#endif /*RT_USING_SMP*/
void idle_wfi(void)
{
asm volatile ("wfi");
}
/**
* @addtogroup ARM CPU
*/
/*@{*/
/** shutdown CPU */
void rt_hw_cpu_shutdown()
{
rt_uint32_t level;
rt_kprintf("shutdown...\n");
level = rt_hw_interrupt_disable();
while (level)
{
RT_ASSERT(0);
}
}
/*@}*/
...@@ -19,10 +19,8 @@ ...@@ -19,10 +19,8 @@
#define SYS_CTRL __REG32(REALVIEW_SCTL_BASE) #define SYS_CTRL __REG32(REALVIEW_SCTL_BASE)
void idle_wfi(void) extern void idle_wfi(void);
{ extern void rt_hw_ipi_handler_install(int ipi_vector, rt_isr_handler_t ipi_isr_handler);
asm volatile ("wfi");
}
/** /**
* This function will initialize beaglebone board * This function will initialize beaglebone board
...@@ -40,52 +38,8 @@ void rt_hw_board_init(void) ...@@ -40,52 +38,8 @@ void rt_hw_board_init(void)
rt_thread_idle_sethook(idle_wfi); rt_thread_idle_sethook(idle_wfi);
#ifdef RT_USING_SMP #ifdef RT_USING_SMP
/* install IPI interrupt */ /* install IPI handle */
rt_hw_interrupt_install(RT_SCHEDULE_IPI_IRQ, rt_scheduler_ipi_handler, RT_NULL, "ipi"); rt_hw_ipi_handler_install(RT_SCHEDULE_IPI, rt_scheduler_ipi_handler);
rt_hw_interrupt_umask(RT_SCHEDULE_IPI_IRQ);
#endif #endif
} }
#ifdef RT_USING_SMP
void rt_hw_spin_lock(rt_hw_spinlock_t *lock)
{
unsigned long tmp;
unsigned long newval;
rt_hw_spinlock_t lockval;
__asm__ __volatile__(
"pld [%0]"
::"r"(&lock->slock)
);
__asm__ __volatile__(
"1: ldrex %0, [%3]\n"
" add %1, %0, %4\n"
" strex %2, %1, [%3]\n"
" teq %2, #0\n"
" bne 1b"
: "=&r" (lockval), "=&r" (newval), "=&r" (tmp)
: "r" (&lock->slock), "I" (1 << 16)
: "cc");
while (lockval.tickets.next != lockval.tickets.owner) {
__asm__ __volatile__("wfe":::"memory");
lockval.tickets.owner = *(volatile unsigned short *)(&lock->tickets.owner);
}
__asm__ volatile ("dmb":::"memory");
}
void rt_hw_spin_unlock(rt_hw_spinlock_t *lock)
{
__asm__ volatile ("dmb":::"memory");
lock->tickets.owner++;
__asm__ volatile ("dsb ishst\nsev":::"memory");
}
void rt_hw_mb(void)
{
__asm__ volatile ("dmb":::"memory");
}
#endif /*RT_USING_SMP*/
...@@ -507,8 +507,8 @@ typedef siginfo_t rt_siginfo_t; ...@@ -507,8 +507,8 @@ typedef siginfo_t rt_siginfo_t;
#define RT_CPU_DETACHED RT_CPUS_NR /**< The thread not running on cpu. */ #define RT_CPU_DETACHED RT_CPUS_NR /**< The thread not running on cpu. */
#define RT_CPU_MASK ((1 << RT_CPUS_NR) - 1) /**< All CPUs mask bit. */ #define RT_CPU_MASK ((1 << RT_CPUS_NR) - 1) /**< All CPUs mask bit. */
#ifndef RT_SCHEDULE_IPI_IRQ #ifndef RT_SCHEDULE_IPI
#define RT_SCHEDULE_IPI_IRQ 0 #define RT_SCHEDULE_IPI 0
#endif #endif
/** /**
......
...@@ -146,8 +146,6 @@ typedef union { ...@@ -146,8 +146,6 @@ typedef union {
void rt_hw_spin_lock(rt_hw_spinlock_t *lock); void rt_hw_spin_lock(rt_hw_spinlock_t *lock);
void rt_hw_spin_unlock(rt_hw_spinlock_t *lock); void rt_hw_spin_unlock(rt_hw_spinlock_t *lock);
void rt_hw_mb(void);
int rt_hw_cpu_id(void); int rt_hw_cpu_id(void);
extern rt_hw_spinlock_t _cpus_lock; extern rt_hw_spinlock_t _cpus_lock;
......
...@@ -600,7 +600,7 @@ void rt_schedule_insert_thread(struct rt_thread *thread) ...@@ -600,7 +600,7 @@ void rt_schedule_insert_thread(struct rt_thread *thread)
rt_list_insert_before(&(rt_thread_priority_table[thread->current_priority]), rt_list_insert_before(&(rt_thread_priority_table[thread->current_priority]),
&(thread->tlist)); &(thread->tlist));
cpu_mask = RT_CPU_MASK ^ (1 << cpu_id); cpu_mask = RT_CPU_MASK ^ (1 << cpu_id);
rt_hw_ipi_send(RT_SCHEDULE_IPI_IRQ, cpu_mask); rt_hw_ipi_send(RT_SCHEDULE_IPI, cpu_mask);
} }
else else
{ {
...@@ -617,7 +617,7 @@ void rt_schedule_insert_thread(struct rt_thread *thread) ...@@ -617,7 +617,7 @@ void rt_schedule_insert_thread(struct rt_thread *thread)
if (cpu_id != bind_cpu) if (cpu_id != bind_cpu)
{ {
cpu_mask = 1 << bind_cpu; cpu_mask = 1 << bind_cpu;
rt_hw_ipi_send(RT_SCHEDULE_IPI_IRQ, cpu_mask); rt_hw_ipi_send(RT_SCHEDULE_IPI, cpu_mask);
} }
} }
......
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