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未验证 提交 ce034e67 编写于 作者: B Bernard Xiong 提交者： GitHub
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Merge pull request #4202 from OpenNuvoton/nuvoton 

[Nuvoton] Support NUC980 ARM9 platform.
上级 858295fb c9892a82
展开全部 隐藏空白更改
内联 并排
Showing with 50456 addition and 387 deletion
bsp/nuvoton/README.md
浏览文件 @ ce034e67
......@@ -3,5 +3,6 @@ Current supported BSP shown in below table:
| **BSP folder** | **Board name** |
|:------------------------- |:-------------------------- |
| [numaker-iot-m487](numaker-iot-m487) | Nuvoton NuMaker-IoT-m487 |
| [numaker-pfm-m487](numaker-pfm-m487) | Nuvoton NuMaker-PFM-m487 |
| [numaker-iot-m487](numaker-iot-m487) | Nuvoton NuMaker-IoT-M487 |
| [numaker-pfm-m487](numaker-pfm-m487) | Nuvoton NuMaker-PFM-M487 |
| [nk-980iot](nk-980iot) | Nuvoton NK-980IOT |
bsp/nuvoton/libraries/m480/StdDriver/src/nu_can.c
浏览文件 @ ce034e67
......@@ -1148,11 +1148,11 @@ int32_t CAN_SetRxMsgAndMsk(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32IDType,
int32_t CAN_SetMultiRxMsg(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32MsgCount, uint32_t u32IDType, uint32_t u32ID)
{
int32_t rev = (int32_t)TRUE;
uint32_t i = 0ul;
uint32_t i;
uint32_t u32TimeOutCount;
uint32_t u32EOB_Flag = 0ul;
for(i = 1ul; i < u32MsgCount; i++)
for(i = 1ul; i <= u32MsgCount; i++)
{
u32TimeOutCount = 0ul;
......
bsp/nuvoton/libraries/m480/USBHostLib/inc/usbh_lib.h
浏览文件 @ ce034e67
......@@ -141,7 +141,7 @@ typedef int (UAC_CB_FUNC)(struct uac_dev_t *dev, uint8_t *data, int len); /*!
/* */
/*------------------------------------------------------------------*/
extern void usbh_core_init(void);
extern int usbh_pooling_root_hubs(void);
extern int usbh_polling_root_hubs(void);
extern void usbh_install_conn_callback(CONN_FUNC *conn_func, CONN_FUNC *disconn_func);
extern void usbh_suspend(void);
extern void usbh_resume(void);
......
bsp/nuvoton/libraries/m480/USBHostLib/src/usb_core.c
浏览文件 @ ce034e67
......@@ -80,7 +80,7 @@ void usbh_core_init()
* @retval 0 No any hub port status changes found.
* @retval 1 There's hub port status changes.
*/
int usbh_pooling_root_hubs(void)
int usbh_polling_root_hubs(void)
{
int ret, change = 0;
......
bsp/nuvoton/libraries/m480/rtt_port/Kconfig
浏览文件 @ ce034e67
......@@ -941,6 +941,13 @@ config SOC_SERIES_M480
select RT_USING_USB_HOST
select RT_USBH_MSTORAGE
if BSP_USING_USBH || BSP_USING_HSUSBH
config NU_USBHOST_HUB_POLLING_INTERVAL
int "USB Root Hub Polling Interval(in Mili-seconds)"
range 100 2000
default 100
endif
config BSP_USING_HSOTG
bool "Enable High-Speed USB On-The-Go(HSOTG)"
select BSP_USING_HSUSBH
......
bsp/nuvoton/libraries/m480/rtt_port/drv_bpwm_capture.c
浏览文件 @ ce034e67
......@@ -12,6 +12,7 @@
#include <rtconfig.h>
#if defined(BSP_USING_BPWM_CAPTURE)
#if ((BSP_USING_BPWM0_CAPTURE_CHMSK+BSP_USING_BPWM1_CAPTURE_CHMSK)!=0)
#include <rtdevice.h>
#include <NuMicro.h>
......@@ -211,7 +212,7 @@ static rt_err_t nu_bpwm_init(nu_capture_t *nu_capture)
/* Enable BPWM0 clock */
SYS_UnlockReg();
CLK_EnableModuleClock(BPWM0_MODULE);
CLK_SetModuleClock(BPWM0_MODULE, CLK_CLKSEL2_BPWM0SEL_PLL, (uint32_t)NULL);
CLK_SetModuleClock(BPWM0_MODULE, CLK_CLKSEL2_BPWM0SEL_PLL, 0);
SYS_LockReg();
bpwm_config(nu_capture);
bBPWM0Inited = RT_TRUE;
......@@ -225,7 +226,7 @@ static rt_err_t nu_bpwm_init(nu_capture_t *nu_capture)
/* Enable BPWM1 clock */
SYS_UnlockReg();
CLK_EnableModuleClock(BPWM1_MODULE);
CLK_SetModuleClock(BPWM1_MODULE, CLK_CLKSEL2_BPWM1SEL_PLL, (uint32_t)NULL);
CLK_SetModuleClock(BPWM1_MODULE, CLK_CLKSEL2_BPWM1SEL_PLL, 0);
SYS_LockReg();
bpwm_config(nu_capture);
bBPWM1Inited = RT_TRUE;
......@@ -330,4 +331,5 @@ static int nu_bpwm_capture_device_init(void)
}
INIT_DEVICE_EXPORT(nu_bpwm_capture_device_init);
#endif //#if ((BSP_USING_BPWM0_CAPTURE_CHMSK+BSP_USING_BPWM1_CAPTURE_CHMSK)!=0)
#endif //#if defined(BSP_USING_BPWM_CAPTURE)
bsp/nuvoton/libraries/m480/rtt_port/drv_can.c
浏览文件 @ ce034e67
......@@ -166,33 +166,31 @@ static void nu_can_isr(nu_can_t can)
CAN_T *can_base = ((nu_can_t)can)->can_base;
/* Get interrupt event */
u32IIDRstatus = can_base->IIDR;
u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(can_base);
if (u32IIDRstatus == 0x00008000) /* Check Status Interrupt Flag (Error status Int and Status change Int) */
{
/**************************/
/* Status Change interrupt*/
/**************************/
if (can_base->STATUS & CAN_STATUS_RXOK_Msk)
if (can_base->STATUS & CAN_STATUS_TXOK_Msk)
{
can_base->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_RX_IND);
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_TX_DONE);
#endif
can_base->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
rt_kprintf("RX OK INT\n") ;
//rt_kprintf("[%s]TX OK INT\n", can->name) ;
}
if (can_base->STATUS & CAN_STATUS_TXOK_Msk)
if (can_base->STATUS & CAN_STATUS_RXOK_Msk)
{
can_base->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
#ifndef RT_CAN_USING_HDR
/* Using as Lisen,Loopback,Loopback+Lisen mode*/
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_TX_DONE);
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_RX_IND);
#endif
can_base->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
rt_kprintf("TX OK INT\n") ;
//rt_kprintf("[%s]RX OK INT\n", can->name) ;
}
/**************************/
......@@ -200,12 +198,12 @@ static void nu_can_isr(nu_can_t can)
/**************************/
if (can_base->STATUS & CAN_STATUS_EWARN_Msk)
{
rt_kprintf("EWARN INT\n") ;
rt_kprintf("[%s]EWARN INT\n", can->name) ;
}
if (can_base->STATUS & CAN_STATUS_BOFF_Msk)
{
rt_kprintf("BOFF INT\n") ;
rt_kprintf("[%s]BUSOFF INT\n", can->name) ;
/* Do Init to release busoff pin */
can_base->CON = (CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
......@@ -214,18 +212,21 @@ static void nu_can_isr(nu_can_t can)
}
}
#ifdef RT_CAN_USING_HDR
/*Number of Message Object which caused the interrupt*/
else if (u32IIDRstatus != 0 && u32IIDRstatus <= 32)
/*IntId: 0x0001-0x0020, Number of Message Object which caused the interrupt.*/
else if (u32IIDRstatus > 0 && u32IIDRstatus <= 32)
{
rt_kprintf("=> Interrupt Pointer = %d\n", can_base->IIDR - 1);
/*Message RAM 0~15 for CAN Tx using*/
if (u32IIDRstatus < 16)
/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
if (u32IIDRstatus <= RX_MSG_ID_INDEX)
{
//rt_kprintf("[%s-Tx]IntId = %d\n", can->name, u32IIDRstatus);
rt_hw_can_isr(&can->dev, RT_CAN_EVENT_TX_DONE);
else /*Message RAM 16~31 for CAN Rx using*/
}
else /*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
{
rt_hw_can_isr(&can->dev, (RT_CAN_EVENT_RX_IND | (((can_base->IIDR) - 1) << 8)));
//rt_kprintf("[%s-Rx]IntId = %d\n", can->name, u32IIDRstatus);
rt_hw_can_isr(&can->dev, (RT_CAN_EVENT_RX_IND | ((u32IIDRstatus - 1) << 8)));
}
CAN_CLR_INT_PENDING_BIT(can_base, ((can_base->IIDR) - 1)); /* Clear Interrupt Pending */
CAN_CLR_INT_PENDING_BIT(can_base, (u32IIDRstatus - 1)); /* Clear Interrupt Pending */
}
#endif
......@@ -316,7 +317,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
CAN_T *can_base = ((nu_can_t)can)->can_base;
RT_ASSERT(can_base != RT_NULL);
/* Check baudrate */
/* Check baud rate */
RT_ASSERT(can->config.baud_rate != 0);
switch (cmd)
......@@ -359,8 +360,8 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
}
break;
case RT_CAN_CMD_SET_FILTER:
#ifdef RT_CAN_USING_HDR
case RT_CAN_CMD_SET_FILTER:
filter_cfg = (struct rt_can_filter_config *)arg;
for (int i = 0; i < filter_cfg->count; i++)
......@@ -369,7 +370,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
/*set the filter message object*/
if (filter_cfg->items[i].mode == 1)
{
if (CAN_SetRxMsgObjAndMsk(can_base, MSG(i + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
if (CAN_SetRxMsgObjAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
{
return -(RT_ERROR);
}
......@@ -378,14 +379,15 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
{
/*set the filter message object*/
if (CAN_SetRxMsgAndMsk(can_base, MSG(i + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
if (CAN_SetRxMsgAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
{
return -(RT_ERROR);
}
}
}
#endif
break;
#endif
case RT_CAN_CMD_SET_MODE:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_NORMAL && argval != RT_CAN_MODE_LISEN &&
......@@ -399,6 +401,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
return nu_can_configure(can, &can->config);
}
break;
case RT_CAN_CMD_SET_BAUD:
argval = (rt_uint32_t) arg;
if (argval != CAN1MBaud && argval != CAN800kBaud && argval != CAN500kBaud && argval != CAN250kBaud &&
......@@ -412,6 +415,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
return nu_can_configure(can, &can->config);
}
break;
case RT_CAN_CMD_SET_PRIV:
argval = (rt_uint32_t) arg;
if (argval != RT_CAN_MODE_PRIV && argval != RT_CAN_MODE_NOPRIV)
......@@ -439,7 +443,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
}
break;
default:
return -(RT_EINVAL);
return -(RT_EINVAL);
}
......@@ -503,11 +507,16 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
RT_ASSERT(buf != RT_NULL);
/* get data */
CAN_Receive(can_base, boxno, &tMsg);
if (CAN_Receive(can_base, boxno, &tMsg) == FALSE)
{
rt_kprintf("No available RX Msg.\n");
return -(RT_ERROR);
}
#ifdef RT_CAN_USING_HDR
/* Hardware filter messages are valid */
can->hdr->connected = 1;
pmsg->hdr = boxno - RX_MSG_ID_INDEX;
can->hdr[pmsg->hdr].connected = 1;
#endif
/* Standard ID (11 bits)*/
......@@ -521,6 +530,7 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
pmsg->ide = RT_CAN_EXTID;
pmsg->id = tMsg.Id;
}
if (tMsg.FrameType == CAN_DATA_FRAME)
{
/* Data frame */
......@@ -531,9 +541,10 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
/* Remote frame */
pmsg->rtr = RT_CAN_RTR;
}
pmsg->len = tMsg.DLC ;
rt_memcpy(pmsg->data, tMsg.Data, pmsg->len);
rt_memcpy(pmsg->data, tMsg.Data, pmsg->len);
return RT_EOK;
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_clk.c
浏览文件 @ ce034e67
......@@ -89,64 +89,44 @@ static struct rt_pm_ops ops =
struct rt_device pm;
/* Sleep and power-down mapping */
const static uint32_t g_au32SleepingMode[PM_SLEEP_MODE_MAX] =
{
0,
0,
CONFIG_MODE_LIGHT,
CONFIG_MODE_DEEP,
CONFIG_MODE_STANDBY,
CONFIG_MODE_SHUTDOWN
};
/* pm sleep() entry */
static void pm_sleep(struct rt_pm *pm, rt_uint8_t mode)
{
SYS_UnlockReg();
RT_ASSERT(mode < PM_SLEEP_MODE_MAX);
if ((mode == PM_SLEEP_MODE_NONE) || (mode == PM_SLEEP_MODE_IDLE))
return;
switch (mode)
{
/* wake-up source: */
/* PM_SLEEP_MODE_LIGHT : TIMERn */
/* PM_SLEEP_MODE_DEEP : TIMERn */
/* PM_SLEEP_MODE_STANDBY : wake-up timer (optional) */
/* PM_SLEEP_MODE_SHUTDOWN : wake-up timer (optional) */
case PM_SLEEP_MODE_NONE:
case PM_SLEEP_MODE_IDLE:
break;
case PM_SLEEP_MODE_LIGHT:
CLK_SetPowerDownMode(CONFIG_MODE_LIGHT);
CLK_PowerDown();
break;
case PM_SLEEP_MODE_DEEP:
CLK_SetPowerDownMode(CONFIG_MODE_DEEP);
CLK_PowerDown();
break;
case PM_SLEEP_MODE_STANDBY:
#if defined (NU_CLK_INVOKE_WKTMR)
/* Enable wake-up timer with pre-defined interval if it is invoked */
CLK_SET_WKTMR_INTERVAL(WKTMR_INTERVAL);
CLK_ENABLE_WKTMR();
#endif
CLK_SetPowerDownMode(CONFIG_MODE_STANDBY);
CLK_PowerDown();
break;
case PM_SLEEP_MODE_SHUTDOWN:
SYS_UnlockReg();
#if defined (NU_CLK_INVOKE_WKTMR)
if ((mode == PM_SLEEP_MODE_SHUTDOWN) || (mode == PM_SLEEP_MODE_STANDBY))
{
/* Enable wake-up timer with pre-defined interval if it is invoked */
CLK_SET_WKTMR_INTERVAL(WKTMR_INTERVAL);
CLK_ENABLE_WKTMR();
}
#endif
CLK_SetPowerDownMode(CONFIG_MODE_SHUTDOWN);
CLK_PowerDown();
break;
default:
RT_ASSERT(0);
break;
}
CLK_SetPowerDownMode(g_au32SleepingMode[mode]);
CLK_PowerDown();
SYS_LockReg();
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_crc.c
浏览文件 @ ce034e67
......@@ -25,6 +25,11 @@
/* Private define ---------------------------------------------------------------*/
#define NU_CRYPTO_CRC_NAME "nu_CRC"
#define CRC_32_POLY 0x04C11DB7
#define CRC_CCITT_POLY 0x00001021
#define CRC_16_POLY 0x00008005
#define CRC_8_POLY 0x00000007
/* Private variables ------------------------------------------------------------*/
static struct rt_mutex s_CRC_mutex;
......@@ -85,7 +90,6 @@ static rt_uint32_t nu_crc_run(
return u32CalChecksum;
}
rt_err_t nu_crc_init(void)
{
SYS_ResetModule(CRC_RST);
......@@ -103,30 +107,29 @@ rt_uint32_t nu_crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_siz
//select CRC operation mode
switch (ctx->crc_cfg.poly)
{
case 0x04C11DB7:
case CRC_32_POLY:
u32OpMode = CRC_32;
break;
case 0x00001021:
case CRC_CCITT_POLY:
u32OpMode = CRC_CCITT;
break;
case 0x00008005:
case CRC_16_POLY:
u32OpMode = CRC_16;
break;
case 0x00000007:
case CRC_8_POLY:
u32OpMode = CRC_8;
break;
default:
return 0;
}
u32CRCAttr |= (ctx->crc_cfg.flags & CRC_FLAG_REFOUT) ? CRC_CHECKSUM_RVS : 0; //CRC Checksum Reverse
u32CRCAttr |= (ctx->crc_cfg.flags & CRC_FLAG_REFIN) ? CRC_WDATA_RVS : 0; //CRC Write Data Reverse
u32CRCAttr |= ctx->crc_cfg.flags & CRC_FLAG_REFOUT ? CRC_CHECKSUM_RVS : 0; //CRC Checksum Reverse
u32CRCAttr |= ctx->crc_cfg.flags & CRC_FLAG_REFIN ? CRC_WDATA_RVS : 0; //CRC Write Data Reverse
//Calcluate CRC checksum, using config's last value as CRC seed
//Calculate CRC checksum, using config's last value as CRC seed
crc_result = nu_crc_run(u32OpMode, ctx->crc_cfg.last_val, u32CRCAttr, (uint8_t *)in, length);
//update CRC result to config's last vaule
//update CRC result to config's last value
ctx->crc_cfg.last_val = crc_result;
return crc_result ^ 0x00 ^ ctx->crc_cfg.xorout;
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_crc.h
浏览文件 @ ce034e67
......@@ -17,5 +17,4 @@ rt_err_t nu_crc_init(void);
rt_uint32_t nu_crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length);
#endif
bsp/nuvoton/libraries/m480/rtt_port/drv_crypto.c
浏览文件 @ ce034e67
......@@ -15,10 +15,9 @@
#if ((defined(BSP_USING_CRYPTO) || defined(BSP_USING_TRNG) || defined(BSP_USING_CRC)) && defined(RT_USING_HWCRYPTO))
#include <string.h>
#include <rtdevice.h>
#include <rtdbg.h>
#include <board.h>
#include "NuMicro.h"
#include <nu_bitutil.h>
......@@ -32,6 +31,14 @@
/* Private typedef --------------------------------------------------------------*/
typedef struct
{
uint8_t *pu8SHATempBuf;
uint32_t u32SHATempBufLen;
uint32_t u32DMAMode;
uint32_t u32BlockSize;
} S_SHA_CONTEXT;
/* Private functions ------------------------------------------------------------*/
static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx);
static void nu_hwcrypto_destroy(struct rt_hwcrypto_ctx *ctx);
......@@ -50,9 +57,6 @@ static const struct rt_hwcrypto_ops nu_hwcrypto_ops =
/* Crypto engine operation ------------------------------------------------------------*/
#if defined(BSP_USING_CRYPTO)
//define NU_HWCRYPTO_NOT_ALIGN_CHECK to disable plain/cipher buffer address alignment checking
//#define NU_HWCRYPTO_NOT_ALIGN_CHECK
#define NU_HWCRYPTO_DES_3KEYS 1
#define NU_HWCRYPTO_DES_NO3KEYS 0
#define NU_HWCRYPTO_AES_NAME "nu_AES"
......@@ -102,6 +106,8 @@ void CRYPTO_IRQHandler()
{
if (AES_GET_INT_FLAG(CRPT))
{
if (CRPT->INTSTS & (CRPT_INTSTS_AESEIF_Msk) || (CRPT->AES_STS & (CRPT_AES_STS_BUSERR_Msk | CRPT_AES_STS_CNTERR_Msk | (0x1ul << 21))))
rt_kprintf("AES ERROR\n");
s_AES_done = 1;
AES_CLR_INT_FLAG(CRPT);
}
......@@ -114,6 +120,8 @@ void CRYPTO_IRQHandler()
if (SHA_GET_INT_FLAG(CRPT))
{
if (CRPT->INTSTS & (CRPT_INTSTS_HMACEIF_Msk) || (CRPT->HMAC_STS & (CRPT_HMAC_STS_DMAERR_Msk | (0x1ul << 9))))
rt_kprintf("SHA ERROR\n");
s_SHA_done = 1;
SHA_CLR_INT_FLAG(CRPT);
}
......@@ -218,8 +226,11 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
uint32_t u32AESOpMode;
uint32_t u32AESKeySize;
unsigned char *in, *out;
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
unsigned char iv_temp[16];
if ((symmetric_info->length % 16) != 0)
if ((symmetric_info->length % 4) != 0)
{
return -RT_EINVAL;
}
......@@ -267,12 +278,8 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
in = (unsigned char *)symmetric_info->in;
out = (unsigned char *)symmetric_info->out;
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
//Checking in/out data buffer address alignment or not
if (((rt_uint32_t)in % 4) != 0)
//Checking in/out data buffer address not alignment or out of SRAM
if (((rt_uint32_t)in % 4) != 0 || ((rt_uint32_t)in < SRAM_BASE) || ((rt_uint32_t)in > SRAM_END))
{
in = rt_malloc(symmetric_info->length);
if (in == RT_NULL)
......@@ -281,11 +288,11 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
return -RT_ENOMEM;
}
memcpy(in, symmetric_info->in, symmetric_info->length);
rt_memcpy(in, symmetric_info->in, symmetric_info->length);
in_align_flag = 1;
}
if (((rt_uint32_t)out % 4) != 0)
if (((rt_uint32_t)out % 4) != 0 || ((rt_uint32_t)out < SRAM_BASE) || ((rt_uint32_t)out > SRAM_END))
{
out = rt_malloc(symmetric_info->length);
if (out == RT_NULL)
......@@ -298,14 +305,35 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
out_align_flag = 1;
}
#endif
if ((u32AESOpMode == AES_MODE_CBC) && (symmetric_info->mode == HWCRYPTO_MODE_DECRYPT))
{
uint32_t loop;
loop = (symmetric_info->length - 1) / 16;
rt_memcpy(iv_temp, in + (loop * 16), 16);
}
nu_aes_crypt_run(symmetric_info->mode == HWCRYPTO_MODE_ENCRYPT ? TRUE : FALSE, u32AESOpMode, symmetric_ctx->key, u32AESKeySize, symmetric_ctx->iv, in, out, symmetric_info->length);
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
if (u32AESOpMode == AES_MODE_CBC)
{
if (symmetric_info->mode == HWCRYPTO_MODE_DECRYPT)
{
rt_memcpy(symmetric_ctx->iv, iv_temp, 16);
}
else
{
uint32_t loop;
loop = (symmetric_info->length - 1) / 16;
rt_memcpy(symmetric_ctx->iv, out + (loop * 16), 16);
}
}
if (out_align_flag)
{
memcpy(symmetric_info->out, out, symmetric_info->length);
rt_memcpy(symmetric_info->out, out, symmetric_info->length);
rt_free(out);
}
......@@ -313,7 +341,6 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
{
rt_free(in);
}
#endif
return RT_EOK;
}
......@@ -371,6 +398,8 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
uint32_t u32DESOpMode;
uint32_t u32DESKeySize;
unsigned char *in, *out;
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
if ((symmetric_info->length % 8) != 0)
{
......@@ -413,12 +442,8 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
in = (unsigned char *)symmetric_info->in;
out = (unsigned char *)symmetric_info->out;
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
//Checking in/out data buffer address alignment or not
if (((rt_uint32_t)in % 4) != 0)
//Checking in/out data buffer address not alignment or out of SRAM
if (((rt_uint32_t)in % 4) != 0 || ((rt_uint32_t)in < SRAM_BASE) || ((rt_uint32_t)in > SRAM_END))
{
in = rt_malloc(symmetric_info->length);
if (in == RT_NULL)
......@@ -427,11 +452,11 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
return -RT_ENOMEM;
}
memcpy(in, symmetric_info->in, symmetric_info->length);
rt_memcpy(in, symmetric_info->in, symmetric_info->length);
in_align_flag = 1;
}
if (((rt_uint32_t)out % 4) != 0)
if (((rt_uint32_t)out % 4) != 0 || ((rt_uint32_t)out < SRAM_BASE) || ((rt_uint32_t)out > SRAM_END))
{
out = rt_malloc(symmetric_info->length);
if (out == RT_NULL)
......@@ -444,14 +469,12 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
out_align_flag = 1;
}
#endif
nu_des_crypt_run(symmetric_info->mode == HWCRYPTO_MODE_ENCRYPT ? TRUE : FALSE, u32DESOpMode, symmetric_ctx->key, u32DESKeySize, symmetric_ctx->iv, in, out, symmetric_info->length);
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
if (out_align_flag)
{
memcpy(symmetric_info->out, out, symmetric_info->length);
rt_memcpy(symmetric_info->out, out, symmetric_info->length);
rt_free(out);
}
......@@ -459,12 +482,53 @@ static rt_err_t nu_des_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
{
rt_free(in);
}
#endif
return RT_EOK;
}
#define CRPT_HMAC_CTL_DMAFIRST_Pos (4) /*!< CRPT_T::HMAC_CTL: DMAFIRST Position */
#define CRPT_HMAC_CTL_DMAFIRST_Msk (0x1ul << CRPT_HMAC_CTL_DMAFIRST_Pos) /*!< CRPT_T::HMAC_CTL: DMAFIRST Mask */
static void SHABlockUpdate(uint32_t u32OpMode, uint32_t u32SrcAddr, uint32_t u32Len, uint32_t u32Mode)
{
SHA_Open(CRPT, u32OpMode, SHA_IN_OUT_SWAP, 0);
//Setup SHA DMA
SHA_SetDMATransfer(CRPT, u32SrcAddr, u32Len);
SHA_CLR_INT_FLAG(CRPT);
//Start SHA
s_SHA_done = 0;
if (u32Mode == CRYPTO_DMA_FIRST)
{
if ((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) == 0x0)
{
//M480MD version
u32Mode = CRYPTO_DMA_CONTINUE;
}
else
{
//M480LD version
CRPT->HMAC_CTL |= CRPT_HMAC_CTL_DMAFIRST_Msk;
}
}
else
{
if ((SYS->CSERVER & SYS_CSERVER_VERSION_Msk) != 0x0)
{
//M480LD version
CRPT->HMAC_CTL &= ~CRPT_HMAC_CTL_DMAFIRST_Msk;
}
}
SHA_Start(CRPT, u32Mode);
while (!s_SHA_done) {};
}
static rt_err_t nu_sha_hash_run(
S_SHA_CONTEXT *psSHACtx,
uint32_t u32OpMode,
uint8_t *pu8InData,
uint32_t u32DataLen
......@@ -472,16 +536,82 @@ static rt_err_t nu_sha_hash_run(
{
rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
//Using SHA
SHA_Open(CRPT, u32OpMode, SHA_IN_OUT_SWAP, 0);
uint8_t *pu8SrcAddr = (uint8_t *)pu8InData;
uint32_t u32CopyLen = 0;
//Setup SHA DMA
SHA_SetDMATransfer(CRPT, (uint32_t)pu8InData, u32DataLen);
SHA_CLR_INT_FLAG(CRPT);
//Start SHA
s_SHA_done = 0;
SHA_Start(CRPT, CRYPTO_DMA_ONE_SHOT);
while (!s_SHA_done) {};
while ((psSHACtx->u32SHATempBufLen + u32DataLen) > psSHACtx->u32BlockSize)
{
if (psSHACtx->pu8SHATempBuf)
{
if (psSHACtx->u32SHATempBufLen == psSHACtx->u32BlockSize)
{
//Trigger SHA block update
SHABlockUpdate(u32OpMode, (uint32_t)psSHACtx->pu8SHATempBuf, psSHACtx->u32BlockSize, psSHACtx->u32DMAMode);
psSHACtx->u32DMAMode = CRYPTO_DMA_CONTINUE;
//free SHATempBuff
rt_free(psSHACtx->pu8SHATempBuf);
psSHACtx->pu8SHATempBuf = NULL;
psSHACtx->u32SHATempBufLen = 0;
continue;
}
else
{
u32CopyLen = psSHACtx->u32BlockSize - psSHACtx->u32SHATempBufLen;
if (u32DataLen < u32CopyLen)
u32CopyLen = u32DataLen;
rt_memcpy(psSHACtx->pu8SHATempBuf + psSHACtx->u32SHATempBufLen, pu8SrcAddr, u32CopyLen);
psSHACtx->u32SHATempBufLen += u32CopyLen;
pu8SrcAddr += u32CopyLen;
u32DataLen -= u32CopyLen;
continue;
}
}
if ((uint32_t) pu8SrcAddr & 3) //address not aligned 4
{
psSHACtx->pu8SHATempBuf = rt_malloc(psSHACtx->u32BlockSize);
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
return -RT_ENOMEM;
}
rt_memcpy(psSHACtx->pu8SHATempBuf, pu8SrcAddr, psSHACtx->u32BlockSize);
psSHACtx->u32SHATempBufLen = psSHACtx->u32BlockSize;
pu8SrcAddr += psSHACtx->u32BlockSize;
u32DataLen -= psSHACtx->u32BlockSize;
continue;
}
//Trigger SHA block update
SHABlockUpdate(u32OpMode, (uint32_t)pu8SrcAddr, psSHACtx->u32BlockSize, psSHACtx->u32DMAMode);
psSHACtx->u32DMAMode = CRYPTO_DMA_CONTINUE;
pu8SrcAddr += psSHACtx->u32BlockSize;
u32DataLen -= psSHACtx->u32BlockSize;
}
if (u32DataLen)
{
if (psSHACtx->pu8SHATempBuf == NULL)
{
psSHACtx->pu8SHATempBuf = rt_malloc(psSHACtx->u32BlockSize);
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
return -RT_ENOMEM;
}
psSHACtx->u32SHATempBufLen = 0;
}
rt_memcpy(psSHACtx->pu8SHATempBuf, pu8SrcAddr, u32DataLen);
psSHACtx->u32SHATempBufLen += u32DataLen;
}
rt_mutex_release(&s_SHA_mutex);
......@@ -492,6 +622,7 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
{
uint32_t u32SHAOpMode;
unsigned char *nu_in;
unsigned char in_align_flag = 0;
//Select SHA operation mode
switch (hash_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
......@@ -517,11 +648,8 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
nu_in = (unsigned char *)in;
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
unsigned char in_align_flag = 0;
//Checking in data buffer address alignment or not
if (((rt_uint32_t)nu_in % 4) != 0)
//Checking in data buffer address not alignment or out of SRAM
if (((rt_uint32_t)nu_in % 4) != 0 || ((rt_uint32_t)nu_in < SRAM_BASE) || ((rt_uint32_t)nu_in > SRAM_END))
{
nu_in = rt_malloc(length);
if (nu_in == RT_NULL)
......@@ -530,19 +658,16 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
return -RT_ENOMEM;
}
memcpy(nu_in, in, length);
rt_memcpy(nu_in, in, length);
in_align_flag = 1;
}
#endif
nu_sha_hash_run(u32SHAOpMode, nu_in, length);
nu_sha_hash_run(hash_ctx->parent.contex, u32SHAOpMode, nu_in, length);
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
if (in_align_flag)
{
rt_free(nu_in);
}
#endif
return RT_EOK;
}
......@@ -550,35 +675,43 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
static rt_err_t nu_sha_finish(struct hwcrypto_hash *hash_ctx, rt_uint8_t *out, rt_size_t length)
{
unsigned char *nu_out;
unsigned char out_align_flag = 0;
uint32_t u32SHAOpMode;
S_SHA_CONTEXT *psSHACtx = hash_ctx->parent.contex;
//Check SHA Hash value buffer length
switch (hash_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
{
case HWCRYPTO_TYPE_SHA1:
u32SHAOpMode = SHA_MODE_SHA1;
if (length < 5UL)
{
return -RT_EINVAL;
}
break;
case HWCRYPTO_TYPE_SHA224:
u32SHAOpMode = SHA_MODE_SHA224;
if (length < 7UL)
{
return -RT_EINVAL;
}
break;
case HWCRYPTO_TYPE_SHA256:
u32SHAOpMode = SHA_MODE_SHA256;
if (length < 8UL)
{
return -RT_EINVAL;
}
break;
case HWCRYPTO_TYPE_SHA384:
u32SHAOpMode = SHA_MODE_SHA384;
if (length < 12UL)
{
return -RT_EINVAL;
}
break;
case HWCRYPTO_TYPE_SHA512:
u32SHAOpMode = SHA_MODE_SHA512;
if (length < 16UL)
{
return -RT_EINVAL;
......@@ -590,9 +723,6 @@ static rt_err_t nu_sha_finish(struct hwcrypto_hash *hash_ctx, rt_uint8_t *out, r
nu_out = (unsigned char *)out;
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
unsigned char out_align_flag = 0;
//Checking out data buffer address alignment or not
if (((rt_uint32_t)nu_out % 4) != 0)
{
......@@ -605,17 +735,31 @@ static rt_err_t nu_sha_finish(struct hwcrypto_hash *hash_ctx, rt_uint8_t *out, r
out_align_flag = 1;
}
#endif
if (psSHACtx->pu8SHATempBuf)
{
if (psSHACtx->u32DMAMode == CRYPTO_DMA_FIRST)
SHABlockUpdate(u32SHAOpMode, (uint32_t)psSHACtx->pu8SHATempBuf, psSHACtx->u32SHATempBufLen, CRYPTO_DMA_ONE_SHOT);
else
SHABlockUpdate(u32SHAOpMode, (uint32_t)psSHACtx->pu8SHATempBuf, psSHACtx->u32SHATempBufLen, CRYPTO_DMA_LAST);
//free SHATempBuf
rt_free(psSHACtx->pu8SHATempBuf);
psSHACtx->pu8SHATempBuf = RT_NULL;
psSHACtx->u32SHATempBufLen = 0;
}
else
{
SHABlockUpdate(u32SHAOpMode, (uint32_t)NULL, 0, CRYPTO_DMA_LAST);
}
SHA_Read(CRPT, (uint32_t *)nu_out);
#if !defined(NU_HWCRYPTO_NOT_ALIGN_CHECK)
if (out_align_flag)
{
memcpy(out, out, length);
rt_free(out);
rt_memcpy(out, nu_out, length);
rt_free(nu_out);
}
#endif
return RT_EOK;
}
......@@ -728,7 +872,12 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
case HWCRYPTO_TYPE_SHA1:
{
ctx->contex = RT_NULL;
ctx->contex = rt_malloc(sizeof(S_SHA_CONTEXT));
if (ctx->contex == RT_NULL)
return -RT_ERROR;
rt_memset(ctx->contex, 0, sizeof(S_SHA_CONTEXT));
//Setup SHA1 operation
((struct hwcrypto_hash *)ctx)->ops = &nu_sha_ops;
break;
......@@ -736,7 +885,12 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
case HWCRYPTO_TYPE_SHA2:
{
ctx->contex = RT_NULL;
ctx->contex = rt_malloc(sizeof(S_SHA_CONTEXT));
if (ctx->contex == RT_NULL)
return -RT_ERROR;
rt_memset(ctx->contex, 0, sizeof(S_SHA_CONTEXT));
//Setup SHA2 operation
((struct hwcrypto_hash *)ctx)->ops = &nu_sha_ops;
break;
......@@ -758,7 +912,6 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
#endif /* BSP_USING_CRYPTO */
default:
res = -RT_ERROR;
break;
......@@ -801,6 +954,32 @@ static void nu_hwcrypto_reset(struct rt_hwcrypto_ctx *ctx)
break;
}
#endif /* !BSP_USING_TRNG */
#if defined(BSP_USING_CRYPTO)
case HWCRYPTO_TYPE_SHA1:
case HWCRYPTO_TYPE_SHA2:
{
S_SHA_CONTEXT *psSHACtx = (S_SHA_CONTEXT *)ctx->contex;
if (psSHACtx->pu8SHATempBuf)
{
rt_free(psSHACtx->pu8SHATempBuf);
}
psSHACtx->pu8SHATempBuf = RT_NULL;
psSHACtx->u32SHATempBufLen = 0;
psSHACtx->u32DMAMode = CRYPTO_DMA_FIRST;
if ((ctx->type == HWCRYPTO_TYPE_SHA384) || (ctx->type == HWCRYPTO_TYPE_SHA512))
{
psSHACtx->u32BlockSize = 128;
}
else
{
psSHACtx->u32BlockSize = 64;
}
break;
}
#endif
default:
break;
......
bsp/nuvoton/libraries/m480/rtt_port/drv_ecap.c
浏览文件 @ ce034e67
......@@ -12,6 +12,7 @@
#include <rtconfig.h>
#if defined(BSP_USING_ECAP)
#if ((BSP_USING_ECAP0_CHMSK+BSP_USING_ECAP1_CHMSK)!=0)
#include <rtdevice.h>
#include <NuMicro.h>
......@@ -262,7 +263,7 @@ static rt_err_t nu_capture_get_pulsewidth(struct rt_inputcapture_device *inputca
else /* Overrun case */
fTempCnt = nu_capture->u32CurrentCnt + ((0x1000000 - nu_capture->u32LastCnt) + 1);
*pulsewidth_us =(int)(fTempCnt * nu_capture->ecap_dev->fUsPerTick);
*pulsewidth_us = (int)(fTempCnt * nu_capture->ecap_dev->fUsPerTick);
nu_capture->u32LastCnt = nu_capture->u32CurrentCnt;
......@@ -430,7 +431,7 @@ static int nu_ecap_capture_device_init(void)
#if (BSP_USING_ECAP0_CHMSK!=0)
if (BSP_USING_ECAP0_CHMSK & (0x1 << i))
{
nu_ecap0_capture[i] = (nu_capture_t*)rt_malloc(sizeof(nu_capture_t));
nu_ecap0_capture[i] = (nu_capture_t *)rt_malloc(sizeof(nu_capture_t));
ecap_init(nu_ecap0_capture[i], i, &nu_ecap0_dev, nu_ecap0_device_name[i]);
}
#endif //#if (BSP_USING_ECAP0_CHMSK!=0)
......@@ -438,7 +439,7 @@ static int nu_ecap_capture_device_init(void)
#if (BSP_USING_ECAP1_CHMSK!=0)
if (BSP_USING_ECAP1_CHMSK & (0x1 << i))
{
nu_ecap1_capture[i] = (nu_capture_t*)rt_malloc(sizeof(nu_capture_t));
nu_ecap1_capture[i] = (nu_capture_t *)rt_malloc(sizeof(nu_capture_t));
ecap_init(nu_ecap1_capture[i], i, &nu_ecap1_dev, nu_ecap1_device_name[i]);
}
#endif //#if (BSP_USING_ECAP1_CHMSK!=0)
......@@ -447,5 +448,5 @@ static int nu_ecap_capture_device_init(void)
return 0;
}
INIT_DEVICE_EXPORT(nu_ecap_capture_device_init);
#endif //#if ((BSP_USING_ECAP0_CHMSK+BSP_USING_ECAP1_CHMSK)!=0)
#endif //#if defined(BSP_USING_ECAP)
bsp/nuvoton/libraries/m480/rtt_port/drv_epwm_capture.c
浏览文件 @ ce034e67
......@@ -12,6 +12,7 @@
#include <rtconfig.h>
#if defined(BSP_USING_EPWM_CAPTURE)
#if ((BSP_USING_EPWM0_CAPTURE_CHMSK+BSP_USING_EPWM1_CAPTURE_CHMSK)!=0)
#include <rtdevice.h>
#include <NuMicro.h>
......@@ -73,7 +74,7 @@ static rt_err_t CalPulseWidth(nu_capture_t *nu_capture)
bWrapAroundFlag = RT_TRUE;
}
/* Read the capture counter value if falling/risning edge */
/* Read the capture counter value if falling/rising edge */
if (EPWM_GetCaptureIntFlag(nu_capture->epwm, nu_capture->u8Channel) == 1)//Rising edge
{
EPWM_ClearCaptureIntFlag(nu_capture->epwm, nu_capture->u8Channel, EPWM_CAPTURE_INT_RISING_LATCH);
......@@ -294,7 +295,7 @@ void EPWM1P1_IRQHandler(void)
void EPWM1P2_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter()
rt_interrupt_enter();
/* Avoid excessive iteration by monitoring enabled channels */
#if (BSP_USING_EPWM1_CAPTURE_CHMSK&(0x1<<EPWM_CH4CH5_POS))
......@@ -366,7 +367,7 @@ static rt_err_t nu_epwm_init(nu_capture_t *nu_capture)
/* Enable EPWM0 clock */
SYS_UnlockReg();
CLK_EnableModuleClock(EPWM0_MODULE);
CLK_SetModuleClock(EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PLL, (uint32_t)NULL);
CLK_SetModuleClock(EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PLL, 0);
SYS_LockReg();
bEPWM0Inited = RT_TRUE;
}
......@@ -379,7 +380,7 @@ static rt_err_t nu_epwm_init(nu_capture_t *nu_capture)
/* Enable EPWM1 clock */
SYS_UnlockReg();
CLK_EnableModuleClock(EPWM1_MODULE);
CLK_SetModuleClock(EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PLL, (uint32_t)NULL);
CLK_SetModuleClock(EPWM1_MODULE, CLK_CLKSEL2_EPWM1SEL_PLL, 0);
SYS_LockReg();
bEPWM1Inited = RT_TRUE;
}
......@@ -416,7 +417,7 @@ static rt_err_t nu_capture_open(struct rt_inputcapture_device *inputcapture)
nu_capture = (nu_capture_t *) inputcapture;
/* Set capture time as 1000 nano second */
/* Set capture time as 1000 nanosecond */
EPWM_ConfigCaptureChannel(nu_capture->epwm, nu_capture->u8Channel, 1000, 0);
/* Enable capture rising/falling edge interrupt */
......@@ -500,10 +501,10 @@ int nu_epwm_capture_device_init(void)
rt_device_inputcapture_register(&nu_epwm1_capture[i].parent, nu_epwm1_device_name[i], &nu_epwm1_capture[i]);
}
}
#endif //#if (BSP_USING_EPWM1_CAPTURE_CHMSK!=0)
#endif //#if (BSP_USING_EPWM1_CAPTURE_CHMSK!=0)
return 0;
}
INIT_DEVICE_EXPORT(nu_epwm_capture_device_init);
#endif //#if ((BSP_USING_EPWM0_CAPTURE_CHMSK+BSP_USING_EPWM1_CAPTURE_CHMSK)!=0)
#endif //#if defined(BSP_USING_EPWM_CAPTURE)
bsp/nuvoton/libraries/m480/rtt_port/drv_fmc.c
浏览文件 @ ce034e67
......@@ -159,7 +159,7 @@ int nu_fmc_erase(long addr, size_t size)
uint32_t addr_end = addr + size;
#if defined(NU_SUPPORT_NONALIGN)
uint8_t *page_sdtemp = RT_NULL;
uint8_t *page_sdtemp = RT_NULL;
uint8_t *page_edtemp = RT_NULL;
......@@ -316,6 +316,11 @@ static int nu_fmc_init(void)
g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_FIFO);
/* PKG_USING_FAL */
#if defined(PKG_USING_FAL)
fal_init();
#endif
return (int)RT_EOK;
}
INIT_APP_EXPORT(nu_fmc_init);
......
bsp/nuvoton/libraries/m480/rtt_port/drv_gpio.c
浏览文件 @ ce034e67
......@@ -19,6 +19,7 @@
#include <NuMicro.h>
#include <nu_bitutil.h>
#include <drv_gpio.h>
#include <stdlib.h>
/* Private define ---------------------------------------------------------------*/
......@@ -34,6 +35,7 @@ static int nu_gpio_read(struct rt_device *device, rt_base_t pin);
static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args);
static rt_err_t nu_gpio_detach_irq(struct rt_device *device, rt_int32_t pin);
static rt_err_t nu_gpio_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled);
static rt_base_t nu_gpio_pin_get(const char *name);
/* Private variables ------------------------------------------------------------*/
static struct rt_pin_irq_hdr pin_irq_hdr_tab[IRQ_MAX_NUM];
......@@ -45,7 +47,7 @@ static struct rt_pin_ops nu_gpio_ops =
nu_gpio_attach_irq,
nu_gpio_detach_irq,
nu_gpio_irq_enable,
RT_NULL,
nu_gpio_pin_get,
};
static IRQn_Type au32GPIRQ[NU_PORT_CNT] = {GPA_IRQn, GPB_IRQn, GPC_IRQn, GPD_IRQn, GPE_IRQn, GPF_IRQn, GPG_IRQn, GPH_IRQn};
......@@ -102,6 +104,31 @@ static void pin_irq_hdr(rt_uint32_t irq_status, rt_uint32_t port_index)
}
}
static rt_base_t nu_gpio_pin_get(const char *name)
{
/* Get pin number by name,such as PA.0, PF12 */
if ((name[2] == '\0') || ((name[2] == '.') && (name[3] == '\0')))
return -(RT_EINVAL);
long number;
if ((name[2] == '.'))
number = atol(&name[3]);
else
number = atol(&name[2]);
if (number > 15)
return -(RT_EINVAL);
if (name[1] >= 'A' && name[1] <= 'H')
return ((name[1] - 'A') * 0x10) + number;
if (name[1] >= 'a' && name[1] <= 'h')
return ((name[1] - 'a') * 0x10) + number;
return -(RT_EINVAL);
}
static void nu_gpio_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
{
GPIO_T *PORT;
......
bsp/nuvoton/libraries/m480/rtt_port/drv_i2c.c
浏览文件 @ ce034e67
......@@ -202,9 +202,9 @@ static rt_err_t nu_i2c_send_address(nu_i2c_bus_t *nu_i2c,
if (ret != RT_EOK) /* for timeout condition */
return -RT_EIO;
if ( (I2C_GET_STATUS(nu_i2c->I2C)
!= ((flags & RT_I2C_RD) ? u32I2C_MASTER_STATUS_RECEIVE_ADDRESS_ACK : u32I2C_MASTER_STATUS_TRANSMIT_ADDRESS_ACK))
&& !ignore_nack)
if ((I2C_GET_STATUS(nu_i2c->I2C)
!= ((flags & RT_I2C_RD) ? u32I2C_MASTER_STATUS_RECEIVE_ADDRESS_ACK : u32I2C_MASTER_STATUS_TRANSMIT_ADDRESS_ACK))
&& !ignore_nack)
{
LOG_E("sending address failed\n");
return -RT_EIO;
......
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.c
浏览文件 @ ce034e67
......@@ -54,7 +54,6 @@ struct nu_pdma_memfun_actor
{
int m_i32ChannID;
uint32_t m_u32Result;
uint32_t m_u32TrigTransferCnt;
rt_sem_t m_psSemMemFun;
} ;
typedef struct nu_pdma_memfun_actor *nu_pdma_memfun_actor_t;
......@@ -553,6 +552,8 @@ rt_err_t nu_pdma_desc_setup(int i32ChannID, nu_pdma_desc_t dma_desc, uint32_t u3
goto exit_nu_pdma_desc_setup;
else if ((u32AddrSrc % (u32DataWidth / 8)) || (u32AddrDst % (u32DataWidth / 8)))
goto exit_nu_pdma_desc_setup;
else if ( i32TransferCnt > NU_PDMA_MAX_TXCNT )
goto exit_nu_pdma_desc_setup;
psPeriphCtl = &nu_pdma_chn_arr[i32ChannID - NU_PDMA_CH_Pos].m_spPeripCtl;
......@@ -701,9 +702,10 @@ static rt_err_t nu_pdma_sgtbls_valid(nu_pdma_desc_t head)
node = (nu_pdma_desc_t)(node->NEXT + PDMA->SCATBA);
} while (((uint32_t)node != PDMA->SCATBA) && (node != head));
}
while (((uint32_t)node != PDMA->SCATBA) && (node != head));
return RT_EOK;
return RT_EOK;
}
static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_desc_t head, uint32_t u32IdleTimeout_us)
......@@ -718,7 +720,7 @@ static void _nu_pdma_transfer(int i32ChannID, uint32_t u32Peripheral, nu_pdma_de
PDMA_SetTransferMode(PDMA,
i32ChannID,
u32Peripheral,
(head != NULL) ? 1 : 0,
(head->NEXT != 0) ? 1 : 0,
(uint32_t)head);
/* If peripheral is M2M, trigger it. */
......@@ -747,7 +749,7 @@ rt_err_t nu_pdma_transfer(int i32ChannID, uint32_t u32DataWidth, uint32_t u32Add
if (ret != RT_EOK)
goto exit_nu_pdma_transfer;
_nu_pdma_transfer(i32ChannID, psPeriphCtl->m_u32Peripheral, NULL, u32IdleTimeout_us);
_nu_pdma_transfer(i32ChannID, psPeriphCtl->m_u32Peripheral, &PDMA->DSCT[i32ChannID], u32IdleTimeout_us);
ret = RT_EOK;
......@@ -765,7 +767,7 @@ rt_err_t nu_pdma_sg_transfer(int i32ChannID, nu_pdma_desc_t head, uint32_t u32Id
goto exit_nu_pdma_sg_transfer;
else if (!(nu_pdma_chn_mask & (1 << i32ChannID)))
goto exit_nu_pdma_sg_transfer;
else if ( (ret=nu_pdma_sgtbls_valid(head)) != RT_EOK ) /* Check SG-tbls. */
else if ((ret = nu_pdma_sgtbls_valid(head)) != RT_EOK) /* Check SG-tbls. */
goto exit_nu_pdma_sg_transfer;
psPeriphCtl = &nu_pdma_chn_arr[i32ChannID - NU_PDMA_CH_Pos].m_spPeripCtl;
......@@ -912,11 +914,14 @@ static int nu_pdma_memfun_employ(void)
return idx;
}
static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, unsigned int count, nu_pdma_memctrl_t eMemCtl)
static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, unsigned int u32TransferCnt, nu_pdma_memctrl_t eMemCtl)
{
nu_pdma_memfun_actor_t psMemFunActor = NULL;
int idx;
rt_size_t ret = 0;
rt_uint32_t u32Offset = 0;
rt_uint32_t u32TxCnt = 0;
while (1)
{
/* Employ actor */
......@@ -925,37 +930,51 @@ static rt_size_t nu_pdma_memfun(void *dest, void *src, uint32_t u32DataWidth, un
psMemFunActor = &nu_pdma_memfun_actor_arr[idx];
psMemFunActor->m_u32TrigTransferCnt = count;
do
{
/* Set PDMA memory control to eMemCtl. */
nu_pdma_channel_memctrl_set(psMemFunActor->m_i32ChannID, eMemCtl);
u32TxCnt = (u32TransferCnt > NU_PDMA_MAX_TXCNT) ? NU_PDMA_MAX_TXCNT : u32TransferCnt;
/* Register ISR callback function */
nu_pdma_callback_register(psMemFunActor->m_i32ChannID, nu_pdma_memfun_cb, (void *)psMemFunActor, NU_PDMA_EVENT_ABORT | NU_PDMA_EVENT_TRANSFER_DONE);
/* Set PDMA memory control to eMemCtl. */
nu_pdma_channel_memctrl_set(psMemFunActor->m_i32ChannID, eMemCtl);
psMemFunActor->m_u32Result = 0;
/* Register ISR callback function */
nu_pdma_callback_register(psMemFunActor->m_i32ChannID, nu_pdma_memfun_cb, (void *)psMemFunActor, NU_PDMA_EVENT_ABORT | NU_PDMA_EVENT_TRANSFER_DONE);
/* Trigger it */
nu_pdma_transfer(psMemFunActor->m_i32ChannID, u32DataWidth, (uint32_t)src, (uint32_t)dest, count, 0);
psMemFunActor->m_u32Result = 0;
/* Wait it done. */
rt_sem_take(psMemFunActor->m_psSemMemFun, RT_WAITING_FOREVER);
/* Trigger it */
nu_pdma_transfer(psMemFunActor->m_i32ChannID,
u32DataWidth,
(eMemCtl & 0x2ul) ? (uint32_t)src + u32Offset : (uint32_t)src, /* Src address is Inc or not. */
(eMemCtl & 0x1ul) ? (uint32_t)dest + u32Offset : (uint32_t)dest, /* Dst address is Inc or not. */
u32TxCnt,
0);
/* Give result if get NU_PDMA_EVENT_TRANSFER_DONE.*/
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_TRANSFER_DONE)
{
ret = psMemFunActor->m_u32TrigTransferCnt;
}
else
{
ret = psMemFunActor->m_u32TrigTransferCnt - nu_pdma_non_transfer_count_get(psMemFunActor->m_i32ChannID);
}
/* Wait it done. */
rt_sem_take(psMemFunActor->m_psSemMemFun, RT_WAITING_FOREVER);
/* Terminate it if get ABORT event */
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_ABORT)
{
nu_pdma_channel_terminate(psMemFunActor->m_i32ChannID);
/* Give result if get NU_PDMA_EVENT_TRANSFER_DONE.*/
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_TRANSFER_DONE)
{
ret += u32TxCnt;
}
else
{
ret += (u32TxCnt - nu_pdma_non_transfer_count_get(psMemFunActor->m_i32ChannID));
}
/* Terminate it if get ABORT event */
if (psMemFunActor->m_u32Result & NU_PDMA_EVENT_ABORT)
{
nu_pdma_channel_terminate(psMemFunActor->m_i32ChannID);
break;
}
u32TransferCnt -= u32TxCnt;
u32Offset += u32TxCnt;
}
while (u32TransferCnt > 0);
rt_mutex_take(nu_pdma_memfun_actor_pool_lock, RT_WAITING_FOREVER);
nu_pdma_memfun_actor_mask &= ~(1 << idx);
......@@ -979,10 +998,34 @@ rt_size_t nu_pdma_mempush(void *dest, void *src, uint32_t data_width, unsigned i
void *nu_pdma_memcpy(void *dest, void *src, unsigned int count)
{
if (count == nu_pdma_memfun(dest, src, 8, count, eMemCtl_SrcInc_DstInc))
int i = 0;
uint32_t u32Offset = 0;
uint32_t u32Remaining = count;
for (i = 4; (i > 0) && (u32Remaining > 0) ; i >>= 1)
{
uint32_t u32src = (uint32_t)src + u32Offset;
uint32_t u32dest = (uint32_t)dest + u32Offset;
if (((u32src % i) == (u32dest % i)) &&
((u32src % i) == 0) &&
(RT_ALIGN_DOWN(u32Remaining, i) >= i))
{
uint32_t u32TXCnt = u32Remaining / i;
if (u32TXCnt != nu_pdma_memfun((void *)u32dest, (void *)u32src, i * 8, u32TXCnt, eMemCtl_SrcInc_DstInc))
goto exit_nu_pdma_memcpy;
u32Offset += (u32TXCnt * i);
u32Remaining -= (u32TXCnt * i);
}
}
if (count == u32Offset)
return dest;
else
return NULL;
exit_nu_pdma_memcpy:
return NULL;
}
/**
......
bsp/nuvoton/libraries/m480/rtt_port/drv_pdma.h
浏览文件 @ ce034e67
......@@ -31,6 +31,7 @@
#define NU_PDMA_UNUSED (-1)
#define NU_PDMA_SG_LIMITED_DISTANCE ((PDMA_DSCT_NEXT_NEXT_Msk>>PDMA_DSCT_NEXT_NEXT_Pos)+1)
#define NU_PDMA_MAX_TXCNT ((PDMA_DSCT_CTL_TXCNT_Msk>>PDMA_DSCT_CTL_TXCNT_Pos) + 1)
typedef enum
{
......
bsp/nuvoton/libraries/m480/rtt_port/drv_rtc.c
浏览文件 @ ce034e67
......@@ -52,21 +52,21 @@
static rt_err_t nu_rtc_control(rt_device_t dev, int cmd, void *args);
#if defined (NU_RTC_SUPPORT_IO_RW)
static rt_size_t nu_rtc_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size);
static rt_size_t nu_rtc_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size);
static rt_size_t nu_rtc_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size);
static rt_size_t nu_rtc_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size);
#endif
static rt_err_t nu_rtc_is_date_valid(const time_t *const t);
static void nu_rtc_init(void);
#if defined(RT_USING_ALARM)
static void nu_rtc_alarm_reset(void);
static void nu_rtc_alarm_reset(void);
#endif
/* Public functions -------------------------------------------------------------*/
#if defined (NU_RTC_SUPPORT_MSH_CMD)
extern rt_err_t set_date(rt_uint32_t year, rt_uint32_t month, rt_uint32_t day);
extern rt_err_t set_time(rt_uint32_t hour, rt_uint32_t minute, rt_uint32_t second);
extern rt_err_t set_date(rt_uint32_t year, rt_uint32_t month, rt_uint32_t day);
extern rt_err_t set_time(rt_uint32_t hour, rt_uint32_t minute, rt_uint32_t second);
#endif
/* Private variables ------------------------------------------------------------*/
......
bsp/nuvoton/libraries/m480/rtt_port/drv_spi.c
浏览文件 @ ce034e67
......@@ -342,25 +342,38 @@ exit_nu_pdma_spi_tx_config:
static rt_size_t nu_spi_pdma_transmit(struct nu_spi *spi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word)
{
rt_err_t result = RT_EOK;
rt_uint32_t u32Offset = 0;
rt_uint32_t u32TransferCnt = length / bytes_per_word;
rt_uint32_t u32TxCnt = 0;
/* Get base address of spi register */
SPI_T *spi_base = spi_bus->spi_base;
result = nu_pdma_spi_rx_config(spi_bus, recv_addr, length, bytes_per_word);
RT_ASSERT(result == RT_EOK);
result = nu_pdma_spi_tx_config(spi_bus, send_addr, length, bytes_per_word);
RT_ASSERT(result == RT_EOK);
do
{
u32TxCnt = (u32TransferCnt > NU_PDMA_MAX_TXCNT) ? NU_PDMA_MAX_TXCNT : u32TransferCnt;
result = nu_pdma_spi_rx_config(spi_bus, (recv_addr == RT_NULL) ? recv_addr : &recv_addr[u32Offset], (u32TxCnt * bytes_per_word), bytes_per_word);
RT_ASSERT(result == RT_EOK);
/* Trigger TX/RX PDMA transfer. */
SPI_TRIGGER_TX_RX_PDMA(spi_base);
result = nu_pdma_spi_tx_config(spi_bus, (send_addr == RT_NULL) ? send_addr : &send_addr[u32Offset], (u32TxCnt * bytes_per_word), bytes_per_word);
RT_ASSERT(result == RT_EOK);
/* Wait RX-PDMA transfer done */
rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
/* Trigger TX/RX PDMA transfer. */
SPI_TRIGGER_TX_RX_PDMA(spi_base);
/* Stop TX/RX DMA transfer. */
SPI_DISABLE_TX_RX_PDMA(spi_base);
/* Wait RX-PDMA transfer done */
rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
return result;
/* Stop TX/RX DMA transfer. */
SPI_DISABLE_TX_RX_PDMA(spi_base);
u32TransferCnt -= u32TxCnt;
u32Offset += u32TxCnt;
}
while (u32TransferCnt > 0);
return length;
}
rt_err_t nu_hw_spi_pdma_allocate(struct nu_spi *spi_bus)
......
bsp/nuvoton/libraries/m480/rtt_port/drv_timer_capture.c
浏览文件 @ ce034e67
......@@ -13,6 +13,10 @@
#include <rtconfig.h>
#if defined(BSP_USING_TIMER_CAPTURE)
#if defined(BSP_USING_TIMER0_CAPTURE)|| \
defined(BSP_USING_TIMER1_CAPTURE)|| \
defined(BSP_USING_TIMER2_CAPTURE)|| \
defined(BSP_USING_TIMER3_CAPTURE)
#include <rtdevice.h>
#include <NuMicro.h>
......@@ -150,8 +154,6 @@ static rt_err_t nu_capture_get_pulsewidth(struct rt_inputcapture_device *inputca
static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
{
rt_err_t ret = RT_ERROR;
SYS_UnlockReg();
#if defined(BSP_USING_TIMER0_CAPTURE)
......@@ -160,8 +162,6 @@ static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
/* Enable TIMER0 clock */
CLK_EnableModuleClock(TMR0_MODULE);
CLK_SetModuleClock(TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_PCLK0, 0);
ret = RT_EOK;
goto exit_nu_timer_init;
}
#endif
......@@ -171,8 +171,6 @@ static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
/* Enable TIMER1 clock */
CLK_EnableModuleClock(TMR1_MODULE);
CLK_SetModuleClock(TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_PCLK0, 0);
ret = RT_EOK;
goto exit_nu_timer_init;
}
#endif
......@@ -182,8 +180,6 @@ static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
/* Enable TIMER2 clock */
CLK_EnableModuleClock(TMR2_MODULE);
CLK_SetModuleClock(TMR2_MODULE, CLK_CLKSEL1_TMR2SEL_PCLK1, 0);
ret = RT_EOK;
goto exit_nu_timer_init;
}
#endif
......@@ -193,12 +189,17 @@ static rt_err_t nu_timer_init(nu_capture_t *nu_capture)
/* Enable TIMER3 clock */
CLK_EnableModuleClock(TMR3_MODULE);
CLK_SetModuleClock(TMR3_MODULE, CLK_CLKSEL1_TMR3SEL_PCLK1, 0);
goto exit_nu_timer_init;
}
#endif
SYS_LockReg();
return -(RT_ERROR);
exit_nu_timer_init:
SYS_LockReg();
return -(ret);
return RT_EOK;
}
static rt_err_t nu_capture_init(struct rt_inputcapture_device *inputcapture)
......@@ -241,6 +242,9 @@ static rt_err_t nu_capture_open(struct rt_inputcapture_device *inputcapture)
/* Enable Timer NVIC */
NVIC_EnableIRQ(nu_capture->irq);
/* Reset counter before openning. */
TIMER_ResetCounter(nu_capture->timer);
TIMER_Open(nu_capture->timer, TIMER_CONTINUOUS_MODE, 1);
TIMER_SET_PRESCALE_VALUE(nu_capture->timer, cal_time_prescale(nu_capture));
TIMER_SET_CMP_VALUE(nu_capture->timer, 0xFFFFFF);
......@@ -318,5 +322,5 @@ static int nu_timer_capture_device_init(void)
return 0;
}
INIT_DEVICE_EXPORT(nu_timer_capture_device_init);
#endif //#if defined(BSP_USING_TIMER*_CAPTURE)
#endif //#if defined(BSP_USING_TIMER_CAPTURE)
bsp/nuvoton/libraries/m480/rtt_port/drv_trng.c
浏览文件 @ ce034e67
......@@ -15,8 +15,8 @@
#if (defined(BSP_USING_TRNG) && defined(RT_HWCRYPTO_USING_RNG))
#include <rtdevice.h>
#include <stdlib.h>
#include "NuMicro.h"
#include <stdlib.h>
#define NU_CRYPTO_TRNG_NAME "nu_TRNG"
......
bsp/nuvoton/libraries/m480/rtt_port/drv_trng.h
浏览文件 @ ce034e67
......@@ -18,4 +18,3 @@ void nu_trng_open(void);
rt_uint32_t nu_trng_rand(struct hwcrypto_rng *ctx);
#endif
bsp/nuvoton/libraries/m480/rtt_port/drv_uart.c
浏览文件 @ ce034e67
......@@ -546,7 +546,7 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t
nu_pdma_uart_rx_cb,
(void *)serial,
NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT);
if ( result != RT_EOK )
if (result != RT_EOK)
{
goto exit_nu_pdma_uart_rx_config;
}
......@@ -557,7 +557,7 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t
(uint32_t)pu8Buf,
i32TriggerLen,
1000); //Idle-timeout, 1ms
if ( result != RT_EOK )
if (result != RT_EOK)
{
goto exit_nu_pdma_uart_rx_config;
}
......
bsp/nuvoton/libraries/m480/rtt_port/drv_usbd.c
浏览文件 @ ce034e67
......@@ -364,7 +364,7 @@ __STATIC_INLINE void _USBD_IRQHandler(void)
/* Clear event flag */
USBD_CLR_INT_FLAG(USBD_INTSTS_EP0);
if ( (USBD_GET_ADDR() == 0)
if ((USBD_GET_ADDR() == 0)
&& (nu_usbd.address_tmp)
)
{
......
bsp/nuvoton/libraries/m480/rtt_port/drv_usbhost.c
浏览文件 @ ce034e67
......@@ -22,6 +22,10 @@
#include "usb.h"
#include "usbh_lib.h"
#if !defined(NU_USBHOST_HUB_POLLING_INTERVAL)
#define NU_USBHOST_HUB_POLLING_INTERVAL (100)
#endif
#define NU_MAX_USBH_PORT 2 //USB1.1 + USB2.0 port
#define NU_MAX_USBH_PIPE 16
#define NU_USBH_THREAD_STACK_SIZE 2048
......@@ -51,6 +55,7 @@ typedef struct nu_port_ctrl
struct nu_usbh_dev
{
uhcd_t uhcd;
rt_thread_t polling_thread;
S_NU_RH_PORT_CTRL asPortCtrl[NU_MAX_USBH_PORT];
};
......@@ -290,7 +295,6 @@ static rt_err_t nu_open_pipe(upipe_t pipe)
static rt_err_t nu_close_pipe(upipe_t pipe)
{
int i;
S_NU_RH_PORT_CTRL *psPortCtrl;
S_NU_PORT_DEV *psPortDev;
......@@ -309,6 +313,7 @@ static rt_err_t nu_close_pipe(upipe_t pipe)
{
if (psPortDev->pUDev)
{
int i;
for (i = 0; i < NU_MAX_USBH_PIPE; i++)
{
if (psPortDev->apsEPInfo[i] != NULL)
......@@ -320,7 +325,6 @@ static rt_err_t nu_close_pipe(upipe_t pipe)
free_device(psPortDev->pUDev);
psPortDev->pUDev = NULL;
}
psPortDev->port_num = 0;
}
}
......@@ -615,8 +619,8 @@ static void nu_usbh_rh_thread_entry(void *parameter)
{
while (1)
{
usbh_pooling_root_hubs();
rt_thread_delay(10);
usbh_polling_root_hubs();
rt_thread_mdelay(NU_USBHOST_HUB_POLLING_INTERVAL);
}
}
......@@ -674,6 +678,8 @@ static void nu_hcd_disconnect_callback(
return;
}
port_index = i + 1;
for (i = 0; i < NU_MAX_USBH_PIPE; i++)
{
if (psPortCtrl->sRHPortDev.apsEPInfo[i] != NULL)
......@@ -682,10 +688,9 @@ static void nu_hcd_disconnect_callback(
}
}
port_index = i + 1;
psPortCtrl->sRHPortDev.pUDev = NULL;
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb disconnnect\n"));
RT_DEBUG_LOG(RT_DEBUG_USB, ("usb disconnect\n"));
rt_usbh_root_hub_disconnect_handler(s_sUSBHDev.uhcd, port_index);
}
......@@ -701,22 +706,21 @@ static struct uhcd_ops nu_uhcd_ops =
static rt_err_t nu_hcd_init(rt_device_t device)
{
rt_thread_t thread;
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
usbh_core_init();
//install connect/disconnect callback
usbh_install_conn_callback(nu_hcd_connect_callback, nu_hcd_disconnect_callback);
usbh_pooling_root_hubs();
usbh_polling_root_hubs();
//create thread for polling usbh port status
/* create usb hub thread */
thread = rt_thread_create("usbh_drv", nu_usbh_rh_thread_entry, RT_NULL,
pNuUSBHDev->polling_thread = rt_thread_create("usbh_drv", nu_usbh_rh_thread_entry, RT_NULL,
NU_USBH_THREAD_STACK_SIZE, 8, 20);
if (thread != RT_NULL)
if ( pNuUSBHDev->polling_thread != RT_NULL)
{
/* startup usb host thread */
rt_thread_startup(thread);
rt_thread_startup( pNuUSBHDev->polling_thread );
}
else
{
......@@ -742,6 +746,54 @@ uint32_t usbh_tick_from_millisecond(uint32_t msec)
return rt_tick_from_millisecond(msec);
}
#if defined(RT_USING_PM)
/* device pm suspend() entry. */
static int usbhost_pm_suspend(const struct rt_device *device, rt_uint8_t mode)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev!=RT_NULL);
switch (mode)
{
case PM_SLEEP_MODE_LIGHT:
case PM_SLEEP_MODE_DEEP:
pNuUSBHDev->polling_thread->stat = RT_THREAD_READY;
rt_thread_suspend(pNuUSBHDev->polling_thread);
break;
default:
break;
}
return (int)RT_EOK;
}
/* device pm resume() entry. */
static void usbhost_pm_resume(const struct rt_device *device, rt_uint8_t mode)
{
struct nu_usbh_dev * pNuUSBHDev = (struct nu_usbh_dev *)device;
RT_ASSERT(pNuUSBHDev!=RT_NULL);
switch (mode)
{
case PM_SLEEP_MODE_LIGHT:
case PM_SLEEP_MODE_DEEP:
rt_thread_resume(pNuUSBHDev->polling_thread);
break;
default:
break;
}
}
static struct rt_device_pm_ops device_pm_ops =
{
.suspend = usbhost_pm_suspend,
.resume = usbhost_pm_resume,
.frequency_change = RT_NULL
};
#endif
int nu_usbh_register(void)
{
......@@ -760,9 +812,6 @@ int nu_usbh_register(void)
#endif
#if defined(BSP_USING_USBH)
/* Enable USBD and OTG clock */
CLK_EnableModuleClock(USBD_MODULE);
CLK_EnableModuleClock(OTG_MODULE);
/* Set USB Host role */
SYS->USBPHY = (SYS->USBPHY & ~SYS_USBPHY_USBROLE_Msk) | (0x1u << SYS_USBPHY_USBROLE_Pos);
SYS->USBPHY |= SYS_USBPHY_USBEN_Msk | SYS_USBPHY_SBO_Msk ;
......@@ -775,11 +824,7 @@ int nu_usbh_register(void)
rt_memset(&s_sUSBHDev, 0x0, sizeof(struct nu_usbh_dev));
uhcd_t uhcd = (uhcd_t)rt_malloc(sizeof(struct uhcd));
if (uhcd == RT_NULL)
{
rt_kprintf("uhcd malloc failed\r\n");
return -RT_ERROR;
}
RT_ASSERT(res != RT_NULL);
rt_memset((void *)uhcd, 0, sizeof(struct uhcd));
......@@ -792,23 +837,18 @@ int nu_usbh_register(void)
s_sUSBHDev.uhcd = uhcd;
res = rt_device_register(&uhcd->parent, "usbh", RT_DEVICE_FLAG_DEACTIVATE);
if (res != RT_EOK)
{
rt_kprintf("register usb host failed res = %d\r\n", res);
return -RT_ERROR;
}
RT_ASSERT(res == RT_EOK);
/*initialize the usb host functin */
/*initialize the usb host function */
res = rt_usb_host_init();
RT_ASSERT(res == RT_EOK);
#if defined(RT_USING_PM)
rt_pm_device_register(&uhcd->parent, &device_pm_ops);
#endif
return RT_EOK;
}
INIT_DEVICE_EXPORT(nu_usbh_register);
#endif
bsp/nuvoton/libraries/m480/rtt_port/drv_uspi.c
浏览文件 @ ce034e67
......@@ -493,7 +493,7 @@ static void nu_uspi_transfer(struct nu_uspi *uspi_bus, uint8_t *tx, uint8_t *rx,
/* DMA transfer constrains */
if ((uspi_bus->pdma_chanid_rx >= 0) &&
!((uint32_t)tx % bytes_per_word) &&
!((uint32_t)rx % bytes_per_word) )
!((uint32_t)rx % bytes_per_word))
nu_uspi_pdma_transmit(uspi_bus, tx, rx, length, bytes_per_word);
else
nu_uspi_transmission_with_poll(uspi_bus, tx, rx, length, bytes_per_word);
......
bsp/nuvoton/libraries/m480/rtt_port/drv_wdt.c
浏览文件 @ ce034e67
......@@ -91,16 +91,17 @@ typedef volatile struct soft_time_handle soft_time_handle_t;
/* Private functions ------------------------------------------------------------*/
static rt_err_t wdt_init(rt_watchdog_t *dev);
static rt_err_t wdt_control(rt_watchdog_t *dev, int cmd, void *args);
static uint32_t wdt_get_module_clock(void);
static uint32_t wdt_get_working_hz(void);
static void soft_time_init(soft_time_handle_t *const soft_time);
static void soft_time_setup(uint32_t wanted_sec, uint32_t hz, soft_time_handle_t *const soft_time);
static void soft_time_feed_dog(soft_time_handle_t *const soft_time);
#if defined(RT_USING_PM)
static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode);
static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode);
static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode);
static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time);
static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode);
static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode);
static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode);
static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time);
#endif
/* Public functions -------------------------------------------------------------*/
......@@ -118,7 +119,6 @@ static struct rt_watchdog_ops ops_wdt =
static struct rt_device_pm_ops device_pm_ops =
{
.suspend = wdt_pm_suspend,
.resume = wdt_pm_resume,
.frequency_change = wdt_pm_frequency_change
......@@ -180,12 +180,6 @@ static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode)
}
static uint32_t wdt_get_module_clock(void)
{
return (CLK_GetModuleClockSource(WDT_MODULE) << CLK_CLKSEL1_WDTSEL_Pos);
}
/* device pm frequency_change() entry. */
static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode)
{
......@@ -288,6 +282,12 @@ static rt_err_t wdt_init(rt_watchdog_t *dev)
}
static uint32_t wdt_get_module_clock(void)
{
return (CLK_GetModuleClockSource(WDT_MODULE) << CLK_CLKSEL1_WDTSEL_Pos);
}
static uint32_t wdt_get_working_hz(void)
{
uint32_t clk, hz = 0;
......@@ -408,6 +408,7 @@ static rt_err_t wdt_control(rt_watchdog_t *dev, int cmd, void *args)
case RT_DEVICE_CTRL_WDT_START:
WDT_RESET_COUNTER();
WDT_Open(MIN_TOUTSEL, WDT_RESET_DELAY_1026CLK, TRUE, TRUE);
WDT_EnableInt();
break;
......
bsp/nuvoton/libraries/nu_packages/AudioCodec/SConscript
浏览文件 @ ce034e67
......@@ -3,12 +3,19 @@ from building import *
cwd = GetCurrentDir()
group = []
src = Split("""
audio_test.c
""")
CPPPATH = [cwd]
if GetDepend('NU_PKG_USING_NAU88L25'):
src = Split("""
acodec_nau88l25.c
audio_test.c
""")
CPPPATH = [cwd]
src += Glob('acodec_nau88l25.c')
group = DefineGroup('nu_pkgs_nau88l25', src, depend = [''], CPPPATH = CPPPATH)
elif GetDepend('NU_PKG_USING_NAU8822'):
src += Glob('acodec_nau8822.c')
group = DefineGroup('nu_pkgs_nau8822', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau8822.c 0 → 100644
浏览文件 @ ce034e67
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-12-12 Wayne First version
*
******************************************************************************/
#include <rtconfig.h>
#if defined(NU_PKG_USING_NAU8822)
#include <rtthread.h>
#include <rtdevice.h>
#include "acodec_nau8822.h"
#include "drv_i2s.h"
#define DBG_ENABLE
#define DBG_LEVEL DBG_LOG
#define DBG_SECTION_NAME "acodec.nau8822"
#define DBG_COLOR
#include <rtdbg.h>
#define DEF_NAU8822_ADDR 0x1A
static struct rt_i2c_bus_device *g_I2cBusDev = NULL;
S_NU_NAU8822_CONFIG *g_psCodecConfig = NULL;
static rt_err_t nau8822_init(void);
static rt_err_t nau8822_reset(void);
static rt_err_t nau8822_dsp_control(struct rt_audio_configure *config);
static rt_err_t nau8822_mixer_control(rt_uint32_t ui32Units, rt_uint32_t ui32Value);
static rt_err_t nau8822_mixer_query(rt_uint32_t ui32Units, rt_uint32_t *ui32Value);
nu_acodec_ops nu_acodec_ops_nau8822 =
{
.name = "NAU8822",
.role = NU_ACODEC_ROLE_SLAVE,
.config = { // Default settings.
.samplerate = 16000,
.channels = 2,
.samplebits = 16
},
.nu_acodec_init = nau8822_init,
.nu_acodec_reset = nau8822_reset,
.nu_acodec_dsp_control = nau8822_dsp_control,
.nu_acodec_mixer_control = nau8822_mixer_control,
.nu_acodec_mixer_query = nau8822_mixer_query
};
static void nau8822_delay_ms(rt_uint32_t nms)
{
rt_thread_mdelay(nms);
}
static int I2C_ReadNAU8822(uint8_t u8addr, uint16_t *pu16data)
{
struct rt_i2c_msg msgs[2];
uint8_t u8TxData = (u8addr << 1);
RT_ASSERT(g_I2cBusDev != NULL);
RT_ASSERT(pu16data != NULL);
msgs[0].addr = DEF_NAU8822_ADDR; /* Slave address */
msgs[0].flags = RT_I2C_WR; /* Write flag */
msgs[0].buf = (rt_uint8_t *)&u8TxData; /* Number of bytes sent */
msgs[0].len = sizeof(u8TxData); /* Number of bytes read */
msgs[1].addr = DEF_NAU8822_ADDR; /* Slave address */
msgs[1].flags = RT_I2C_RD; /* Read flag */
msgs[1].buf = (rt_uint8_t *)pu16data; /* Read data pointer */
msgs[1].len = 2; /* Number of bytes read */
if (rt_i2c_transfer(g_I2cBusDev, &msgs[0], 2) != 2)
{
return -RT_ERROR;
}
return RT_EOK;
}
static int I2C_WriteNAU8822(uint8_t u8addr, uint16_t u16data)
{
/* Write 9-bit data to 7-bit address register of NAU8822 */
struct rt_i2c_msg msg;
uint8_t au8TxData[2];
RT_ASSERT(g_I2cBusDev != NULL);
au8TxData[0] = (uint8_t)((u8addr << 1) | (u16data >> 8)); //u8addr [7:1] | u16data [8]
au8TxData[1] = (uint8_t)(u16data & 0x00FF); //data [7:0]
msg.addr = DEF_NAU8822_ADDR; /* Slave address */
msg.flags = RT_I2C_WR; /* Write flag */
msg.buf = (rt_uint8_t *)&au8TxData[0]; /* Slave register address */
msg.len = sizeof(au8TxData); /* Number of bytes sent */
if (g_I2cBusDev && rt_i2c_transfer(g_I2cBusDev, &msg, 1) != 1)
{
rt_kprintf("[Failed] addr=%x, data=%d\n", u8addr, u16data);
return -RT_ERROR;
}
{
/* Verify */
uint8_t au8RxData[2];
I2C_ReadNAU8822(u8addr, (uint16_t *)&au8RxData[0]);
rt_kprintf("Wrote addr %02x -> 0x%04x, read back -> 0x%02x%02x\n", u8addr, u16data, au8RxData[0], au8RxData[1]);
}
return RT_EOK;
}
static rt_err_t nau8822_probe(void)
{
return RT_EOK;
}
static rt_err_t nau8822_reset(void)
{
I2C_WriteNAU8822(0, 0x000); /* Reset all registers */
nau8822_delay_ms(30);
LOG_I("Software Reset.\n");
return RT_EOK;
}
static rt_err_t nau8822_dsp_config(rt_uint32_t ui32SamplRate, rt_uint8_t u8ChNum, rt_uint8_t u8SamplBit)
{
uint8_t bClkDiv;
uint8_t mClkDiv;
uint16_t u16AudIf = 0x010; /* I2S, 16-bit */
uint16_t u16ClkCtrl;
uint8_t u8WLEN;
if (ui32SamplRate > 48000)
return -RT_ERROR;
if (u8ChNum == 2)
{
u16AudIf = (u16AudIf & 0x1FE) | 0x0;
}
else
{
u16AudIf = (u16AudIf & 0x1FE) | 0x1;
}
/* Force to set Channel number to 2 */
u8ChNum = 2;
switch (u8SamplBit)
{
case 16:
u8WLEN = 0x0;
break;
case 20:
u8WLEN = 0x1;
break;
case 24:
u8WLEN = 0x2;
break;
case 32:
u8WLEN = 0x3;
break;
default:
LOG_E("sample rate not match!\n");
return -RT_ERROR;
}
u16AudIf = (u16AudIf & 0x19F) | (u8WLEN << 5);
I2C_WriteNAU8822(4, u16AudIf);
if (ui32SamplRate % 11025)
{
I2C_WriteNAU8822(36, 0x008); //12.288Mhz
I2C_WriteNAU8822(37, 0x00C);
I2C_WriteNAU8822(38, 0x093);
I2C_WriteNAU8822(39, 0x0E9);
mClkDiv = (48000 * 256 * u8ChNum) / (ui32SamplRate * 256);
bClkDiv = (ui32SamplRate * 256) / (ui32SamplRate * u8ChNum * u8SamplBit);
}
else
{
I2C_WriteNAU8822(36, 0x007); //11.2896Mhz
I2C_WriteNAU8822(37, 0x021);
I2C_WriteNAU8822(38, 0x161);
I2C_WriteNAU8822(39, 0x026);
mClkDiv = (44100 * 256 * u8ChNum) / (ui32SamplRate * 256);
bClkDiv = (ui32SamplRate * 256) / (ui32SamplRate * u8ChNum * u8SamplBit);
}
switch (mClkDiv)
{
case 1:
mClkDiv = 0;
break;
case 2:
mClkDiv = 2;
break;
case 3:
mClkDiv = 3;
break;
case 4:
mClkDiv = 4;
break;
case 6:
mClkDiv = 5;
break;
case 8:
mClkDiv = 6;
break;
case 12:
mClkDiv = 7;
break;
default:
LOG_E("mclk divider not match!\n");
mClkDiv = 0;
return -RT_ERROR;
}
switch (bClkDiv)
{
case 1:
bClkDiv = 0;
break;
case 2:
bClkDiv = 1;
break;
case 4:
bClkDiv = 2;
break;
case 8:
bClkDiv = 3;
break;
case 16:
bClkDiv = 4;
break;
case 32:
bClkDiv = 5;
break;
default:
LOG_E("bclk divider not match!\n");
bClkDiv = 0;
return -RT_ERROR;
}
u16ClkCtrl = (1 << 8) | (1 << 0); //Use internal PLL, FS/BCLK
u16ClkCtrl = (u16ClkCtrl & 0x11F) | (mClkDiv << 5);
u16ClkCtrl = (u16ClkCtrl & 0x1E3) | (bClkDiv << 2);
I2C_WriteNAU8822(6, u16ClkCtrl);
return RT_EOK;
}
static rt_err_t nau8822_init(void)
{
//input source is MIC
I2C_WriteNAU8822(1, 0x03F);
I2C_WriteNAU8822(2, 0x1BF); /* Enable L/R Headphone, ADC Mix/Boost, ADC */
I2C_WriteNAU8822(3, 0x07F); /* Enable L/R main mixer, DAC */
I2C_WriteNAU8822(4, 0x010); /* 16-bit word length, I2S format, Stereo */
I2C_WriteNAU8822(5, 0x000); /* Companding control and loop back mode (all disable) */
nau8822_delay_ms(30);
if (nu_acodec_ops_nau8822.role == NU_ACODEC_ROLE_SLAVE)
{
I2C_WriteNAU8822(6, 0x1AD); /* Divide by 6, 16K */
I2C_WriteNAU8822(7, 0x006); /* 16K for internal filter coefficients */
}
I2C_WriteNAU8822(10, 0x008); /* DAC soft mute is disabled, DAC oversampling rate is 128x */
I2C_WriteNAU8822(14, 0x108); /* ADC HP filter is disabled, ADC oversampling rate is 128x */
I2C_WriteNAU8822(15, 0x1EF); /* ADC left digital volume control */
I2C_WriteNAU8822(16, 0x1EF); /* ADC right digital volume control */
I2C_WriteNAU8822(44, 0x033); /* LMICN/LMICP is connected to PGA */
I2C_WriteNAU8822(49, 0x042);
I2C_WriteNAU8822(50, 0x001); /* Left DAC connected to LMIX */
I2C_WriteNAU8822(51, 0x001); /* Right DAC connected to RMIX */
nu_acodec_ops_nau8822.config.samplerate = 16000;
nu_acodec_ops_nau8822.config.channels = 2;
nu_acodec_ops_nau8822.config.samplebits = 16;
LOG_I("Initialized done.\n");
return RT_EOK;
}
static rt_err_t nau8822_dsp_control(struct rt_audio_configure *config)
{
rt_err_t result = RT_EOK;
RT_ASSERT(config != RT_NULL);
if (rt_memcmp((void *)config, (void *)&nu_acodec_ops_nau8822.config, sizeof(struct rt_audio_configure)) != 0)
{
if ((result = nau8822_dsp_config(config->samplerate, config->channels, config->samplebits)) == RT_EOK)
rt_memcpy((void *)&nu_acodec_ops_nau8822.config, (void *)config, sizeof(struct rt_audio_configure)) ;
}
return result;
}
static rt_err_t nau8822_mixer_control(rt_uint32_t ui32Units, rt_uint32_t ui32Value)
{
switch (ui32Units)
{
case AUDIO_MIXER_MUTE:
{
uint16_t u16Data;
I2C_ReadNAU8822(10, &u16Data);
if (ui32Value)
{
I2C_WriteNAU8822(10, u16Data | (1 << 6));
}
else
{
I2C_WriteNAU8822(10, u16Data & ~(1 << 6));
}
}
break;
case AUDIO_MIXER_VOLUME:
{
uint8_t u8DACGAIN = 256 * ui32Value / 100;
I2C_WriteNAU8822(11, u8DACGAIN);
I2C_WriteNAU8822(12, u8DACGAIN);
}
break;
case AUDIO_MIXER_QUERY:
case AUDIO_MIXER_BASS:
case AUDIO_MIXER_MID:
case AUDIO_MIXER_TREBLE:
case AUDIO_MIXER_EQUALIZER:
case AUDIO_MIXER_LINE:
case AUDIO_MIXER_DIGITAL:
case AUDIO_MIXER_MIC:
case AUDIO_MIXER_VITURAL:
case AUDIO_MIXER_EXTEND:
default:
return -RT_ERROR;
}
return RT_EOK;
}
static rt_err_t nau8822_mixer_query(rt_uint32_t ui32Units, rt_uint32_t *pui32Value)
{
RT_ASSERT(pui32Value != RT_NULL);
rt_uint16_t u16RV = 0;
switch (ui32Units)
{
case AUDIO_MIXER_QUERY:
*pui32Value = AUDIO_MIXER_VOLUME | AUDIO_MIXER_MUTE;
break;
case AUDIO_MIXER_MUTE:
I2C_ReadNAU8822(10, (uint16_t *)&u16RV);
if (u16RV & (1 << 6))
*pui32Value = 1;
else
*pui32Value = 0;
break;
case AUDIO_MIXER_VOLUME:
I2C_ReadNAU8822(11, (uint16_t *)&u16RV);
*pui32Value = u16RV * 100 / 256;
break;
case AUDIO_MIXER_BASS:
case AUDIO_MIXER_MID:
case AUDIO_MIXER_TREBLE:
case AUDIO_MIXER_EQUALIZER:
case AUDIO_MIXER_LINE:
case AUDIO_MIXER_DIGITAL:
case AUDIO_MIXER_MIC:
case AUDIO_MIXER_VITURAL:
case AUDIO_MIXER_EXTEND:
default:
return -RT_ERROR;
}
return RT_EOK;
}
int nu_hw_nau8822_init(S_NU_NAU8822_CONFIG *psCodecConfig)
{
RT_ASSERT(psCodecConfig != RT_NULL);
struct rt_i2c_bus_device *psI2cBusDev;
struct rt_audio_device *psAudioDev;
nu_i2s_t psNuI2s;
/* Find I2C bus */
psI2cBusDev = (struct rt_i2c_bus_device *)rt_device_find(psCodecConfig->i2c_bus_name);
if (psI2cBusDev == RT_NULL)
{
LOG_E("Can't found I2C bus - %s..!\n", psCodecConfig->i2c_bus_name);
goto exit_rt_hw_nau8822_init;
}
/* Find I2S bus */
psAudioDev = (struct rt_audio_device *)rt_device_find(psCodecConfig->i2s_bus_name);
if (psAudioDev == RT_NULL)
{
LOG_E("Can't found I2S bus - %s ..!\n", psCodecConfig->i2s_bus_name);
goto exit_rt_hw_nau8822_init;
}
if (nau8822_probe() != RT_EOK)
{
LOG_E("Can't found audio codec..!\n");
goto exit_rt_hw_nau8822_init;
}
/* Store this board setting. */
g_psCodecConfig = psCodecConfig;
g_I2cBusDev = psI2cBusDev;
/* Get NuI2S device instance. */
psNuI2s = (nu_i2s_t)psAudioDev;
/* Register Acodec Ops */
psNuI2s->AcodecOps = &nu_acodec_ops_nau8822;
/* Use Acodec default settings. */
rt_memcpy(&psNuI2s->config, &nu_acodec_ops_nau8822.config, sizeof(struct rt_audio_configure));
return RT_EOK;
exit_rt_hw_nau8822_init:
return -RT_ERROR;
}
#endif //#if defined(NU_PKG_USING_NAU8822)
bsp/nuvoton/libraries/nu_packages/AudioCodec/acodec_nau8822.h 0 → 100644
浏览文件 @ ce034e67
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-12-12 Wayne First version
*
******************************************************************************/
#ifndef __ACODEC_NAU8822_H__
#define __ACODEC_NAU8822_H__
#include <rtdevice.h>
typedef struct
{
char *i2c_bus_name;
char *i2s_bus_name;
rt_int32_t pin_phonejack_en;
rt_int32_t pin_phonejack_det;
} S_NU_NAU8822_CONFIG;
int nu_hw_nau8822_init(S_NU_NAU8822_CONFIG *psCodecConfig);
#endif /* __ACODEC_NAU8822_H__ */
bsp/nuvoton/libraries/nu_packages/Demo/SConscript
浏览文件 @ ce034e67
......@@ -5,6 +5,8 @@ group = []
if GetDepend('NU_PKG_USING_DEMO'):
src = Split("""
usbd_hid_dance_mouse.c
slcd_show_tick.c
usbd_cdc_vcom_echo.c
""")
CPPPATH = [cwd]
group = DefineGroup('nu_pkgs_demo', src, depend = [''], CPPPATH = CPPPATH)
......
bsp/nuvoton/libraries/nu_packages/Demo/slcd_show_tick.c 0 → 100644
浏览文件 @ ce034e67
/**************************************************************************//**
*
* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-11-11 Wayne First version
*
******************************************************************************/
#include <rtconfig.h>
#if defined(BSP_USING_SLCD)
#include <rtthread.h>
#include <rtdevice.h>
#include "slcd_rhe6616tp01.h"
const uint32_t au32SLCDSymbols [] =
{
SYMBOL_NVT,
SYMBOL_WIFI,
SYMBOL_SOUND,
SYMBOL_NUMICRO,
SYMBOL_BAT_FRAME,
SYMBOL_BAT_1,
SYMBOL_BAT_2,
SYMBOL_BAT_3,
SYMBOL_PLUS,
SYMBOL_MINUS,
SYMBOL_V,
SYMBOL_A,
SYMBOL_W,
SYMBOL_ARROW_UP,
SYMBOL_ARROW_LEFT,
SYMBOL_ARROW_DOWN,
SYMBOL_ARROW_RIGHT,
SYMBOL_CIRCLE_UP,
SYMBOL_CIRCLE_LEFT,
SYMBOL_CIRCLE_RIGHT,
SYMBOL_PERCENTAGE,
SYMBOL_PPM,
SYMBOL_TEMP_C,
SYMBOL_TEMP_F,
SYMBOL_VERSION,
SYMBOL_MAIN_DIG_COL1,
SYMBOL_MAIN_DIG_COL2,
SYMBOL_MAIN_DIG_COL3,
SYMBOL_MAIN_DIG_COL4,
SYMBOL_MAIN_DIG_COL5,
SYMBOL_MAIN_DIG_COL6,
SYMBOL_MAIN_DIG_P1,
SYMBOL_MAIN_DIG_P2,
SYMBOL_MAIN_DIG_P3,
SYMBOL_MAIN_DIG_P4,
SYMBOL_MAIN_DIG_P5,
SYMBOL_MAIN_DIG_P6,
SYMBOL_VER_DIG_P1,
SYMBOL_VER_DIG_P2,
SYMBOL_TIME_DIG_COL1,
SYMBOL_TIME_DIG_P1,
SYMBOL_TIME_DIG_P2,
SYMBOL_TIME_DIG_P3
};
const int i32SLCDSymbolsSize = sizeof(au32SLCDSymbols) / sizeof(au32SLCDSymbols[0]);
void slcd_demo_hook(void)
{
uint32_t u32CurTickCount = rt_tick_get();
/* ZONE_MAIN_DIGIT */
LCDLIB_PrintNumber(ZONE_MAIN_DIGIT, u32CurTickCount);
/* ZONE_PPM_DIGIT */
LCDLIB_PrintNumber(ZONE_PPM_DIGIT, u32CurTickCount);
/* ZONE_TEMP_DIGIT */
LCDLIB_PrintNumber(ZONE_TEMP_DIGIT, u32CurTickCount);
/* ZONE_VER_DIGIT */
LCDLIB_PrintNumber(ZONE_VER_DIGIT, u32CurTickCount);
/* ZONE_TIME_DIGIT */
LCDLIB_PrintNumber(ZONE_TIME_DIGIT, u32CurTickCount);
/* ZONE_NUMICRO_DIGIT */
LCDLIB_PrintNumber(ZONE_NUMICRO_DIGIT, u32CurTickCount);
/* Travel all symbols */
LCDLIB_SetSymbol(au32SLCDSymbols[u32CurTickCount % i32SLCDSymbolsSize], (u32CurTickCount / i32SLCDSymbolsSize) % 2);
/* Travel all dots */
LCDLIB_SetSymbol(SYMBOL_S(u32CurTickCount % 40 + 1), (u32CurTickCount / 40) % 2);
}
static int slcd_demo_init(void)
{
rt_err_t err = rt_thread_idle_sethook(slcd_demo_hook);
if (err != RT_EOK)
{
rt_kprintf("set idle hook failed!\n");
return -1;
}
return 0;
}
INIT_APP_EXPORT(slcd_demo_init);
#endif /* #if defined(BSP_USING_SLCD) */
bsp/nuvoton/libraries/nu_packages/Demo/usbd_cdc_vcom_echo.c 0 → 100644
浏览文件 @ ce034e67
#include <rtthread.h>
#if defined(RT_USB_DEVICE_CDC) && (defined(BSP_USING_USBD) || defined(BSP_USING_HSUSBD))
static struct rt_semaphore rx_sem;
static rt_err_t uart_input(rt_device_t dev, rt_size_t size)
{
rt_sem_release(&rx_sem);
return RT_EOK;
}
static void serial_thread_entry(void *parameter)
{
rt_device_t serial = (rt_device_t)parameter;
char ch;
char szStr[64];
while (1)
{
while (rt_device_read(serial, -1, &ch, 1) != 1)
{
if (rt_sem_take(&rx_sem, 3 * RT_TICK_PER_SECOND) == -RT_ETIMEOUT)
{
time_t now;
/* output current time */
now = time(RT_NULL);
rt_snprintf(szStr, sizeof(szStr), "%.*s\n", 25, ctime(&now));
rt_device_write(serial, 0, &szStr[0], rt_strlen(szStr));
continue;
}
}
rt_device_write(serial, 0, &ch, 1);
}
}
static int vcom_echo_init(void)
{
int err = 0;
rt_thread_t thread;
rt_device_t serial;
serial = rt_device_find("vcom");
if (!serial)
{
rt_kprintf("find failed!\n");
return RT_ERROR;
}
err = rt_device_init(serial);
if (err)
{
rt_kprintf("find failed!\n");
return -RT_ERROR;
}
err = rt_device_open(serial, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX/* | RT_DEVICE_FLAG_DMA_TX */);
rt_sem_init(&rx_sem, "rx_sem", 0, RT_IPC_FLAG_FIFO);
rt_device_set_rx_indicate(serial, uart_input);
thread = rt_thread_create("serial", serial_thread_entry, (void *)serial, 1024, 25, 10);
if (thread != RT_NULL)
{
rt_thread_startup(thread);
}
return RT_EOK;
}
INIT_APP_EXPORT(vcom_echo_init);
#endif
bsp/nuvoton/libraries/nu_packages/Demo/usbd_hid_dance_mouse.c
浏览文件 @ ce034e67
......@@ -23,13 +23,12 @@
static struct rt_thread usb_thread;
ALIGN(RT_ALIGN_SIZE)
static char usb_thread_stack[512];
static char usb_thread_stack[1024];
static struct rt_semaphore tx_sem_complete;
static rt_err_t event_hid_in(rt_device_t dev, void *buffer)
{
rt_sem_release(&tx_sem_complete);
return RT_EOK;
return rt_sem_release(&tx_sem_complete);
}
static void usb_thread_entry(void *parameter)
......@@ -38,6 +37,7 @@ static void usb_thread_entry(void *parameter)
uint8_t u8MouseIdx = 0;
uint8_t u8MoveLen=0, u8MouseMode = 1;
uint8_t pu8Buf[4];
rt_err_t result = RT_EOK;
rt_device_t device = (rt_device_t)parameter;
......@@ -78,7 +78,8 @@ static void usb_thread_entry(void *parameter)
else
{
/* Wait it done. */
rt_sem_take(&tx_sem_complete, RT_WAITING_FOREVER);
result = rt_sem_take(&tx_sem_complete, RT_WAITING_FOREVER);
RT_ASSERT( result== RT_EOK );
}
} // while(1)
......@@ -86,29 +87,27 @@ static void usb_thread_entry(void *parameter)
static int dance_mouse_init(void)
{
int err = 0;
rt_err_t ret = RT_EOK;
rt_device_t device = rt_device_find("hidd");
RT_ASSERT(device != RT_NULL);
err = rt_device_open(device, RT_DEVICE_FLAG_WRONLY);
ret = rt_device_open(device, RT_DEVICE_FLAG_WRONLY);
RT_ASSERT(ret == RT_EOK);
if (err != RT_EOK)
{
LOG_E("open dev failed!\n");
return -1;
}
rt_thread_init(&usb_thread,
ret = rt_thread_init(&usb_thread,
"hidd",
usb_thread_entry, device,
usb_thread_stack, sizeof(usb_thread_stack),
10, 20);
RT_ASSERT(ret == RT_EOK);
rt_thread_startup(&usb_thread);
ret = rt_thread_startup(&usb_thread);
RT_ASSERT(ret == RT_EOK);
return 0;
}
INIT_APP_EXPORT(dance_mouse_init);
#endif /* #if defined(RT_USB_DEVICE_HID) && (defined(BSP_USING_USBD) || defined(BSP_USING_HSUSBD)) */
bsp/nuvoton/libraries/nu_packages/ILI9341/ili9341_ebi.c
浏览文件 @ ce034e67
......@@ -42,6 +42,15 @@ void ili9341_send_pixel_data(rt_uint16_t color)
ili9341_write_data(color);
}
void ili9341_send_pixels(rt_uint16_t *pixels, int len)
{
int i = 0;
int size = len / sizeof(rt_uint16_t);
while (i < size)
ili9341_write_data(pixels[i]);
}
void ili9341_set_column(uint16_t StartCol, uint16_t EndCol)
{
ili9341_send_cmd(0x2A);
......
bsp/nuvoton/libraries/nu_packages/ILI9341/ili9341_spi.c
浏览文件 @ ce034e67
......@@ -54,9 +54,15 @@ static void ili9341_write_data_16bit(uint16_t data)
rt_spi_transfer(&ili9341_spi_device, (const void *)&data, NULL, 2);
}
void ili9341_send_pixel_data(rt_uint16_t color)
void ili9341_send_pixel_data(rt_uint16_t pixel)
{
ili9341_write_data_16bit(color);
ili9341_write_data_16bit(pixel);
}
void ili9341_send_pixels(rt_uint16_t *pixels, int len)
{
ili9341_change_datawidth(16);
rt_spi_transfer(&ili9341_spi_device, (const void *)pixels, NULL, len);
}
static rt_err_t ili9341_spi_send_then_recv(struct rt_spi_device *device,
......
bsp/nuvoton/libraries/nu_packages/ILI9341/lcd_ili9341.c
浏览文件 @ ce034e67
......@@ -17,6 +17,15 @@
#include <rtdevice.h>
#include <lcd_ili9341.h>
static struct rt_device_graphic_info g_Ili9341Info =
{
.bits_per_pixel = 16,
.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565,
.framebuffer = RT_NULL,
.width = XSIZE_PHYS,
.height = YSIZE_PHYS
};
static void ili9341_delay_ms(rt_uint32_t nms)
{
rt_thread_mdelay(nms);
......@@ -92,7 +101,11 @@ static rt_err_t ili9341_lcd_init(rt_device_t dev)
ili9341_send_cmd_parameter(0x86);
ili9341_send_cmd(0x36);
ili9341_send_cmd_parameter(0x48); // for 240x320
if (g_Ili9341Info.width == 240)
ili9341_send_cmd_parameter(0x48); // for 240x320
else
ili9341_send_cmd_parameter(0xE8); // for 320x240
ili9341_send_cmd(0x3A);
ili9341_send_cmd_parameter(0x55);
......@@ -157,14 +170,37 @@ static rt_err_t ili9341_lcd_init(rt_device_t dev)
return RT_EOK;
}
static void ili9341_fillscreen(uint16_t color)
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
static void ili9341_fillrect(uint16_t *pixels, struct rt_device_rect_info *pRectInfo)
{
ili9341_set_column(pRectInfo->x, pRectInfo->x + pRectInfo->width);
ili9341_set_page(pRectInfo->y, pRectInfo->y + pRectInfo->height);
ili9341_send_cmd(0x2c);
ili9341_send_pixels(pixels, pRectInfo->height * pRectInfo->width * 2);
}
#endif
static void ili9341_fillscreen(rt_uint16_t color)
{
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
struct rt_device_rect_info rectinfo = { 0, 0, XSIZE_PHYS, YSIZE_PHYS };
int pixel_count = XSIZE_PHYS * YSIZE_PHYS;
rt_uint16_t *pu16ShadowBuf = (rt_uint16_t *)g_Ili9341Info.framebuffer;
while (pixel_count--)
{
*pu16ShadowBuf++ = color;
}
ili9341_fillrect((uint16_t *)g_Ili9341Info.framebuffer, &rectinfo);
#else
ili9341_set_column(0, (XSIZE_PHYS - 1));
ili9341_set_page(0, (YSIZE_PHYS - 1));
ili9341_send_cmd(0x2c);
for (int i = 0; i < (XSIZE_PHYS * YSIZE_PHYS); i++)
ili9341_send_pixel_data(color);
#endif
}
static void ili9341_lcd_set_pixel(const char *color, int x, int y)
......@@ -227,19 +263,20 @@ static rt_err_t ili9341_lcd_control(rt_device_t dev, int cmd, void *args)
info = (struct rt_device_graphic_info *) args;
RT_ASSERT(info != RT_NULL);
info->bits_per_pixel = 16;
info->pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565;
info->framebuffer = RT_NULL;
info->width = XSIZE_PHYS;
info->height = YSIZE_PHYS;
rt_memcpy(args, (void *)&g_Ili9341Info, sizeof(struct rt_device_graphic_info));
}
break;
case RTGRAPHIC_CTRL_RECT_UPDATE:
{
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
RT_ASSERT(args != RT_NULL);
ili9341_fillrect((uint16_t *)g_Ili9341Info.framebuffer, (struct rt_device_rect_info *) args);
#else
/* nothong to be done */
break;
#endif
}
break;
default:
break;
}
......@@ -272,6 +309,11 @@ int rt_hw_lcd_ili9341_init(void)
lcd_device.user_data = &ili9341_ops;
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
g_Ili9341Info.framebuffer = rt_malloc_align(g_Ili9341Info.bits_per_pixel / 2 * g_Ili9341Info.height * g_Ili9341Info.width, 32);
RT_ASSERT(g_Ili9341Info.framebuffer != RT_NULL);
#endif
/* register graphic device driver */
rt_device_register(&lcd_device, "lcd", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
......
bsp/nuvoton/libraries/nu_packages/ILI9341/lcd_ili9341.h
浏览文件 @ ce034e67
......@@ -28,8 +28,13 @@
//
// Physical display size
//
#define XSIZE_PHYS 240
#define YSIZE_PHYS 320
#if defined(NU_PKG_ILI9341_HORIZONTAL)
#define XSIZE_PHYS 320
#define YSIZE_PHYS 240
#else
#define XSIZE_PHYS 240
#define YSIZE_PHYS 320
#endif
int rt_hw_lcd_ili9341_init(void);
void ili9341_send_cmd(rt_uint8_t cmd);
......@@ -38,6 +43,7 @@ void ili9341_set_column(rt_uint16_t StartCol, rt_uint16_t EndCol);
void ili9341_set_page(rt_uint16_t StartPage, rt_uint16_t EndPage);
void ili9341_send_pixel_data(rt_uint16_t color);
void ili9341_lcd_get_pixel(char *color, int x, int y);
void ili9341_send_pixels(rt_uint16_t *pixels, int len);
#if defined(NU_PKG_USING_ILI9341_SPI)
rt_err_t rt_hw_lcd_ili9341_spi_init(const char *spibusname);
......
bsp/nuvoton/libraries/nu_packages/Kconfig
浏览文件 @ ce034e67
......@@ -24,6 +24,11 @@ menu "Nuvoton Packages Config"
select BSP_USING_I2C
default n
config NU_PKG_USING_NAU8822
bool "NAU8822 Audio Codec."
select BSP_USING_I2C
default n
config NU_PKG_USING_ILI9341
bool "ILI9341 LCD Panel"
select BSP_USING_GPIO
......@@ -47,6 +52,14 @@ menu "Nuvoton Packages Config"
Choose this option if you the ili9341 device is with EBI interface.
endchoice
config NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER
bool "Create an offscreen framebuffer."
default n
config NU_PKG_ILI9341_HORIZONTAL
bool "Set horizontal view. (320x240)"
default n
endif
endmenu
bsp/nuvoton/libraries/nu_packages/NuUtils/inc/nu_bitutil.h
浏览文件 @ ce034e67
......@@ -43,7 +43,7 @@ extern "C" {
*/
__STATIC_INLINE int nu_clz(uint32_t x)
{
return __CLZ(x);
return x ? __CLZ(x):32;
}
/* Count Leading Ones in word - Find Highest Zero
......@@ -65,7 +65,9 @@ __STATIC_INLINE int nu_clo(uint32_t x)
*/
__STATIC_INLINE int nu_ctz(uint32_t x)
{
int c = __CLZ(x & -x);
int c = 32;
if (x)
c = __CLZ(x & -x);
return x ? 31 - c : c;
}
......
bsp/nuvoton/libraries/nu_packages/SLCD/SConscript 0 → 100644
浏览文件 @ ce034e67
# RT-Thread building script for component
from building import *
cwd = GetCurrentDir()
group = []
if GetDepend('BSP_USING_SLCD'):
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd]
group = DefineGroup('nu_pkgs_slcd', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
bsp/nuvoton/libraries/nu_packages/SLCD/slcd_rhe6616tp01.h 0 → 100644
浏览文件 @ ce034e67
/**************************************************************************//**
* @file LCDLIB.h
* @version V3.00
* @brief RHE6616TP01(8-COM, 40-SEG, 1/4 Bias) LCD library header file
*
* SPDX-License-Identifier: Apache-2.0
* @copyright (C) 2019-2020 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef __M2354_LCDLIB_H
#define __M2354_LCDLIB_H
#ifdef __cplusplus
extern "C"
{
#endif
/** @addtogroup LIBRARY Library
@{
*/
/** @addtogroup M2354_LCDLIB_Driver LCD Library
@{
*/
/** @addtogroup M2354_LCDLIB_EXPORTED_CONSTANTS LCDLIB Exported Constants
@{
*/
/*---------------------------------------------------------------------------------------------------------*/
/* Digit Zone Constant Definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define ZONE_MAIN_DIGIT 0 /*!< Main digit display zone index */
#define ZONE_MAIN_DIG_CNT 7 /*!< Number of digits/texts, for number and alphabet display */
#define ZONE_MAIN_SEG_NUM 14 /*!< Number of segments on each digit number */
#define ZONE_PPM_DIGIT 1 /*!< PPM or percentage digit display zone index */
#define ZONE_PPM_DIG_CNT 3 /*!< Number of digits, for ppm display */
#define ZONE_PPM_SEG_NUM 7 /*!< Number of segments on each digit number */
#define ZONE_TEMP_DIGIT 2 /*!< Temperature digit display zone index */
#define ZONE_TEMP_DIG_CNT 3 /*!< Number of digits, for c/f display */
#define ZONE_TEMP_SEG_NUM 7 /*!< Number of segments on each digit number */
#define ZONE_VER_DIGIT 3 /*!< Version number digit display zone index */
#define ZONE_VER_DIG_CNT 6 /*!< Number of digits, for version display */
#define ZONE_VER_SEG_NUM 7 /*!< Number of segments on each digit number */
#define ZONE_TIME_DIGIT 4 /*!< Time digit display zone index */
#define ZONE_TIME_DIG_CNT 4 /*!< Number of digits */
#define ZONE_TIME_SEG_NUM 7 /*!< Number of segments on each digit number */
#define ZONE_NUMICRO_DIGIT 5 /*!< NuMicro digit display zone index */
#define ZONE_NUMICRO_DIG_CNT 3 /*!< Number of digits */
#define ZONE_NUMICRO_SEG_NUM 7 /*!< Number of segments on each digit number */
/*---------------------------------------------------------------------------------------------------------*/
/* COM and SEG Position of Symbol Constant Definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define SYMBOL_NVT ((10)<<4 | (4)<<0) /*!< T1 display on COM 4, SEG 10 */
#define SYMBOL_WIFI ((10)<<4 | (5)<<0) /*!< T2 display on COM 5, SEG 10 */
#define SYMBOL_SOUND ((10)<<4 | (6)<<0) /*!< T3 display on COM 6, SEG 10 */
#define SYMBOL_NUMICRO ((9)<<4 | (3)<<0) /*!< Y3 display on COM 3, SEG 9 */
#define SYMBOL_BAT_FRAME ((10)<<4 | (0)<<0) /*!< T7 display on COM 0, SEG 10 */
#define SYMBOL_BAT_1 ((10)<<4 | (2)<<0) /*!< T4 display on COM 2, SEG 10 */
#define SYMBOL_BAT_2 ((10)<<4 | (3)<<0) /*!< T5 display on COM 3, SEG 10 */
#define SYMBOL_BAT_3 ((10)<<4 | (1)<<0) /*!< T6 display on COM 1, SEG 10 */
#define SYMBOL_PLUS ((3)<<4 | (1)<<0) /*!< T12 display on COM 1, SEG 3 */
#define SYMBOL_MINUS ((3)<<4 | (3)<<0) /*!< T13 display on COM 3, SEG 3 */
#define SYMBOL_V ((39)<<4 | (4)<<0) /*!< T26 display on COM 4, SEG 39 */
#define SYMBOL_A ((37)<<4 | (4)<<0) /*!< T27 display on COM 4, SEG 37 */
#define SYMBOL_W ((35)<<4 | (4)<<0) /*!< T28 display on COM 4, SEG 35 */
#define SYMBOL_ARROW_UP ((1)<<4 | (4)<<0) /*!< T29 display on COM 4, SEG 1 */
#define SYMBOL_ARROW_LEFT ((1)<<4 | (6)<<0) /*!< T30 display on COM 6, SEG 1 */
#define SYMBOL_ARROW_DOWN ((0)<<4 | (7)<<0) /*!< T31 display on COM 7, SEG 0 */
#define SYMBOL_ARROW_RIGHT ((0)<<4 | (4)<<0) /*!< T32 display on COM 4, SEG 0 */
#define SYMBOL_CIRCLE_UP ((1)<<4 | (5)<<0) /*!< T33 display on COM 5, SEG 1 */
#define SYMBOL_CIRCLE_LEFT ((0)<<4 | (6)<<0) /*!< T34 display on COM 6, SEG 0 */
#define SYMBOL_CIRCLE_RIGHT ((0)<<4 | (5)<<0) /*!< T35 display on COM 5, SEG 0 */
#define SYMBOL_PERCENTAGE ((23)<<4 | (4)<<0) /*!< Y2 display on COM 4, SEG 23 */
#define SYMBOL_PPM ((21)<<4 | (4)<<0) /*!< Y1 display on COM 4, SEG 21 */
#define SYMBOL_TEMP_C ((25)<<4 | (4)<<0) /*!< T37 display on COM 4, SEG 25 */
#define SYMBOL_TEMP_F ((27)<<4 | (4)<<0) /*!< T38 display on COM 4, SEG 27 */
#define SYMBOL_VERSION ((31)<<4 | (4)<<0) /*!< T41 display on COM 4, SEG 31 */
#define SYMBOL_S(x) (((((x)-1)%5)+11)<<4 | (((x)-1)/5)<<0) /*!< S[x] display on COM x, SEG x. [x] range is 1 ~ 40. */
#define SYMBOL_MAIN_DIG_COL1 ((16)<<4 | (1)<<0) /*!< T14 display on COM 1, SEG 16 */
#define SYMBOL_MAIN_DIG_COL2 ((20)<<4 | (1)<<0) /*!< T16 display on COM 1, SEG 20 */
#define SYMBOL_MAIN_DIG_COL3 ((24)<<4 | (1)<<0) /*!< T18 display on COM 1, SEG 24 */
#define SYMBOL_MAIN_DIG_COL4 ((28)<<4 | (1)<<0) /*!< T20 display on COM 1, SEG 28 */
#define SYMBOL_MAIN_DIG_COL5 ((32)<<4 | (1)<<0) /*!< T22 display on COM 1, SEG 32 */
#define SYMBOL_MAIN_DIG_COL6 ((36)<<4 | (1)<<0) /*!< T24 display on COM 1, SEG 36 */
#define SYMBOL_MAIN_DIG_P1 ((16)<<4 | (3)<<0) /*!< T15 display on COM 3, SEG 16 */
#define SYMBOL_MAIN_DIG_P2 ((20)<<4 | (3)<<0) /*!< T17 display on COM 3, SEG 20 */
#define SYMBOL_MAIN_DIG_P3 ((24)<<4 | (3)<<0) /*!< T19 display on COM 3, SEG 24 */
#define SYMBOL_MAIN_DIG_P4 ((28)<<4 | (3)<<0) /*!< T21 display on COM 3, SEG 28 */
#define SYMBOL_MAIN_DIG_P5 ((32)<<4 | (3)<<0) /*!< T23 display on COM 3, SEG 32 */
#define SYMBOL_MAIN_DIG_P6 ((36)<<4 | (3)<<0) /*!< T25 display on COM 3, SEG 36 */
#define SYMBOL_VER_DIG_P1 ((29)<<4 | (4)<<0) /*!< T39 display on COM 4, SEG 29 */
#define SYMBOL_VER_DIG_P2 ((33)<<4 | (4)<<0) /*!< T40 display on COM 4, SEG 33 */
#define SYMBOL_TIME_DIG_COL1 ((5)<<4 | (7)<<0) /*!< T9 display on COM 7, SEG 5 */
#define SYMBOL_TIME_DIG_P1 ((3)<<4 | (7)<<0) /*!< T8 display on COM 7, SEG 3 */
#define SYMBOL_TIME_DIG_P2 ((5)<<4 | (3)<<0) /*!< T10 display on COM 3, SEG 5 */
#define SYMBOL_TIME_DIG_P3 ((7)<<4 | (3)<<0) /*!< T11 display on COM 3, SEG 7 */
/**@}*/ /* end of group M2354_LCDLIB_EXPORTED_CONSTANTS */
/** @addtogroup M2354_LCDLIB_EXPORTED_STRUCTS LCDLIB Exported Structs
@{
*/
typedef struct
{
uint32_t u32DigitCnt; /*!< Digit counts */
uint32_t u32MaxSegNum; /*!< Maximum segment number */
} LCD_ZONE_INFO_T;
/**@}*/ /* end of group M2354_LCDLIB_EXPORTED_STRUCTS */
/** @addtogroup M2354_LCDLIB_EXPORTED_FUNCTIONS LCD Exported Functions
@{
*/
void LCDLIB_Printf(uint32_t u32Zone, char *InputStr);
void LCDLIB_PutChar(uint32_t u32Zone, uint32_t u32Index, uint8_t u8Ch);
void LCDLIB_PrintNumber(uint32_t u32Zone, uint32_t InputNum);
void LCDLIB_SetSymbol(uint32_t u32Symbol, uint32_t u32OnOff);
/**@}*/ /* end of group M2354_LCDLIB_EXPORTED_FUNCTIONS */
/**@}*/ /* end of group M2354_LCDLIB_Driver */
/**@}*/ /* end of group LIBRARY */
#ifdef __cplusplus
}
#endif
#endif /* __M2354_LCDLIB_H */
/*** (C) COPYRIGHT 2019-2020 Nuvoton Technology Corp. ***/
bsp/nuvoton/libraries/nuc980/Driver/Include/NuMicro.h 0 → 100644
浏览文件 @ ce034e67
/**************************************************************************//**
* @file NuMicro.h
* @version V1.00
* @brief NuMicro peripheral access layer header file.
*
* SPDX-License-Identifier: Apache-2.0
* @copyright (C) 2017-2020 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef __NUMICRO_H__
#define __NUMICRO_H__
#include "nuc980.h"
#include "nu_adc.h"
#include "nu_uart.h"
#include "nu_spi.h"
#include "nu_qspi.h"
#include "nu_i2c.h"
#include "nu_pdma.h"
#include "nu_etimer.h"
#include "nu_emac.h"
#include "nu_sdh.h"
#include "nu_gpio.h"
#include "nu_rtc.h"
#include "nu_wdt.h"
#include "nu_ebi.h"
#include "nu_scuart.h"
#include "nu_pwm.h"
#include "nu_crypto.h"
#include "nu_can.h"
#include "nu_i2s.h"
#include "nu_usbd.h"
#include "nu_sys.h"
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __CLZ
#if defined(__CC_ARM)
#define __CLZ __clz
#else
#define __CLZ __builtin_clz
#endif
#endif
#endif /* __NUMICRO_H__ */
bsp/nuvoton/libraries/nuc980/Driver/Include/emac_reg.h 0 → 100644
浏览文件 @ ce034e67
此差异已折叠。
bsp/nuvoton/libraries/nuc980/Driver/Include/nu_adc.h 0 → 100644
浏览文件 @ ce034e67
/**************************************************************************//**
* @file adc.h
* @version V1.00
* $Revision: 6 $
* $Date: 15/10/05 7:00p $
* @brief NUC980 ADC driver header file
*
* @note
* SPDX-License-Identifier: Apache-2.0
* Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef __NU_ADC_H__
#define __NU_ADC_H__
#ifdef __cplusplus
extern "C"
{
#endif
/** @addtogroup Standard_Driver Standard Driver
@{
*/
/** @addtogroup ADC_Driver ADC Driver
@{
*/
/** @addtogroup ADC_EXPORTED_CONSTANTS ADC Exported Constants
@{
*/
#define ADC_ERR_ARGS 1 /*!< The arguments is wrong */
#define ADC_ERR_CMD 2 /*!< The command is wrong */
/// @cond HIDDEN_SYMBOLS
typedef INT32(*ADC_CALLBACK)(UINT32 status, UINT32 userData);
/// @endcond HIDDEN_SYMBOLS
/*---------------------------------------------------------------------------------------------------------*/
/* ADC_CTL constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define ADC_CTL_ADEN 0x00000001 /*!< ADC Power Control */
#define ADC_CTL_VBGEN 0x00000002 /*!< ADC Internal Bandgap Power Control */
#define ADC_CTL_MST 0x00000100 /*!< Menu Start Conversion */
/*---------------------------------------------------------------------------------------------------------*/
/* ADC_CONF constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define ADC_CONF_NACEN 0x00000004 /*!< Normal AD Conversion Enable */
#define ADC_CONF_SELFTEN 0x00000400 /*!< Selft Test Enable */
#define ADC_CONF_HSPEED (1<<22) /*!< High Speed Enable */
#define ADC_CONF_CHSEL_Pos 12 /*!< Channel Selection Position */
#define ADC_CONF_CHSEL_Msk (0xF<<ADC_CONF_CHSEL_Pos) /*!< Channel Selection Mask */
#define ADC_CONF_REFSEL_Pos 6 /*!< Reference Selection Position */
#define ADC_CONF_REFSEL_Msk (3<<6) /*!< Reference Selection Mask */
#define ADC_CONF_REFSEL_VREF (0<<6) /*!< ADC reference select VREF input */
#define ADC_CONF_REFSEL_AVDD33 (3<<6) /*!< ADC reference select AGND33 vs AVDD33 */
/*---------------------------------------------------------------------------------------------------------*/
/* ADC_IER constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define ADC_IER_MIEN 0x00000001 /*!< Menu Interrupt Enable */
/*---------------------------------------------------------------------------------------------------------*/
/* ADC_ISR constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define ADC_ISR_MF 0x00000001 /*!< Menu Complete Flag */
#define ADC_ISR_NACF 0x00000400 /*!< Normal AD Conversion Finish */
/** \brief Structure type of ADC_CMD
*/
typedef enum
{
START_MST, /*!<Menu Start Conversion */
VBPOWER_ON, /*!<Enable ADC Internal Bandgap Power */
VBPOWER_OFF, /*!<Disable ADC Internal Bandgap Power */
NAC_ON, /*!<Enable Normal AD Conversion */
NAC_OFF, /*!<Disable Normal AD Conversion */
SWITCH_CH, /*!<Switch Channel */
} ADC_CMD;
/*@}*/ /* end of group ADC_EXPORTED_CONSTANTS */
/** @addtogroup ADC_EXPORTED_FUNCTIONS ADC Exported Functions
@{
*/
int adcOpen(void);
int adcOpen2(uint32_t freq);
int adcClose(void);
int adcReadXY(short *bufX, short *bufY, int dataCnt);
int adcReadZ(short *bufZ1, short *bufZ2, int dataCnt);
int adcIoctl(ADC_CMD cmd, int arg1, int arg2);
int adcChangeChannel(int channel);
/*@}*/ /* end of group ADC_EXPORTED_FUNCTIONS */
/*@}*/ /* end of group ADC_Driver */
/*@}*/ /* end of group Standard_Driver */
#ifdef __cplusplus
}
#endif
#endif //__NU_ADC_H__
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/**************************************************************************//**
* @file i2s.h
* @version V1.00
* $Revision: 2 $
* $Date: 18/08/05 2:12p $
* @brief I2S driver header file
*
* @note
* SPDX-License-Identifier: Apache-2.0
* Copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef __NU_I2S_H__
#define __NU_I2S_H__
#ifdef __cplusplus
extern "C"
{
#endif
/** @addtogroup Standard_Driver Standard Driver
@{
*/
/** @addtogroup I2S_Driver I2S Driver
@{
*/
/** @addtogroup I2S_EXPORTED_CONSTANTS I2S Exported Constants
@{
*/
#define I2S_ERR_BUSY -1 /*!< Interface is busy */
#define I2S_ERR_IO -2 /*!< IO contril error */
#define I2S_DISABLE 0 /*!< Enable I2S */
#define I2S_ENABLE 1 /*!< Disable I2S */
#define I2S_PLAY 0 /*!< Play I2S audio */
#define I2S_REC 1 /*!< Reocrd I2S audio */
#define PCM_PLAY 0 /*!< Play PCM audio */
#define PCM_REC 1 /*!< Record PCM audio */
#define I2S_SET_PLAY 0 /*!< Start or stop to play */
#define I2S_START_PLAY 0 /*!< Start to play */
#define I2S_STOP_PLAY 1 /*!< Stop to play */
#define I2S_SET_RECORD 1 /*!< Start or stop to record */
#define I2S_START_REC 0 /*!< Start to record */
#define I2S_STOP_REC 1 /*!< Stop to record */
#define I2S_SELECT_BLOCK 2 /*!< Select block function */
#define I2S_BLOCK_I2S 0 /*!< Select I2S function */
#define I2S_BLOCK_PCM 1 /*!< Select PCM function */
#define I2S_SELECT_BIT 3 /*!< Select data bit width */
#define I2S_BIT_WIDTH_8 0 /*!< 8-bit */
#define I2S_BIT_WIDTH_16 1 /*!< 16-bit */
#define I2S_BIT_WIDTH_24 2 /*!< 24-bit */
#define I2S_SET_PLAY_DMA_INT_SEL 4 /*!< Select play DMA interrupt request */
#define I2S_SET_REC_DMA_INT_SEL 5 /*!< Select record DMA interrupt request */
#define I2S_DMA_INT_END 0 /*!< End of buffer */
#define I2S_DMA_INT_HALF 1 /*!< Half of buffer */
#define I2S_DMA_INT_QUARTER 2 /*!< Quarter of buffer */
#define I2S_DMA_INT_EIGHTH 3 /*!< Eighth of buffer */
#define I2S_SET_ZEROCROSS 6 /*!< Enable or disable zero cross function */
#define I2S_SET_DMACOUNTER 7 /*!< Enable or disable DMA counter function */
#define I2S_SET_CHANNEL 8 /*!< Set channel number */
#define I2S_CHANNEL_P_I2S_ONE 2 /*!< I2S one channel */
#define I2S_CHANNEL_P_I2S_TWO 3 /*!< I2S two channels */
#define I2S_CHANNEL_P_PCM_TWO 3 /*!< PCM two slots */
#define I2S_CHANNEL_P_PCM_TWO_SLOT1 0 /*!< PCM two slots with all slot1 data */
#define I2S_CHANNEL_P_PCM_TWO_SLOT0 1 /*!< PCM two slots with all slot0 data */
#define I2S_CHANNEL_P_PCM_ONE_SLOT0 2 /*!< PCM one slot with all slot0 data */
#define I2S_CHANNEL_R_I2S_LEFT_PCM_SLOT0 1 /*!< I2S left channel or PCM slot0 */
#define I2S_CHANNEL_R_I2S_RIGHT_PCM_SLOT1 2 /*!< I2S right channel or PCM slot1 */
#define I2S_CHANNEL_R_I2S_TWO 3 /*!< I2S two channels */
#define I2S_SET_MODE 9 /*!< Select master or slave mode */
#define I2S_MODE_MASTER 0 /*!< master mode */
#define I2S_MODE_SLAVE 1 /*!< slave mode */
#define I2S_SET_SPLITDATA 10 /*!< Enable or disable split data function */
#define I2S_SET_DMA_ADDRESS 11 /*!< Set DMA address */
#define I2S_SET_DMA_LENGTH 12 /*!< Set DMA length */
#define I2S_GET_DMA_CUR_ADDRESS 13 /*!< Get current DMA address */
#define I2S_SET_I2S_FORMAT 14 /*!< Select I2S format */
#define I2S_FORMAT_I2S 0 /*!< I2S format */
#define I2S_FORMAT_MSB 1 /*!< MSB foramt */
#define I2S_SET_I2S_CALLBACKFUN 15 /*!< Install play or record call-back function */
#define I2S_SET_PCMSLOT 16 /*!< Set PCM interface start position of slot */
#define PCM_SLOT1_IN 0 /*!< Slot-1 in position */
#define PCM_SLOT1_OUT 1 /*!< Slot-1 out position */
#define PCM_SLOT2_IN 2 /*!< Slot-2 in position */
#define PCM_SLOT2_OUT 3 /*!< Slot-2 out position */
#define I2S_SET_PCM_FS_PERIOD 17 /*!< Set PCM FS pulse period */
/*@}*/ /* end of group ARM9_I2S_EXPORTED_CONSTANTS */
/** @addtogroup ARM9_I2S_EXPORTED_FUNCTIONS I2S Exported Functions
@{
*/
int32_t i2sOpen(void);
void i2sClose(void);
void i2sInit(void);
int32_t i2sIoctl(uint32_t cmd, uint32_t arg0, uint32_t arg1);
void i2sSetSampleRate(uint32_t u32SourceClockRate, uint32_t u32SampleRate, uint32_t u32DataBit, uint32_t u32Channel);
void i2sSetMCLKFrequency(uint32_t u32SourceClockRate, uint32_t u32SampleRate);
void i2sSetPCMBCLKFrequency(uint32_t u32SourceClockRate, uint32_t u32Rate);
/*@}*/ /* end of group I2S_EXPORTED_FUNCTIONS */
/*@}*/ /* end of group I2S_Driver */
/*@}*/ /* end of group Standard_Driver */
#ifdef __cplusplus
}
#endif
#endif //__NU_I2S_H__
/*** (C) COPYRIGHT 2018 Nuvoton Technology Corp. ***/
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/**************************************************************************//**
* @file wwdt.h
* @brief NUC980 WWDT driver header file
*
* SPDX-License-Identifier: Apache-2.0
* @copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#ifndef __NU_WWDT_H__
#define __NU_WWDT_H__
#include "nuc980.h"
#ifdef __cplusplus
extern "C"
{
#endif
/** @addtogroup Standard_Driver Standard Driver
@{
*/
/** @addtogroup WWDT_Driver WWDT Driver
@{
*/
/** @addtogroup WWDT_EXPORTED_CONSTANTS WWDT Exported Constants
@{
*/
#define WWDT_PRESCALER_1 (0UL << 8) ///< WWDT setting prescaler to 1 \hideinitializer
#define WWDT_PRESCALER_2 (1UL << 8) ///< WWDT setting prescaler to 2 \hideinitializer
#define WWDT_PRESCALER_4 (2UL << 8) ///< WWDT setting prescaler to 4 \hideinitializer
#define WWDT_PRESCALER_8 (3UL << 8) ///< WWDT setting prescaler to 8 \hideinitializer
#define WWDT_PRESCALER_16 (4UL << 8) ///< WWDT setting prescaler to 16 \hideinitializer
#define WWDT_PRESCALER_32 (5UL << 8) ///< WWDT setting prescaler to 32 \hideinitializer
#define WWDT_PRESCALER_64 (6UL << 8) ///< WWDT setting prescaler to 64 \hideinitializer
#define WWDT_PRESCALER_128 (7UL << 8) ///< WWDT setting prescaler to 128 \hideinitializer
#define WWDT_PRESCALER_192 (8UL << 8) ///< WWDT setting prescaler to 192 \hideinitializer
#define WWDT_PRESCALER_256 (9UL << 8) ///< WWDT setting prescaler to 256 \hideinitializer
#define WWDT_PRESCALER_384 (0xAUL << 8) ///< WWDT setting prescaler to 384 \hideinitializer
#define WWDT_PRESCALER_512 (0xBUL << 8) ///< WWDT setting prescaler to 512 \hideinitializer
#define WWDT_PRESCALER_768 (0xCUL << 8) ///< WWDT setting prescaler to 768 \hideinitializer
#define WWDT_PRESCALER_1024 (0xDUL << 8) ///< WWDT setting prescaler to 1024 \hideinitializer
#define WWDT_PRESCALER_1536 (0xEUL << 8) ///< WWDT setting prescaler to 1536 \hideinitializer
#define WWDT_PRESCALER_2048 (0xFUL << 8) ///< WWDT setting prescaler to 2048 \hideinitializer
#define WWDT_RELOAD_WORD (0x00005AA5) ///< Fill this value to RLD register to reload WWDT counter \hideinitializer
/*@}*/ /* end of group WWDT_EXPORTED_CONSTANTS */
/** @addtogroup WWDT_EXPORTED_FUNCTIONS WWDT Exported Functions
@{
*/
/**
* @brief This macro clear WWDT time-out reset system flag.
* @return None
* \hideinitializer
*/
#define WWDT_CLEAR_RESET_FLAG() outpw(REG_WWDT_STATUS, 0x2)
/**
* @brief This macro clear WWDT compare match interrupt flag.
* @return None
* \hideinitializer
*/
#define WWDT_CLEAR_INT_FLAG() outpw(REG_WWDT_STATUS, 0x1)
/**
* @brief This macro is use to get WWDT time-out reset system flag.
* @return WWDT reset system or not
* @retval 0 WWDT did not cause system reset
* @retval 1 WWDT caused system reset
* \hideinitializer
*/
#define WWDT_GET_RESET_FLAG() (inpw(REG_WWDT_STATUS) & 0x2 ? 1 : 0)
/**
* @brief This macro is used to indicate WWDT compare match interrupt flag.
* @return WWDT compare match interrupt occurred or not
* @retval 0 WWDT compare match interrupt did not occur
* @retval 1 WWDT compare match interrupt occurred
* \hideinitializer
*/
#define WWDT_GET_INT_FLAG() (inpw(REG_WWDT_STATUS) & 0x1 ? 1 : 0)
/**
* @brief This macro to reflects current WWDT counter value
* @return Return current WWDT counter value
* \hideinitializer
*/
#define WWDT_GET_COUNTER() inpw(REG_WWDT_CNT)
/**
* @brief This macro is used to reload the WWDT counter value to 0x3F.
* @return None
* @details After WWDT enabled, application must reload WWDT counter while
* current counter is less than compare value and larger than 0,
* otherwise WWDT will cause system reset.
* \hideinitializer
*/
#define WWDT_RELOAD_COUNTER() outpw(REG_WWDT_RLDCNT, WWDT_RELOAD_WORD)
void WWDT_Open(UINT u32PreScale, UINT u32CmpValue, UINT u32EnableInt);
/*@}*/ /* end of group WWDT_EXPORTED_FUNCTIONS */
/*@}*/ /* end of group WWDT_Driver */
/*@}*/ /* end of group Standard_Driver */
#ifdef __cplusplus
}
#endif
#endif //__NU_WWDT_H__
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# RT-Thread building script for bridge
import os
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
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