[libcpu/arm]: add dsb and isb instructions in the end of rt_hw_context_switch_to (#5748)

libcpu/arm/cortex-m0/context_gcc.S

@@ -180,6 +180,10 @@ rt_hw_context_switch_to:
     /* enable interrupts at processor level */
     CPSIE   I
 
+    /* ensure PendSV exception taken place before subsequent operation */
+    DSB
+    ISB
+
     /* never reach here! */
 
 /* compatible with old version */

libcpu/arm/cortex-m0/context_iar.S

@@ -186,6 +186,10 @@ rt_hw_context_switch_to:
     ; enable interrupts at processor level
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
 
 ; compatible with old version

libcpu/arm/cortex-m0/context_rvds.S

@@ -189,6 +189,10 @@ rt_hw_context_switch_to    PROC
     ; enable interrupts at processor level
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
     ENDP
 

libcpu/arm/cortex-m23/context_gcc.S

@@ -181,6 +181,10 @@ rt_hw_context_switch_to:
     /* enable interrupts at processor level */
     CPSIE   I
 
+    /* ensure PendSV exception taken place before subsequent operation */
+    DSB
+    ISB
+
     /* never reach here! */
 
 /* compatible with old version */

libcpu/arm/cortex-m23/context_iar.S

@@ -187,6 +187,10 @@ rt_hw_context_switch_to:
     ; enable interrupts at processor level
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
 
 ; compatible with old version

libcpu/arm/cortex-m23/context_rvds.S

@@ -190,6 +190,10 @@ rt_hw_context_switch_to    PROC
     ; enable interrupts at processor level
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
     ENDP
 

libcpu/arm/cortex-m3/context_gcc.S

@@ -162,6 +162,10 @@ rt_hw_context_switch_to:
     CPSIE   F
     CPSIE   I
 
+    /* ensure PendSV exception taken place before subsequent operation */
+    DSB
+    ISB
+
     /* never reach here! */
 
 /* compatible with old version */

libcpu/arm/cortex-m3/context_iar.S

@@ -161,6 +161,10 @@ rt_hw_context_switch_to:
     CPSIE   F
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
 
 ; compatible with old version

libcpu/arm/cortex-m3/context_rvds.S

@@ -167,6 +167,10 @@ rt_hw_context_switch_to    PROC
     CPSIE   F
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
     ENDP
 

libcpu/arm/cortex-m33/context_gcc.S

@@ -249,6 +249,10 @@ rt_hw_context_switch_to:
     CPSIE   F
     CPSIE   I
 
+    /* ensure PendSV exception taken place before subsequent operation */
+    DSB
+    ISB
+
     /* never reach here! */
 
 /* compatible with old version */

libcpu/arm/cortex-m33/context_iar.S

@@ -253,6 +253,10 @@ rt_hw_context_switch_to:
     CPSIE   F
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
 
 ; compatible with old version

libcpu/arm/cortex-m33/context_rvds.S

@@ -254,6 +254,10 @@ rt_hw_context_switch_to    PROC
     CPSIE   F
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
     ENDP
 

libcpu/arm/cortex-m4/context_gcc.S

@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
     CPSIE   F
     CPSIE   I
 
+    /* ensure PendSV exception taken place before subsequent operation */
+    DSB
+    ISB
+
     /* never reach here! */
 
 /* compatible with old version */

libcpu/arm/cortex-m4/context_iar.S

@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
     CPSIE   F
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
 
 ; compatible with old version

libcpu/arm/cortex-m4/context_rvds.S

@@ -208,6 +208,10 @@ rt_hw_context_switch_to    PROC
     CPSIE   F
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
     ENDP
 

libcpu/arm/cortex-m7/context_gcc.S

@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
     CPSIE   F
     CPSIE   I
 
+    /* ensure PendSV exception taken place before subsequent operation */
+    DSB
+    ISB
+
     /* never reach here! */
 
 /* compatible with old version */

libcpu/arm/cortex-m7/context_iar.S

@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
     CPSIE   F
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
 
 ; compatible with old version

libcpu/arm/cortex-m7/context_rvds.S

@@ -208,6 +208,10 @@ rt_hw_context_switch_to    PROC
     CPSIE   F
     CPSIE   I
 
+    ; ensure PendSV exception taken place before subsequent operation
+    DSB
+    ISB
+
     ; never reach here!
     ENDP