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未验证 提交 48d43678 编写于 作者: W wudiyidashi 提交者： GitHub
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[bsp\fm33lc026] *增加gpio支持 *更新libraries\FM33LC0xx_FL_Driver FL库到V2.3.1 (#6175) 

* [bsp\fm33lc026] *增加gpio支持 *更新libraries\FM33LC0xx_FL_Driver到2021年新版本
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bsp/fm33lc026/.config
浏览文件 @ 48d43678
# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib)
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
......@@ -14,6 +17,7 @@ CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=500
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_HOOK_USING_FUNC_PTR=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
......@@ -25,9 +29,7 @@ CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_KSERVICE_USING_STDLIB is not set
# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
# CONFIG_RT_USING_TINY_FFS is not set
# CONFIG_RT_PRINTF_LONGLONG is not set
# end of kservice optimization
# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
CONFIG_RT_DEBUG=y
CONFIG_RT_DEBUG_COLOR=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
......@@ -50,7 +52,6 @@ CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
# end of Inter-Thread communication
#
# Memory Management
......@@ -67,7 +68,6 @@ CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
# CONFIG_RT_USING_MEMTRACE is not set
# CONFIG_RT_USING_HEAP_ISR is not set
CONFIG_RT_USING_HEAP=y
# end of Memory Management
#
# Kernel Device Object
......@@ -78,14 +78,12 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
# end of Kernel Device Object
CONFIG_RT_VER_NUM=0x40100
# end of RT-Thread Kernel
CONFIG_RT_VER_NUM=0x40101
CONFIG_ARCH_ARM=y
# CONFIG_RT_USING_CPU_FFS is not set
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M0=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
......@@ -95,18 +93,8 @@ CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
# CONFIG_RT_USING_LEGACY is not set
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
# end of C++ features
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_RT_USING_MSH=y
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
......@@ -120,13 +108,9 @@ CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
# end of Command shell
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
# end of Device virtual file system
# CONFIG_RT_USING_FAL is not set
# CONFIG_RT_USING_LWP is not set
#
# Device Drivers
......@@ -141,9 +125,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_I2C=y
# CONFIG_RT_I2C_DEBUG is not set
CONFIG_RT_USING_I2C_BITOPS=y
# CONFIG_RT_I2C_BITOPS_DEBUG is not set
# CONFIG_RT_USING_PHY is not set
# CONFIG_RT_USING_PIN is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
......@@ -165,16 +152,14 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
#
# Using USB
#
# CONFIG_RT_USING_USB is not set
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
# end of Using USB
# end of Device Drivers
#
# POSIX layer and C standard library
# C/C++ and POSIX layer
#
# CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_LIBC_USING_TIME is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
# POSIX (Portable Operating System Interface) layer
......@@ -182,8 +167,9 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_POSIX_FS is not set
# CONFIG_RT_USING_POSIX_DELAY is not set
# CONFIG_RT_USING_POSIX_CLOCK is not set
# CONFIG_RT_USING_POSIX_GETLINE is not set
# CONFIG_RT_USING_POSIX_TIMER is not set
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set
#
# Interprocess Communication (IPC)
......@@ -195,44 +181,15 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
#
# Socket is in the 'Network' category
#
# end of Interprocess Communication (IPC)
# end of POSIX (Portable Operating System Interface) layer
# end of POSIX layer and C standard library
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
# end of Socket abstraction layer
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
# end of Network interface device
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
# end of light weight TCP/IP stack
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
# end of AT commands
# end of Network
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
# end of VBUS(Virtual Software BUS)
#
# Utilities
......@@ -242,16 +199,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_UTEST is not set
# CONFIG_RT_USING_VAR_EXPORT is not set
# CONFIG_RT_USING_RT_LINK is not set
# end of Utilities
# CONFIG_RT_USING_LWP is not set
# end of RT-Thread Components
# CONFIG_RT_USING_VBUS is not set
#
# RT-Thread Utestcases
#
# CONFIG_RT_USING_UTESTCASES is not set
# end of RT-Thread Utestcases
#
# RT-Thread online packages
......@@ -260,6 +213,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LWIP is not set
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
......@@ -270,12 +224,8 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
......@@ -286,17 +236,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
# end of Marvell WiFi
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# end of Wiced WiFi
# CONFIG_PKG_USING_RW007 is not set
# end of Wi-Fi
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
......@@ -318,9 +263,10 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# end of IoT Cloud
# CONFIG_PKG_USING_EZ_IOT_OS is not set
# CONFIG_PKG_USING_IOTSHARP_SDK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
......@@ -334,16 +280,13 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
......@@ -354,26 +297,45 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
# CONFIG_PKG_USING_HM is not set
# CONFIG_PKG_USING_SMALL_MODBUS is not set
# end of IoT - internet of things
# CONFIG_PKG_USING_NET_SERVER is not set
# CONFIG_PKG_USING_ZFTP is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_LIBSODIUM is not set
# CONFIG_PKG_USING_LIBHYDROGEN is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
# end of security packages
#
# language packages
#
#
# JSON: JavaScript Object Notation, a lightweight data-interchange format
#
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set
#
# XML: Extensible Markup Language
#
# CONFIG_PKG_USING_SIMPLE_XML is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_LUATOS_SOC is not set
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
# CONFIG_PKG_USING_PIKASCRIPT is not set
# end of language packages
# CONFIG_PKG_USING_RTT_RUST is not set
#
# multimedia packages
......@@ -385,15 +347,13 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_LVGL is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
# end of LVGL: powerful and easy-to-use embedded GUI library
# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
#
# u8g2: a monochrome graphic library
#
# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
# CONFIG_PKG_USING_U8G2 is not set
# end of u8g2: a monochrome graphic library
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
......@@ -413,8 +373,11 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
#
# CONFIG_PKG_USING_PAINTERENGINE is not set
# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
# end of PainterEngine: A cross-platform graphics application framework written in C language
# end of multimedia packages
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_TERMBOX is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_GUIENGINE is not set
#
# tools packages
......@@ -425,7 +388,6 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_SEGGER_RTT is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
......@@ -458,7 +420,11 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_SOLAR_TERMS is not set
# CONFIG_PKG_USING_GAN_ZHI is not set
# CONFIG_PKG_USING_FDT is not set
# end of tools packages
# CONFIG_PKG_USING_CBOX is not set
# CONFIG_PKG_USING_SNOWFLAKE is not set
# CONFIG_PKG_USING_HASH_MATCH is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
#
# system packages
......@@ -470,7 +436,6 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
# end of enhanced kernel services
#
# acceleration: Assembly language or algorithmic acceleration packages
......@@ -478,14 +443,13 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
# end of acceleration: Assembly language or algorithmic acceleration packages
#
# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
#
# CONFIG_PKG_USING_CMSIS_5 is not set
# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
#
# Micrium: Micrium software products porting for RT-Thread
......@@ -496,14 +460,11 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# end of Micrium: Micrium software products porting for RT-Thread
# CONFIG_RT_USING_ARDUINO is not set
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_RTDUINO is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_PERF_COUNTER is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
......@@ -527,11 +488,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
# CONFIG_PKG_USING_ARM_2D is not set
# CONFIG_PKG_USING_WCWIDTH is not set
# CONFIG_PKG_USING_MCUBOOT is not set
# CONFIG_PKG_USING_TINYUSB is not set
# CONFIG_PKG_USING_USB_STACK is not set
# end of system packages
# CONFIG_PKG_USING_CHERRYUSB is not set
# CONFIG_PKG_USING_KMULTI_RTIMER is not set
# CONFIG_PKG_USING_TFDB is not set
# CONFIG_PKG_USING_QPC is not set
#
# peripheral libraries and drivers
......@@ -540,8 +502,10 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_ADT74XX is not set
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_RTT_ESP_IDF is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
......@@ -555,6 +519,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_MULTI_INFRARED is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
......@@ -588,6 +553,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_RS232 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
......@@ -605,10 +571,12 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# end of peripheral libraries and drivers
# CONFIG_PKG_USING_CW2015 is not set
# CONFIG_PKG_USING_RFM300 is not set
#
# AI packages
......@@ -622,12 +590,15 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
# end of AI packages
#
# miscellaneous packages
#
#
# project laboratory
#
#
# samples: kernel and components samples
#
......@@ -635,7 +606,6 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# end of samples: kernel and components samples
#
# entertainment: terminal games and other interesting software packages
......@@ -649,8 +619,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# end of entertainment: terminal games and other interesting software packages
# CONFIG_PKG_USING_COWSAY is not set
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
......@@ -662,6 +631,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_MINIZIP is not set
# CONFIG_PKG_USING_HEATSHRINK is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
......@@ -672,17 +642,16 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_COWSAY is not set
# CONFIG_PKG_USING_TERMBOX is not set
# end of miscellaneous packages
# end of RT-Thread online packages
# CONFIG_PKG_USING_DESIGN_PATTERN is not set
# CONFIG_PKG_USING_CONTROLLER is not set
# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
# CONFIG_PKG_USING_MFBD is not set
# CONFIG_PKG_USING_SLCAN2RTT is not set
# CONFIG_PKG_USING_SOEM is not set
CONFIG_SOC_FAMILY_FM33=y
CONFIG_SOC_SERIES_FM33LC0XX=y
......@@ -694,10 +663,9 @@ CONFIG_SOC_FM33LC0XX=y
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO=y
CONFIG_BSP_USING_UART=y
CONFIG_BSP_USING_UART0=y
CONFIG_BSP_USING_UART1=y
CONFIG_BSP_USING_UART4=y
# CONFIG_BSP_USING_UART5 is not set
# end of On-chip Peripheral Drivers
# end of Hardware Drivers Config
bsp/fm33lc026/applications/main.c
浏览文件 @ 48d43678
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-08-27 Jiao first version
* Date Author Notes
* 2021-08-27 Jiao first version
* 2022-07-20 wudiyidashi support gpio
*/
#include <rtthread.h>
#include "board.h"
#define LED1 GET_PIN(D, 4)
int main(void)
{
FL_GPIO_InitTypeDef GPIO_InitStruct = {0};
rt_pin_mode(LED1, PIN_MODE_OUTPUT);
rt_pin_write(LED1, PIN_HIGH);
FL_GPIO_SetOutputPin(GPIOD, FL_GPIO_PIN_4);
GPIO_InitStruct.pin = FL_GPIO_PIN_4;
GPIO_InitStruct.mode = FL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.pull = FL_DISABLE;
FL_GPIO_Init(GPIOD, &GPIO_InitStruct);
while (1)
{
FL_GPIO_SetOutputPin(GPIOD, FL_GPIO_PIN_4);
rt_pin_write(LED1, PIN_HIGH);
rt_thread_mdelay(500);
FL_GPIO_ResetOutputPin(GPIOD, FL_GPIO_PIN_4);
rt_pin_write(LED1, PIN_LOW);
rt_thread_mdelay(500);
}
......
bsp/fm33lc026/board/Kconfig
浏览文件 @ 48d43678
......@@ -9,6 +9,11 @@ config SOC_FM33LC0XX
menu "On-chip Peripheral Drivers"
menuconfig BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
default y
menuconfig BSP_USING_UART
bool "Enable UART"
default y
......@@ -29,10 +34,11 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_UART5
bool "Enable UART5"
default y
endif
source "../libraries/HAL_Drivers/Kconfig"
endmenu
endmenu
endmenu
bsp/fm33lc026/board/board.c
浏览文件 @ 48d43678
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......@@ -71,7 +71,33 @@ FL_ErrorStatus FL_UART_GPIO_Init(UART_Type *UARTx)
return status;
}
FL_ErrorStatus FL_SPI_GPIO_Init(SPI_Type *SPIx)
{
FL_ErrorStatus status = FL_FAIL;
FL_GPIO_InitTypeDef GPIO_InitStruct;
if (SPIx == SPI1)
{
GPIO_InitStruct.pin = FL_GPIO_PIN_11 | FL_GPIO_PIN_10 | FL_GPIO_PIN_9;
GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.pull = FL_DISABLE;
GPIO_InitStruct.remapPin = FL_DISABLE;
status=FL_GPIO_Init(GPIOB, &GPIO_InitStruct);
}
else if (SPIx == SPI2)
{
GPIO_InitStruct.pin = FL_GPIO_PIN_8 | FL_GPIO_PIN_10 | FL_GPIO_PIN_9;
GPIO_InitStruct.mode = FL_GPIO_MODE_DIGITAL;
GPIO_InitStruct.outputType = FL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.pull = FL_DISABLE;
GPIO_InitStruct.remapPin = FL_DISABLE;
status=FL_GPIO_Init(GPIOC, &GPIO_InitStruct);
}
return status;
}
static void RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLL_R, uint32_t PLL_DB, uint32_t PLL_O)
{
......
bsp/fm33lc026/board/board.h
浏览文件 @ 48d43678
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......@@ -13,6 +13,7 @@
#include <rtthread.h>
#include "fm33lc0xx_fl.h"
#include "drv_gpio.h"
#ifdef __cplusplus
extern "C" {
......
bsp/fm33lc026/libraries/FM/FM33xx/Include/core_cm0plus.h
浏览文件 @ 48d43678
......@@ -22,7 +22,7 @@
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
......
bsp/fm33lc026/libraries/FM/FM33xx/Include/core_cmFunc.h
浏览文件 @ 48d43678
......@@ -552,7 +552,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t v
/** \brief Set Base Priority with condition
This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
......
bsp/fm33lc026/libraries/FM/FM33xx/Include/fm33_assert.h
浏览文件 @ 48d43678
......@@ -24,8 +24,8 @@
#ifdef __cplusplus
extern "C" {
#endif
#ifdef USE_FULL_ASSERT
#define assert_param(expr) do{if((expr) == 0)for(;;);}while(0)
#else
......
bsp/fm33lc026/libraries/FM/FM33xx/Include/fm33lg0xx.h
浏览文件 @ 48d43678
......@@ -6,7 +6,7 @@
* @version V0.0.1
* @date 14 july 2020
*
* @note Generated with SVDConv V2.87e
* @note Generated with SVDConv V2.87e
* from CMSIS SVD File 'FM33LG0XX.SVD' Version 1.0,
*
* @par ARM Limited (ARM) is supplying this software for use with Cortex-M
......@@ -45,7 +45,7 @@ extern "C" {
#define __XTLF_CLOCK (32768) /* Value of the EXTERNAL oscillator in Hz */
/**
* @brief Configuration of the Cortex-M0 Processor and Core Peripherals
* @brief Configuration of the Cortex-M0 Processor and Core Peripherals
*/
#define __CM0_REV 0x0100U /*!< Cortex-M0 Core Revision */
#define __MPU_PRESENT 1U /*!< MPU present or not */
......@@ -55,10 +55,10 @@ extern "C" {
/* ------------------------- Interrupt Number Definition ------------------------ */
/**
* @brief FM33LG0XX Interrupt Number Definition, according to the selected device
* in @ref Library_configuration_section
* @brief FM33LG0XX Interrupt Number Definition, according to the selected device
* in @ref Library_configuration_section
*/
typedef enum {
/****** Cortex-M0 Processor Exceptions Numbers ****************************************************************/
Reset_IRQn = -15, /*!< 1 复位向量 */
......@@ -71,7 +71,7 @@ typedef enum {
/* -------------------- FM33LG0XX specific Interrupt Numbers --------------------*/
WWDT_IRQn = 0, /*!< 0 窗口看门狗或独立看门狗中断 */
SVD_IRQn = 1, /*!< 1 电源监测报警中断 */
RTCx_IRQn = 2, /*!< 2 实时时钟中断 */
RTCx_IRQn = 2, /*!< 2 实时时钟中断 */
FLASH_IRQn = 3, /*!< 3 NVMIF中断 */
FDET_IRQn = 4, /*!< 4 XTLF或XTHF停振检测中断、系统时钟选择错误中断 */
ADC_IRQn = 5, /*!< 5 ADC转换完成中断 */
......@@ -769,7 +769,7 @@ typedef struct
__IO uint32_t TMSEL; /*!< RTCA Time Mark Select, Address offset: 0x2C */
__IO uint32_t ADJUST; /*!< RTCA time Adjust Register, Address offset: 0x30 */
__IO uint32_t ADSIGN; /*!< RTCA time Adjust Sign Register, Address offset: 0x34 */
__IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x38 */
__IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x38 */
__IO uint32_t SBSCNT; /*!< RTCA Sub-Second Counter, Address offset: 0x3C */
__IO uint32_t CR; /*!< RTCA Control Register, Address offset: 0x40 */
}RTCA_Type;
......
bsp/fm33lc026/libraries/FM/FM33xx/Include/fm33xx.h
浏览文件 @ 48d43678
......@@ -17,24 +17,24 @@
* See the Mulan PSL v1 for more details.
*
****************************************************************************************************
*/
*/
/** @addtogroup CMSIS
* @{
*/
#ifndef __FM33xx_H
#define __FM33xx_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/** @addtogroup Library_configuration_section
* @{
*/
/**
* @brief FM33 Family
*/
......@@ -52,7 +52,7 @@
|(__FM33x0xx_CMSIS_VERSION_SUB1 << 16)\
|(__FM33x0xx_CMSIS_VERSION_SUB2 << 8 )\
|(__FM33x0xx_CMSIS_VERSION_RC))
/**
* @}
*/
......@@ -105,6 +105,6 @@
/**
* @}
*/
/************************ (C) COPYRIGHT Fudan Microelectronics *****END OF FILE****/
bsp/fm33lc026/libraries/FM/FM33xx/Include/system_fm33lc0xx.h
浏览文件 @ 48d43678
......@@ -46,7 +46,7 @@ extern "C" {
#include <stdint.h>
#include <stdio.h>
#include "fm33lc0xx.h"
#define USE_LSCLK_CLOCK_SRC_XTLF
//#define SYSCLK_SRC_RC4M
......@@ -54,8 +54,8 @@ extern "C" {
#define SYSCLK_SRC_RCHF
//#define SYSCLK_SRC_PLL
//#define USE_PLL_CLOCK_SRC_RCHF
//#define USE_PLL_CLOCK_SRC_XTHF
......@@ -77,11 +77,11 @@ extern "C" {
#if !defined (XTHF_VALUE)
#define XTHF_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
#endif /* XTHF_VALUE */
#endif /* XTHF_VALUE */
#if !defined (XTLF_VALUE)
#define XTLF_VALUE ((uint32_t)32768U) /*!< Value of the Internal oscillator in Hz*/
#endif /* XTLF_VALUE */
#endif /* XTLF_VALUE */
#define LDT_CHECK(_N_VALUE_, _T_VALUE_) \
......@@ -89,9 +89,9 @@ extern "C" {
((~_N_VALUE_) & 0xffff)) ? _N_VALUE_ : _T_VALUE_)
#define LPOSC_LDT_TRIM (*(uint32_t *)0x1FFFFB20) // LPOSC 常温校准值
#define RCHF8M_LDT_TRIM (*(uint32_t *)0x1FFFFB40) // RC8M 常温校准值
#define RCHF16M_LDT_TRIM (*(uint32_t *)0x1FFFFB3C) // RC16M 常温校准值
#define RCHF24M_LDT_TRIM (*(uint32_t *)0x1FFFFB38) // RC24M 常温校准值
#define RCHF8M_LDT_TRIM (*(uint32_t *)0x1FFFFB40) // RC8M 常温校准值
#define RCHF16M_LDT_TRIM (*(uint32_t *)0x1FFFFB3C) // RC16M 常温校准值
#define RCHF24M_LDT_TRIM (*(uint32_t *)0x1FFFFB38) // RC24M 常温校准值
#define RCMF4M_LDT_TRIM (*(uint32_t *)0x1FFFFB44) // RCMF 常温校准值
#define LPOSC_TRIM (LDT_CHECK(LPOSC_LDT_TRIM, 0x80) & 0xff)
......@@ -99,7 +99,7 @@ extern "C" {
#define RCHF8M_TRIM (LDT_CHECK(RCHF8M_LDT_TRIM, 0x40) & 0x7f)
#define RCHF16M_TRIM (LDT_CHECK(RCHF16M_LDT_TRIM, 0x40) & 0x7f)
#define RCHF24M_TRIM (LDT_CHECK(RCHF24M_LDT_TRIM, 0x40) & 0x7f)
#define __SYSTEM_CLOCK (8000000)
......@@ -111,7 +111,7 @@ typedef struct
{
/* 中断抢占优先级 */
uint32_t preemptPriority;
}NVIC_ConfigTypeDef;
......@@ -138,13 +138,13 @@ void SystemInit (void);
extern uint32_t SystemCoreClock;
void SystemCoreClockUpdate (void);
/**
* @brief NVIC_Init config NVIC
* @brief NVIC_Init config NVIC
*
* @param NVIC_configStruct configParams
* @param NVIC_configStruct configParams
*
* @param IRQn Interrupt number
* @param IRQn Interrupt number
*
* @retval None
* @retval None
*/
void NVIC_Init(NVIC_ConfigTypeDef *NVIC_configStruct,IRQn_Type IRQn);
......
bsp/fm33lc026/libraries/FM/FM33xx/Include/system_fm33lg0xx.h
浏览文件 @ 48d43678
......@@ -46,17 +46,17 @@ extern "C" {
#include <stdint.h>
#include <stdio.h>
#include "fm33lg0xx.h"
#if !defined (XTHF_VALUE)
#define XTHF_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
#endif /* XTHF_VALUE */
#endif /* XTHF_VALUE */
#if !defined (XTLF_VALUE)
#define XTLF_VALUE ((uint32_t)32768U) /*!< Value of the Internal oscillator in Hz*/
#endif /* XTLF_VALUE */
#endif /* XTLF_VALUE */
#define __SYSTEM_CLOCK (8000000)
#define DELAY_US (__SYSTEM_CLOCK/1000000)
#define DELAY_MS (__SYSTEM_CLOCK/1000)
......@@ -64,12 +64,12 @@ extern "C" {
#define Do_DelayStart() { \
uint32_t LastTick = SysTick->VAL; do {
#define While_DelayMsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_MS*Count); \
}
#define While_DelayUsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_US*Count); \
}
}
/**
* Initialize the system
......
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/core_cm0plus.h
浏览文件 @ 48d43678
......@@ -22,7 +22,7 @@
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
......
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/core_cmFunc.h
浏览文件 @ 48d43678
......@@ -552,7 +552,7 @@ __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t v
/** \brief Set Base Priority with condition
This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
......
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/fm33_assert.h
浏览文件 @ 48d43678
......@@ -24,8 +24,8 @@
#ifdef __cplusplus
extern "C" {
#endif
#ifdef USE_FULL_ASSERT
#define assert_param(expr) do{if((expr) == 0)for(;;);}while(0)
#else
......
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/fm33lg0xx.h
浏览文件 @ 48d43678
......@@ -6,7 +6,7 @@
* @version V0.0.1
* @date 14 july 2020
*
* @note Generated with SVDConv V2.87e
* @note Generated with SVDConv V2.87e
* from CMSIS SVD File 'FM33LG0XX.SVD' Version 1.0,
*
* @par ARM Limited (ARM) is supplying this software for use with Cortex-M
......@@ -45,7 +45,7 @@ extern "C" {
#define __XTLF_CLOCK (32768) /* Value of the EXTERNAL oscillator in Hz */
/**
* @brief Configuration of the Cortex-M0 Processor and Core Peripherals
* @brief Configuration of the Cortex-M0 Processor and Core Peripherals
*/
#define __CM0_REV 0x0100U /*!< Cortex-M0 Core Revision */
#define __MPU_PRESENT 1U /*!< MPU present or not */
......@@ -55,10 +55,10 @@ extern "C" {
/* ------------------------- Interrupt Number Definition ------------------------ */
/**
* @brief FM33LG0XX Interrupt Number Definition, according to the selected device
* in @ref Library_configuration_section
* @brief FM33LG0XX Interrupt Number Definition, according to the selected device
* in @ref Library_configuration_section
*/
typedef enum {
/****** Cortex-M0 Processor Exceptions Numbers ****************************************************************/
Reset_IRQn = -15, /*!< 1 复位向量 */
......@@ -71,7 +71,7 @@ typedef enum {
/* -------------------- FM33LG0XX specific Interrupt Numbers --------------------*/
WWDT_IRQn = 0, /*!< 0 窗口看门狗或独立看门狗中断 */
SVD_IRQn = 1, /*!< 1 电源监测报警中断 */
RTCx_IRQn = 2, /*!< 2 实时时钟中断 */
RTCx_IRQn = 2, /*!< 2 实时时钟中断 */
FLASH_IRQn = 3, /*!< 3 NVMIF中断 */
FDET_IRQn = 4, /*!< 4 XTLF或XTHF停振检测中断、系统时钟选择错误中断 */
ADC_IRQn = 5, /*!< 5 ADC转换完成中断 */
......@@ -769,7 +769,7 @@ typedef struct
__IO uint32_t TMSEL; /*!< RTCA Time Mark Select, Address offset: 0x2C */
__IO uint32_t ADJUST; /*!< RTCA time Adjust Register, Address offset: 0x30 */
__IO uint32_t ADSIGN; /*!< RTCA time Adjust Sign Register, Address offset: 0x34 */
__IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x38 */
__IO uint32_t RSV1; /*!< RESERVED REGISTER, Address offset: 0x38 */
__IO uint32_t SBSCNT; /*!< RTCA Sub-Second Counter, Address offset: 0x3C */
__IO uint32_t CR; /*!< RTCA Control Register, Address offset: 0x40 */
}RTCA_Type;
......
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/fm33xx.h
浏览文件 @ 48d43678
......@@ -17,24 +17,24 @@
* See the Mulan PSL v1 for more details.
*
****************************************************************************************************
*/
*/
/** @addtogroup CMSIS
* @{
*/
#ifndef __FM33xx_H
#define __FM33xx_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/** @addtogroup Library_configuration_section
* @{
*/
/**
* @brief FM33 Family
*/
......@@ -52,7 +52,7 @@
|(__FM33x0xx_CMSIS_VERSION_SUB1 << 16)\
|(__FM33x0xx_CMSIS_VERSION_SUB2 << 8 )\
|(__FM33x0xx_CMSIS_VERSION_RC))
/**
* @}
*/
......@@ -105,6 +105,6 @@
/**
* @}
*/
/************************ (C) COPYRIGHT Fudan Microelectronics *****END OF FILE****/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/system_fm33lc0xx.h
浏览文件 @ 48d43678
......@@ -2,8 +2,8 @@
* @file system_fm33lc0xx.h
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File for
* Device FM33LC0XX
* @version V2.00
* @date 15. March 2021
* @version V2.0.0
* @date 15. Mar 2021
*
* @note
*
......@@ -35,7 +35,6 @@
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#ifndef SYSTEM_FM33LC0XX_H
#define SYSTEM_FM33LC0XX_H
......@@ -43,110 +42,119 @@
extern "C" {
#endif
#include <stdint.h>
#include <stdio.h>
#include "fm33lc0xx.h"
#define USE_LSCLK_CLOCK_SRC_XTLF
//#define SYSCLK_SRC_RC4M
//#define SYSCLK_SRC_XTHF
#define SYSCLK_SRC_RCHF
//#define SYSCLK_SRC_PLL
//#define USE_PLL_CLOCK_SRC_RCHF
//#define USE_PLL_CLOCK_SRC_XTHF
#if ((!defined(SYSCLK_SRC_RC4M)) && (!defined(SYSCLK_SRC_XTHF))&&(!defined(SYSCLK_SRC_PLL))&&(!defined(SYSCLK_SRC_RCHF)))
#error "Must select a clock source form the SYSCLK_SRC_RC4M or SYSCLK_SRC_XTHF or SYSCLK_SRC_PLL or SYSCLK_SRC_RCHF as the master clock."
#elif (((defined(SYSCLK_SRC_RC4M)) && ((defined(SYSCLK_SRC_XTHF))||(defined(SYSCLK_SRC_PLL))||(defined(SYSCLK_SRC_RCHF))))||\
((defined(SYSCLK_SRC_XTHF)) && ((defined(SYSCLK_SRC_RC4M))||(defined(SYSCLK_SRC_PLL))||(defined(SYSCLK_SRC_RCHF))))||\
((defined(SYSCLK_SRC_PLL)) && ((defined(SYSCLK_SRC_XTHF))||(defined(SYSCLK_SRC_RC4M))||(defined(SYSCLK_SRC_RCHF))))||\
((defined(SYSCLK_SRC_RCHF)) && ((defined(SYSCLK_SRC_XTHF))||(defined(SYSCLK_SRC_PLL))||(defined(SYSCLK_SRC_RC4M)))))
#error "Only one clock source can be selected as the master clock."
#endif
#if defined(SYSCLK_SRC_PLL) && !defined(USE_PLL_CLOCK_SRC_RCHF) && !defined(USE_PLL_CLOCK_SRC_XTHF)
#error "You have chosen to enable the PLL, so you need to specify the clock source for the PLL.."
#elif defined(SYSCLK_SRC_PLL) && (defined(USE_PLL_CLOCK_SRC_RCHF) && defined(USE_PLL_CLOCK_SRC_XTHF))
#error "Please select one of the USE_PLL_CLOCK_SRC_RCHF and USE_PLL_CLOCK_SRC_XTHF in your application"
#endif
#if !defined (XTHF_VALUE)
#define XTHF_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
#endif /* XTHF_VALUE */
#if !defined (XTLF_VALUE)
#define XTLF_VALUE ((uint32_t)32768U) /*!< Value of the Internal oscillator in Hz*/
#endif /* XTLF_VALUE */
/**
* @brief CMSIS Device version number
*/
#define __FM33LC0xx_CMSIS_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __FM33LC0xx_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __FM33LC0xx_CMSIS_VERSION_SUB2 (0x01) /*!< [15:0] sub2 version */
#define __FM33LC0xx_CMSIS_VERSION ((__FM33LC0xx_CMSIS_VERSION_MAIN << 24)\
|(__FM33LC0xx_CMSIS_VERSION_SUB1 << 16)\
|(__FM33LC0xx_CMSIS_VERSION_SUB2))
/* Configurations ------------------------------------------------------------*/
/**
* @brief LSCLK source
* @note Comment the following line to use only LPOSC as LSCLK source, and also
* disable LSCLK auto switch function.
*/
#define USE_LSCLK_CLOCK_SRC_XTLF
#define LDT_CHECK(_N_VALUE_, _T_VALUE_) \
((((_N_VALUE_ >> 16) & 0xffff) == \
((~_N_VALUE_) & 0xffff)) ? _N_VALUE_ : _T_VALUE_)
#ifdef USE_LSCLK_CLOCK_SRC_XTLF
#define LPOSC_LDT_TRIM (*(uint32_t *)0x1FFFFB20) // LPOSC 常温校准值
#define RCHF8M_LDT_TRIM (*(uint32_t *)0x1FFFFB40) // RC8M 常温校准值
#define RCHF16M_LDT_TRIM (*(uint32_t *)0x1FFFFB3C) // RC16M 常温校准值
#define RCHF24M_LDT_TRIM (*(uint32_t *)0x1FFFFB38) // RC24M 常温校准值
#define RCMF4M_LDT_TRIM (*(uint32_t *)0x1FFFFB44) // RCMF 常温校准值
/**
* @brief LSCLK source
* @note Comment the following line to disable LSCLK auto switch function.
*/
#define USE_LSCLK_AUTO_SWITCH
#define LPOSC_TRIM (LDT_CHECK(LPOSC_LDT_TRIM, 0x80) & 0xff)
#define RCMF4M_TRIM (LDT_CHECK(RCMF4M_LDT_TRIM, 0x40) & 0x7f)
#define RCHF8M_TRIM (LDT_CHECK(RCHF8M_LDT_TRIM, 0x40) & 0x7f)
#define RCHF16M_TRIM (LDT_CHECK(RCHF16M_LDT_TRIM, 0x40) & 0x7f)
#define RCHF24M_TRIM (LDT_CHECK(RCHF24M_LDT_TRIM, 0x40) & 0x7f)
#endif /* USE_LSCLK_CLOCK_SRC_XTLF */
#define __SYSTEM_CLOCK (8000000)
/**
* @brief Open IWDT on program startup
* @note Uncomment the following line to use IWDT on startup. User can modify
* the IWDT_OVERFLOW_PERIOD to change the IDWT overflow period.
*/
/* #define USE_IWDT_ON_STARTUP */
#ifdef USE_IWDT_ON_STARTUP
/*
Valid value of IWDT_OVERFLOW_PERIOD:
- 0x0: 125ms
- 0x1: 250ms
- 0x2: 500ms
- 0x3: 1s
- 0x4: 2s
- 0x5: 4s
- 0x6: 8s
- 0x7: 16s
*/
#define IWDT_OVERFLOW_PERIOD 0x7
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/**
* @brief FL NVIC Init Sturcture definition
*/
typedef struct
{
/* 中断抢占优先级 */
uint32_t preemptPriority;
}NVIC_ConfigTypeDef;
/* Device Includes -----------------------------------------------------------*/
#include "fm33lc0xx.h"
/* Trim Values ---------------------------------------------------------------*/
/* Validate Function */
#define LDT_CHECK(_N_VALUE_, _T_VALUE_) \
((((_N_VALUE_ >> 16) & 0xFFFFU) == \
(~(_N_VALUE_) & 0xFFFFU)) ? (_N_VALUE_) : (_T_VALUE_))
/* Trim Values Address */
#define LPOSC_LDT_TRIM (*(uint32_t *)0x1FFFFB20U) /* LPOSC trim value */
#define RCHF8M_LDT_TRIM (*(uint32_t *)0x1FFFFB40U) /* RC8M trim value */
#define RCHF16M_LDT_TRIM (*(uint32_t *)0x1FFFFB3CU) /* RC16M trim value */
#define RCHF24M_LDT_TRIM (*(uint32_t *)0x1FFFFB38U) /* RC24M trim value */
#define RCMF4M_LDT_TRIM (*(uint32_t *)0x1FFFFB44U) /* RCMF trim value */
/* Trim Values */
#define LPOSC_TRIM (LDT_CHECK(LPOSC_LDT_TRIM, 0x80) & 0xFFU)
#define RCMF4M_TRIM (LDT_CHECK(RCMF4M_LDT_TRIM, 0x40) & 0x7FU)
#define RCHF8M_TRIM (LDT_CHECK(RCHF8M_LDT_TRIM, 0x40) & 0x7FU)
#define RCHF16M_TRIM (LDT_CHECK(RCHF16M_LDT_TRIM, 0x40) & 0x7FU)
#define RCHF24M_TRIM (LDT_CHECK(RCHF24M_LDT_TRIM, 0x40) & 0x7FU)
/* Default Clock Frequency Values --------------------------------------------*/
#define XTHF_DEFAULT_VALUE ((uint32_t)8000000U) /*!< Default value of XTHF in Hz */
#define XTLF_DEFAULT_VALUE ((uint32_t)32768U) /*!< Default value of XTLF in Hz */
/* Default system core clock value */
#define HCLK_DEFAULT_VALUE ((uint32_t)8000000U)
/* Exported Clock Frequency Variables --------------------------------------- */
/*
- [SystemCoreClock] holds the value of CPU operation clock freqency, and is initialized
to HCLK_DEFAULT_VALUE;
- [XTLFClock] holds the value of external low-frequency oscillator(XTLF),
and is initialized to XTLF_DEFAULT_VALUE;
- [XTHFClock] holds the value of external high_frequency oscillator(XTHF),
and is initialized to XTHF_DEFAULT_VALUE;
NOTE: If users are using these two external oscillators, they should modify the
value of XTLFClock and XTHFClock to the correct value, and call the SystemCoreClockUpdate()
to update the SystemCoreClock variable, otherwise those codes which rely on
the SystemCoreClock variable will fail to run.
*/
extern uint32_t XTLFClock; /*!< External Low-freq Osc Clock Frequency (XTLF) */
extern uint32_t XTHFClock; /*!< External High-freq Osc Clock Frequency (XTHF) */
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
* Initialize the System.
*/
void SystemInit (void);
void SystemInit(void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern uint32_t SystemCoreClock;
void SystemCoreClockUpdate (void);
/**
* @brief NVIC_Init config NVIC
*
* @param NVIC_configStruct configParams
*
* @param IRQn Interrupt number
*
* @retval None
*/
void NVIC_Init(NVIC_ConfigTypeDef *NVIC_configStruct,IRQn_Type IRQn);
void SystemCoreClockUpdate(void);
#ifdef __cplusplus
}
......
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/system_fm33lg0xx.h
浏览文件 @ 48d43678
......@@ -46,17 +46,17 @@ extern "C" {
#include <stdint.h>
#include <stdio.h>
#include "fm33lg0xx.h"
#if !defined (XTHF_VALUE)
#define XTHF_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
#endif /* XTHF_VALUE */
#endif /* XTHF_VALUE */
#if !defined (XTLF_VALUE)
#define XTLF_VALUE ((uint32_t)32768U) /*!< Value of the Internal oscillator in Hz*/
#endif /* XTLF_VALUE */
#endif /* XTLF_VALUE */
#define __SYSTEM_CLOCK (8000000)
#define DELAY_US (__SYSTEM_CLOCK/1000000)
#define DELAY_MS (__SYSTEM_CLOCK/1000)
......@@ -64,12 +64,12 @@ extern "C" {
#define Do_DelayStart() { \
uint32_t LastTick = SysTick->VAL; do {
#define While_DelayMsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_MS*Count); \
}
#define While_DelayUsEnd(Count) }while(((LastTick - SysTick->VAL)&0xFFFFFF)<DELAY_US*Count); \
}
}
/**
* Initialize the system
......
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/system_fm33lc0xx.c
浏览文件 @ 48d43678
......@@ -2,8 +2,8 @@
* @file system_fm33lc0xx.c
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Source File for
* Device FM33LC0XX
* @version V2.00
* @date 15. March 2021
* @version V2.0.0
* @date 15. Mar 2021
*
* @note
*
......@@ -35,170 +35,171 @@
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#include "system_fm33lc0xx.h"
/*----------------------------------------------------------------------------
DEFINES
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
/* ToDo: add here your necessary defines for device initialization
following is an example for different system frequencies */
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
/* ToDo: initialize SystemCoreClock with the system core clock frequency value
achieved after system intitialization.
This means system core clock frequency after call to SystemInit() */
uint32_t SystemCoreClock = __SYSTEM_CLOCK; /*!< System Clock Frequency (Core Clock)*/
/*----------------------------------------------------------------------------
Clock functions
*----------------------------------------------------------------------------*/
/* Clock Variable definitions ------------------------------------------------*/
uint32_t XTLFClock = XTLF_DEFAULT_VALUE; /*!< External Low-freq Osc Clock Frequency (XTLF) */
uint32_t XTHFClock = XTHF_DEFAULT_VALUE; /*!< External High-freq Osc Clock Frequency (XTHF) */
uint32_t SystemCoreClock = HCLK_DEFAULT_VALUE; /*!< System Clock Frequency (Core Clock) */
/* Clock functions -----------------------------------------------------------*/
/**
* @brief Retrieve the PLL clock frequency
*
* @retval PLL clock frequency
*/
static uint32_t SystemPLLClockUpdate(void)
{
uint32_t clock = 0;
// 时钟源
/* Acquire PLL clock source */
switch ((RCC->PLLCR >> 1) & 0x1)
{
case 0:
switch ((RCC->RCHFCR >> 16) & 0xf)
switch ((RCC->RCHFCR >> 16) & 0xFU)
{
case 1: // 16M
case 1: /* 16MHz */
clock = 16000000;
break;
case 2: // 24M
case 2: /* 24MHz */
clock = 24000000;
break;
case 0: // 8M
case 0: /* 8MHz */
default:
clock = 8000000;
break;
}
break;
case 1:
clock = XTHF_VALUE;
clock = XTHFClock;
break;
}
// 分频
/* Acquire PLL prescaler */
switch ((RCC->PLLCR >> 0x4) & 0x7)
{
case 0: // 不分频
case 0: /* input divided by 1 */
clock /= 1;
break;
case 1: // 2分频
clock /= 2;
case 1: /* input divided by 2 */
clock /= 2;
break;
case 2: // 4分频
case 2: /* input divided by 4 */
clock /= 4;
break;
case 3: // 8分频
case 3: /* input divided by 8 */
clock /= 8;
break;
case 4: // 12分频
case 4: /* input divided by 12 */
clock /= 12;
break;
case 5: // 16分频
case 5: /* input divided by 16 */
clock /= 16;
break;
case 6: // 24分频
case 6: /* input divided by 24 */
clock /= 24;
break;
case 7: // 32分频
case 7: /* input divided by 32 */
clock /= 32;
break;
}
// 倍频比
clock = clock * (((RCC->PLLCR >> 16) & 0x7f) + 1);
// 输出选择
/* Acquire PLL multiplier and calculate PLL frequency */
clock = clock * (((RCC->PLLCR >> 16) & 0x7F) + 1);
/* Acquire PLL output channel(PLLx1 or PLLx2) */
if ((RCC->PLLCR >> 3) & 0x1)
{
clock *= 2;
}
return clock;
}
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
/**
* @brief Update the core clock frequency variable: SystemCoreClock
*
*/
void SystemCoreClockUpdate(void)
{
switch ((RCC->SYSCLKCR >> 0) & 0x7)
{
case 1: // XTHF
SystemCoreClock = XTHF_VALUE;
{
case 1: /* XTHF */
SystemCoreClock = XTHFClock;
break;
case 2: // PLL
case 2: /* PLL */
SystemCoreClock = SystemPLLClockUpdate();
break;
case 4: // RCMF
case 4: /* RCMF */
switch ((RCC->RCMFCR >> 16) & 0x3)
{
case 0: // 不分频
case 0: /* output divided by 1 */
SystemCoreClock = 4000000;
break;
case 1: // 4分频
case 1: /* output divided by 4 */
SystemCoreClock = 1000000;
break;
case 2: // 8分频
case 2: /* output divided by 8 */
SystemCoreClock = 500000;
break;
case 3: // 16分频
case 3: /* output divided by 16 */
SystemCoreClock = 250000;
break;
}
break;
case 5: // LSCLK
case 6: // LPOSC
SystemCoreClock = 32768;
case 5: /* LSCLK */
#ifdef USE_LSCLK_CLOCK_SRC_LPOSC
SystemCoreClock = 32000;
#else
SystemCoreClock = XTLFClock;
#endif
break;
case 6: /* LPOSC */
SystemCoreClock = 32000;
break;
case 7: // USBBCK
case 7: /* USBBCK */
switch ((RCC->SYSCLKCR >> 3) & 0x1)
{
case 0: // USBBCK 48M
case 0: /* USBBCK 48MHz */
SystemCoreClock = 48000000;
break;
case 1: // USBBCK 120M 2分频
case 1: /* USBBCK 120MHz/2 */
SystemCoreClock = 60000000;
break;
}
break;
default:
switch ((RCC->RCHFCR >> 16) & 0xf)
{
case 1: // 16M
case 1: /* 16MHz */
SystemCoreClock = 16000000;
break;
case 2: // 24M
case 2: /* 24MHz */
SystemCoreClock = 24000000;
break;
case 0: // 8M
case 0: /* 8MHz */
default:
SystemCoreClock = 8000000;
break;
......@@ -208,79 +209,94 @@ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
}
/**
* @brief NVIC_Init config NVIC
*
* @param NVIC_configStruct configParams
*
* @param IRQn Interrupt number
*
* @retval None
*/
void NVIC_Init(NVIC_ConfigTypeDef *NVIC_configStruct,IRQn_Type IRQn)
{
/* Params Check */
if(NVIC_configStruct->preemptPriority>3)
{
NVIC_configStruct->preemptPriority = 3;
}
NVIC_DisableIRQ(IRQn);
NVIC_SetPriority(IRQn,NVIC_configStruct->preemptPriority);
NVIC_EnableIRQ(IRQn);
}
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System.
*/
void SystemInit (void)
void SystemInit(void)
{
#if !defined(MFANG) && defined(USE_LSCLK_CLOCK_SRC_XTLF)
uint32_t temp;
/* */
RCC->PLLCR = (uint32_t)0x00000000U;
RCC->SYSCLKCR = (uint32_t)0x0A000000U;
/* PAD RCC*/
RCC->PCLKCR1 |= (0x1U << 7U);
#ifdef USE_LSCLK_CLOCK_SRC_XTLF
GPIOD->FCR |= 0x3C0000;
/* XTLF*/
RCC->XTLFCR = (uint32_t)(0x00000000U);
/* XTLF*/
RCC->XTLFCR |= (uint32_t)(0x00000005U<<8);
for(temp = 2000;temp>0;temp--);
/* LSCLKXTLF*/
RCC->LSCLKSEL = 0xAA;
/* LSCXTLF*/
#endif
#if defined(USE_IWDT_ON_STARTUP)
RCC->PCLKCR1 |= 0x20U; /* Enable IWDT Operation Clock */
IWDT->CR = IWDT_OVERFLOW_PERIOD; /* Configure IWDT overflow period */
IWDT->SERV = 0x12345A5AU; /* Enable IWDT */
#endif
/* Reset PLL & SYSCLK selection */
RCC->PLLCR = 0x00000000U;
RCC->SYSCLKCR = 0x0A000000U;
/* Enable PAD Operation Clock */
RCC->PCLKCR1 |= (0x1U << 7);
#ifndef MFANG /* MFANG handles clock configurations by itself */
#ifdef USE_LSCLK_CLOCK_SRC_XTLF
/* XTLF IO configuration */
GPIOD->FCR |= 0x003C0000U;
/* Enable XTLF */
RCC->XTLFCR = 0x00000000U;
RCC->XTLFCR |= (uint32_t)(0x5U << 8);
for(temp = 2000U; temp > 0U; temp--);
#ifdef USE_LSCLK_AUTO_SWITCH
/* Enable LSCLK auto switch */
RCC->SYSCLKCR |= 0x8000000U;
/* LSCLK from XTLF */
RCC->LSCLKSEL = 0xAAU;
#else
/* Disable LSCLK auto switch */
CMU->SYSCLKCR &= 0x7FFFFFFU;
/* LSCLK from XTLF */
CMU->LSCLKSEL = 0xAAU;
#endif /* USE_LSCLK_AUTO_SWITCH */
#else
/* Disable LSCLK auto switch */
RCC->SYSCLKCR &= 0x7FFFFFFU;
RCC->LSCLKSEL = 0x55;
#endif
/*PDR*/
RMU->PDRCR |=0x01;
/*BOR*/
RMU->BORCR &=0xFE;
/* DEBUG IWDT WWDT */
DBG->CR =0x03;
RCC->RCHFTR = RCHF24M_TRIM;
/* LSCLK from LPOSC */
RCC->LSCLKSEL = 0x55U;
#endif /* USE_LSCLK_CLOCK_SRC_XTLF */
#endif /* MFANG */
/* PDR & BOR Configuration */
RMU->PDRCR = 0x1U;
RMU->BORCR = 0xEU;
/* Disable IWDT & WWDT, enable other peripherals(e.g. timers) under Debug Mode */
DBG->CR = 0x3U;
/* Load clock trim value */
RCC->RCHFTR = RCHF8M_TRIM;
RCC->RCMFTR = RCMF4M_TRIM;
RCC->LPOSCTR = LPOSC_TRIM;
GPIOD->PUEN |= 0x3 << 7;
/* Enable SWD port pull up */
GPIOD->PUEN |= (0x3U << 7U);
/* DMA Flash Channel: Flash->RAM */
RCC->PCLKCR2 |= 0x1 << 4;
DMA->CH7CR |= 0x1 << 10;
RCC->PCLKCR2 &= ~(0x1 << 4);
}
RCC->PCLKCR2 |= (0x1U << 4U);
DMA->CH7CR |= (0x1U << 10U);
RCC->PCLKCR2 &= ~(0x1U << 4U);
/* Update System Core Clock */
SystemCoreClockUpdate();
#if defined(USE_IWDT_ON_STARTUP)
IWDT->SERV = 0x12345A5AU; /* Feed IWDT */
#endif
}
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/system_fm33lg0xx.c
浏览文件 @ 48d43678
......@@ -61,7 +61,7 @@ uint32_t SystemCoreClock = __SYSTEM_CLOCK; /*!< System Clock Frequency (Core Cl
*----------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
{
}
/**
* Initialize the system
......@@ -74,8 +74,8 @@ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
*/
void SystemInit (void)
{
}
}
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33_assert.h 0 → 100644
浏览文件 @ 48d43678
/**
****************************************************************************************************
* @file fm33_assert.h
* @author FMSH Application Team
* @brief Assert function define
****************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
*
****************************************************************************************************
*/
#ifndef __FM33_ASSERT_H
#define __FM33_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
#ifdef USE_FULL_ASSERT
#define assert_param(expr) do{if((expr) == 0)for(;;);}while(0)
#else
#define assert_param(expr) ((void)0U)
#endif
#ifdef __cplusplus
}
#endif
#endif
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl.h
浏览文件 @ 48d43678
......@@ -6,20 +6,20 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------------------------------*/
/* Define to prevent recursive inclusion --------------------------------------------------------------*/
#ifndef __FM33LC0XX_FL_H
#define __FM33LC0XX_FL_H
......@@ -27,64 +27,12 @@
extern "C" {
#endif
/**
* @brief Select FM33LC0XX Device
*/
#if !defined (FM33LC0XX)
#define FM33LC0XX
#endif /* FM33LC0XX */
/* Defines -------------------------------------------------------------------------------------------*/
/**
* @brief List of drivers to be used.
*
* @note Uncomment following lines to disable specified driver.
*/
#ifndef MFANG
#define FL_ADC_DRIVER_ENABLED
#define FL_AES_DRIVER_ENABLED
#define FL_ATIM_DRIVER_ENABLED
#define FL_BSTIM32_DRIVER_ENABLED
#define FL_COMP_DRIVER_ENABLED
#define FL_CRC_DRIVER_ENABLED
#define FL_DIVAS_DRIVER_ENABLED
#define FL_DMA_DRIVER_ENABLED
#define FL_EXTI_DRIVER_ENABLED
#define FL_FLASH_DRIVER_ENABLED
#define FL_GPIO_DRIVER_ENABLED
#define FL_GPTIM_DRIVER_ENABLED
#define FL_I2C_DRIVER_ENABLED
#define FL_IWDT_DRIVER_ENABLED
#define FL_LCD_DRIVER_ENABLED
#define FL_LPTIM32_DRIVER_ENABLED
#define FL_LPUART_DRIVER_ENABLED
#define FL_OPA_DRIVER_ENABLED
#define FL_PMU_DRIVER_ENABLED
#define FL_RCC_DRIVER_ENABLED
#define FL_RMU_DRIVER_ENABLED
#define FL_RNG_DRIVER_ENABLED
#define FL_RTC_DRIVER_ENABLED
#define FL_SPI_DRIVER_ENABLED
#define FL_SVD_DRIVER_ENABLED
#define FL_U7816_DRIVER_ENABLED
#define FL_UART_DRIVER_ENABLED
#define FL_VREF_DRIVER_ENABLED
#define FL_WWDT_DRIVER_ENABLED
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33xx.h"
#include "fm33_assert.h"
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include "fm33lc0xx_fl_conf.h"
#include "fm33lc0xx_fl_def.h"
/* Macros ---------------------------------------------------------------------------------------------*/
/** @defgroup FL_Private_Macros FL Driver Library Private Macros
/** @defgroup FL_Exported_Macros FL Driver Library Exported Macros
* @{
*/
......@@ -92,7 +40,7 @@ extern "C" {
* @brief FM33LC0xx FL Driver Library version number
*/
#define __FM33LC0xx_FL_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __FM33LC0xx_FL_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
#define __FM33LC0xx_FL_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __FM33LC0xx_FL_VERSION_SUB2 (0x01) /*!< [15:0] sub2 version */
#define __FM33LC0xx_FL_VERSION ((__FM33LC0xx_FL_VERSION_MAIN << 24)\
|(__FM33LC0xx_FL_VERSION_SUB1 << 16)\
......@@ -108,44 +56,39 @@ extern "C" {
* @}
*/
/* Types ----------------------------------------------------------------------------------------------*/
/** @defgroup FL_ET_Return FL Exported Return Type Defines
/* Struct Defines -------------------------------------------------------------------------------------*/
/** @defgroup FL_ET_NVIC FL Driver Library NVIC Init Sturcture Defines
* @{
*/
typedef enum
typedef struct
{
FL_RESET = 0U,
FL_SET = !FL_RESET
} FL_FlagStatus, FL_ITStatus;
/** 中断抢占优先级 */
uint32_t preemptPriority;
typedef enum
{
FL_DISABLE = 0U,
FL_ENABLE = !FL_DISABLE
} FL_FunState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == FL_DISABLE) || ((STATE) == FL_ENABLE))
typedef enum
{
FL_FAIL = 0U,
FL_PASS = !FL_FAIL
} FL_ErrorStatus;
} FL_NVIC_ConfigTypeDef;
/**
* @}
*/
/* Exported Functions ---------------------------------------------------------------------------------*/
/** @defgroup FL_EF_DELAY Exported FL Driver Library Delay Support Functions
/** @defgroup FL_EF_DELAY FL Driver Library Exported Delay Support Functions
* @{
*/
void FL_DelayInit(void);
void FL_DelayUs(uint32_t count);
void FL_DelayMs(uint32_t count);
void FL_DelayUsStart(uint32_t count);
void FL_DelayMsStart(uint32_t count);
bool FL_DelayEnd(void);
/**
* @}
*/
/** @defgroup FL_EF_INIT Exported FL Driver Library Init Functions
/** @defgroup FL_EF_INIT FL Driver Library Exported Init Functions
* @{
*/
......@@ -155,130 +98,15 @@ void FL_Init(void);
* @}
*/
/* Post Includes --------------------------------------------------------------------------------------*/
/**
* @brief Include peripheral's header file
/** @defgroup FL_EF_NVIC FL Driver Library Exported NVIC Configuration Functions
* @{
*/
#if defined(USE_FULL_ASSERT)
#include "fm33_assert.h"
#endif /* USE_FULL_ASSERT */
#if defined(FL_ADC_DRIVER_ENABLED)
#include "fm33lc0xx_fl_adc.h"
#endif /* FL_ADC_DRIVER_ENABLED */
#if defined(FL_AES_DRIVER_ENABLED)
#include "fm33lc0xx_fl_aes.h"
#endif /* FL_AES_DRIVER_ENABLED */
#if defined(FL_ATIM_DRIVER_ENABLED)
#include "fm33lc0xx_fl_atim.h"
#endif /* FL_ATIM_DRIVER_ENABLED */
#if defined(FL_BSTIM32_DRIVER_ENABLED)
#include "fm33lc0xx_fl_bstim32.h"
#endif /* FL_BSTIM32_DRIVER_ENABLED */
#if defined(FL_COMP_DRIVER_ENABLED)
#include "fm33lc0xx_fl_comp.h"
#endif /* FL_COMP_DRIVER_ENABLED */
#if defined(FL_CRC_DRIVER_ENABLED)
#include "fm33lc0xx_fl_crc.h"
#endif /* FL_CRC_DRIVER_ENABLED */
#if defined(FL_DIVAS_DRIVER_ENABLED)
#include "fm33lc0xx_fl_divas.h"
#endif /* FL_DIVAS_DRIVER_ENABLED */
void FL_NVIC_Init(FL_NVIC_ConfigTypeDef *configStruct, IRQn_Type irq);
#if defined(FL_DMA_DRIVER_ENABLED)
#include "fm33lc0xx_fl_dma.h"
#endif /* FL_DMA_DRIVER_ENABLED */
#if defined(FL_EXTI_DRIVER_ENABLED)
#include "fm33lc0xx_fl_exti.h"
#endif /* FL_EXTI_DRIVER_ENABLED */
#if defined(FL_FLASH_DRIVER_ENABLED)
#include "fm33lc0xx_fl_flash.h"
#endif /* FL_FLASH_DRIVER_ENABLED */
#if defined(FL_GPIO_DRIVER_ENABLED)
#include "fm33lc0xx_fl_gpio.h"
#endif /* FL_GPIO_DRIVER_ENABLED */
#if defined(FL_GPTIM_DRIVER_ENABLED)
#include "fm33lc0xx_fl_gptim.h"
#endif /* FL_GPTIM_DRIVER_ENABLED */
#if defined(FL_I2C_DRIVER_ENABLED)
#include "fm33lc0xx_fl_i2c.h"
#endif /* FL_I2C_DRIVER_ENABLED */
#if defined(FL_IWDT_DRIVER_ENABLED)
#include "fm33lc0xx_fl_iwdt.h"
#endif /* FL_IWDT_DRIVER_ENABLED */
#if defined(FL_LCD_DRIVER_ENABLED)
#include "fm33lc0xx_fl_lcd.h"
#endif /* FL_LCD_DRIVER_ENABLED */
#if defined(FL_LPTIM32_DRIVER_ENABLED)
#include "fm33lc0xx_fl_lptim32.h"
#endif /* FL_LPTIM32_DRIVER_ENABLED */
#if defined(FL_LPUART_DRIVER_ENABLED)
#include "fm33lc0xx_fl_lpuart.h"
#endif /* FL_LPUART_DRIVER_ENABLED */
#if defined(FL_OPA_DRIVER_ENABLED)
#include "fm33lc0xx_fl_opa.h"
#endif /* FL_OPA_DRIVER_ENABLED */
#if defined(FL_PMU_DRIVER_ENABLED)
#include "fm33lc0xx_fl_pmu.h"
#endif /* FL_PMU_DRIVER_ENABLED */
#if defined(FL_RCC_DRIVER_ENABLED)
#include "fm33lc0xx_fl_rcc.h"
#endif /* FL_RCC_DRIVER_ENABLED */
#if defined(FL_RMU_DRIVER_ENABLED)
#include "fm33lc0xx_fl_rmu.h"
#endif /* FL_RMU_DRIVER_ENABLED */
#if defined(FL_RNG_DRIVER_ENABLED)
#include "fm33lc0xx_fl_rng.h"
#endif /* FL_RNG_DRIVER_ENABLED */
#if defined(FL_RTC_DRIVER_ENABLED)
#include "fm33lc0xx_fl_rtc.h"
#endif /* FL_RTC_DRIVER_ENABLED */
#if defined(FL_SPI_DRIVER_ENABLED)
#include "fm33lc0xx_fl_spi.h"
#endif /* FL_SPI_DRIVER_ENABLED */
#if defined(FL_SVD_DRIVER_ENABLED)
#include "fm33lc0xx_fl_svd.h"
#endif /* FL_SVD_DRIVER_ENABLED */
#if defined(FL_U7816_DRIVER_ENABLED)
#include "fm33lc0xx_fl_u7816.h"
#endif /* FL_U7816_DRIVER_ENABLED */
#if defined(FL_UART_DRIVER_ENABLED)
#include "fm33lc0xx_fl_uart.h"
#endif /* FL_UART_DRIVER_ENABLED */
#if defined(FL_VREF_DRIVER_ENABLED)
#include "fm33lc0xx_fl_vref.h"
#endif /* FL_VREF_DRIVER_ENABLED */
#if defined(FL_WWDT_DRIVER_ENABLED)
#include "fm33lc0xx_fl_wwdt.h"
#endif /* FL_WWDT_DRIVER_ENABLED */
/**
* @}
*/
#ifdef __cplusplus
}
......@@ -286,4 +114,4 @@ void FL_Init(void);
#endif /* __FM33LC0XX_FL_H */
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_adc.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -271,6 +271,7 @@ typedef struct
#define FL_ADC_INTERNAL_VREF1P2 (0x1U << 17U)
#define FL_ADC_INTERNAL_OPA1 (0x1U << 18U)
#define FL_ADC_INTERNAL_OPA2 (0x1U << 19U)
#define FL_ADC_ALL_CHANNEL (0xfffffU << 0U)
......@@ -1488,6 +1489,7 @@ __STATIC_INLINE uint32_t FL_ADC_GetSamplingInterval(ADC_Type *ADCx)
* @arg @ref FL_ADC_INTERNAL_VREF1P2
* @arg @ref FL_ADC_INTERNAL_OPA1
* @arg @ref FL_ADC_INTERNAL_OPA2
* @arg @ref FL_ADC_ALL_CHANNEL
* @retval None
*/
__STATIC_INLINE void FL_ADC_EnableSequencerChannel(ADC_Type *ADCx, uint32_t channel)
......@@ -1516,6 +1518,7 @@ __STATIC_INLINE void FL_ADC_EnableSequencerChannel(ADC_Type *ADCx, uint32_t chan
* @arg @ref FL_ADC_INTERNAL_VREF1P2
* @arg @ref FL_ADC_INTERNAL_OPA1
* @arg @ref FL_ADC_INTERNAL_OPA2
* @arg @ref FL_ADC_ALL_CHANNEL
* @retval None
*/
__STATIC_INLINE void FL_ADC_DisableSequencerChannel(ADC_Type *ADCx, uint32_t channel)
......@@ -1616,14 +1619,14 @@ __STATIC_INLINE void FL_ADC_WriteAnalogWDGHighThreshold(ADC_Type *ADCx, uint32_t
*/
__STATIC_INLINE uint32_t FL_ADC_ReadAnalogWDGHighThreshold(ADC_Type *ADCx)
{
return (uint32_t)(READ_BIT(ADCx->HLTR, 0xfffU) >> 16U);
return (uint32_t)(READ_BIT(ADCx->HLTR, (0xfffU << 16U)) >> 16U);
}
/**
* @}
*/
/** @defgroup ADC_FL_EF_Init Initialization and de-initialization functions
/** @defgroup ADC_FL_EF_Init ADC Initialization and de-initialization Functions
* @{
*/
FL_ErrorStatus FL_ADC_CommonDeInit(void);
......@@ -1652,4 +1655,4 @@ FL_ErrorStatus FL_ADC_CommonInit(FL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
#endif /* __FM33LC0XX_FL_ADC_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_aes.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -698,4 +698,4 @@ FL_ErrorStatus FL_AES_Init(AES_Type *AESx, FL_AES_InitTypeDef *AES_InitStructer)
#endif /* __FM33LC0XX_FL_AES_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_atim.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -3787,4 +3787,4 @@ FL_ErrorStatus FL_ATIM_BDTR_Init(ATIM_Type *TIMx, FL_ATIM_BDTR_InitTypeDef *TIM_
#endif /* __FM33LC0XX_FL_ATIM_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_bstim32.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -480,4 +480,4 @@ void FL_BSTIM32_StructInit(FL_BSTIM32_InitTypeDef *initStruct);
#endif /* __FM33LC0XX_FL_BSTIM32_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_comp.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -64,7 +64,7 @@ typedef struct
uint32_t digitalFilter;
/** 数字滤波器长度 */
uint32_t digitalFilterLen; //此芯片不可设
uint32_t digitalFilterLen; /* 此芯片不可设 */
} FL_COMP_InitTypeDef;
......@@ -569,4 +569,4 @@ FL_ErrorStatus FL_COMP_Init(COMP_Type *COMPx, FL_COMP_InitTypeDef *initStruct);
#endif /* __FM33LC0XX_FL_COMP_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_conf.h 0 → 100644
浏览文件 @ 48d43678
/**
*******************************************************************************************************
* @file fm33lc0xx_fl_conf.h
* @author FMSH Application Team
* @brief Header file of FL Driver Library Configurations
*******************************************************************************************************
* @attention
*
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
/* Define to prevent recursive inclusion --------------------------------------------------------------*/
#ifndef __FM33LC0XX_FL_CONF_H
#define __FM33LC0XX_FL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Defines --------------------------------------------------------------------------------------------*/
/**
* @brief List of drivers to be used.
*
* @note Uncomment following lines to disable specified driver.
*/
#define FL_ADC_DRIVER_ENABLED
#define FL_AES_DRIVER_ENABLED
#define FL_ATIM_DRIVER_ENABLED
#define FL_BSTIM32_DRIVER_ENABLED
#define FL_COMP_DRIVER_ENABLED
#define FL_CRC_DRIVER_ENABLED
#define FL_DIVAS_DRIVER_ENABLED
#define FL_DMA_DRIVER_ENABLED
#define FL_EXTI_DRIVER_ENABLED
#define FL_FLASH_DRIVER_ENABLED
#define FL_GPIO_DRIVER_ENABLED
#define FL_GPTIM_DRIVER_ENABLED
#define FL_I2C_DRIVER_ENABLED
#define FL_IWDT_DRIVER_ENABLED
#define FL_LCD_DRIVER_ENABLED
#define FL_LPTIM32_DRIVER_ENABLED
#define FL_LPUART_DRIVER_ENABLED
#define FL_OPA_DRIVER_ENABLED
#define FL_PMU_DRIVER_ENABLED
#define FL_RCC_DRIVER_ENABLED
#define FL_RMU_DRIVER_ENABLED
#define FL_RNG_DRIVER_ENABLED
#define FL_RTC_DRIVER_ENABLED
#define FL_SPI_DRIVER_ENABLED
#define FL_SVD_DRIVER_ENABLED
#define FL_U7816_DRIVER_ENABLED
#define FL_UART_DRIVER_ENABLED
#define FL_VREF_DRIVER_ENABLED
#define FL_WWDT_DRIVER_ENABLED
/* Device Includes ------------------------------------------------------------------------------------*/
/**
* @brief Include peripheral's header file
*/
#if defined(FL_ADC_DRIVER_ENABLED)
#include "fm33lc0xx_fl_adc.h"
#endif /* FL_ADC_DRIVER_ENABLED */
#if defined(FL_AES_DRIVER_ENABLED)
#include "fm33lc0xx_fl_aes.h"
#endif /* FL_AES_DRIVER_ENABLED */
#if defined(FL_ATIM_DRIVER_ENABLED)
#include "fm33lc0xx_fl_atim.h"
#endif /* FL_ATIM_DRIVER_ENABLED */
#if defined(FL_BSTIM32_DRIVER_ENABLED)
#include "fm33lc0xx_fl_bstim32.h"
#endif /* FL_BSTIM32_DRIVER_ENABLED */
#if defined(FL_COMP_DRIVER_ENABLED)
#include "fm33lc0xx_fl_comp.h"
#endif /* FL_COMP_DRIVER_ENABLED */
#if defined(FL_CRC_DRIVER_ENABLED)
#include "fm33lc0xx_fl_crc.h"
#endif /* FL_CRC_DRIVER_ENABLED */
#if defined(FL_DIVAS_DRIVER_ENABLED)
#include "fm33lc0xx_fl_divas.h"
#endif /* FL_DIVAS_DRIVER_ENABLED */
#if defined(FL_DMA_DRIVER_ENABLED)
#include "fm33lc0xx_fl_dma.h"
#endif /* FL_DMA_DRIVER_ENABLED */
#if defined(FL_EXTI_DRIVER_ENABLED)
#include "fm33lc0xx_fl_exti.h"
#endif /* FL_EXTI_DRIVER_ENABLED */
#if defined(FL_FLASH_DRIVER_ENABLED)
#include "fm33lc0xx_fl_flash.h"
#endif /* FL_FLASH_DRIVER_ENABLED */
#if defined(FL_GPIO_DRIVER_ENABLED)
#include "fm33lc0xx_fl_gpio.h"
#endif /* FL_GPIO_DRIVER_ENABLED */
#if defined(FL_GPTIM_DRIVER_ENABLED)
#include "fm33lc0xx_fl_gptim.h"
#endif /* FL_GPTIM_DRIVER_ENABLED */
#if defined(FL_I2C_DRIVER_ENABLED)
#include "fm33lc0xx_fl_i2c.h"
#endif /* FL_I2C_DRIVER_ENABLED */
#if defined(FL_IWDT_DRIVER_ENABLED)
#include "fm33lc0xx_fl_iwdt.h"
#endif /* FL_IWDT_DRIVER_ENABLED */
#if defined(FL_LCD_DRIVER_ENABLED)
#include "fm33lc0xx_fl_lcd.h"
#endif /* FL_LCD_DRIVER_ENABLED */
#if defined(FL_LPTIM32_DRIVER_ENABLED)
#include "fm33lc0xx_fl_lptim32.h"
#endif /* FL_LPTIM32_DRIVER_ENABLED */
#if defined(FL_LPUART_DRIVER_ENABLED)
#include "fm33lc0xx_fl_lpuart.h"
#endif /* FL_LPUART_DRIVER_ENABLED */
#if defined(FL_OPA_DRIVER_ENABLED)
#include "fm33lc0xx_fl_opa.h"
#endif /* FL_OPA_DRIVER_ENABLED */
#if defined(FL_PMU_DRIVER_ENABLED)
#include "fm33lc0xx_fl_pmu.h"
#endif /* FL_PMU_DRIVER_ENABLED */
#if defined(FL_RCC_DRIVER_ENABLED)
#include "fm33lc0xx_fl_rcc.h"
#endif /* FL_RCC_DRIVER_ENABLED */
#if defined(FL_RMU_DRIVER_ENABLED)
#include "fm33lc0xx_fl_rmu.h"
#endif /* FL_RMU_DRIVER_ENABLED */
#if defined(FL_RNG_DRIVER_ENABLED)
#include "fm33lc0xx_fl_rng.h"
#endif /* FL_RNG_DRIVER_ENABLED */
#if defined(FL_RTC_DRIVER_ENABLED)
#include "fm33lc0xx_fl_rtc.h"
#endif /* FL_RTC_DRIVER_ENABLED */
#if defined(FL_SPI_DRIVER_ENABLED)
#include "fm33lc0xx_fl_spi.h"
#endif /* FL_SPI_DRIVER_ENABLED */
#if defined(FL_SVD_DRIVER_ENABLED)
#include "fm33lc0xx_fl_svd.h"
#endif /* FL_SVD_DRIVER_ENABLED */
#if defined(FL_U7816_DRIVER_ENABLED)
#include "fm33lc0xx_fl_u7816.h"
#endif /* FL_U7816_DRIVER_ENABLED */
#if defined(FL_UART_DRIVER_ENABLED)
#include "fm33lc0xx_fl_uart.h"
#endif /* FL_UART_DRIVER_ENABLED */
#if defined(FL_VREF_DRIVER_ENABLED)
#include "fm33lc0xx_fl_vref.h"
#endif /* FL_VREF_DRIVER_ENABLED */
#if defined(FL_WWDT_DRIVER_ENABLED)
#include "fm33lc0xx_fl_wwdt.h"
#endif /* FL_WWDT_DRIVER_ENABLED */
#ifdef __cplusplus
}
#endif
#endif /* __FM33LC0XX_FL_CONF_H */
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_crc.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -471,4 +471,4 @@ FL_ErrorStatus FL_CRC_Init(CRC_Type *CRCx, FL_CRC_InitTypeDef *CRC_InitStruct);
#endif /* __FM33LC0XX_FL_CRC_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_def.h 0 → 100644
浏览文件 @ 48d43678
/**
*******************************************************************************************************
* @file fm33lc0xx_fl_def.h
* @author FMSH Application Team
* @brief Header file of FL Driver Library Defines
*******************************************************************************************************
* @attention
*
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
/* Define to prevent recursive inclusion --------------------------------------------------------------*/
#ifndef __FM33LC0XX_FL_DEF_H
#define __FM33LC0XX_FL_DEF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx.h"
#include "fm33_assert.h"
#include <stddef.h>
#include <stdint.h>
#include <stdbool.h>
/* Macros ---------------------------------------------------------------------------------------------*/
/** @defgroup FL_Exported_Macros FL Driver Library Private Macros
* @{
*/
/**
* @brief Bit-wise operation macros used by FL driver library functions
*/
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
#define READ_BIT(REG, BIT) ((REG) & (BIT))
#define CLEAR_REG(REG) ((REG) = (0x0))
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
#define READ_REG(REG) ((REG))
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
/**
* @}
*/
/* Types ----------------------------------------------------------------------------------------------*/
/** @defgroup FL_PT_Return FL Driver Library Private Return Type Defines
* @{
*/
typedef enum
{
FL_RESET = 0U,
FL_SET = !FL_RESET
} FL_FlagStatus, FL_ITStatus;
typedef enum
{
FL_DISABLE = 0U,
FL_ENABLE = !FL_DISABLE
} FL_FunState;
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == FL_DISABLE) || ((STATE) == FL_ENABLE))
typedef enum
{
FL_FAIL = 0U,
FL_PASS = !FL_FAIL
} FL_ErrorStatus;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __FM33LC0XX_FL_DEF_H */
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_divas.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -203,4 +203,4 @@ uint32_t FL_DIVAS_Hdiv_Calculation(DIV_Type *DIVx, int32_t DivisorEnd, int16_t D
#endif /* __FM33LC0XX_FL_DIVAS_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_dma.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -50,7 +50,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -1284,4 +1284,4 @@ FL_ErrorStatus FL_DMA_StartTransmission(DMA_Type *DMAx, FL_DMA_ConfigTypeDef *co
#endif /* __FM33LC0XX_FL_DMA_H*/
/*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2020-10-20*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_exti.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,10 +28,16 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
/** @defgroup EXTI EXTI
* @brief EXTI FL driver
* @{
*/
/* Exported types -------------------------------------------------------------------------------------*/
/** @defgroup EXTI_FL_ES_INIT EXTI Exported Init structures
* @{
......@@ -108,6 +114,9 @@ void FL_EXTI_StructInit(FL_EXTI_InitTypeDef *init);
* @}
*/
/**
* @}
*/
/**
* @}
......@@ -120,4 +129,4 @@ void FL_EXTI_StructInit(FL_EXTI_InitTypeDef *init);
#endif /* __FM33LC0XX_FL_EXTI_H */
/*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2021-03-16*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_flash.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -978,4 +978,4 @@ FL_ErrorStatus FL_FLASH_Program_Sector(FLASH_Type *FLASHx, uint32_t sectorNum, u
#endif /* __FM33LC0XX_FL_FLASH_H*/
/*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2020-12-15*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_gpio.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -289,37 +289,37 @@ typedef struct
#define FL_GPIO_FOUT0_SELECT_XTLF (0x0U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_RCLP (0x1U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_LPOSC (0x1U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_RCHF_DIV64 (0x2U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_LSCLK (0x3U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64 (0x4U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_RTCTM (0x5U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64 (0x6U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_RTCCLK64Hz (0x7U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_APBCLK_DIV64 (0x8U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_APB1CLK_DIV64 (0x8U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_PLLOUTPUT (0x9U << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_RC4M_PSC (0xaU << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_RCMF_PSC (0xaU << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_RCHF (0xbU << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_XTHF_DIV64 (0xcU << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_ADCCLK_DIV64 (0xdU << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_COMP1_OUTPUT (0xdU << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_CLK_8K (0xeU << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT0_SELECT_ADC_CLK (0xfU << GPIO_FOUTSEL_FOUT0_Pos)
#define FL_GPIO_FOUT1_SELECT_XTLF (0x0U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_RCLP (0x1U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_LPOSC (0x1U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_RCHF_DIV64 (0x2U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_LSCLK (0x3U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_AHBCLK_DIV64 (0x4U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_RTCTM (0x5U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64 (0x6U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_RTCCLK64Hz (0x7U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_APBCLK_DIV64 (0x8U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_APB1CLK_DIV64 (0x8U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_PLLOUTPUT (0x9U << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_RC4M_PSC (0xaU << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_RCMF_PSC (0xaU << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_RCHF (0xbU << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_XTHF_DIV64 (0xcU << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_COMP1_OUTPUT (0xdU << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64 (0xdU << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_CLK_8K (0xeU << GPIO_FOUTSEL_FOUT1_Pos)
#define FL_GPIO_FOUT1_SELECT_COMP2_OUTPUT (0xfU << GPIO_FOUTSEL_FOUT1_Pos)
......@@ -921,7 +921,14 @@ __STATIC_INLINE uint32_t FL_GPIO_GetOutputPin(GPIO_Type *GPIOx, uint32_t pin)
*/
__STATIC_INLINE void FL_GPIO_ToggleOutputPin(GPIO_Type *GPIOx, uint32_t pin)
{
WRITE_REG(GPIOx->DO, READ_REG(GPIOx->DO) ^ pin);
if(pin&GPIOx->DO)
{
WRITE_REG(GPIOx->DRST, pin);
}
else
{
WRITE_REG(GPIOx->DSET, pin);
}
}
/**
......@@ -1274,19 +1281,19 @@ __STATIC_INLINE uint32_t FL_GPIO_ReadEXTILines(GPIO_COMMON_Type *GPIOx)
* @param GPIOx GPIO Port
* @param select This parameter can be one of the following values:
* @arg @ref FL_GPIO_FOUT0_SELECT_XTLF
* @arg @ref FL_GPIO_FOUT0_SELECT_RCLP
* @arg @ref FL_GPIO_FOUT0_SELECT_LPOSC
* @arg @ref FL_GPIO_FOUT0_SELECT_RCHF_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_LSCLK
* @arg @ref FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_RTCTM
* @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_RTCCLK64Hz
* @arg @ref FL_GPIO_FOUT0_SELECT_APBCLK_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_APB1CLK_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT
* @arg @ref FL_GPIO_FOUT0_SELECT_RC4M_PSC
* @arg @ref FL_GPIO_FOUT0_SELECT_RCMF_PSC
* @arg @ref FL_GPIO_FOUT0_SELECT_RCHF
* @arg @ref FL_GPIO_FOUT0_SELECT_XTHF_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_ADCCLK_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_COMP1_OUTPUT
* @arg @ref FL_GPIO_FOUT0_SELECT_CLK_8K
* @arg @ref FL_GPIO_FOUT0_SELECT_ADC_CLK
* @retval None
......@@ -1302,19 +1309,19 @@ __STATIC_INLINE void FL_GPIO_SetFOUT0(GPIO_COMMON_Type *GPIOx, uint32_t select)
* @param GPIOx GPIO Port
* @retval Returned value can be one of the following values:
* @arg @ref FL_GPIO_FOUT0_SELECT_XTLF
* @arg @ref FL_GPIO_FOUT0_SELECT_RCLP
* @arg @ref FL_GPIO_FOUT0_SELECT_LPOSC
* @arg @ref FL_GPIO_FOUT0_SELECT_RCHF_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_LSCLK
* @arg @ref FL_GPIO_FOUT0_SELECT_AHBCLK_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_RTCTM
* @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_RTCCLK64Hz
* @arg @ref FL_GPIO_FOUT0_SELECT_APBCLK_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_APB1CLK_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_PLLOUTPUT
* @arg @ref FL_GPIO_FOUT0_SELECT_RC4M_PSC
* @arg @ref FL_GPIO_FOUT0_SELECT_RCMF_PSC
* @arg @ref FL_GPIO_FOUT0_SELECT_RCHF
* @arg @ref FL_GPIO_FOUT0_SELECT_XTHF_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_ADCCLK_DIV64
* @arg @ref FL_GPIO_FOUT0_SELECT_COMP1_OUTPUT
* @arg @ref FL_GPIO_FOUT0_SELECT_CLK_8K
* @arg @ref FL_GPIO_FOUT0_SELECT_ADC_CLK
*/
......@@ -1329,19 +1336,19 @@ __STATIC_INLINE uint32_t FL_GPIO_GetFOUT0(GPIO_COMMON_Type *GPIOx)
* @param GPIOx GPIO Port
* @param select This parameter can be one of the following values:
* @arg @ref FL_GPIO_FOUT1_SELECT_XTLF
* @arg @ref FL_GPIO_FOUT1_SELECT_RCLP
* @arg @ref FL_GPIO_FOUT1_SELECT_LPOSC
* @arg @ref FL_GPIO_FOUT1_SELECT_RCHF_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_LSCLK
* @arg @ref FL_GPIO_FOUT1_SELECT_AHBCLK_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_RTCTM
* @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_RTCCLK64Hz
* @arg @ref FL_GPIO_FOUT1_SELECT_APBCLK_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_APB1CLK_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT
* @arg @ref FL_GPIO_FOUT1_SELECT_RC4M_PSC
* @arg @ref FL_GPIO_FOUT1_SELECT_RCMF_PSC
* @arg @ref FL_GPIO_FOUT1_SELECT_RCHF
* @arg @ref FL_GPIO_FOUT1_SELECT_XTHF_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_COMP1_OUTPUT
* @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_CLK_8K
* @arg @ref FL_GPIO_FOUT1_SELECT_COMP2_OUTPUT
* @retval None
......@@ -1357,19 +1364,19 @@ __STATIC_INLINE void FL_GPIO_SetFOUT1(GPIO_COMMON_Type *GPIOx, uint32_t select)
* @param GPIOx GPIO Port
* @retval Returned value can be one of the following values:
* @arg @ref FL_GPIO_FOUT1_SELECT_XTLF
* @arg @ref FL_GPIO_FOUT1_SELECT_RCLP
* @arg @ref FL_GPIO_FOUT1_SELECT_LPOSC
* @arg @ref FL_GPIO_FOUT1_SELECT_RCHF_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_LSCLK
* @arg @ref FL_GPIO_FOUT1_SELECT_AHBCLK_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_RTCTM
* @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_RTCCLK64Hz
* @arg @ref FL_GPIO_FOUT1_SELECT_APBCLK_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_APB1CLK_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_PLLOUTPUT
* @arg @ref FL_GPIO_FOUT1_SELECT_RC4M_PSC
* @arg @ref FL_GPIO_FOUT1_SELECT_RCMF_PSC
* @arg @ref FL_GPIO_FOUT1_SELECT_RCHF
* @arg @ref FL_GPIO_FOUT1_SELECT_XTHF_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_COMP1_OUTPUT
* @arg @ref FL_GPIO_FOUT1_SELECT_ADCCLK_DIV64
* @arg @ref FL_GPIO_FOUT1_SELECT_CLK_8K
* @arg @ref FL_GPIO_FOUT1_SELECT_COMP2_OUTPUT
*/
......@@ -1955,5 +1962,5 @@ void FL_GPIO_ALLPIN_LPM_MODE(void);
#endif /* __FM33LC0XX_FL_GPIO_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/*************************Py_Code_Generator Version: 0.1-0.14-0.2 @ 2021-08-19*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_gptim.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -173,7 +173,7 @@ typedef struct
* ---------------------------------------------------
* ITR2 | 0 | BSTIM32_TRGO | 计数触发
* | 1 | LPUART2_RX | 宽度捕捉
* | 2 | RCLP | 周期捕捉
* | 2 | LPOSC | 周期捕捉
* | 3 | XTLF | 周期捕捉
* ---------------------------------------------------
* ITR3 | 0 | COMP1_TRGO | 计数触发
......@@ -198,7 +198,7 @@ typedef struct
* ---------------------------------------------------
* ITR2 | 0 | BSTIM32_TRGO | 计数触发
* | 1 | LSCLK | 周期捕捉
* | 2 | RCLP | 周期捕捉
* | 2 | LPOSC | 周期捕捉
* | 3 | XTLF | 周期捕捉
* ---------------------------------------------------
* ITR3 | 0 | COMP1_TRGO | 计数触发
......@@ -2955,4 +2955,4 @@ FL_ErrorStatus FL_GPTIM_ETR_Init(GPTIM_Type *TIMx, FL_GPTIM_ETR_InitTypeDef *etr
#endif /* __FM33LC0XX_FL_GPTIM_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_i2c.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -1862,4 +1862,4 @@ FL_ErrorStatus FL_I2C_MasterMode_Init(I2C_Type *I2Cx, FL_I2C_MasterMode_InitType
#endif /* __FM33LC0XX_FL_I2C_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-12*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_iwdt.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -306,4 +306,4 @@ FL_ErrorStatus FL_IWDT_Init(IWDT_Type *IWDTx, FL_IWDT_InitTypeDef *IWDT_InitStru
#endif /* __FM33LC0XX_FL_IWDT_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-27*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_lcd.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -1012,4 +1012,4 @@ void FL_LCD_8COMDisplay(uint32_t *display, uint8_t com, uint8_t seg, uint8_t sta
#endif /* __FM33LC0XX_FL_LCD_H*/
/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2021-02-02*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_lptim32.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -1170,4 +1170,4 @@ void FL_LPTIM32_OC_StructInit(FL_LPTIM32_OC_InitTypeDef *initStruct_OC);
#endif /* __FM33LC0XX_FL_LPTIM32_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_lpuart.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -1089,4 +1089,4 @@ FL_ErrorStatus FL_LPUART_Init(LPUART_Type *LPUARTx, FL_LPUART_InitTypeDef *initS
#endif /* __FM33LC0XX_FL_LPUART_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_opa.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -782,4 +782,4 @@ FL_ErrorStatus FL_OPA_Init(OPA_Type *OPAx, FL_OPA_InitTypeDef *initStruct);
#endif /* __FM33LC0XX_FL_OPA_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_pmu.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -953,4 +953,4 @@ void FL_PMU_StructInit(FL_PMU_SleepInitTypeDef *LPM_InitStruct);
#endif /* __FM33LC0XX_FL_PMU_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_rmu.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -59,7 +59,7 @@ extern "C" {
#define RMU_PDRCR_EN_Msk (0x1U << RMU_PDRCR_EN_Pos)
#define RMU_PDRCR_EN RMU_PDRCR_EN_Msk
#define RMU_BORCR_CFG_Pos (1U)
#define RMU_BORCR_CFG_Pos (2U)
#define RMU_BORCR_CFG_Msk (0x3U << RMU_BORCR_CFG_Pos)
#define RMU_BORCR_CFG RMU_BORCR_CFG_Msk
......@@ -284,4 +284,4 @@ __STATIC_INLINE void FL_RMU_BORPowerUp_Enable(RMU_Type *RMUx)
#endif /* __FM33LC0XX_FL_RMU_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_rng.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -261,4 +261,4 @@ uint32_t GetCrc32(uint32_t dataIn);
#endif /* __FM33LC0XX_FL_RNG_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_rtc.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -1386,4 +1386,4 @@ FL_ErrorStatus FL_RTC_ConfigTime(RTC_Type *RTCx, FL_RTC_InitTypeDef *initStruct)
#endif /* __FM33LC0XX_FL_RTC_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.1 @ 2020-09-22*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_spi.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -1080,7 +1080,7 @@ __STATIC_INLINE uint32_t FL_SPI_IsEnabledIT_RXComplete(SPI_Type *SPIx)
*/
__STATIC_INLINE void FL_SPI_SetFrameMode(SPI_Type *SPIx, uint32_t mode)
{
MODIFY_REG(SPIx->ISR, SPI_ISR_DCN_TX_Msk, mode);
WRITE_REG(SPIx->ISR, mode);
}
/**
......@@ -1249,4 +1249,4 @@ void FL_SPI_StructInit(FL_SPI_InitTypeDef *initStruct);
#endif /* __FM33LC0XX_FL_SPI_H*/
/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2020-10-20*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_svd.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -676,4 +676,4 @@ void FL_SVD_StructInit(FL_SVD_InitTypeDef *initStruct);
#endif /* __FM33LC0XX_FL_SVD_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-25*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_u7816.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -1068,4 +1068,4 @@ void FL_U7816_StructInit(FL_U7816_InitTypeDef *U7816_InitStruct);
#endif /* __FM33LC0XX_FL_U7816_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-27*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_uart.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -1250,4 +1250,4 @@ void FL_UART_StructInit(FL_UART_InitTypeDef *initStruct);
#endif /* __FM33LC0XX_FL_UART_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-27*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_vref.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -407,4 +407,4 @@ __STATIC_INLINE void FL_VREF_DisableVREFBuffer(VREF_Type *VREFx)
#endif /* __FM33LC0XX_FL_VREF_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Inc/fm33lc0xx_fl_wwdt.h
浏览文件 @ 48d43678
......@@ -6,15 +6,15 @@
*******************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
*******************************************************************************************************
*/
......@@ -28,7 +28,7 @@
extern "C" {
#endif
/* Includes -------------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
#include "fm33lc0xx_fl_def.h"
/** @addtogroup FM33LC0XX_FL_Driver
* @{
*/
......@@ -262,4 +262,4 @@ void FL_WWDT_StructInit(FL_WWDT_InitTypeDef *WWDT_InitStruct);
#endif /* __FM33LC0XX_FL_WWDT_H*/
/*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/SConscript
浏览文件 @ 48d43678
......@@ -14,6 +14,9 @@ Src/fm33lc0xx_fl_rcc.c
Src/fm33lc0xx_fl_gpio.c
""")
if GetDepend(['RT_USING_PIN']):
src += ['Src/fm33lc0xx_fl_exti.c']
if GetDepend(['RT_USING_SERIAL']):
src += ['Src/fm33lc0xx_fl_uart.c']
src += ['Src/fm33lc0xx_fl_lpuart.c']
......
bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/Src/fm33lc0xx_fl.c
浏览文件 @ 48d43678
......@@ -6,20 +6,21 @@
****************************************************************************************************
* @attention
*
* Copyright (c) [2019] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under the Mulan PSL v1.
* can use this software according to the terms and conditions of the Mulan PSL v1.
* You may obtain a copy of Mulan PSL v1 at:
* http://license.coscl.org.cn/MulanPSL
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
* PURPOSE.
* See the Mulan PSL v1 for more details.
* Copyright (c) [2021] [Fudan Microelectronics]
* THIS SOFTWARE is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*
****************************************************************************************************
*/
/* Includes -------------------------------------------------------------------------------------------*/
/* Includes ----------------------------------------------------------------------------------------*/
#include "fm33lc0xx_fl.h"
/** @addtogroup FL_EF_DELAY
......@@ -43,7 +44,7 @@ __WEAK void FL_DelayInit(void)
* @brief Provide block delay in microseconds.
* @note The function is declared as __WEAK to be overwritten in case of other
* implementation in user file.
* @param count specifies the delay count in microseconds.
* @param count specifies the delay count in microseconds.
* @retval None
*/
__WEAK void FL_DelayUs(uint32_t count)
......@@ -59,7 +60,7 @@ __WEAK void FL_DelayUs(uint32_t count)
* @brief Provide blocking delay in milliseconds.
* @note The function is declared as __WEAK to be overwritten in case of other
* implementation in user file.
* @param count specifies the delay count in milliseconds.
* @param count specifies the delay count in milliseconds.
* @retval None
*/
__WEAK void FL_DelayMs(uint32_t count)
......@@ -73,9 +74,9 @@ __WEAK void FL_DelayMs(uint32_t count)
/**
* @brief Provide no-blocking delay initialization in microseconds.
* @note Should be follow By while(!FL_DelayEnd()){ ** user code ** } immediately.
The function is declared as __WEAK to be overwritten in case of other
* The function is declared as __WEAK to be overwritten in case of other
* implementation in user file.
* @param count specifies the delay count in microseconds.
* @param count specifies the delay count in microseconds.
* @retval None
*/
__WEAK void FL_DelayUsStart(uint32_t count)
......@@ -91,7 +92,7 @@ __WEAK void FL_DelayUsStart(uint32_t count)
* @note Should be followed By while(!FL_DelayEnd()){ ** user code ** }.
* The function is declared as __WEAK to be overwritten in case of other
* implementation in user file.
* @param count specifies the delay count in milliseconds.
* @param count specifies the delay count in milliseconds.
* @retval None
*/
__WEAK void FL_DelayMsStart(uint32_t count)
......@@ -102,9 +103,9 @@ __WEAK void FL_DelayMsStart(uint32_t count)
/**
* @brief Showing if the no-blocking delay has ended.
* @note Should be used with FL_DelayMs/UsStart() function.
The function is declared as __WEAK to be overwritten in case of other
* The function is declared as __WEAK to be overwritten in case of other
* implementation in user file.
* @param count specifies the delay count in milliseconds.
* @param count specifies the delay count in milliseconds.
* @retval true - delay has ended
* false - delay is in progress
*/
......@@ -114,7 +115,7 @@ __WEAK bool FL_DelayEnd(void)
}
/**
*@}
* @}
*/
/** @addtogroup FL_EF_DELAY
......@@ -123,15 +124,41 @@ __WEAK bool FL_DelayEnd(void)
void FL_Init(void)
{
// Init delay support function
/* Init delay support function */
FL_DelayInit();
}
/**
*@}
* @}
*/
/** @addtogroup FL_EF_NVIC
* @{
*/
/**
* @brief Configure NVIC for specified Interrupt.
* @param configStruct NVIC configuration.
* @param irq Interrupt number.
* @retval None
*/
void FL_NVIC_Init(FL_NVIC_ConfigTypeDef *configStruct, IRQn_Type irq)
{
/* Check parameter */
if(configStruct->preemptPriority > 3)
{
configStruct->preemptPriority = 3;
}
NVIC_DisableIRQ(irq);
NVIC_SetPriority(irq, configStruct->preemptPriority);
NVIC_EnableIRQ(irq);
}
/**
* @}
*/
/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
bsp/fm33lc026/libraries/HAL_Drivers/SConscript
浏览文件 @ 48d43678
......@@ -8,6 +8,9 @@ cwd = GetCurrentDir()
src = Split("""
""")
if GetDepend(['RT_USING_PIN']):
src += ['drv_gpio.c']
if GetDepend(['RT_USING_SERIAL']):
src += ['drv_usart.c']
......
bsp/fm33lc026/libraries/HAL_Drivers/config/uart_config.h
浏览文件 @ 48d43678
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
......@@ -24,7 +24,7 @@ extern "C" {
.name = "uart0", \
.InitTypeDef = UART0, \
.irq_type = UART0_IRQn, \
.clockSrc = FL_RCC_UART0_CLK_SOURCE_APB1CLK, \
.clockSrc = FL_RCC_UART0_CLK_SOURCE_APB1CLK, \
}
#endif /* UART0_CONFIG */
#endif /* BSP_USING_UART0 */
......@@ -51,7 +51,7 @@ extern "C" {
}
#endif /* UART4_CONFIG */
#endif /* BSP_USING_UART4 */
#if defined(BSP_USING_UART5)
#ifndef UART5_CONFIG
#define UART5_CONFIG \
......@@ -61,8 +61,8 @@ extern "C" {
.irq_type = UART5_IRQn, \
}
#endif /* UART5_CONFIG */
#endif /* BSP_USING_UART5 */
#endif /* BSP_USING_UART5 */
#if defined(BSP_USING_LPUART0)
#ifndef LPUART0_CONFIG
#define LPUART0_CONFIG \
......@@ -73,7 +73,7 @@ extern "C" {
}
#endif /* LPUART0_CONFIG */
#endif /* BSP_USING_LPUART0 */
#if defined(BSP_USING_LPUART1)
#ifndef LPUART1_CONFIG
#define LPUART1_CONFIG \
......
bsp/fm33lc026/libraries/HAL_Drivers/drv_gpio.c 0 → 100644
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此差异已折叠。
bsp/fm33lc026/libraries/HAL_Drivers/drv_gpio.h 0 → 100644
浏览文件 @ 48d43678
此差异已折叠。
bsp/fm33lc026/project.uvprojx
浏览文件 @ 48d43678
此差异已折叠。
bsp/fm33lc026/rtconfig.h
浏览文件 @ 48d43678
此差异已折叠。
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