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202bde05
编写于
6月 13, 2020
作者:
armink_ztl
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电子邮件补丁
差异文件
[DeviceDriver][SPI] Fix 3 wires SPI issue.
上级
b2e30a7e
变更
1
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1 changed file
with
14 addition
and
12 deletion
+14
-12
components/drivers/include/drivers/spi.h
components/drivers/include/drivers/spi.h
+14
-12
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components/drivers/include/drivers/spi.h
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202bde05
/*
* Copyright (c) 2006-20
18
, RT-Thread Development Team
* Copyright (c) 2006-20
20
, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-11-23 Bernard Add extern "C"
* 2020-06-13 armink fix the 3 wires issue
*/
#ifndef __SPI_H__
...
...
@@ -18,8 +19,6 @@
extern
"C"
{
#endif
#define RT_SPI_CPHA (1<<0)
/* bit[0]:CPHA, clock phase */
#define RT_SPI_CPOL (1<<1)
/* bit[1]:CPOL, clock polarity */
/**
* At CPOL=0 the base value of the clock is zero
* - For CPHA=0, data are captured on the clock's rising edge (low->high transition)
...
...
@@ -32,26 +31,29 @@ extern "C"{
* - For CPHA=1, data are captured on clock's rising edge and data are propagated
* on a falling edge.
*/
#define RT_SPI_CPHA (1<<0)
/* bit[0]:CPHA, clock phase */
#define RT_SPI_CPOL (1<<1)
/* bit[1]:CPOL, clock polarity */
#define RT_SPI_LSB (0<<2)
/* bit[2]: 0-LSB */
#define RT_SPI_MSB (1<<2)
/* bit[2]: 1-MSB */
#define RT_SPI_MASTER (0<<3)
/* SPI master device */
#define RT_SPI_SLAVE (1<<3)
/* SPI slave device */
#define RT_SPI_CS_HIGH (1<<4)
/* Chipselect active high */
#define RT_SPI_NO_CS (1<<5)
/* No chipselect */
#define RT_SPI_3WIRE (1<<6)
/* SI/SO pin shared */
#define RT_SPI_READY (1<<7)
/* Slave pulls low to pause */
#define RT_SPI_MODE_MASK (RT_SPI_CPHA | RT_SPI_CPOL | RT_SPI_MSB | RT_SPI_SLAVE | RT_SPI_CS_HIGH | RT_SPI_NO_CS | RT_SPI_3WIRE | RT_SPI_READY)
#define RT_SPI_MODE_0 (0 | 0)
/* CPOL = 0, CPHA = 0 */
#define RT_SPI_MODE_1 (0 | RT_SPI_CPHA)
/* CPOL = 0, CPHA = 1 */
#define RT_SPI_MODE_2 (RT_SPI_CPOL | 0)
/* CPOL = 1, CPHA = 0 */
#define RT_SPI_MODE_3 (RT_SPI_CPOL | RT_SPI_CPHA)
/* CPOL = 1, CPHA = 1 */
#define RT_SPI_MODE_MASK (RT_SPI_CPHA | RT_SPI_CPOL | RT_SPI_MSB | RT_SPI_SLAVE)
#define RT_SPI_BUS_MODE_SPI (1<<0)
#define RT_SPI_BUS_MODE_QSPI (1<<1)
#define RT_SPI_CS_HIGH (1<<4)
/* Chipselect active high */
#define RT_SPI_NO_CS (1<<5)
/* No chipselect */
#define RT_SPI_3WIRE (1<<6)
/* SI/SO pin shared */
#define RT_SPI_READY (1<<7)
/* Slave pulls low to pause */
#define RT_SPI_BUS_MODE_SPI (1<<0)
#define RT_SPI_BUS_MODE_QSPI (1<<1)
/**
* SPI message structure
...
...
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