This is a guest-triggerable error, as seen when using Xenix 2.3.4.
Replace hw_error by LOG_UNIMPL, so that guests can continue.
With this patch, I can install and use Xenix 2.3.4a without any problem.
I can also start installation of Xenix 2.3.4q, but it fails due to not
finding an hard disk.
Signed-off-by: NHervé Poussineau <hpoussin@reactos.org>
Acked-by: NMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

acpi build tried to add offset of hpet table to rsdt even when hpet was
disabled.  If no tables follow hpet, this could lead to a malformed
rsdt.

Fix it up.

To avoid such errors in the future, rearrange code slightly to make it
clear that acpi_add_table stores the offset of the following table - not
of the previous one.
Reported-by: NTeLeMan <geleman@gmail.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
Cc: qemu-stable@nongnu.org

Object returned by object_property_get_qobject needs its reference counter to
be decremented when it is not needed by caller anymore.
Signed-off-by: NKirill Batuzov <batuzovk@ispras.ru>
Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

acpi_pcihp_get_bsel implements functionality of object_property_get_int for
specific property named ACPI_PCIHP_PROP_BSEL, but fails to decrement object's
reference counter properly. Rewriting it using generic object_property_get_int
serves two purposes: reducing code duplication and fixing memory leak.
Signed-off-by: NKirill Batuzov <batuzovk@ispras.ru>
Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

smbios: make qemu generate smbios tables.

# gpg: Signature made Mon 05 May 2014 12:20:27 BST using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"

* remotes/kraxel/tags/pull-smbios-2:
  SMBIOS: Build aggregate smbios tables and entry point
  SMBIOS: Use bitmaps to prevent incompatible comand line options
  SMBIOS: Use macro to set smbios defaults
  SMBIOS: Update header file definitions
  SMBIOS: Rename symbols to better reflect future use
  E820: Add interface for accessing e820 table
  pc: add 2.1 machine type
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

* remotes/rth/tgt-axp:
  target-alpha: Fix RDUSP
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

* remotes/riku/linux-user-for-upstream:
  linux-user: fix getrusage and wait4 failures with invalid rusage struct
  linux-user/elfload.c: Support ARM HWCAP2 flags
  linux-user/elfload.c: Fix A64 code which was incorrectly acting like A32
  linux-user/elfload.c: Update ARM HWCAP bits
  linux-user/elfload.c: Fix incorrect ARM HWCAP bits
  linux-user: remove configure option for setting uname release
  linux-user: move uname functions to uname.c
  linux-user: rename cpu-uname -> uname
  linux-user/signal.c: Set fault address in AArch64 signal info
  linux-user: avoid using glibc internals in _syscall5 and in definition of target_sigevent struct
  linux-user: Handle arches with llseek instead of _llseek
  linux-user: Add support for SCM_CREDENTIALS.
  linux-user: Move if-elses to a switch statement.
  linux-user: Assert stack used for auxvec, envp, argv
  linux-user: Add /proc/self/exe open forwarding
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Implementations of system calls getrusage and wait4 have not previously
handled correctly cases when incorrect address of struct rusage is
passed.
This change makes sure return values are correctly set for these cases.
Signed-off-by: NPetar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

Build an aggregate set of smbios tables and an entry point structure.

Insert tables and entry point into fw_cfg respectively under
"etc/smbios/smbios-tables" and "etc/smbios/smbios-anchor".

Machine types <= 2.0 will for now continue using field-by-field
overrides to SeaBIOS defaults, but for machine types 2.1 and up we
expect the BIOS to look for and use the aggregate tables generated
by this patch.
Signed-off-by: NGabriel Somlo <somlo@cmu.edu>

[ kraxel: fix 32bit build ]
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

Replace existing smbios_check_collision() functionality with
a pair of bitmaps: have_binfile_bitmap and have_fields_bitmap.
Bits corresponding to each smbios type are set by smbios_entry_add(),
which also uses the bitmaps to ensure that binary blobs and field
values are never accepted for the same type.

These bitmaps will also be used in the future to decide whether
or not to build a full table for a given smbios type.
Signed-off-by: NGabriel Somlo <somlo@cmu.edu>
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

The function smbios_set_defaults() uses a repeating code pattern
for each field. This patch replaces that pattern with a macro.

This patch contains no functional changes.
Signed-off-by: NGabriel Somlo <somlo@cmu.edu>
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

Add definitions for smbios entry point (anchor), and for type 2
(base board) structure which is required by some versions of OS X.

Remove definition for type 20 (memory device mapped address)
structure, which is no longer required as of smbios spec v2.5.

Update all other structure definitions to bring them into
compliance with smbios spec v2.8.

This patch contains no functional changes.
Signed-off-by: NGabriel Somlo <somlo@cmu.edu>
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

Rename the following symbols:

  - smbios_set_type1_defaults() to the more general smbios_set_defaults();
  - bool smbios_type1_defaults to the more general smbios_defaults;
  - smbios_get_table() to smbios_get_table_legacy();

This patch contains no functional changes.
Signed-off-by: NGabriel Somlo <somlo@cmu.edu>
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

Add the following two functions:

  - e820_get_num_entries() - query the size of the e820 table
  - e820_get_entry() - grab an entry matching a given set of criteria

This interface is currently necessary for creating type 19
(memory array mapped address) structures in smbios.
Signed-off-by: NGabriel Somlo <somlo@cmu.edu>
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

At the moment, 2.1 and 2.0 machines are identical.
As several people are working on incompatible changes
to the PC machine, collaboration will be made easier
by merging this place-holder.
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>

Commit 06ef8604 contained a typo.
Signed-off-by: NRichard Henderson <rth@twiddle.net>

The ARM kernel has chosen to spill into the HWCAP2 ELF feature bit flags
early, even though it hasn't yet exhausted all 32 bits of the HWCAP word.
Add support for setting this in the same way we do for HWCAP.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

The ARM target-specific code in elfload.c was incorrectly allowing
the 64-bit ARM target to use most of the existing 32-bit definitions:
most noticably this meant that our HWCAP bits passed to the guest
were wrong, and register handling when dumping core was totally
broken. Fix this by properly separating the 64 and 32 bit code,
since they have more differences than similarities.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Cc: qemu-stable@nongnu.org
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

The kernel has added support for a number of new ARM HWCAP bits;
add them to QEMU, including support for setting them where we have
a corresponding CPU feature bit.

We were also incorrectly setting the VFPv3D16 HWCAP -- this means
"only 16 D registers", not "supports 16-bit floating point format";
since QEMU always has 32 D registers for VFPv3, we can just remove
the line that incorrectly set this bit.

The kernel does not set the HWCAP_FPA even if it is providing FPA
emulation via nwfpe, so don't set this bit in QEMU either.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Cc: qemu-stable@nongnu.org
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

The ELF HWCAP bits for ARM features THUMBEE, NEON, VFPv3 and VFPv3D16 are
all off by one compared to the kernel definitions. Fix this discrepancy
and add in the missing CRUNCH bit which was the cause of the off-by-one
error. (We don't emulate any of the CPUs which have that weird hardware,
so it's otherwise uninteresting to us.)

Cc: qemu-stable@nongnu.org
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

--enable-uname-release was a rather heavyweight hammer, as it allows
providing values less that UNAME_MINIMUM_RELEASE. Also, it affects
all built linux-user targets, which in most cases is not what user
wants.

Now that we have UNAME_MINIMUM_RELEASE for all linux-user platforms,
we can drop --enable-uname-release and the related CONFIG_UNAME_RELEASE
define.

Users can still override the variable with QEMU_UNAME=2.6.32 or -r
command line option. If distributors need to update a minimum version
for a specific target, it can be done by updating UNAME_MINIMUM_RELEASE.
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

Make syscall.c slightly smaller by moving uname-related
functions to uname.c.
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

To move more uname related functions out of syscall.c,
rename cpu-uname.{c,h} to uname.{c.h}
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

Set the fault address correctly in the signal information passed
to a signal handler for AArch64 guests.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

Use the public sigset_t instead of the glibc specific internal
__sigset_t in _syscall.

Calculate the sigevent pad size is calculated in similar way as kernel
does it instead of using glibc internal field _pad.

This is needed for building with musl libc.
Signed-off-by: NNatanael Copa <ncopa@alpinelinux.org>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>

Recently merged kernel ports (such as OpenRISC and Meta) have an llseek
system call instead of _llseek. This is handled for the host
architecture by defining __NR__llseek as __NR_llseek, but not for the
target architecture.

Handle it in the same way for these architectures, defining
TARGET_NR__llseek as TARGET_NR_llseek.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Cc: Riku Voipio <riku.voipio@iki.fi>
Cc: Jia Liu <proljc@gmail.com>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

Signed-off-by: NHuw Davies <huw@codeweavers.com>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

This makes adding more message types cleaner.
Signed-off-by: NHuw Davies <huw@codeweavers.com>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

Assert that the amount of stack space used for auxvec, envp & argv
exactly matches the amount allocated. This catches if DLINFO_ITEMS isn't
updated when another NEW_AUX_ENT is added.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Cc: Riku Voipio <riku.voipio@iki.fi>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

QEMU already supports /proc/self/{maps,stat,auxv} so addition of
/proc/self/exe is rather trivial.

Fixes https://bugs.launchpad.net/qemu/+bug/1299190Signed-off-by: NMaxim Ostapenko <m.ostapenko@partner.samsung.com>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>

target-arm queue:
 * implement XScale cache lockdown cp15 ops
 * fix v7M CPUID base register
 * implement WFE and YIELD as yields for A64
 * fix A64 "BLR LR"
 * support Cortex-A57 in virt machine model
 * a few other minor AArch64 bugfixes

# gpg: Signature made Thu 01 May 2014 15:42:17 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-target-arm-20140501:
  hw/arm/virt: Add support for Cortex-A57
  hw/arm/virt: Put GIC register banks on 64K boundaries
  hw/arm/virt: Create the GIC ourselves rather than (ab)using a15mpcore_priv
  target-arm: Correct a comment refering to EL0
  target-arm: A64: Fix a typo when declaring TLBI ops
  target-arm: A64: Handle blr lr
  target-arm: Make vbar_write 64bit friendly on 32bit hosts
  target-arm: implement WFE/YIELD as a yield for AArch64
  armv7m_nvic: fix CPUID Base Register
  target-arm: Implement XScale cache lockdown operations as NOPs
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Block patches

# gpg: Signature made Wed 30 Apr 2014 19:19:32 BST using RSA key ID C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"

* remotes/kevin/tags/for-upstream: (31 commits)
  curl: Fix hang reading from slow connections
  curl: Ensure all informationals are checked for completion
  curl: Eliminate unnecessary use of curl_multi_socket_all
  curl: Remove unnecessary explicit calls to internal event handler
  curl: Remove erroneous sleep waiting for curl completion
  curl: Fix return from curl_read_cb with invalid state
  curl: Remove unnecessary use of goto
  curl: Fix long line
  block/vdi: Error out immediately in vdi_create()
  block/bochs: Fix error handling for seek_to_sector()
  qcow2: Check min_size in qcow2_grow_l1_table()
  qcow2: Catch bdrv_getlength() error
  block: Use correct width in format strings
  qcow2: Avoid overflow in alloc_clusters_noref()
  block: Use error_abort in bdrv_image_info_specific_dump()
  block: Fix open_flags in bdrv_reopen()
  Revert "block: another bdrv_append fix"
  block: Unlink temporary files in raw-posix/win32
  block: Remove BDRV_O_COPY_ON_READ for bs->file
  block: Create bdrv_backing_flags()
  ...
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Add helpers for enabling kvm capabilities and convert the existing
s390x and ppc users to use them.

# gpg: Signature made Wed 30 Apr 2014 14:48:45 BST using RSA key ID C6F02FAF
# gpg: Can't check signature: public key not found

* remotes/cohuck/tags/kvm_cap_helpers:
  ppc: use kvm_vcpu_enable_cap()
  s390x: use kvm_vcpu_enable_cap()
  kvm: add kvm_{vm,vcpu}_enable_cap
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

vga: add secondary stdvga variant

# gpg: Signature made Mon 28 Apr 2014 10:11:44 BST using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"

* remotes/kraxel/tags/pull-vga-2:
  add secondary-vga to display-vga test
  add display-vga test
  vga: add secondary stdvga variant
  vga: allow non-global vmstate
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Support the Cortex-A57 in the virt machine model.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Message-id: 1398362083-17737-4-git-send-email-peter.maydell@linaro.org

For an AArch64 CPU which supports 64K pages, having the GIC
register banks at 4K offsets is potentially awkward. Move
them out to being at 64K offsets. (This is harmless for
AArch32 CPUs and for AArch64 CPUs with 4K pages, so it is simpler
to use the same offsets everywhere than to try to use 64K offsets
only for AArch64 host CPUs.)
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Message-id: 1398362083-17737-3-git-send-email-peter.maydell@linaro.org

Rather than having the virt machine model create an a15mpcore_priv
device regardless of the actual CPU type in order to instantiate the GIC,
move to having the machine model create the GIC directly. This
corresponds to a system which uses a standalone GIC (eg the GIC-400)
rather than the one built in to the CPU core.

The primary motivation for this is to support the Cortex-A57,
which for a KVM configuration will use a GICv2, which is not
built into the CPU.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Message-id: 1398362083-17737-2-git-send-email-peter.maydell@linaro.org

Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1398926097-28097-5-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Harmless typo as opc1 defaults to zero and opc2 gets
re-declared to its correct value.
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Message-id: 1398926097-28097-4-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

For linked branches, updates to the link register happen
conceptually after the read of the branch target register.
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Cc: qemu-stable@nongnu.org
Message-id: 1398926097-28097-3-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>