- 14 12月, 2012 8 次提交
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由 Alexander Graf 提交于
The openpic and mpic reset handlers are almost identical. Combine them and extract the differences into state variables. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The openpic and mpic timer handling code is basically the same. Merge them. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The IRQ raise mechanisms of the OpenPIC and MPIC controllers is identical, just that the MPIC one can also raise critical interrupts. Combine those two and check for critical raise capability during runtime. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The "openpic" controller is currently using one big region and does subregion dispatching manually. Move this to the memory api. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The MPIC source irq handler suddenly became identical to the standard OpenPIC source irq handler. Combine them into the same function. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The openpic code was still using the old mmio memory api. Convert it to be a generic memory api user and clean up some code that becomes redundant that way. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
MPIC interrupt numbers in Linux (device tree) and in QEMU are different, because QEMU takes the sparseness of the IRQ number space into account. Remove that cleverness and instead assume a flat number space. This makes the code easier to understand, because we are actually aligned with Linux on the view of our worlds. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The openpic code had a few WIP bits left that nobody reanimated within the last few years. Remove that code. Signed-off-by: NAlexander Graf <agraf@suse.de> Acked-by: NHervé Poussineau <hpoussin@reactos.org>
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- 23 10月, 2012 1 次提交
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由 Avi Kivity 提交于
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 16 8月, 2012 1 次提交
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由 Bharat Bhushan 提交于
Linux mpic driver uses (changes may be in pipeline to get upstreamed soon) BRR1. This patch adds the support to emulate readonly FSL BRR1 register. Currently QEMU does not fully emulate any version on MPIC, so the MPIC Major number and Minor number are set to 0. Signed-off-by: NBharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 15 3月, 2012 1 次提交
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由 Alexander Graf 提交于
After commit 5312bd8b we got memory region relative offsets into our mmio callbacks instead of page boundary based offsets. This broke the OpenPIC emulation which expected offsets to be on page boundary and substracted its region offset manually. This patch gets rid of that manual substraction and lets the memory api do its magic instead. Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 28 1月, 2012 1 次提交
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由 Anthony Liguori 提交于
bus is always NULL so the code in this if clause is dead (and therefore untested). Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 06 10月, 2011 9 次提交
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由 Alexander Graf 提交于
The helper function write_IRQreg was always called with a specific argument on the type of register to access. Inside the function we were simply doing a switch on that constant argument again. It's a lot easier to just unfold this into two separate functions and call each individually. Reported-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The helper function read_IRQreg was always called with a specific argument on the type of register to access. Inside the function we were simply doing a switch on that constant argument again. It's a lot easier to just unfold this into two separate functions and call each individually. Reported-by: NBlue Swirl <blauwirbel@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The MPIC emulation is now capable of handling up to 32 CPUs. Reflect that in the code exporting the numbers out and fix an integer overflow while at it. Signed-off-by: NAlexander Graf <agraf@suse.de> --- v1 -> v2: - Max cpus is 15 due to cINT routing - Report nb_cpus not MAX_CPUS in MPIC capabilities
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由 Alexander Graf 提交于
The bit definitions for critical interrupt routing are in PowerPC order (most significant bit is 0), while we end up shifting it with normal bit order. Turn the numbers around so we actually end up fetching the right ones. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The IPI dispatch registers are write only according to every MPIC spec I have found. So instead of pretending you could read back something from them, better not handle them at all. Reported-by: NElie Richa <richa@adacore.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
We use the IDE register with IPIs as a mask to keep track which processors have already acknowledged the respective interrupt. So we need to initialize it to 0 to make sure that it doesn't accidently fire an IPI on CPU0 when the first IPI is triggered. Reported-by: NElie Richa <richa@adacore.com> Signed-off-by: NAlexander Graf <agraf@suse.de> --- v2 -> v3: - fix IDE IPI reset
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由 Alexander Graf 提交于
The current IPI support in the MPIC code is incomplete and doesn't work. This code adds proper support for IPIs in MPIC by using the IDE register to remember which CPUs IPIs are still outstanding to. New triggers through the IPI trigger register only add to the list of CPUs we want to IPI. Signed-off-by: NAlexander Graf <agraf@suse.de> --- v1 -> v2: - Use MAX_IPI instead of hardcoded 4 Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The MPIC exports a page for each CPU that it controls. To support more than one CPU, we need to also reserve the MMIO space according to the amount of CPUs we want to support. Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Alexander Graf 提交于
The MPIC exports a register set for each CPU connected to it. They can all be accessed through specific registers or using a shadow page that is mapped differently depending on which CPU accesses it. This patch implements the shadow map, making it possible for guests to access the CPU local registers using the same address on each CPU. Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 02 10月, 2011 1 次提交
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由 Fabien Chouteau 提交于
This patch converts mpic to the new memory API (through old mmio). Signed-off-by: NFabien Chouteau <chouteau@adacore.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 21 8月, 2011 1 次提交
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由 Anthony Liguori 提交于
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 08 8月, 2011 2 次提交
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由 Avi Kivity 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Avi Kivity 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 11 12月, 2010 2 次提交
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由 Alexander Graf 提交于
This patch replaces explicit bswaps with endianness hints to the mmio layer. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Alexander Graf 提交于
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 22 11月, 2010 1 次提交
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由 Stefan Weil 提交于
There is no need for these type casts (as other existing code shows). So re-write the first argument without type cast (and remove a related TODO comment). Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: NStefan Weil <weil@mail.berlios.de> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 12 7月, 2010 1 次提交
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由 Isaku Yamahata 提交于
Don't overwrite pci header type. Otherwise, multi function bit which pci_init_header_type() sets appropriately is lost. Anyway PCI_HEADER_TYPE_NORMAL is zero, so it is unnecessary to zero which is already zero cleared. how to test: run qemu and issue info pci to see whether a device in question is normal device, not pci-to-pci bridge. This is handy because guest os isn't required. tested changes: The following files are covered by using following commands. sparc64-softmmu apb_pci.c, vga-pci.c, cmd646.c, ne2k_pci.c, sun4u.c ppc-softmmu grackle_pci.c, cmd646.c, ne2k_pci.c, vga-pci.c, macio.c ppc-softmmu -M mac99 unin_pci.c(uni-north, uni-north-agp) ppc64-softmmu pci-ohci, ne2k_pci, vga-pci, unin_pci.c(u3-agp) x86_64-softmmu acpi_piix4.c, ide/piix.c, piix_pci.c -vga vmware vmware_vga.c -watchdog i6300esb wdt_i6300esb.c -usb usb-uhci.c -sound ac97 ac97.c -nic model=rtl8139 rtl8139.c -nic model=pcnet pcnet.c -balloon virtio virtio-pci.c: untested changes: The following changes aren't tested. prep_pci.c: ppc-softmmu -M prep should cover, but core dumped. unin_pci.c(uni-north-pci): the caller is commented out. openpic.c: the caller is commented out in ppc_prep.c Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 06 7月, 2010 1 次提交
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由 Alex Williamson 提交于
When available, we'd like to be able to access the DeviceState when registering a savevm. For buses with a get_dev_path() function, this will allow us to create more unique savevm id strings. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 30 3月, 2010 1 次提交
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由 Blue Swirl 提交于
Replace TARGET_PAGE_SIZE with 4096. Make byte swapping unconditional since PPC is big endian. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 19 12月, 2009 2 次提交
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由 Aurelien Jarno 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Alexander Graf 提交于
When lowering an IRQ line, we search for the line we're supposed to lower. Usually we run into an optimization there that queues up interrupts. This queue ends with -1. Unfortunately we didn't set the first item to -1. This patch fixes this, making interrupts work on PPC64. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 15 11月, 2009 1 次提交
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由 Blue Swirl 提交于
Only two callers of pci_create_simple/pci_register_device bothered to check the return value. Other cases were prone to crashing with spurious NULL pointer dereferences. Make QEMU exit with an error message when devfn is attempted to be duplicated, also applies to case when the bus is full. Remove checks. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 09 11月, 2009 2 次提交
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由 Isaku Yamahata 提交于
This patch is preliminary for 64 bit BAR support. Introduce dedicated type, pcibus_t, to represent pci bus address/size instead of uint32_t. Later this type will be changed to uint64_t. Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Isaku Yamahata 提交于
make constants for pci base address match pci_regs.h by renaming PCI_ADDRESS_SPACE_xxx to PCI_BASE_ADDRESS_SPACE_xxx. Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp> Acked-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 07 11月, 2009 1 次提交
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由 Blue Swirl 提交于
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 02 10月, 2009 2 次提交
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由 Anthony Liguori 提交于
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b. Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 malc 提交于
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: Nmalc <av1474@comtv.ru>
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- 26 8月, 2009 1 次提交
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由 Blue Swirl 提交于
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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