- 05 4月, 2022 7 次提交
-
-
由 Victor Toso 提交于
The example output is missing the mandatory member @vcpu. Fix it. Signed-off-by: NVictor Toso <victortoso@redhat.com> Message-Id: <20220331190633.121077-8-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
由 Victor Toso 提交于
The example output is missing the mandatory member @last-mode in the return value. Fix it. Signed-off-by: NVictor Toso <victortoso@redhat.com> Message-Id: <20220331190633.121077-7-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
由 Victor Toso 提交于
The return value is missing the mandatory member @websocket. Fix it. Signed-off-by: NVictor Toso <victortoso@redhat.com> Message-Id: <20220331190633.121077-6-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
由 Victor Toso 提交于
Example output is missing mandatory members @migrated and @mouse-mode. Fix it. Signed-off-by: NVictor Toso <victortoso@redhat.com> Message-Id: <20220331190633.121077-5-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
由 Victor Toso 提交于
Example output is missing mandatory member @detect_zeroes. Fix it. Signed-off-by: NVictor Toso <victortoso@redhat.com> Message-Id: <20220331190633.121077-4-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
由 Victor Toso 提交于
Both examples outputs are using @data member for the arguments. This is wrong. The expected member for the QMP is @arguments. Fix it. Signed-off-by: NVictor Toso <victortoso@redhat.com> Message-Id: <20220331190633.121077-3-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
由 Victor Toso 提交于
Example output has the optional member @dnssearch as string type. It should be an array of String objects instead. Fix it. For reference, see NetdevUserOptions. Signed-off-by: NVictor Toso <victortoso@redhat.com> Message-Id: <20220401110712.26911-1-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> [Commit message tweaked for precision] Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
- 04 4月, 2022 4 次提交
-
-
https://github.com/legoater/qemu由 Peter Maydell 提交于
ppc-7.0 queue: * Coverity fixes * Fix for a memory leak issue # gpg: Signature made Mon 04 Apr 2022 09:45:51 BST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-ppc-20220404' of https://github.com/legoater/qemu: linux-user/ppc: Narrow type of ccr in save_user_regs ppc/pnv: Fix number of registers in the PCIe controller on POWER9 hw/ppc: free env->tb_env in spapr_unrealize_vcpu() Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Richard Henderson 提交于
Coverity warns that we shift a 32-bit value by N, and then accumulate it into a 64-bit type (target_ulong on ppc64). The ccr is always 8 * 4-bit fields, and thus is always a 32-bit quantity; narrow the type to avoid the warning. Fixes: Coverity CID 1487223 Signed-off-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20220401191643.330393-1-richard.henderson@linaro.org> Signed-off-by: NCédric Le Goater <clg@kaod.org>
-
由 Frederic Barrat 提交于
The spec defines 3 registers, even though only index 0 and 2 are valid on POWER9. The same model is used on POWER10. Register 1 is defined there but we currently don't use it in skiboot. So we can keep reporting an error on write. Reported by Coverity (CID 1487176). Fixes: 4f9924c4 ("ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge") Suggested-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NFrederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: NDaniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220401091925.770803-1-fbarrat@linux.ibm.com> Signed-off-by: NCédric Le Goater <clg@kaod.org>
-
由 Daniel Henrique Barboza 提交于
The timebase is allocated during spapr_realize_vcpu() and it's not freed. This results in memory leaks when doing vcpu unplugs: ==636935== ==636935== 144 (96 direct, 48 indirect) bytes in 1 blocks are definitely lost in loss record 6 ,461 of 8,135 ==636935== at 0x4897468: calloc (vg_replace_malloc.c:760) ==636935== by 0x5077213: g_malloc0 (in /usr/lib64/libglib-2.0.so.0.6400.4) ==636935== by 0x507757F: g_malloc0_n (in /usr/lib64/libglib-2.0.so.0.6400.4) ==636935== by 0x93C3FB: cpu_ppc_tb_init (ppc.c:1066) ==636935== by 0x97BC2B: spapr_realize_vcpu (spapr_cpu_core.c:268) ==636935== by 0x97C01F: spapr_cpu_core_realize (spapr_cpu_core.c:337) ==636935== by 0xD4626F: device_set_realized (qdev.c:531) ==636935== by 0xD55273: property_set_bool (object.c:2273) ==636935== by 0xD523DF: object_property_set (object.c:1408) ==636935== by 0xD588B7: object_property_set_qobject (qom-qobject.c:28) ==636935== by 0xD52897: object_property_set_bool (object.c:1477) ==636935== by 0xD4579B: qdev_realize (qdev.c:333) ==636935== This patch adds a cpu_ppc_tb_free() helper in hw/ppc/ppc.c to allow us to free the timebase. This leak is then solved by calling cpu_ppc_tb_free() in spapr_unrealize_vcpu(). Fixes: 6f4b5c3e ("spapr: CPU hot unplug support") Signed-off-by: NDaniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Message-Id: <20220329124545.529145-2-danielhb413@gmail.com> Signed-off-by: NCédric Le Goater <clg@kaod.org>
-
- 02 4月, 2022 2 次提交
-
-
https://gitlab.com/thuth/qemu由 Peter Maydell 提交于
* Fix some compilation issues * Fix overflow calculation in s390x emulation * Update location of lockdown.yml in MAINTAINERS file # gpg: Signature made Fri 01 Apr 2022 12:27:38 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-04-01' of https://gitlab.com/thuth/qemu: trace: fix compilation with lttng-ust >= 2.13 9p: move P9_XATTR_SIZE_MAX from 9p.h to 9p.c meson.build: Fix dependency of page-vary-common.c to config-poison.h target/s390x: Fix determination of overflow condition code after subtraction target/s390x: Fix determination of overflow condition code after addition misc: Fixes MAINTAINERS's path .github/workflows/lockdown.yml Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Peter Maydell 提交于
Merge tag 'pull-target-arm-20220401' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * target/arm: Fix some bugs in secure EL2 handling * target/arm: Fix assert when !HAVE_CMPXCHG128 * MAINTAINERS: change Fred Konrad's email address # gpg: Signature made Fri 01 Apr 2022 15:59:59 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20220401' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: Don't use DISAS_NORETURN in STXP !HAVE_CMPXCHG128 codegen MAINTAINERS: change Fred Konrad's email address target/arm: Determine final stage 2 output PA space based on original IPA target/arm: Take VSTCR.SW, VTCR.NSW into account in final stage 2 walk target/arm: Check VSTCR.SW when assigning the stage 2 output PA space target/arm: Fix MTE access checks for disabled SEL2 Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 01 4月, 2022 22 次提交
-
-
由 Peter Maydell 提交于
Sixth RISC-V PR for QEMU 7.0 This is a last minute RISC-V PR for 7.0. It includes a fix to avoid leaking no translation TLB entries. This incorrectly cached uncachable baremetal entries. This would break Linux boot while single stepping. As the fix is pretty straight forward (flush the cache more often) it's being pulled in for 7.0. At the same time I have included a RISC-V vector extension fixup patch. # gpg: Signature made Fri 01 Apr 2022 00:33:58 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * tag 'pull-riscv-to-apply-20220401' of github.com:alistair23/qemu: target/riscv: rvv: Add missing early exit condition for whole register load/store target/riscv: Avoid leaking "no translation" TLB entries Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Peter Maydell 提交于
In gen_store_exclusive(), if the host does not have a cmpxchg128 primitive then we generate bad code for STXP for storing two 64-bit values. We generate a call to the exit_atomic helper, which never returns, and set is_jmp to DISAS_NORETURN. However, this is forgetting that we have already emitted a brcond that jumps over this call for the case where we don't hold the exclusive. The effect is that we don't generate any code to end the TB for the exclusive-not-held execution path, which falls into the "exit with TB_EXIT_REQUESTED" code that gen_tb_end() emits. This then causes an assert at runtime when cpu_loop_exec_tb() sees an EXIT_REQUESTED TB return that wasn't for an interrupt or icount. In particular, you can hit this case when using the clang sanitizers and trying to run the xlnx-versal-virt acceptance test in 'make check-acceptance'. This bug was masked until commit 848126d1 ("meson: move int128 checks from configure") because we used to set CONFIG_CMPXCHG128=1 and avoid the buggy codepath, but after that we do not. Fix the bug by not setting is_jmp. The code after the exit_atomic call up to the fail_label is dead, but TCG is smart enough to eliminate it. We do need to set 'tmp' to some valid value, though (in the same way the exit_atomic-using code in tcg/tcg-op.c does). Resolves: https://gitlab.com/qemu-project/qemu/-/issues/953Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20220331150858.96348-1-peter.maydell@linaro.org
-
由 Frederic Konrad 提交于
frederic.konrad@adacore.com and konrad@adacore.com will stop working starting 2022-04-01. Use my personal email instead. Signed-off-by: NFrederic Konrad <frederic.konrad@adacore.com> Reviewed-by: NFabien Chouteau <chouteau@adacore.com <clg@kaod.org>> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1648643217-15811-1-git-send-email-frederic.konrad@adacore.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Idan Horowitz 提交于
As per the AArch64.S2Walk() pseudo-code in the ARMv8 ARM, the final decision as to the output address's PA space based on the SA/SW/NSA/NSW bits needs to take the input IPA's PA space into account, and not the PA space of the result of the stage 2 walk itself. Signed-off-by: NIdan Horowitz <idan.horowitz@gmail.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20220327093427.1548629-4-idan.horowitz@gmail.com [PMM: fixed commit message typo] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Idan Horowitz 提交于
As per the AArch64.SS2InitialTTWState() psuedo-code in the ARMv8 ARM the initial PA space used for stage 2 table walks is assigned based on the SW and NSW bits of the VSTCR and VTCR registers. This was already implemented for the recursive stage 2 page table walks in S1_ptw_translate(), but was missing for the final stage 2 walk. Signed-off-by: NIdan Horowitz <idan.horowitz@gmail.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20220327093427.1548629-3-idan.horowitz@gmail.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Idan Horowitz 提交于
As per the AArch64.SS2OutputPASpace() psuedo-code in the ARMv8 ARM when the PA space of the IPA is non secure, the output PA space is secure if and only if all of the bits VTCR.<NSW, NSA>, VSTCR.<SW, SA> are not set. Signed-off-by: NIdan Horowitz <idan.horowitz@gmail.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20220327093427.1548629-2-idan.horowitz@gmail.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Idan Horowitz 提交于
While not mentioned anywhere in the actual specification text, the HCR_EL2.ATA bit is treated as '1' when EL2 is disabled at the current security state. This can be observed in the psuedo-code implementation of AArch64.AllocationTagAccessIsEnabled(). Signed-off-by: NIdan Horowitz <idan.horowitz@gmail.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20220328173107.311267-1-idan.horowitz@gmail.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Marc-André Lureau 提交于
On Fedora 36, with lttng-ust 2.13.1, compilation fails with: In file included from trace/trace-ust-all.h:49085, from trace/trace-ust-all.c:13: /usr/include/lttng/tracepoint-event.h:67:10: error: #include expects "FILENAME" or <FILENAME> 67 | #include LTTNG_UST_TRACEPOINT_INCLUDE | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ In lttng-ust commit 41858e2b6e8 ("Fix: don't do macro expansion in tracepoint file name") from 2012, starting from lttng-ust 2.1, the API was changed to expect TRACEPOINT_INCLUDE to be defined as a string. In lttng-ust commit d2966b4b0b2 ("Remove TRACEPOINT_INCLUDE_FILE macro"), in 2021, the compatibility macro was removed. Use the "new" API from 2012, and bump the version requirement to 2.1 to fix compilation with >= 2.13. According to repology, all distributions we support have >= 2.1 (centos 8 has oldest with 2.8.1 afaict) Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Message-Id: <20220328084717.367993-2-marcandre.lureau@redhat.com> Signed-off-by: NThomas Huth <thuth@redhat.com>
-
由 Will Cohen 提交于
The patch set adding 9p functionality to darwin introduced an issue where limits.h, which defines XATTR_SIZE_MAX, is included in 9p.c, though the referenced constant is needed in 9p.h. This commit fixes that issue by moving the definition of P9_XATTR_SIZE_MAX, which uses XATTR_SIZE_MAX, to also be in 9p.c. Additionally, this commit moves the location of the system headers include in 9p.c to occur before the project headers (except osdep.h). Resolves: https://gitlab.com/qemu-project/qemu/-/issues/950 Fixes: 38d7fd68 ("9p: darwin: Move XATTR_SIZE_MAX->P9_XATTR_SIZE_MAX") Signed-off-by: NWill Cohen <wwcohen@gmail.com> Message-Id: <20220331182651.887-1-wwcohen@gmail.com> [thuth: Adjusted placement of osdep.h] Signed-off-by: NThomas Huth <thuth@redhat.com>
-
由 Thomas Huth 提交于
Before compiling page-vary-common.c, we have to make sure that config-poison.h has been generated (which is in the "genh" list). Signed-off-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/948 Message-Id: <20220330114808.942933-1-thuth@redhat.com> Signed-off-by: NThomas Huth <thuth@redhat.com>
-
由 Bruno Haible 提交于
Reported by Paul Eggert in https://lists.gnu.org/archive/html/bug-gnulib/2021-09/msg00050.html This program currently prints different results when run with TCG instead of running on real s390x hardware: #include <stdio.h> int overflow_32 (int x, int y) { int sum; return __builtin_sub_overflow (x, y, &sum); } int overflow_64 (long long x, long long y) { long sum; return __builtin_sub_overflow (x, y, &sum); } int a1 = 0; int b1 = -2147483648; long long a2 = 0L; long long b2 = -9223372036854775808L; int main () { { int a = a1; int b = b1; printf ("a = 0x%x, b = 0x%x\n", a, b); printf ("no_overflow = %d\n", ! overflow_32 (a, b)); } { long long a = a2; long long b = b2; printf ("a = 0x%llx, b = 0x%llx\n", a, b); printf ("no_overflow = %d\n", ! overflow_64 (a, b)); } } Signed-off-by: NBruno Haible <bruno@clisp.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/618 Message-Id: <20220323162621.139313-3-thuth@redhat.com> Signed-off-by: NThomas Huth <thuth@redhat.com>
-
由 Bruno Haible 提交于
This program currently prints different results when run with TCG instead of running on real s390x hardware: #include <stdio.h> int overflow_32 (int x, int y) { int sum; return ! __builtin_add_overflow (x, y, &sum); } int overflow_64 (long long x, long long y) { long sum; return ! __builtin_add_overflow (x, y, &sum); } int a1 = -2147483648; int b1 = -2147483648; long long a2 = -9223372036854775808L; long long b2 = -9223372036854775808L; int main () { { int a = a1; int b = b1; printf ("a = 0x%x, b = 0x%x\n", a, b); printf ("no_overflow = %d\n", overflow_32 (a, b)); } { long long a = a2; long long b = b2; printf ("a = 0x%llx, b = 0x%llx\n", a, b); printf ("no_overflow = %d\n", overflow_64 (a, b)); } } Signed-off-by: NBruno Haible <bruno@clisp.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/616 Message-Id: <20220323162621.139313-2-thuth@redhat.com> Signed-off-by: NThomas Huth <thuth@redhat.com>
-
由 Yonggang Luo 提交于
Signed-off-by: NYonggang Luo <luoyonggang@gmail.com> Message-Id: <20220323080755.156-4-luoyonggang@gmail.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NThomas Huth <thuth@redhat.com>
-
由 Peter Maydell 提交于
Merge tag 'trivial-branch-for-7.0-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging Trivial branch pull request 20220401 Fix sh4 linux-user build on Alpine and some trivial updates # gpg: Signature made Thu 31 Mar 2022 23:18:21 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * tag 'trivial-branch-for-7.0-pull-request' of https://gitlab.com/laurent_vivier/qemu: tests/lcitool: Do not use a hard-coded /usr/bin/python3 as python interpreter vhost-vdpa: fix typo in a comment target/sh4: Remove old README.sh4 file linux-user/sh4/termbits: Silence warning about TIOCSER_TEMT double definition Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Yueh-Ting (eop) Chen 提交于
According to v-spec (section 7.9): The instructions operate with an effective vector length, evl=NFIELDS*VLEN/EEW, regardless of current settings in vtype and vl. The usual property that no elements are written if vstart ≥ vl does not apply to these instructions. Instead, no elements are written if vstart ≥ evl. Signed-off-by: Neop Chen <eop.chen@sifive.com> Reviewed-by: NFrank Chang <frank.chang@sifive.com> Reviewed-by: NAlistair Francis <alistair.francis@wdc.com> Message-Id: <164762720573.18409.3931931227997483525-0@git.sr.ht> Signed-off-by: NAlistair Francis <alistair.francis@wdc.com>
-
由 Palmer Dabbelt 提交于
The ISA doesn't allow bare mappings to be cached, as the caches are translations and bare mppings are not translated. We cache these translations in QEMU in order to utilize the TLB code, but that leaks out to the guest. Suggested-by: phantom@zju.edu.cn # no name in the From field Fixes: 1e0d985f ("target/riscv: Only flush TLB if SATP.ASID changes") Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com> Reviewed-by: NAlistair Francis <alistair.francis@wdc.com> Message-Id: <20220330165913.8836-1-palmer@rivosinc.com> Signed-off-by: NAlistair Francis <alistair.francis@wdc.com>
-
由 Thomas Huth 提交于
When running "make lcitool-refresh", this currently uses the hard-coded /usr/bin/python3 from the script's shebang line for running Python. That's bad, since neither /usr/bin/python3 is guaranteed to exist, nor does it honor the python interpreter that the user might have chosen while running the "configure" script. Thus let's rather use $(PYTHON) in the Makefile, and improve the shebang line in the script in case someone runs this directly. Signed-off-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NDaniel P. Berrangé <berrange@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220329063958.262669-1-thuth@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
-
由 Stefano Garzarella 提交于
Replace vpda with vdpa. Signed-off-by: NStefano Garzarella <sgarzare@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220328152022.73245-1-sgarzare@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
-
由 Thomas Huth 提交于
This file didn't have any non-trivial update since it was initially added in 2006, and looking at the content, it seems incredibly outdated, saying e.g. "The sh4 target is not ready at all yet for integration in qemu" or "A sh4 user-mode has also somewhat started but will be worked on afterwards"... Sounds like nobody is interested in this README file anymore, so let's simply remove it now. Signed-off-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NYoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20220329151955.472306-1-thuth@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
-
由 Thomas Huth 提交于
Seen while compiling on Alpine: In file included from ../linux-user/strace.c:17: In file included from ../linux-user/qemu.h:11: In file included from ../linux-user/syscall_defs.h:1247: ../linux-user/sh4/termbits.h:276:10: warning: 'TIOCSER_TEMT' macro redefined [-Wmacro-redefined] # define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ ^ /usr/include/sys/ioctl.h:50:9: note: previous definition is here #define TIOCSER_TEMT 1 ^ 1 warning generated. Add the TARGET_ prefix here, too, like we do it on the other architectures. Signed-off-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: NLaurent Vivier <laurent@vivier.eu> Reviewed-by: NYoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20220330134302.979686-1-thuth@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
-
https://gitlab.com/rth7680/qemu由 Peter Maydell 提交于
Fix tcg/aarch64 buglet for Windows on ARM host (#947). # gpg: Signature made Thu 31 Mar 2022 18:05:46 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20220331' of https://gitlab.com/rth7680/qemu: tcg/aarch64: Use 'ull' suffix to force 64-bit constant Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Richard Henderson 提交于
Typo used only 'ul' suffix, which is still 32-bits for windows host. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/947Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
-
- 31 3月, 2022 5 次提交
-
-
git://repo.or.cz/qemu/armbru由 Peter Maydell 提交于
QAPI patches patches for 2022-03-31 # gpg: Signature made Thu 31 Mar 2022 11:51:34 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-qapi-2022-03-31' of git://repo.or.cz/qemu/armbru: qapi: fix example of dump-guest-memory qapi: fix example of ACPI_DEVICE_OST event qapi: ui examples: add missing @websocket member qapi: fix example of MEMORY_FAILURE qapi: run-state examples: add missing @timestamp qapi: fix examples: SHUTDOWN and RESET events qapi: fix example of FAILOVER_NEGOTIATED event qapi: fix example of UNPLUG_PRIMARY event qapi: fix example of MEMORY_DEVICE_SIZE_CHANGE event qapi: fix example of DUMP_COMPLETED event qapi: fix example of BLOCK_JOB_PENDING event qapi: fix example of BLOCK_IO_ERROR event qapi: fix example of BLOCK_IMAGE_CORRUPTED event qapi: BlockExportRemoveMode: move comments to TODO schemas: add missing vim modeline Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Victor Toso 提交于
Example output lacks mandatory member @paging. Provide it. Signed-off-by: NVictor Toso <victortoso@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Message-Id: <20220328140604.41484-15-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
由 Victor Toso 提交于
Example output lacks mandatory member @timestamp. Provide it. Event's @data member is missing @info object. Provide it. Signed-off-by: NVictor Toso <victortoso@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Message-Id: <20220328140604.41484-14-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
由 Victor Toso 提交于
The examples were missing mandatory member @websocket. Provide it. Signed-off-by: NVictor Toso <victortoso@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Message-Id: <20220328140604.41484-13-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-
由 Victor Toso 提交于
Example output lacks mandatory member @timestamp. Provide it. Example output lacks mandatory member flags.recursive. Provide it. Minor: Change quotes from '' to "" in @action-required member. Signed-off-by: NVictor Toso <victortoso@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Message-Id: <20220328140604.41484-12-victortoso@redhat.com> Reviewed-by: NMarkus Armbruster <armbru@redhat.com> [Commit message fixed up] Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
-