hw/arm_gic: Fix comparison with priority mask register
The GIC spec states that only interrupts with higher priority than the value in the GICC_PMR priority mask register are passed through to the processor. We were incorrectly allowing through interrupts with a priority equal to the specified value: correct the comparison operation to match the spec. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NIgor Mitsyanko <i.mitsyanko@samsung.com>
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