Fix off-by-one memory region sizes.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2931 c046a42c-6fe2-441c-8c8c-71466251a162

hw/arm_gic.c

@@ -532,10 +532,10 @@ qemu_irq *arm_gic_init(uint32_t base, qemu_irq parent_irq)
     if (base != 0xffffffff) {
         iomemtype = cpu_register_io_memory(0, gic_cpu_readfn,
                                            gic_cpu_writefn, s);
-        cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+        cpu_register_physical_memory(base, 0x00001000, iomemtype);
         iomemtype = cpu_register_io_memory(0, gic_dist_readfn,
                                            gic_dist_writefn, s);
-        cpu_register_physical_memory(base + 0x1000, 0x00000fff, iomemtype);
+        cpu_register_physical_memory(base + 0x1000, 0x00001000, iomemtype);
         s->base = base;
     } else {
         s->base = 0;

hw/arm_sysctl.c

@@ -202,7 +202,7 @@ void arm_sysctl_init(uint32_t base, uint32_t sys_id)
     s->sys_id = sys_id;
     iomemtype = cpu_register_io_memory(0, arm_sysctl_readfn,
                                        arm_sysctl_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     /* ??? Save/restore.  */
 }
 

hw/arm_timer.c

@@ -233,7 +233,7 @@ void sp804_init(uint32_t base, qemu_irq irq)
     s->timer[1] = arm_timer_init(1000000, qi[1]);
     iomemtype = cpu_register_io_memory(0, sp804_readfn,
                                        sp804_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     /* ??? Save/restore.  */
 }
 
@@ -301,7 +301,7 @@ void icp_pit_init(uint32_t base, qemu_irq *pic, int irq)
 
     iomemtype = cpu_register_io_memory(0, icp_pit_readfn,
                                        icp_pit_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     /* ??? Save/restore.  */
 }
 

hw/integratorcp.c

@@ -257,7 +257,7 @@ static void integratorcm_init(int memsz, uint32_t flash_offset)
 
     iomemtype = cpu_register_io_memory(0, integratorcm_readfn,
                                        integratorcm_writefn, s);
-    cpu_register_physical_memory(0x10000000, 0x007fffff, iomemtype);
+    cpu_register_physical_memory(0x10000000, 0x00800000, iomemtype);
     integratorcm_do_remap(s, 1);
     /* ??? Save/restore.  */
 }
@@ -390,7 +390,7 @@ static qemu_irq *icp_pic_init(uint32_t base,
     s->parent_fiq = parent_fiq;
     iomemtype = cpu_register_io_memory(0, icp_pic_readfn,
                                        icp_pic_writefn, s);
-    cpu_register_physical_memory(base, 0x007fffff, iomemtype);
+    cpu_register_physical_memory(base, 0x00800000, iomemtype);
     /* ??? Save/restore.  */
     return qi;
 }
@@ -454,7 +454,7 @@ static void icp_control_init(uint32_t base)
     s = (icp_control_state *)qemu_mallocz(sizeof(icp_control_state));
     iomemtype = cpu_register_io_memory(0, icp_control_readfn,
                                        icp_control_writefn, s);
-    cpu_register_physical_memory(base, 0x007fffff, iomemtype);
+    cpu_register_physical_memory(base, 0x00800000, iomemtype);
     s->base = base;
     /* ??? Save/restore.  */
 }

hw/pl011.c

@@ -232,7 +232,7 @@ void pl011_init(uint32_t base, qemu_irq irq,
     s = (pl011_state *)qemu_mallocz(sizeof(pl011_state));
     iomemtype = cpu_register_io_memory(0, pl011_readfn,
                                        pl011_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     s->base = base;
     s->irq = irq;
     s->chr = chr;

hw/pl050.c

@@ -131,7 +131,7 @@ void pl050_init(uint32_t base, qemu_irq irq, int is_mouse)
     s = (pl050_state *)qemu_mallocz(sizeof(pl050_state));
     iomemtype = cpu_register_io_memory(0, pl050_readfn,
                                        pl050_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     s->base = base;
     s->irq = irq;
     s->is_mouse = is_mouse;

hw/pl080.c

@@ -332,7 +332,7 @@ void *pl080_init(uint32_t base, qemu_irq irq, int nchannels)
     s = (pl080_state *)qemu_mallocz(sizeof(pl080_state));
     iomemtype = cpu_register_io_memory(0, pl080_readfn,
                                        pl080_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     s->base = base;
     s->irq = irq;
     s->nchannels = nchannels;

hw/pl110.c

@@ -407,7 +407,7 @@ void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq,
     s = (pl110_state *)qemu_mallocz(sizeof(pl110_state));
     iomemtype = cpu_register_io_memory(0, pl110_readfn,
                                        pl110_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     s->base = base;
     s->ds = ds;
     s->versatile = versatile;

hw/pl181.c

@@ -432,7 +432,7 @@ void pl181_init(uint32_t base, BlockDriverState *bd,
     s = (pl181_state *)qemu_mallocz(sizeof(pl181_state));
     iomemtype = cpu_register_io_memory(0, pl181_readfn,
                                        pl181_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     s->base = base;
     s->card = sd_init(bd);
     s->irq[0] = irq0;

hw/pl190.c

@@ -239,7 +239,7 @@ qemu_irq *pl190_init(uint32_t base, qemu_irq irq, qemu_irq fiq)
     s = (pl190_state *)qemu_mallocz(sizeof(pl190_state));
     iomemtype = cpu_register_io_memory(0, pl190_readfn,
                                        pl190_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     qi = qemu_allocate_irqs(pl190_set_irq, s, 32);
     s->base = base;
     s->irq = irq;

hw/pxa2xx.c

@@ -1725,7 +1725,7 @@ static struct pxa2xx_i2s_s *pxa2xx_i2s_init(target_phys_addr_t base,
 
     iomemtype = cpu_register_io_memory(0, pxa2xx_i2s_readfn,
                     pxa2xx_i2s_writefn, s);
-    cpu_register_physical_memory(s->base & 0xfff00000, 0xfffff, iomemtype);
+    cpu_register_physical_memory(s->base & 0xfff00000, 0x100000, iomemtype);
 
     register_savevm("pxa2xx_i2s", base, 0,
                     pxa2xx_i2s_save, pxa2xx_i2s_load, s);
@@ -1988,7 +1988,7 @@ static struct pxa2xx_fir_s *pxa2xx_fir_init(target_phys_addr_t base,
 
     iomemtype = cpu_register_io_memory(0, pxa2xx_fir_readfn,
                     pxa2xx_fir_writefn, s);
-    cpu_register_physical_memory(s->base, 0xfff, iomemtype);
+    cpu_register_physical_memory(s->base, 0x1000, iomemtype);
 
     if (chr)
         qemu_chr_add_handlers(chr, pxa2xx_fir_is_empty,
@@ -2061,7 +2061,7 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
     s->clkcfg = 0x00000009;		/* Turbo mode active */
     iomemtype = cpu_register_io_memory(0, pxa2xx_cm_readfn,
                     pxa2xx_cm_writefn, s);
-    cpu_register_physical_memory(s->cm_base, 0xfff, iomemtype);
+    cpu_register_physical_memory(s->cm_base, 0x1000, iomemtype);
     register_savevm("pxa2xx_cm", 0, 0, pxa2xx_cm_save, pxa2xx_cm_load, s);
 
     cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
@@ -2072,13 +2072,13 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
     s->mm_regs[MECR >> 2] = 0x00000001;	/* Two PC Card sockets */
     iomemtype = cpu_register_io_memory(0, pxa2xx_mm_readfn,
                     pxa2xx_mm_writefn, s);
-    cpu_register_physical_memory(s->mm_base, 0xfff, iomemtype);
+    cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
     register_savevm("pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
 
     s->pm_base = 0x40f00000;
     iomemtype = cpu_register_io_memory(0, pxa2xx_pm_readfn,
                     pxa2xx_pm_writefn, s);
-    cpu_register_physical_memory(s->pm_base, 0xff, iomemtype);
+    cpu_register_physical_memory(s->pm_base, 0x100, iomemtype);
     register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
 
     for (i = 0; pxa27x_ssp[i].io_base; i ++);
@@ -2093,7 +2093,7 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
 
         iomemtype = cpu_register_io_memory(0, pxa2xx_ssp_readfn,
                         pxa2xx_ssp_writefn, &ssp[i]);
-        cpu_register_physical_memory(ssp[i].base, 0xfff, iomemtype);
+        cpu_register_physical_memory(ssp[i].base, 0x1000, iomemtype);
         register_savevm("pxa2xx_ssp", i, 0,
                         pxa2xx_ssp_save, pxa2xx_ssp_load, s);
     }
@@ -2108,7 +2108,7 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
     s->rtc_base = 0x40900000;
     iomemtype = cpu_register_io_memory(0, pxa2xx_rtc_readfn,
                     pxa2xx_rtc_writefn, s);
-    cpu_register_physical_memory(s->rtc_base, 0xfff, iomemtype);
+    cpu_register_physical_memory(s->rtc_base, 0x1000, iomemtype);
     pxa2xx_rtc_init(s);
     register_savevm("pxa2xx_rtc", 0, 0, pxa2xx_rtc_save, pxa2xx_rtc_load, s);
 
@@ -2170,7 +2170,7 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
     s->clkcfg = 0x00000009;		/* Turbo mode active */
     iomemtype = cpu_register_io_memory(0, pxa2xx_cm_readfn,
                     pxa2xx_cm_writefn, s);
-    cpu_register_physical_memory(s->cm_base, 0xfff, iomemtype);
+    cpu_register_physical_memory(s->cm_base, 0x1000, iomemtype);
     register_savevm("pxa2xx_cm", 0, 0, pxa2xx_cm_save, pxa2xx_cm_load, s);
 
     cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
@@ -2181,13 +2181,13 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
     s->mm_regs[MECR >> 2] = 0x00000001;	/* Two PC Card sockets */
     iomemtype = cpu_register_io_memory(0, pxa2xx_mm_readfn,
                     pxa2xx_mm_writefn, s);
-    cpu_register_physical_memory(s->mm_base, 0xfff, iomemtype);
+    cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
     register_savevm("pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
 
     s->pm_base = 0x40f00000;
     iomemtype = cpu_register_io_memory(0, pxa2xx_pm_readfn,
                     pxa2xx_pm_writefn, s);
-    cpu_register_physical_memory(s->pm_base, 0xff, iomemtype);
+    cpu_register_physical_memory(s->pm_base, 0x100, iomemtype);
     register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
 
     for (i = 0; pxa255_ssp[i].io_base; i ++);
@@ -2202,7 +2202,7 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
 
         iomemtype = cpu_register_io_memory(0, pxa2xx_ssp_readfn,
                         pxa2xx_ssp_writefn, &ssp[i]);
-        cpu_register_physical_memory(ssp[i].base, 0xfff, iomemtype);
+        cpu_register_physical_memory(ssp[i].base, 0x1000, iomemtype);
         register_savevm("pxa2xx_ssp", i, 0,
                         pxa2xx_ssp_save, pxa2xx_ssp_load, s);
     }
@@ -2217,7 +2217,7 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
     s->rtc_base = 0x40900000;
     iomemtype = cpu_register_io_memory(0, pxa2xx_rtc_readfn,
                     pxa2xx_rtc_writefn, s);
-    cpu_register_physical_memory(s->rtc_base, 0xfff, iomemtype);
+    cpu_register_physical_memory(s->rtc_base, 0x1000, iomemtype);
     pxa2xx_rtc_init(s);
     register_savevm("pxa2xx_rtc", 0, 0, pxa2xx_rtc_save, pxa2xx_rtc_load, s);
 

hw/pxa2xx_dma.c

@@ -508,7 +508,7 @@ static struct pxa2xx_dma_state_s *pxa2xx_dma_init(target_phys_addr_t base,
 
     iomemtype = cpu_register_io_memory(0, pxa2xx_dma_readfn,
                     pxa2xx_dma_writefn, s);
-    cpu_register_physical_memory(base, 0x0000ffff, iomemtype);
+    cpu_register_physical_memory(base, 0x00010000, iomemtype);
 
     register_savevm("pxa2xx_dma", 0, 0, pxa2xx_dma_save, pxa2xx_dma_load, s);
 

hw/pxa2xx_gpio.c

@@ -308,7 +308,7 @@ struct pxa2xx_gpio_info_s *pxa2xx_gpio_init(target_phys_addr_t base,
 
     iomemtype = cpu_register_io_memory(0, pxa2xx_gpio_readfn,
                     pxa2xx_gpio_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
 
     register_savevm("pxa2xx_gpio", 0, 0,
                     pxa2xx_gpio_save, pxa2xx_gpio_load, s);

hw/pxa2xx_lcd.c

@@ -1026,7 +1026,7 @@ struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq,
 
     iomemtype = cpu_register_io_memory(0, pxa2xx_lcdc_readfn,
                     pxa2xx_lcdc_writefn, s);
-    cpu_register_physical_memory(base, 0x000fffff, iomemtype);
+    cpu_register_physical_memory(base, 0x00100000, iomemtype);
 
     graphic_console_init(ds, pxa2xx_update_display,
                     pxa2xx_invalidate_display, pxa2xx_screen_dump, s);

hw/pxa2xx_mmci.c

@@ -534,7 +534,7 @@ struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base,
 
     iomemtype = cpu_register_io_memory(0, pxa2xx_mmci_readfn,
                     pxa2xx_mmci_writefn, s);
-    cpu_register_physical_memory(base, 0x000fffff, iomemtype);
+    cpu_register_physical_memory(base, 0x00100000, iomemtype);
 
     /* Instantiate the actual storage */
     s->card = sd_init(sd_bdrv);

hw/pxa2xx_pcmcia.c

@@ -149,7 +149,7 @@ struct pxa2xx_pcmcia_s *pxa2xx_pcmcia_init(target_phys_addr_t base)
     s->io_base = base | 0x00000000;
     iomemtype = cpu_register_io_memory(0, pxa2xx_pcmcia_io_readfn,
                     pxa2xx_pcmcia_io_writefn, s);
-    cpu_register_physical_memory(s->io_base, 0x03ffffff, iomemtype);
+    cpu_register_physical_memory(s->io_base, 0x04000000, iomemtype);
 
     /* Then next 64 MB is reserved */
 
@@ -157,13 +157,13 @@ struct pxa2xx_pcmcia_s *pxa2xx_pcmcia_init(target_phys_addr_t base)
     s->attr_base = base | 0x08000000;
     iomemtype = cpu_register_io_memory(0, pxa2xx_pcmcia_attr_readfn,
                     pxa2xx_pcmcia_attr_writefn, s);
-    cpu_register_physical_memory(s->attr_base, 0x03ffffff, iomemtype);
+    cpu_register_physical_memory(s->attr_base, 0x04000000, iomemtype);
 
     /* Socket Common Memory Space */
     s->common_base = base | 0x0c000000;
     iomemtype = cpu_register_io_memory(0, pxa2xx_pcmcia_common_readfn,
                     pxa2xx_pcmcia_common_writefn, s);
-    cpu_register_physical_memory(s->common_base, 0x03ffffff, iomemtype);
+    cpu_register_physical_memory(s->common_base, 0x04000000, iomemtype);
 
     if (base == 0x30000000)
         s->slot.slot_string = "PXA PC Card Socket 1";

hw/pxa2xx_pic.c

@@ -306,7 +306,7 @@ qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env)
     /* Enable IC memory-mapped registers access.  */
     iomemtype = cpu_register_io_memory(0, pxa2xx_pic_readfn,
                     pxa2xx_pic_writefn, s);
-    cpu_register_physical_memory(base, 0x000fffff, iomemtype);
+    cpu_register_physical_memory(base, 0x00100000, iomemtype);
 
     /* Enable IC coprocessor access.  */
     cpu_arm_set_cp_io(env, 6, pxa2xx_pic_cp_read, pxa2xx_pic_cp_write, s);

hw/pxa2xx_timer.c

@@ -458,7 +458,7 @@ static pxa2xx_timer_info *pxa2xx_timer_init(target_phys_addr_t base,
 
     iomemtype = cpu_register_io_memory(0, pxa2xx_timer_readfn,
                     pxa2xx_timer_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
 
     register_savevm("pxa2xx_timer", 0, 0,
                     pxa2xx_timer_save, pxa2xx_timer_load, s);

hw/spitz.c

@@ -705,7 +705,7 @@ static struct scoop_info_s *spitz_scoop_init(struct pxa2xx_state_s *cpu,
 
     iomemtype = cpu_register_io_memory(0, scoop_readfn,
                     scoop_writefn, &s[0]);
-    cpu_register_physical_memory(s[0].target_base, 0xfff, iomemtype);
+    cpu_register_physical_memory(s[0].target_base, 0x1000, iomemtype);
     register_savevm("scoop", 0, 0, scoop_save, scoop_load, &s[0]);
 
     if (count < 2)
@@ -713,7 +713,7 @@ static struct scoop_info_s *spitz_scoop_init(struct pxa2xx_state_s *cpu,
 
     iomemtype = cpu_register_io_memory(0, scoop_readfn,
                     scoop_writefn, &s[1]);
-    cpu_register_physical_memory(s[1].target_base, 0xfff, iomemtype);
+    cpu_register_physical_memory(s[1].target_base, 0x1000, iomemtype);
     register_savevm("scoop", 1, 0, scoop_save, scoop_load, &s[1]);
 
     return s;

hw/usb-ohci.c

@@ -1345,5 +1345,5 @@ void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,
                   OHCI_TYPE_PXA, "OHCI USB");
     ohci->mem_base = base;
 
-    cpu_register_physical_memory(ohci->mem_base, 0xfff, ohci->mem);
+    cpu_register_physical_memory(ohci->mem_base, 0x1000, ohci->mem);
 }

hw/versatilepb.c

@@ -140,7 +140,7 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq)
     s->irq = irq;
     iomemtype = cpu_register_io_memory(0, vpb_sic_readfn,
                                        vpb_sic_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     /* ??? Save/restore.  */
     return qi;
 }