提交 4da0b5a7 编写于 作者: S Sander Vanheule

realtek: fix egress L2 learning on rtl839x

The flag to enable L2 address learning on egress frames is in CPU header
bit 40, with bit 0 being the leftmost bit of the header. This
corresponds to BIT(7) in the third 16-bit value of the header.

Correctly set L2LEARNING by fixing the off-by-one error.

Fixes: 9eab76c8 ("realtek: Improve TX CPU-Tag usage")
Tested-by: NLuiz Angelo Daros de Luca <luizluca@gmail.com>
Signed-off-by: NSander Vanheule <sander@svanheule.net>
(cherry picked from commit d6165ea7)
上级 8614b8eb
......@@ -127,7 +127,7 @@ static void rtl839x_create_tx_header(struct p_hdr *h, int dest_port, int prio)
h->cpu_tag[5] = BIT(dest_port) & 0xffff;
}
h->cpu_tag[2] |= BIT(4); // Enable destination port mask use
h->cpu_tag[2] |= BIT(8); // Enable L2 Learning
h->cpu_tag[2] |= BIT(7); // Enable L2 Learning
// Set internal priority and AS_PRIO
if (prio >= 0)
h->cpu_tag[1] |= prio | BIT(3);
......
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