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体验新版 GitCode,发现更多精彩内容 >>
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f60514cd
编写于
8月 06, 2021
作者:
W
wormsX
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
formatting thead-smart bsp code
上级
b104bbc4
变更
16
隐藏空白更改
内联
并排
Showing
16 changed file
with
143 addition
and
143 deletion
+143
-143
bsp/thead-smart/applications/main.c
bsp/thead-smart/applications/main.c
+1
-1
bsp/thead-smart/drivers/board.c
bsp/thead-smart/drivers/board.c
+1
-1
bsp/thead-smart/drivers/board_uart.c
bsp/thead-smart/drivers/board_uart.c
+6
-6
bsp/thead-smart/drivers/ck_irq.c
bsp/thead-smart/drivers/ck_irq.c
+8
-8
bsp/thead-smart/drivers/ck_usart.c
bsp/thead-smart/drivers/ck_usart.c
+66
-66
bsp/thead-smart/drivers/ck_usart.h
bsp/thead-smart/drivers/ck_usart.h
+4
-4
bsp/thead-smart/drivers/core_rv32.h
bsp/thead-smart/drivers/core_rv32.h
+4
-4
bsp/thead-smart/drivers/drv_common.h
bsp/thead-smart/drivers/drv_common.h
+1
-1
bsp/thead-smart/drivers/dw_gpio.c
bsp/thead-smart/drivers/dw_gpio.c
+25
-25
bsp/thead-smart/drivers/dw_gpio.h
bsp/thead-smart/drivers/dw_gpio.h
+1
-1
bsp/thead-smart/drivers/dw_timer.c
bsp/thead-smart/drivers/dw_timer.c
+17
-17
bsp/thead-smart/drivers/dw_timer.h
bsp/thead-smart/drivers/dw_timer.h
+3
-3
bsp/thead-smart/drivers/isr.c
bsp/thead-smart/drivers/isr.c
+1
-1
bsp/thead-smart/drivers/novic_irq_tbl.c
bsp/thead-smart/drivers/novic_irq_tbl.c
+1
-1
bsp/thead-smart/drivers/system.c
bsp/thead-smart/drivers/system.c
+1
-1
bsp/thead-smart/drivers/trap_c.c
bsp/thead-smart/drivers/trap_c.c
+3
-3
未找到文件。
bsp/thead-smart/applications/main.c
浏览文件 @
f60514cd
...
...
@@ -12,7 +12,7 @@
int
main
(
void
)
{
return
0
;
}
...
...
bsp/thead-smart/drivers/board.c
浏览文件 @
f60514cd
/*
* Copyright (c) 2006-20
18
, RT-Thread Development Team
* Copyright (c) 2006-20
21
, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
...
...
bsp/thead-smart/drivers/board_uart.c
浏览文件 @
f60514cd
/*
* Copyright (c) 2006-20
18
, RT-Thread Development Team
* Copyright (c) 2006-20
21
, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
...
...
@@ -35,7 +35,7 @@ struct
uint32_t
base
;
uint32_t
irq
;
void
*
handler
;
}
}
const
sg_usart_config
[
CONFIG_USART_NUM
]
=
{
{
CSKY_UART_BASE
,
UART_IRQn
,
ck_usart0_irqhandler
},
...
...
@@ -44,22 +44,22 @@ const sg_usart_config[CONFIG_USART_NUM] =
int32_t
target_usart_init
(
int32_t
idx
,
uint32_t
*
base
,
uint32_t
*
irq
,
void
**
handler
)
{
if
(
idx
>=
CONFIG_USART_NUM
)
if
(
idx
>=
CONFIG_USART_NUM
)
{
return
-
1
;
}
if
(
base
!=
NULL
)
if
(
base
!=
NULL
)
{
*
base
=
sg_usart_config
[
idx
].
base
;
}
if
(
irq
!=
NULL
)
if
(
irq
!=
NULL
)
{
*
irq
=
sg_usart_config
[
idx
].
irq
;
}
if
(
handler
!=
NULL
)
if
(
handler
!=
NULL
)
{
*
handler
=
sg_usart_config
[
idx
].
handler
;
}
...
...
bsp/thead-smart/drivers/ck_irq.c
浏览文件 @
f60514cd
...
...
@@ -25,7 +25,7 @@ extern void (*g_nmivector)(void);
*/
void
drv_irq_enable
(
uint32_t
irq_num
)
{
if
(
NMI_EXPn
!=
irq_num
)
if
(
NMI_EXPn
!=
irq_num
)
{
#ifdef CONFIG_SYSTEM_SECURE
csi_vic_enable_sirq
(
irq_num
);
...
...
@@ -42,7 +42,7 @@ void drv_irq_enable(uint32_t irq_num)
*/
void
drv_irq_disable
(
uint32_t
irq_num
)
{
if
(
NMI_EXPn
!=
irq_num
)
if
(
NMI_EXPn
!=
irq_num
)
{
#ifdef CONFIG_SYSTEM_SECURE
csi_vic_disable_sirq
(
irq_num
);
...
...
@@ -60,11 +60,11 @@ void drv_irq_disable(uint32_t irq_num)
*/
void
drv_irq_register
(
uint32_t
irq_num
,
void
*
irq_handler
)
{
if
(
NMI_EXPn
!=
irq_num
)
if
(
NMI_EXPn
!=
irq_num
)
{
g_irqvector
[
irq_num
]
=
irq_handler
;
}
else
}
else
{
g_nmivector
=
irq_handler
;
}
...
...
@@ -77,11 +77,11 @@ void drv_irq_register(uint32_t irq_num, void *irq_handler)
*/
void
drv_irq_unregister
(
uint32_t
irq_num
)
{
if
(
NMI_EXPn
!=
irq_num
)
if
(
NMI_EXPn
!=
irq_num
)
{
g_irqvector
[
irq_num
]
=
(
void
*
)
Default_Handler
;
}
else
}
else
{
g_nmivector
=
(
void
*
)
Default_Handler
;
}
...
...
bsp/thead-smart/drivers/ck_usart.c
浏览文件 @
f60514cd
...
...
@@ -37,7 +37,7 @@
#define USART_NULL_PARAM_CHK(para) HANDLE_PARAM_CHK(para, ERR_USART(DRV_ERROR_PARAMETER))
typedef
struct
typedef
struct
{
uint32_t
base
;
uint32_t
irq
;
...
...
@@ -59,7 +59,7 @@ extern int32_t target_usart_init(int32_t idx, uint32_t *base, uint32_t *irq, voi
static
ck_usart_priv_t
usart_instance
[
CONFIG_USART_NUM
];
static
const
usart_capabilities_t
usart_capabilities
=
static
const
usart_capabilities_t
usart_capabilities
=
{
.
asynchronous
=
1
,
/* supports USART (Asynchronous) mode */
.
synchronous_master
=
0
,
/* supports Synchronous Master mode */
...
...
@@ -86,10 +86,10 @@ int32_t csi_usart_config_baudrate(usart_handle_t handle, uint32_t baud)
/* baudrate=(seriak clock freq)/(16*divisor); algorithm :rounding*/
uint32_t
divisor
=
((
drv_get_usart_freq
(
usart_priv
->
idx
)
*
10
)
/
baud
)
>>
4
;
if
((
divisor
%
10
)
>=
5
)
if
((
divisor
%
10
)
>=
5
)
{
divisor
=
(
divisor
/
10
)
+
1
;
}
else
}
else
{
divisor
=
divisor
/
10
;
}
...
...
@@ -117,7 +117,7 @@ int32_t csi_usart_config_mode(usart_handle_t handle, usart_mode_e mode)
{
USART_NULL_PARAM_CHK
(
handle
);
if
(
mode
==
USART_MODE_ASYNCHRONOUS
)
if
(
mode
==
USART_MODE_ASYNCHRONOUS
)
{
return
0
;
}
...
...
@@ -139,7 +139,7 @@ int32_t csi_usart_config_parity(usart_handle_t handle, usart_parity_e parity)
WAIT_USART_IDLE
(
addr
);
switch
(
parity
)
switch
(
parity
)
{
case
USART_PARITY_NONE
:
/*CLear the PEN bit(LCR[3]) to disable parity.*/
...
...
@@ -179,7 +179,7 @@ int32_t csi_usart_config_stopbits(usart_handle_t handle, usart_stop_bits_e stopb
WAIT_USART_IDLE
(
addr
);
switch
(
stopbit
)
switch
(
stopbit
)
{
case
USART_STOP_BITS_1
:
/* Clear the STOP bit to set 1 stop bit*/
...
...
@@ -223,7 +223,7 @@ int32_t csi_usart_config_databits(usart_handle_t handle, usart_data_bits_e datab
* 11 -- 8 bits
*/
switch
(
databits
)
switch
(
databits
)
{
case
USART_DATA_BITS_5
:
addr
->
LCR
&=
LCR_WORD_SIZE_5
;
...
...
@@ -312,7 +312,7 @@ int csi_uart_getchar(usart_handle_t handle)
if
(
addr
->
LSR
&
LSR_DATA_READY
)
{
ch
=
addr
->
RBR
&
0xff
;
ch
=
addr
->
RBR
&
0xff
;
}
return
ch
;
...
...
@@ -332,11 +332,11 @@ int32_t csi_usart_putchar(usart_handle_t handle, uint8_t ch)
ck_usart_reg_t
*
addr
=
(
ck_usart_reg_t
*
)(
usart_priv
->
base
);
uint32_t
timecount
=
0
;
while
((
!
(
addr
->
LSR
&
DW_LSR_TRANS_EMPTY
)))
while
((
!
(
addr
->
LSR
&
DW_LSR_TRANS_EMPTY
)))
{
timecount
++
;
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
{
return
ERR_USART
(
DRV_ERROR_TIMEOUT
);
}
...
...
@@ -354,7 +354,7 @@ int32_t csi_usart_putchar(usart_handle_t handle, uint8_t ch)
*/
void
ck_usart_intr_threshold_empty
(
int32_t
idx
,
ck_usart_priv_t
*
usart_priv
)
{
if
(
usart_priv
->
tx_total_num
==
0
)
if
(
usart_priv
->
tx_total_num
==
0
)
{
return
;
}
...
...
@@ -362,7 +362,7 @@ void ck_usart_intr_threshold_empty(int32_t idx, ck_usart_priv_t *usart_priv)
volatile
int
i
=
500
;
ck_usart_reg_t
*
addr
=
(
ck_usart_reg_t
*
)(
usart_priv
->
base
);
if
(
usart_priv
->
tx_cnt
>=
usart_priv
->
tx_total_num
)
if
(
usart_priv
->
tx_cnt
>=
usart_priv
->
tx_total_num
)
{
addr
->
IER
&=
(
~
IER_THRE_INT_ENABLE
);
usart_priv
->
last_tx_num
=
usart_priv
->
tx_total_num
;
...
...
@@ -379,11 +379,11 @@ void ck_usart_intr_threshold_empty(int32_t idx, ck_usart_priv_t *usart_priv)
usart_priv
->
tx_buf
=
NULL
;
usart_priv
->
tx_total_num
=
0
;
if
(
usart_priv
->
cb_event
)
if
(
usart_priv
->
cb_event
)
{
usart_priv
->
cb_event
(
idx
,
USART_EVENT_SEND_COMPLETE
);
}
}
else
}
else
{
/* fix hardware bug */
while
(
addr
->
USR
&
USR_UART_BUSY
);
...
...
@@ -411,7 +411,7 @@ static void ck_usart_intr_recv_data(int32_t idx, ck_usart_priv_t *usart_priv)
usart_priv
->
rx_cnt
++
;
usart_priv
->
rx_buf
++
;
if
(
usart_priv
->
rx_cnt
>=
usart_priv
->
rx_total_num
)
if
(
usart_priv
->
rx_cnt
>=
usart_priv
->
rx_total_num
)
{
usart_priv
->
last_rx_num
=
usart_priv
->
rx_total_num
;
usart_priv
->
rx_cnt
=
0
;
...
...
@@ -419,7 +419,7 @@ static void ck_usart_intr_recv_data(int32_t idx, ck_usart_priv_t *usart_priv)
usart_priv
->
rx_busy
=
0
;
usart_priv
->
rx_total_num
=
0
;
if
(
usart_priv
->
cb_event
)
if
(
usart_priv
->
cb_event
)
{
usart_priv
->
cb_event
(
idx
,
USART_EVENT_RECEIVE_COMPLETE
);
}
...
...
@@ -440,14 +440,14 @@ static void ck_usart_intr_recv_line(int32_t idx, ck_usart_priv_t *usart_priv)
uint32_t
timecount
=
0
;
while
(
addr
->
LSR
&
0x1
)
while
(
addr
->
LSR
&
0x1
)
{
addr
->
RBR
;
timecount
++
;
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
{
if
(
usart_priv
->
cb_event
)
if
(
usart_priv
->
cb_event
)
{
usart_priv
->
cb_event
(
idx
,
USART_EVENT_RX_TIMEOUT
);
}
...
...
@@ -459,9 +459,9 @@ static void ck_usart_intr_recv_line(int32_t idx, ck_usart_priv_t *usart_priv)
/** Break Interrupt bit. This is used to indicate the detection of a
* break sequence on the serial input data.
*/
if
(
lsr_stat
&
DW_LSR_BI
)
if
(
lsr_stat
&
DW_LSR_BI
)
{
if
(
usart_priv
->
cb_event
)
if
(
usart_priv
->
cb_event
)
{
usart_priv
->
cb_event
(
idx
,
USART_EVENT_RX_BREAK
);
}
...
...
@@ -473,9 +473,9 @@ static void ck_usart_intr_recv_line(int32_t idx, ck_usart_priv_t *usart_priv)
* framing error in the receiver. A framing error occurs when the receiver
* does not detect a valid STOP bit in the received data.
*/
if
(
lsr_stat
&
DW_LSR_FE
)
if
(
lsr_stat
&
DW_LSR_FE
)
{
if
(
usart_priv
->
cb_event
)
if
(
usart_priv
->
cb_event
)
{
usart_priv
->
cb_event
(
idx
,
USART_EVENT_RX_FRAMING_ERROR
);
}
...
...
@@ -487,9 +487,9 @@ static void ck_usart_intr_recv_line(int32_t idx, ck_usart_priv_t *usart_priv)
* framing error in the receiver. A framing error occurs when the
* receiver does not detect a valid STOP bit in the received data.
*/
if
(
lsr_stat
&
DW_LSR_PE
)
if
(
lsr_stat
&
DW_LSR_PE
)
{
if
(
usart_priv
->
cb_event
)
if
(
usart_priv
->
cb_event
)
{
usart_priv
->
cb_event
(
idx
,
USART_EVENT_RX_PARITY_ERROR
);
}
...
...
@@ -500,9 +500,9 @@ static void ck_usart_intr_recv_line(int32_t idx, ck_usart_priv_t *usart_priv)
/** Overrun error bit. This is used to indicate the occurrence of an overrun error.
* This occurs if a new data character was received before the previous data was read.
*/
if
(
lsr_stat
&
DW_LSR_OE
)
if
(
lsr_stat
&
DW_LSR_OE
)
{
if
(
usart_priv
->
cb_event
)
if
(
usart_priv
->
cb_event
)
{
usart_priv
->
cb_event
(
idx
,
USART_EVENT_RX_OVERFLOW
);
}
...
...
@@ -516,29 +516,29 @@ static void ck_usart_intr_recv_line(int32_t idx, ck_usart_priv_t *usart_priv)
*/
static
void
ck_usart_intr_char_timeout
(
int32_t
idx
,
ck_usart_priv_t
*
usart_priv
)
{
if
((
usart_priv
->
rx_total_num
!=
0
)
&&
(
usart_priv
->
rx_buf
!=
NULL
))
if
((
usart_priv
->
rx_total_num
!=
0
)
&&
(
usart_priv
->
rx_buf
!=
NULL
))
{
ck_usart_intr_recv_data
(
idx
,
usart_priv
);
return
;
}
if
(
usart_priv
->
cb_event
)
if
(
usart_priv
->
cb_event
)
{
usart_priv
->
cb_event
(
idx
,
USART_EVENT_RECEIVED
);
}
else
}
else
{
ck_usart_reg_t
*
addr
=
(
ck_usart_reg_t
*
)(
usart_priv
->
base
);
uint32_t
timecount
=
0
;
while
(
addr
->
LSR
&
0x1
)
while
(
addr
->
LSR
&
0x1
)
{
addr
->
RBR
;
timecount
++
;
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
{
if
(
usart_priv
->
cb_event
)
if
(
usart_priv
->
cb_event
)
{
usart_priv
->
cb_event
(
idx
,
USART_EVENT_RX_TIMEOUT
);
}
...
...
@@ -560,7 +560,7 @@ void ck_usart_irqhandler(int32_t idx)
uint8_t
intr_state
=
addr
->
IIR
&
0xf
;
switch
(
intr_state
)
switch
(
intr_state
)
{
case
DW_IIR_THR_EMPTY
:
/* interrupt source:transmitter holding register empty */
ck_usart_intr_threshold_empty
(
idx
,
usart_priv
);
...
...
@@ -591,7 +591,7 @@ void ck_usart_irqhandler(int32_t idx)
*/
usart_capabilities_t
csi_usart_get_capabilities
(
int32_t
idx
)
{
if
(
idx
<
0
||
idx
>=
CONFIG_USART_NUM
)
if
(
idx
<
0
||
idx
>=
CONFIG_USART_NUM
)
{
usart_capabilities_t
ret
;
memset
(
&
ret
,
0
,
sizeof
(
usart_capabilities_t
));
...
...
@@ -615,7 +615,7 @@ usart_handle_t csi_usart_initialize(int32_t idx, usart_event_cb_t cb_event)
int32_t
ret
=
target_usart_init
(
idx
,
&
base
,
&
irq
,
&
handler
);
if
(
ret
<
0
||
ret
>=
CONFIG_USART_NUM
)
if
(
ret
<
0
||
ret
>=
CONFIG_USART_NUM
)
{
return
NULL
;
}
...
...
@@ -675,7 +675,7 @@ int32_t csi_usart_config(usart_handle_t handle,
/* control the data_bit of the usart*/
ret
=
csi_usart_config_baudrate
(
handle
,
baud
);
if
(
ret
<
0
)
if
(
ret
<
0
)
{
return
ret
;
}
...
...
@@ -683,7 +683,7 @@ int32_t csi_usart_config(usart_handle_t handle,
/* control mode of the usart*/
ret
=
csi_usart_config_mode
(
handle
,
mode
);
if
(
ret
<
0
)
if
(
ret
<
0
)
{
return
ret
;
}
...
...
@@ -691,7 +691,7 @@ int32_t csi_usart_config(usart_handle_t handle,
/* control the parity of the usart*/
ret
=
csi_usart_config_parity
(
handle
,
parity
);
if
(
ret
<
0
)
if
(
ret
<
0
)
{
return
ret
;
}
...
...
@@ -699,14 +699,14 @@ int32_t csi_usart_config(usart_handle_t handle,
/* control the stopbit of the usart*/
ret
=
csi_usart_config_stopbits
(
handle
,
stopbits
);
if
(
ret
<
0
)
if
(
ret
<
0
)
{
return
ret
;
}
ret
=
csi_usart_config_databits
(
handle
,
bits
);
if
(
ret
<
0
)
if
(
ret
<
0
)
{
return
ret
;
}
...
...
@@ -729,7 +729,7 @@ int32_t csi_usart_send(usart_handle_t handle, const void *data, uint32_t num)
USART_NULL_PARAM_CHK
(
handle
);
USART_NULL_PARAM_CHK
(
data
);
if
(
num
==
0
)
if
(
num
==
0
)
{
return
ERR_USART
(
DRV_ERROR_PARAMETER
);
}
...
...
@@ -811,12 +811,12 @@ int32_t csi_usart_receive_query(usart_handle_t handle, void *data, uint32_t num)
int32_t
recv_num
=
0
;
uint8_t
*
dest
=
(
uint8_t
*
)
data
;
while
(
addr
->
LSR
&
0x1
)
while
(
addr
->
LSR
&
0x1
)
{
*
dest
++
=
addr
->
RBR
;
recv_num
++
;
if
(
recv_num
>=
num
)
if
(
recv_num
>=
num
)
{
break
;
}
...
...
@@ -876,7 +876,7 @@ usart_status_t csi_usart_get_status(usart_handle_t handle)
memset
(
&
usart_status
,
0
,
sizeof
(
usart_status_t
));
if
(
handle
==
NULL
)
if
(
handle
==
NULL
)
{
return
usart_status
;
}
...
...
@@ -888,17 +888,17 @@ usart_status_t csi_usart_get_status(usart_handle_t handle)
usart_status
.
tx_busy
=
usart_priv
->
tx_busy
;
usart_status
.
rx_busy
=
usart_priv
->
rx_busy
;
if
(
line_status_reg
&
DW_LSR_BI
)
if
(
line_status_reg
&
DW_LSR_BI
)
{
usart_status
.
rx_break
=
1
;
}
if
(
line_status_reg
&
DW_LSR_FE
)
if
(
line_status_reg
&
DW_LSR_FE
)
{
usart_status
.
rx_framing_error
=
1
;
}
if
(
line_status_reg
&
DW_LSR_PE
)
if
(
line_status_reg
&
DW_LSR_PE
)
{
usart_status
.
rx_parity_error
=
1
;
}
...
...
@@ -961,26 +961,26 @@ int32_t csi_usart_flush(usart_handle_t handle, usart_flush_type_e type)
uint32_t
timecount
=
0
;
if
(
type
==
USART_FLUSH_WRITE
)
{
while
((
!
(
addr
->
LSR
&
DW_LSR_TEMT
)))
while
((
!
(
addr
->
LSR
&
DW_LSR_TEMT
)))
{
timecount
++
;
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
{
return
ERR_USART
(
DRV_ERROR_TIMEOUT
);
}
}
}
else
if
(
type
==
USART_FLUSH_READ
)
}
else
if
(
type
==
USART_FLUSH_READ
)
{
while
(
addr
->
LSR
&
0x1
)
{
timecount
++
;
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
if
(
timecount
>=
UART_BUSY_TIMEOUT
)
{
return
ERR_USART
(
DRV_ERROR_TIMEOUT
);
}
}
}
else
}
else
{
return
ERR_USART
(
DRV_ERROR_PARAMETER
);
}
...
...
@@ -1002,16 +1002,16 @@ int32_t csi_usart_set_interrupt(usart_handle_t handle, usart_intr_type_e type, i
ck_usart_priv_t
*
usart_priv
=
handle
;
ck_usart_reg_t
*
addr
=
(
ck_usart_reg_t
*
)(
usart_priv
->
base
);
switch
(
type
)
switch
(
type
)
{
case
USART_INTR_WRITE
:
if
(
flag
==
0
)
if
(
flag
==
0
)
{
addr
->
IER
&=
~
IER_THRE_INT_ENABLE
;
}
else
if
(
flag
==
1
)
}
else
if
(
flag
==
1
)
{
addr
->
IER
|=
IER_THRE_INT_ENABLE
;
}
else
}
else
{
return
ERR_USART
(
DRV_ERROR_PARAMETER
);
}
...
...
@@ -1019,13 +1019,13 @@ int32_t csi_usart_set_interrupt(usart_handle_t handle, usart_intr_type_e type, i
break
;
case
USART_INTR_READ
:
if
(
flag
==
0
)
if
(
flag
==
0
)
{
addr
->
IER
&=
~
IER_RDA_INT_ENABLE
;
}
else
if
(
flag
==
1
)
}
else
if
(
flag
==
1
)
{
addr
->
IER
|=
IER_RDA_INT_ENABLE
;
}
else
}
else
{
return
ERR_USART
(
DRV_ERROR_PARAMETER
);
}
...
...
@@ -1051,10 +1051,10 @@ uint32_t csi_usart_get_tx_count(usart_handle_t handle)
ck_usart_priv_t
*
usart_priv
=
handle
;
if
(
usart_priv
->
tx_busy
)
if
(
usart_priv
->
tx_busy
)
{
return
usart_priv
->
tx_cnt
;
}
else
}
else
{
return
usart_priv
->
last_tx_num
;
}
...
...
@@ -1070,10 +1070,10 @@ uint32_t csi_usart_get_rx_count(usart_handle_t handle)
USART_NULL_PARAM_CHK
(
handle
);
ck_usart_priv_t
*
usart_priv
=
handle
;
if
(
usart_priv
->
rx_busy
)
if
(
usart_priv
->
rx_busy
)
{
return
usart_priv
->
rx_cnt
;
}
else
}
else
{
return
usart_priv
->
last_rx_num
;
}
...
...
@@ -1102,7 +1102,7 @@ int32_t csi_usart_config_flowctrl(usart_handle_t handle,
{
USART_NULL_PARAM_CHK
(
handle
);
switch
(
flowctrl_type
)
switch
(
flowctrl_type
)
{
case
USART_FLOWCTRL_CTS
:
return
ERR_USART
(
DRV_ERROR_UNSUPPORTED
);
...
...
bsp/thead-smart/drivers/ck_usart.h
浏览文件 @
f60514cd
...
...
@@ -19,11 +19,11 @@
extern
"C"
{
#endif
#define BAUDRATE_DEFAULT
19200
#define BAUDRATE_DEFAULT
19200
#define UART_BUSY_TIMEOUT 1000000
#define UART_RECEIVE_TIMEOUT 1000
#define UART_TRANSMIT_TIMEOUT 1000
#define UART_MAX_FIFO
0x10
#define UART_MAX_FIFO
0x10
/* UART register bit definitions */
#define USR_UART_BUSY 0x01
...
...
@@ -64,13 +64,13 @@ extern "C" {
typedef
struct
{
union
union
{
__IM
uint32_t
RBR
;
/* Offset: 0x000 (R/ ) Receive buffer register */
__OM
uint32_t
THR
;
/* Offset: 0x000 ( /W) Transmission hold register */
__IOM
uint32_t
DLL
;
/* Offset: 0x000 (R/W) Clock frequency division low section register */
};
union
union
{
__IOM
uint32_t
DLH
;
/* Offset: 0x004 (R/W) Clock frequency division high section register */
__IOM
uint32_t
IER
;
/* Offset: 0x004 (R/W) Interrupt enable register */
...
...
bsp/thead-smart/drivers/core_rv32.h
浏览文件 @
f60514cd
...
...
@@ -302,7 +302,7 @@ typedef struct
\brief Type definitions for the SYSMAP Registers
@{
*/
typedef
struct
typedef
struct
{
__IOM
uint32_t
SYSMAPADDR0
;
/*!< Offset: 0x000 (R/W) SYSMAP configure register */
__IOM
uint32_t
SYSMAPCFG0
;
/*!< Offset: 0x004 (R/W) SYSMAP configure register */
...
...
@@ -745,7 +745,7 @@ __STATIC_INLINE uint32_t csi_coret_get_valueh(void)
*/
__STATIC_INLINE
uint8_t
__get_SYSMAPCFGx
(
uint32_t
idx
)
{
switch
(
idx
)
switch
(
idx
)
{
case
0
:
return
SYSMAP
->
SYSMAPCFG0
;
case
1
:
return
SYSMAP
->
SYSMAPCFG1
;
...
...
@@ -767,7 +767,7 @@ __STATIC_INLINE uint8_t __get_SYSMAPCFGx(uint32_t idx)
*/
__STATIC_INLINE
void
__set_SYSMAPCFGx
(
uint32_t
idx
,
uint32_t
sysmapxcfg
)
{
switch
(
idx
)
switch
(
idx
)
{
case
0
:
SYSMAP
->
SYSMAPCFG0
=
sysmapxcfg
;
break
;
case
1
:
SYSMAP
->
SYSMAPCFG1
=
sysmapxcfg
;
break
;
...
...
@@ -811,7 +811,7 @@ __STATIC_INLINE uint32_t __get_SYSMAPADDRx(uint32_t idx)
*/
__STATIC_INLINE
void
__set_SYSMAPADDRx
(
uint32_t
idx
,
uint32_t
sysmapxaddr
)
{
switch
(
idx
)
switch
(
idx
)
{
case
0
:
SYSMAP
->
SYSMAPADDR0
=
sysmapxaddr
;
break
;
case
1
:
SYSMAP
->
SYSMAPADDR1
=
sysmapxaddr
;
break
;
...
...
bsp/thead-smart/drivers/drv_common.h
浏览文件 @
f60514cd
...
...
@@ -43,7 +43,7 @@ typedef void *drv_handle_t;
/**
\brief General power states
*/
typedef
enum
typedef
enum
{
DRV_POWER_OFF
,
///< Power off: no operation possible
DRV_POWER_LOW
,
///< Low Power mode: retain state, detect and signal wake-up events
...
...
bsp/thead-smart/drivers/dw_gpio.c
浏览文件 @
f60514cd
...
...
@@ -31,7 +31,7 @@ extern int32_t drv_pin_config_mode(port_name_e port, uint8_t offset, gpio_mode_e
typedef
void
*
gpio_port_handle_t
;
typedef
struct
typedef
struct
{
#ifdef CONFIG_LPM
uint8_t
gpio_power_status
;
...
...
@@ -46,7 +46,7 @@ typedef struct
uint32_t
value
;
///< gpio value
}
dw_gpio_priv_t
;
typedef
struct
typedef
struct
{
uint8_t
portidx
;
uint8_t
idx
;
...
...
@@ -71,13 +71,13 @@ static int32_t gpio_set_direction(
dw_gpio_priv_t
*
gpio_priv
=
port
;
dw_gpio_reg_t
*
gpio_reg
=
(
dw_gpio_reg_t
*
)(
gpio_priv
->
base
);
if
(
direction
==
GPIO_DIRECTION_INPUT
)
if
(
direction
==
GPIO_DIRECTION_INPUT
)
{
gpio_reg
->
SWPORT_DDR
&=
(
~
gpio_priv
->
mask
);
}
else
if
(
direction
==
GPIO_DIRECTION_OUTPUT
)
}
else
if
(
direction
==
GPIO_DIRECTION_OUTPUT
)
{
gpio_reg
->
SWPORT_DDR
|=
gpio_priv
->
mask
;
}
else
}
else
{
return
ERR_GPIO
(
GPIO_ERROR_DIRECTION
);
}
...
...
@@ -139,7 +139,7 @@ static int32_t gpio_set_irq_mode(gpio_pin_handle_t pin, gpio_irq_mode_e irq_mode
uint32_t
offset
=
gpio_pin_priv
->
idx
;
uint32_t
mask
=
1
<<
offset
;
switch
(
irq_mode
)
switch
(
irq_mode
)
{
/* rising edge interrupt mode */
case
GPIO_IRQ_MODE_RISING_EDGE
:
...
...
@@ -240,7 +240,7 @@ static void gpio_irq_disable(gpio_pin_handle_t pin)
void
dw_gpio_irqhandler
(
int
idx
)
{
if
(
idx
>=
CONFIG_GPIO_NUM
)
if
(
idx
>=
CONFIG_GPIO_NUM
)
{
return
;
}
...
...
@@ -251,24 +251,24 @@ void dw_gpio_irqhandler(int idx)
uint8_t
i
;
/* find the interrput pin */
for
(
i
=
0
;
i
<
32
;
i
++
)
for
(
i
=
0
;
i
<
32
;
i
++
)
{
if
(
value
&
(
1U
<<
i
))
if
(
value
&
(
1U
<<
i
))
{
uint32_t
pin_idx
=
i
;
#ifndef CONFIG_CHIP_DANICA
uint8_t
j
;
if
(
idx
>
0
)
if
(
idx
>
0
)
{
for
(
j
=
0
;
j
<
idx
;
j
++
)
for
(
j
=
0
;
j
<
idx
;
j
++
)
{
pin_idx
+=
gpio_handle
[
j
].
pin_num
;
}
}
if
(
pin_idx
>=
CONFIG_GPIO_PIN_NUM
)
if
(
pin_idx
>=
CONFIG_GPIO_PIN_NUM
)
{
return
;
}
...
...
@@ -279,7 +279,7 @@ void dw_gpio_irqhandler(int idx)
gpio_irq_clear
(
gpio_pin_priv
,
(
1
<<
i
));
//clear the gpio interrupt
/* execute the callback function */
if
((
gpio_event_cb_t
)(
gpio_pin_priv
->
cb
))
if
((
gpio_event_cb_t
)(
gpio_pin_priv
->
cb
))
{
((
gpio_event_cb_t
)(
gpio_pin_priv
->
cb
))(
gpio_pin_priv
->
offset
);
}
...
...
@@ -304,7 +304,7 @@ gpio_port_handle_t csi_gpio_port_initialize(int32_t port)
void
*
handler
;
int32_t
idx
=
target_gpio_port_init
(
port
,
&
base
,
&
irq
,
&
handler
,
&
pin_num
);
if
(
idx
<
0
||
idx
>=
CONFIG_GPIO_NUM
)
if
(
idx
<
0
||
idx
>=
CONFIG_GPIO_NUM
)
{
return
NULL
;
}
...
...
@@ -384,14 +384,14 @@ static void do_wakeup_sleep_action(void *handle)
gpio_pin_handle_t
csi_gpio_pin_initialize
(
int32_t
gpio_pin
,
gpio_event_cb_t
cb_event
)
{
if
(
gpio_pin
<
0
||
gpio_pin
>=
CONFIG_GPIO_PIN_NUM
)
if
(
gpio_pin
<
0
||
gpio_pin
>=
CONFIG_GPIO_PIN_NUM
)
{
return
NULL
;
}
uint32_t
i
;
for
(
i
=
0
;
i
<
CONFIG_GPIO_NUM
;
i
++
)
for
(
i
=
0
;
i
<
CONFIG_GPIO_NUM
;
i
++
)
{
csi_gpio_port_initialize
(
i
);
}
...
...
@@ -400,14 +400,14 @@ gpio_pin_handle_t csi_gpio_pin_initialize(int32_t gpio_pin, gpio_event_cb_t cb_e
uint32_t
port_idx
;
int32_t
pin_idx
=
target_gpio_pin_init
(
gpio_pin
,
&
port_idx
);
if
(
pin_idx
<
0
)
if
(
pin_idx
<
0
)
{
return
NULL
;
}
int32_t
idx
=
pin_idx
;
for
(
i
=
0
;
i
<
port_idx
;
i
++
)
for
(
i
=
0
;
i
<
port_idx
;
i
++
)
{
idx
+=
(
gpio_handle
[
i
].
pin_num
);
}
...
...
@@ -430,7 +430,7 @@ gpio_pin_handle_t csi_gpio_pin_initialize(int32_t gpio_pin, gpio_event_cb_t cb_e
*/
int32_t
csi_gpio_pin_uninitialize
(
gpio_pin_handle_t
handle
)
{
if
(
handle
==
NULL
)
if
(
handle
==
NULL
)
{
return
ERR_GPIO
(
DRV_ERROR_PARAMETER
);
}
...
...
@@ -455,7 +455,7 @@ int32_t csi_gpio_power_control(gpio_pin_handle_t handle, csi_power_stat_e state)
#ifdef CONFIG_LPM
dw_gpio_pin_priv_t
*
gpio_pin_priv
=
(
dw_gpio_pin_priv_t
*
)
handle
;
power_cb_t
callback
=
power_cb_t
callback
=
{
.
wakeup
=
do_wakeup_sleep_action
,
.
sleep
=
do_prepare_sleep_action
,
...
...
@@ -509,7 +509,7 @@ int32_t csi_gpio_pin_config_direction(gpio_pin_handle_t handle,
uint32_t
ret
=
gpio_set_direction
(
gpio_priv
,
dir
);
if
(
ret
)
if
(
ret
)
{
return
ret
;
}
...
...
@@ -542,7 +542,7 @@ int32_t csi_gpio_pin_config(gpio_pin_handle_t handle,
uint32_t
ret
=
gpio_set_direction
(
gpio_priv
,
dir
);
if
(
ret
)
if
(
ret
)
{
return
ret
;
}
...
...
@@ -613,18 +613,18 @@ int32_t csi_gpio_pin_set_irq(gpio_pin_handle_t handle, gpio_irq_mode_e mode, boo
uint32_t
ret
=
0
;
if
(
enable
)
if
(
enable
)
{
ret
=
gpio_set_irq_mode
(
handle
,
mode
);
if
(
ret
)
if
(
ret
)
{
return
ret
;
}
gpio_irq_enable
(
handle
);
}
else
}
else
{
gpio_irq_disable
(
handle
);
...
...
bsp/thead-smart/drivers/dw_gpio.h
浏览文件 @
f60514cd
...
...
@@ -19,7 +19,7 @@ extern "C" {
#endif
typedef
struct
typedef
struct
{
__IOM
uint32_t
SWPORT_DR
;
/* Offset: 0x000 (W/R) PortA data register */
__IOM
uint32_t
SWPORT_DDR
;
/* Offset: 0x004 (W/R) PortA data direction register */
...
...
bsp/thead-smart/drivers/dw_timer.c
浏览文件 @
f60514cd
...
...
@@ -20,7 +20,7 @@
#define TIMER_NULL_PARAM_CHK(para) HANDLE_PARAM_CHK(para, ERR_TIMER(DRV_ERROR_PARAMETER))
typedef
struct
typedef
struct
{
#ifdef CONFIG_LPM
uint8_t
timer_power_status
;
...
...
@@ -59,7 +59,7 @@ void dw_timer_irqhandler(int idx)
addr
->
TxEOI
;
if
(
timer_priv
->
cb_event
)
if
(
timer_priv
->
cb_event
)
{
return
timer_priv
->
cb_event
(
idx
,
TIMER_EVENT_TIMEOUT
);
}
...
...
@@ -69,10 +69,10 @@ void dw_timer_irqhandler(int idx)
#ifdef CONFIG_LPM
static
void
manage_clock
(
timer_handle_t
handle
,
uint8_t
enable
)
{
if
(
handle
==
&
timer_instance
[
0
]
||
handle
==
&
timer_instance
[
1
])
if
(
handle
==
&
timer_instance
[
0
]
||
handle
==
&
timer_instance
[
1
])
{
drv_clock_manager_config
(
CLOCK_MANAGER_TIM
,
enable
);
}
else
if
(
handle
==
&
timer_instance
[
3
]
||
handle
==
&
timer_instance
[
2
])
}
else
if
(
handle
==
&
timer_instance
[
3
]
||
handle
==
&
timer_instance
[
2
])
{
drv_clock_manager_config
(
CLOCK_MANAGER_TIM1
,
enable
);
}
...
...
@@ -103,7 +103,7 @@ static void do_wakeup_sleep_action(timer_handle_t handle)
*/
timer_handle_t
csi_timer_initialize
(
int32_t
idx
,
timer_event_cb_t
cb_event
)
{
if
(
idx
<
0
||
idx
>=
CONFIG_TIMER_NUM
)
if
(
idx
<
0
||
idx
>=
CONFIG_TIMER_NUM
)
{
return
NULL
;
}
...
...
@@ -114,7 +114,7 @@ timer_handle_t csi_timer_initialize(int32_t idx, timer_event_cb_t cb_event)
int32_t
real_idx
=
target_get_timer
(
idx
,
&
base
,
&
irq
,
&
handler
);
if
(
real_idx
!=
idx
)
if
(
real_idx
!=
idx
)
{
return
NULL
;
}
...
...
@@ -134,7 +134,7 @@ timer_handle_t csi_timer_initialize(int32_t idx, timer_event_cb_t cb_event)
timer_deactive_control
(
addr
);
timer_priv
->
cb_event
=
cb_event
;
if
(
cb_event
!=
NULL
)
if
(
cb_event
!=
NULL
)
{
drv_irq_register
(
timer_priv
->
irq
,
handler
);
drv_irq_enable
(
timer_priv
->
irq
);
...
...
@@ -172,7 +172,7 @@ int32_t csi_timer_power_control(timer_handle_t handle, csi_power_stat_e state)
{
TIMER_NULL_PARAM_CHK
(
handle
);
#ifdef CONFIG_LPM
power_cb_t
callback
=
power_cb_t
callback
=
{
.
wakeup
=
do_wakeup_sleep_action
,
.
sleep
=
do_prepare_sleep_action
,
...
...
@@ -197,7 +197,7 @@ int32_t csi_timer_config(timer_handle_t handle, timer_mode_e mode)
dw_timer_priv_t
*
timer_priv
=
handle
;
dw_timer_reg_t
*
addr
=
(
dw_timer_reg_t
*
)(
timer_priv
->
base
);
switch
(
mode
)
switch
(
mode
)
{
case
TIMER_MODE_FREE_RUNNING
:
addr
->
TxControl
&=
~
DW_TIMER_TXCONTROL_MODE
;
...
...
@@ -248,15 +248,15 @@ int32_t csi_timer_start(timer_handle_t handle)
uint32_t
min_us
=
drv_get_timer_freq
(
timer_priv
->
idx
)
/
1000000
;
uint32_t
load
;
if
(((
timer_priv
->
timeout
*
drv_get_timer_freq
(
timer_priv
->
idx
))
/
1000000
)
>
0xffffffff
)
if
(((
timer_priv
->
timeout
*
drv_get_timer_freq
(
timer_priv
->
idx
))
/
1000000
)
>
0xffffffff
)
{
return
ERR_TIMER
(
DRV_ERROR_PARAMETER
);
}
if
(
min_us
)
if
(
min_us
)
{
load
=
(
uint32_t
)(
timer_priv
->
timeout
*
min_us
);
}
else
}
else
{
load
=
(
uint32_t
)(((
uint64_t
)(
timer_priv
->
timeout
)
*
drv_get_timer_freq
(
timer_priv
->
idx
))
/
1000000
);
}
...
...
@@ -265,11 +265,11 @@ int32_t csi_timer_start(timer_handle_t handle)
if
(
timer_priv
->
timeout
==
0
)
{
addr
->
TxLoadCount
=
0xffffffff
;
/* load time(us) */
}
else
}
else
{
if
((
addr
->
TxControl
|
0x2
)
==
0x2
)
{
addr
->
TxLoadCount
=
0xffffffff
;
/* load time(us) */
}
else
}
else
{
addr
->
TxLoadCount
=
load
;
/* load time(us) */
}
...
...
@@ -368,7 +368,7 @@ timer_status_t csi_timer_get_status(timer_handle_t handle)
{
timer_status_t
timer_status
=
{
0
};
if
(
handle
==
NULL
)
if
(
handle
==
NULL
)
{
return
timer_status
;
}
...
...
@@ -376,12 +376,12 @@ timer_status_t csi_timer_get_status(timer_handle_t handle)
dw_timer_priv_t
*
timer_priv
=
handle
;
dw_timer_reg_t
*
addr
=
(
dw_timer_reg_t
*
)(
timer_priv
->
base
);
if
(
addr
->
TxControl
&
DW_TIMER_TXCONTROL_ENABLE
)
if
(
addr
->
TxControl
&
DW_TIMER_TXCONTROL_ENABLE
)
{
timer_status
.
active
=
1
;
}
if
(
timer_priv
->
timeout_flag
==
1
)
if
(
timer_priv
->
timeout_flag
==
1
)
{
timer_status
.
timeout
=
1
;
}
...
...
bsp/thead-smart/drivers/dw_timer.h
浏览文件 @
f60514cd
...
...
@@ -33,11 +33,11 @@ typedef struct
__IOM
uint32_t
TxLoadCount
;
/* Offset: 0x000 (R/W) Receive buffer register */
__IM
uint32_t
TxCurrentValue
;
/* Offset: 0x004 (R) Transmission hold register */
__IOM
uint8_t
TxControl
:
5
;
/* Offset: 0x008 (R/W) Clock frequency division low section register */
uint8_t
RESERVED0
[
3
];
uint8_t
RESERVED0
[
3
];
__IM
uint8_t
TxEOI
:
1
;
/* Offset: 0x00c (R) Clock frequency division high section register */
uint8_t
RESERVED1
[
3
];
uint8_t
RESERVED1
[
3
];
__IM
uint8_t
TxIntStatus
:
1
;
/* Offset: 0x010 (R) Interrupt enable register */
uint8_t
RESERVED2
[
3
];
uint8_t
RESERVED2
[
3
];
}
dw_timer_reg_t
;
#ifdef __cplusplus
...
...
bsp/thead-smart/drivers/isr.c
浏览文件 @
f60514cd
...
...
@@ -44,7 +44,7 @@ ATTRIBUTE_ISR void SysTick_Handler(void)
#endif
csi_coret_config
(
drv_get_sys_freq
()
/
CONFIG_SYSTICK_HZ
,
CORET_IRQn
);
#if defined(CONFIG_KERNEL_RHINO)
systick_handler
();
#elif defined(CONFIG_KERNEL_FREERTOS)
...
...
bsp/thead-smart/drivers/novic_irq_tbl.c
浏览文件 @
f60514cd
...
...
@@ -22,7 +22,7 @@ void irq_vectors_init(void)
{
int
i
;
for
(
i
=
0
;
i
<
48
;
i
++
)
for
(
i
=
0
;
i
<
48
;
i
++
)
{
g_irqvector
[
i
]
=
Default_Handler
;
}
...
...
bsp/thead-smart/drivers/system.c
浏览文件 @
f60514cd
...
...
@@ -86,7 +86,7 @@ void SystemInit(void)
/* get interrupt level from info */
CLIC
->
CLICCFG
=
(((
CLIC
->
CLICINFO
&
CLIC_INFO_CLICINTCTLBITS_Msk
)
>>
CLIC_INFO_CLICINTCTLBITS_Pos
)
<<
CLIC_CLICCFG_NLBIT_Pos
);
for
(
i
=
0
;
i
<
64
;
i
++
)
for
(
i
=
0
;
i
<
64
;
i
++
)
{
CLIC
->
CLICINT
[
i
].
IP
=
0
;
CLIC
->
CLICINT
[
i
].
ATTR
=
1
;
/* use vector interrupt */
...
...
bsp/thead-smart/drivers/trap_c.c
浏览文件 @
f60514cd
...
...
@@ -26,11 +26,11 @@ void trap_c(uint32_t *regs)
printf
(
"CPU Exception: NO.%ld"
,
vec
);
printf
(
"
\n
"
);
for
(
i
=
0
;
i
<
31
;
i
++
)
for
(
i
=
0
;
i
<
31
;
i
++
)
{
printf
(
"x%d: %08lx
\t
"
,
i
+
1
,
regs
[
i
]);
if
((
i
%
4
)
==
3
)
if
((
i
%
4
)
==
3
)
{
printf
(
"
\n
"
);
}
...
...
@@ -40,7 +40,7 @@ void trap_c(uint32_t *regs)
printf
(
"mepc : %08lx
\n
"
,
regs
[
31
]);
printf
(
"mstatus: %08lx
\n
"
,
regs
[
32
]);
if
(
trap_c_callback
)
if
(
trap_c_callback
)
{
trap_c_callback
();
}
...
...
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