202108100628

examples/counter/verilog/counter_main_dump.v

@@ -185,6 +185,32 @@ endmodule
 
 
 
+(* 
+	HDL4SE = "LCOM",
+	CLSID = "230946EF-3EC1-43EC-A841-CDE8A9E97314",
+	softmodule = "hdl4se"
+*)
+module hdl4se_fifo
+	#(
+	parameter WIDTH = 32'h10,
+	parameter DEPTH = 32'h80
+	)
+	(
+	input  wClk,
+	input  nwReset,
+	input  wRead,
+	output  wDataValid,
+	output  [(WIDTH-32'h1):32'h0]  bReadData,
+	output  wWriteEnable,
+	input  wWrite,
+	input  [(WIDTH-32'h1):32'h0]  bWriteData
+	)
+	;
+	
+endmodule
+
+
+
 (* 
 	HDL4SE = "LCOM",
 	CLSID = "dffb1080-8b92-4b42-a607-d1b377c27bb1",

examples/digitled/src/digitled.c

@@ -56,7 +56,7 @@
 
 #define LEDCOUNT 10
 
-static int keypressed = 0;
+static int __keypressed = 0;
 
 void key_callback(GLFWwindow* window, int key, int scancode, int action, int mods)
 {
@@ -64,10 +64,10 @@ void key_callback(GLFWwindow* window, int key, int scancode, int action, int mod
 		return;
 	if (key >= GLFW_KEY_F1 && key <= GLFW_KEY_F10) {
 		key -= GLFW_KEY_F1;
-		if (keypressed & (1 << key))
-			keypressed &= ~(1 << key);
+		if (__keypressed & (1 << key))
+			__keypressed &= ~(1 << key);
 		else
-			keypressed |= (1 << key);
+			__keypressed |= (1 << key);
 	}
 }
 
@@ -92,6 +92,7 @@ IDLIST
 
 	VID(wRead_reg),
 	VID(bReadAddr_reg),
+	VID(keypressed),
 END_IDLIST
 
 MODULE_DECLARE(digitled)
@@ -117,7 +118,7 @@ DEFINE_FUNC(digitled_store_bReadAddr) {
 } END_DEFINE_FUNC
 
 DEFINE_FUNC(digitled_gen_bReadData) {
-	vput(bReadData, pobj->keypressed);
+	VAssign(bReadData, keypressed);
 } END_DEFINE_FUNC
 
 #define LEDWIDTH  0.11f
@@ -266,14 +267,14 @@ DEFINE_FUNC(digitled_clktick) {
 	/* 读nwReset信号，看是否复位 */
 	int i, j;	
 	int reset = VREAD_U32(nwReset);
-	pobj->keypressed = keypressed;
+	pobj->keypressed = __keypressed;
 	if (reset == 0) {
 		pobj->keypressed = 0;
 		for (i = 0; i < LEDCOUNT; i++) {
 			pobj->ledvalue[i] = 0;
 		}
 	}
-	
+	vput(keypressed, pobj->keypressed);
 	/* 读写命令，看是否写 */
 	if (reset != 0) {
 		int wWrite = VREAD_U32(wWrite);
@@ -351,6 +352,7 @@ MODULE_INIT(digitled)
 
 	GREG(wRead_reg, 1, digitled_store_wRead);
 	GREG(bReadAddr_reg, 32, digitled_store_bReadAddr);
+	REG(keypressed, 32);
 
 	CLKTICK_FUNC(digitled_clktick);
 	DEINIT_FUNC(M_ID(deinit));

examples/hdl4secnn/cnn/cnncell/CMakeLists.txt

@@ -11,7 +11,6 @@ add_library(cnncell STATIC
  "cnncell_datasource.c" 
  "cnncell_coeffbuf.c" 
  "cnncell_buf_r4.c"
- "cnncell_buf.c"
  "cnncell_dataoutput.c" 
  "cnncell_pooling.c" 
  "cnncell_lrn.c" 

examples/hdl4secnn/cnn/cnncell/cnncell.c

@@ -45,7 +45,6 @@
 static int cnncell_registed = 0;
 
 
-extern OFUNCPTR A_u_t_o_registor_cnncell_buf;
 extern OFUNCPTR A_u_t_o_registor_cnncell_buf_r4;
 extern OFUNCPTR A_u_t_o_registor_cnncell_coeffbuf;
 extern OFUNCPTR A_u_t_o_registor_cnncell_concat;
@@ -61,7 +60,6 @@ int cnnInit()
 {
 	if (cnncell_registed)
 		return 0;
-	A_u_t_o_registor_cnncell_buf();
 	A_u_t_o_registor_cnncell_buf_r4();
 	A_u_t_o_registor_cnncell_coeffbuf();
 	A_u_t_o_registor_cnncell_concat();

examples/hdl4secnn/cnn/cnncell/cnncell_buf.c

-/*
-** HDL4SE: 软件Verilog综合仿真平台
-** Copyright (C) 2021-2021, raoxianhong<raoxianhong@163.net>
-** LCOM: 轻量级组件对象模型
-** Copyright (C) 2021-2021, raoxianhong<raoxianhong@163.net>
-** All rights reserved.
-**
-** Redistribution and use in source and binary forms, with or without
-** modification, are permitted provided that the following conditions are met:
-**
-** * Redistributions of source code must retain the above copyright notice,
-**   this list of conditions and the following disclaimer.
-** * Redistributions in binary form must reproduce the above copyright notice,
-**   this list of conditions and the following disclaimer in the documentation
-**   and/or other materials provided with the distribution.
-** * The name of the author may be used to endorse or promote products
-**   derived from this software without specific prior written permission.
-**
-** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-** ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
-** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-** THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-/*
-* cnncell_buf.c
-  修改记录：
-	202107061537: rxh, initial version
-	202107180947: rxh, macro version
-*/
-#include "stdlib.h" 
-#include "stdio.h"
-#include "string.h"
-#include "object.h"
-#include "dlist.h"
-#include "cnncell.h"
-#include "bignumber.h"
-#include "hdl4secell.h"
-#include "threadlock.h"
-
-#define M_ID(id) cnncell_buf##id
-#define cnncell_buf_MODULE_VERSION_STRING "0.4.0-20210718.0947 CNN buf cell"
-#define cnncell_buf_MODULE_CLSID CLSID_CNN_BUF
-
-IDLIST
-	VID(wClk),
-	VID(nwReset),
-	VID(wDataReadEnable),
-	VID(wDataRead),
-	VID(wDataReadValid),
-	VID(bDataReadAddr),
-	VID(bDataReadData),
-	VID(wDataReadComplete),
-	VID(wDataWriteEnable),
-	VID(wDataWrite),
-	VID(bDataWriteAddr),
-	VID(bDataWriteData),
-	VID(wDataWriteComplete),
-	VID(wDataReadEnable_reg),
-	VID(wDataReadValid_reg),
-	VID(bDataReadData_reg),
-	VID(wDataWriteEnable_reg),
-	VID(wDataRead_reg),
-	VID(bDataReadAddr_reg),
-END_IDLIST
-
-MODULE_DECLARE(cnncell_buf)
-	unsigned int wordsize, wordcount, words;
-	unsigned int* buf;
-END_MODULE_DECLARE(cnncell_buf)
-
-DEFINE_FUNC(cnncell_buf_deinit) {
-	if (pobj->buf != NULL)
-		free(pobj->buf);
-} END_DEFINE_FUNC
-
-DEFINE_FUNC(cnncell_buf_clktick) {
-	unsigned int write;
-	unsigned int addr;
-	write = vget(wDataWrite);
-	if (write) {
-		addr = vget(bDataWriteAddr);
-		if (addr < pobj->wordcount) {
-			unsigned int j;
-			var wd = Var(bDataWriteData);
-			for (j = 0; j < pobj->words; j++) {
-				pobj->buf[addr * pobj->words + j] = varGetBits32(wd, j);
-			}
-		}
-	}
-} END_DEFINE_FUNC
-
-DEFINE_FUNC(cnncell_buf_gen_bDataReadData) {
-	VAssign(bDataReadData, bDataReadData_reg);
-} END_DEFINE_FUNC
-
-DEFINE_FUNC(cnncell_buf_gen_wDataReadValid) {
-	VAssign(wDataReadValid, wDataReadValid_reg);
-} END_DEFINE_FUNC
-
-DEFINE_FUNC(cnncell_buf_gen_wDataWriteEnable) {
-	VAssign(wDataWriteEnable, wDataWriteEnable_reg);
-} END_DEFINE_FUNC
-
-DEFINE_FUNC(cnncell_buf_gen_wDataReadEnable) {
-	VAssign(wDataReadEnable, wDataReadEnable_reg);
-} END_DEFINE_FUNC
-
-DEFINE_FUNC(cnncell_buf_gen_wDataReadEnable_reg) {
-	if (vget(nwReset) == 0) {
-		vput(wDataReadEnable_reg, 0);
-	}
-	else {
-		if (vget(wDataReadEnable_reg) && vget(wDataReadComplete)) {
-			vput(wDataReadEnable_reg, 0);
-		}
-		else if (vget(wDataWriteEnable_reg) && vget(wDataWriteComplete)) {
-			vput(wDataReadEnable_reg, 1);
-		}
-	}
-} END_DEFINE_FUNC
-
-DEFINE_FUNC(cnncell_buf_gen_wDataWriteEnable_reg) {
-	if (vget(nwReset) == 0) {
-		vput(wDataWriteEnable_reg, 1);
-	}
-	else {
-		if (vget(wDataReadEnable_reg) && vget(wDataReadComplete)) {
-			vput(wDataWriteEnable_reg, 1);
-		}
-		else if (vget(wDataWriteEnable_reg) && vget(wDataWriteComplete)) {
-			vput(wDataWriteEnable_reg, 0);
-		}
-	}
-} END_DEFINE_FUNC
-
-DEFINE_FUNC(cnncell_buf_gen_wDataReadValid_reg) {
-	if (vget(nwReset) == 0) {
-		vput(wDataReadValid_reg, 0);
-	}
-	else {
-		vput(wDataReadValid_reg, vget(wDataRead) && vget(wDataReadEnable_reg));
-	}
-} END_DEFINE_FUNC
-
-DEFINE_FUNC(cnncell_buf_gen_bDataReadData_reg) {
-	unsigned int readaddr = vget(bDataReadAddr);
-	if (readaddr < pobj->wordcount) {	
-		var readdata = Var(bDataReadData_reg);
-		unsigned int j;
-		for (j = 0; j < pobj->words; j++) {
-			varSetBits32(readdata, j, pobj->buf[readaddr * pobj->words + j]);
-		}
-	}
-} END_DEFINE_FUNC
-
-
-MODULE_INIT(cnncell_buf)
-	pobj->wordsize = (int)MODULE_PARAM(0);
-	pobj->wordcount = (int)MODULE_PARAM(1);
-	pobj->words = (pobj->wordsize + 31) / 32;
-	pobj->buf = (unsigned int *)malloc((pobj->words * pobj->wordcount) * 4);
-	if (pobj->buf == NULL)
-		return -1;
-	PORT_IN(wClk, 1);
-	PORT_IN(nwReset, 1);
-	GPORT_OUT(wDataReadEnable, 1, cnncell_buf_gen_wDataReadEnable);
-	PORT_IN(wDataRead, 1);
-	GPORT_OUT(wDataReadValid, 1, cnncell_buf_gen_wDataReadValid);
-	PORT_IN(bDataReadAddr, 32);
-	GPORT_OUT(bDataReadData, pobj->wordsize, cnncell_buf_gen_bDataReadData);
-	PORT_IN(wDataReadComplete, 1);
-	GPORT_OUT(wDataWriteEnable, 1, cnncell_buf_gen_wDataWriteEnable);
-	PORT_IN(wDataWrite, 1);
-	PORT_IN(bDataWriteAddr, 32);
-	PORT_IN(bDataWriteData, pobj->wordsize);
-	PORT_IN(wDataWriteComplete, 1);
-	GREG(wDataReadEnable_reg, 1, cnncell_buf_gen_wDataReadEnable_reg);
-	GREG(wDataWriteEnable_reg, 1, cnncell_buf_gen_wDataWriteEnable_reg);
-	GREG(wDataReadValid_reg, 1, cnncell_buf_gen_wDataReadValid_reg);
-	GREG(bDataReadData_reg, pobj->wordsize, cnncell_buf_gen_bDataReadData_reg);
-
-	DEINIT_FUNC(cnncell_buf_deinit);
-	CLKTICK_FUNC(cnncell_buf_clktick);
-END_MODULE_INIT(cnncell_buf)
-

examples/terris/verilog/terris_main_asm.v

@@ -185,6 +185,32 @@ endmodule
 
 
 
+(* 
+	HDL4SE = "LCOM",
+	CLSID = "230946EF-3EC1-43EC-A841-CDE8A9E97314",
+	softmodule = "hdl4se"
+*)
+module hdl4se_fifo
+	#(
+	parameter WIDTH = 32'h10,
+	parameter DEPTH = 32'h80
+	)
+	(
+	input  wClk,
+	input  nwReset,
+	input  wRead,
+	output  wDataValid,
+	output  [(WIDTH-32'h1):32'h0]  bReadData,
+	output  wWriteEnable,
+	input  wWrite,
+	input  [(WIDTH-32'h1):32'h0]  bWriteData
+	)
+	;
+	
+endmodule
+
+
+
 (* 
 	HDL4SE = "LCOM",
 	CLSID = "dffb1080-8b92-4b42-a607-d1b377c27bb1",

parser/verilog_expr.c

@@ -2032,6 +2032,120 @@ const char * verilogparseGenExprStr(HOBJECT expr, HOBJECT module)
 	return NULL;
 }
 
+const char* verilogparseGenExprDependStr(HOBJECT expr, HOBJECT module)
+{
+	int width;
+	sExpr* pobj;
+	pobj = (sExpr*)objectThis(expr);
+	if (pobj == NULL)
+		return 0;
+	expr_verilognode_procheck(expr, module, NULL);
+	width = verilogparseGenExprWidth(expr, module);
+	switch (pobj->data.exprtype) {
+	case EXPRTYPE_BINOP:
+	{
+		const char* rst;
+		char* src0;
+		char* src1;
+		rst = verilogparseGenExprDependStr(pobj->data.expr0, module);
+		if (rst == NULL)
+			return NULL;
+		src0 = STRDUP(rst);
+		rst = verilogparseGenExprDependStr(pobj->data.expr1, module);
+		if (rst == NULL) {
+			free(src0);
+			return NULL;
+		}
+		src1 = STRDUP(rst);
+		sprintf(hdl4se_parse_logbuf(), "%s, %s", src0, src1);
+		free(src0);
+		free(src1);
+		return hdl4se_parse_logbuf();
+		break;
+	}
+	case EXPRTYPE_UNOP:
+	{
+		return verilogparseGenExprDependStr(pobj->data.expr, module);
+	}
+	case EXPRTYPE_IFOP:
+	{
+		const char* rst;
+		char* src0;
+		char* src1;
+		char* src2;
+		rst = verilogparseGenExprDependStr(pobj->data.expr0, module);
+		if (rst == NULL)
+			return NULL;
+		src0 = STRDUP(rst);
+		rst = verilogparseGenExprDependStr(pobj->data.expr1, module);
+		if (rst == NULL) {
+			free(src0);
+			return NULL;
+		}
+		src1 = STRDUP(rst);
+		rst = verilogparseGenExprDependStr(pobj->data.expr2, module);
+		if (rst == NULL) {
+			free(src0);
+			free(src1);
+			return NULL;
+		}
+		src2 = STRDUP(rst);
+		sprintf(hdl4se_parse_logbuf(), "%s, %s, %s", src0, src1, src2);
+		free(src0);
+		free(src1);
+		free(src2);
+		return hdl4se_parse_logbuf();
+		break;
+	}
+	case EXPRTYPE_HIERARCHICAL_IDENT:
+	{
+		int index = -1;
+		/* 目前只取第一个名称 */
+		verilogVarSel* select;
+		select = verilogVarSelGetData(pobj->data.hierarchical_identifier->__dlist_pNext);
+		if (select != NULL) {
+			index = verilogModuleGetParamIndex(module, select->name->string);
+		}
+		if (index < 0)
+			return select->name->string;
+		return "";
+		break;
+	}
+	case EXPRTYPE_CONCAT: {
+		char* buf;
+		char* vbuf;
+		buf = malloc(8192);
+		{
+			IDListVarPtr pitem, pnextitem;
+			IDListVarPtr plist = pobj->data.expr_list;
+			pitem = plist->__dlist_pNext;
+			buf[0] = 0;
+			while (pitem != plist) {
+				pnextitem = pitem->__dlist_pNext;
+				vbuf = buf + strlen(buf);
+				if (strlen(buf) > 0)
+					sprintf(vbuf, ", %s", verilogparseGenExprDependStr(pitem, module));
+				else
+					sprintf(vbuf, "%s", verilogparseGenExprDependStr(pitem, module));
+				pitem = pnextitem;
+			}
+
+		}
+		strcpy(hdl4se_parse_logbuf(), buf);
+		free(buf);
+		return hdl4se_parse_logbuf();
+	}
+
+	default:
+	{
+		return "";
+		break;
+	}
+	}
+	return NULL;
+}
+
+
 const char * verilogparseGenExprStrVar(HOBJECT expr, HOBJECT module, char * linehead)
 {
 	int width;

parser/verilog_module.c

@@ -663,9 +663,10 @@ static int verilogmodule_verilognode_gencode(HOBJECT object, FILE * pFile, HOBJE
                         if (verilogparseIsLValueExpr(connect->expr0, pobj, NULL) == 0) {
                             int width = verilogparseGenExprWidth(connect->expr0, pobj);
                             const char* exprstr = NULL;
-                            fprintf(pFile, "\nDEFINE_FUNC(%s_gen_%s_dot_%s) { /* port:%s(%s).%s, %d */\n",
+                            fprintf(pFile, "\nDEFINE_FUNC_DEPEND(%s_gen_%s_dot_%s, \"%s\") { /* port:%s(%s).%s, %d */\n",
                                 pobj->data.name->string,
                                 moduleinst->instname->string, port->name->string,
+                                verilogparseGenExprDependStr(connect->expr0, pobj),
                                 moduleinst->instname->string, moduleinfo->name->string, port->name->string,
                                 port->index);
                             if (width <= 64)
@@ -707,9 +708,11 @@ static int verilogmodule_verilognode_gencode(HOBJECT object, FILE * pFile, HOBJE
             int width = verilogparseGenExprWidth(assignment->expr, pobj);
             pitemtemp = pitem->__dlist_pNext;
             /*if (isWireLValue(&pobj->data, lvalue)) */ {
-                fprintf(pFile, "\nDEFINE_FUNC(%s_gen_%s) { \n",
+                fprintf(pFile, "\nDEFINE_FUNC_DEPEND(%s_gen_%s, \"%s\") { \n",
                     pobj->data.name->string,
-                    lvalue->name->string);
+                    lvalue->name->string,
+                    verilogparseGenExprDependStr(assignment->expr, pobj)
+                    );
                 if (width <= 64)
                     exprstr = verilogparseGenExprStr(assignment->expr, pobj);
                 if (exprstr != NULL) {

parser/verilog_parsetree.h

@@ -693,6 +693,7 @@ verilogExpr* verilogExprGetData(HOBJECT object);
 
 int verilogparseGenConstExpr(FILE* pFile, const char* pre, HOBJECT expr, HOBJECT module);
 const char * verilogparseGenExprStr(HOBJECT expr, HOBJECT module);
+const char* verilogparseGenExprDependStr(HOBJECT expr, HOBJECT module);
 const char * verilogparseGenExprStrVar(HOBJECT expr, HOBJECT module, char * linehead);
 const char* verilogparseGenExprWidthStr(HOBJECT expr, HOBJECT module);
 int verilogparseGenExprWidth(HOBJECT expr, HOBJECT module);

testparser/main.c

@@ -18,9 +18,9 @@ extern char* yytext;
 
 static char logbuf[64 * 1024];
 
-#define GOOGLENET 1
+#define GOOGLENET 0
 #define TERRIS    0
-#define COUNTER   0
+#define COUNTER   1
 
 #ifdef WIN32
 #define WORKDIR "d:/gitwork"