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前往新版Gitcode,体验更适合开发者的 AI 搜索 >>
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59ac2525
编写于
5月 19, 2021
作者:
饶先宏
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
202105191735
上级
730dcd86
变更
4
隐藏空白更改
内联
并排
Showing
4 changed file
with
231 addition
and
84 deletion
+231
-84
examples/counter/src/counter.c
examples/counter/src/counter.c
+179
-6
examples/counter/verilog/main_asm.v
examples/counter/verilog/main_asm.v
+44
-71
hdl4secell/include/hdl4secell.h
hdl4secell/include/hdl4secell.h
+5
-4
hdl4secell/verilog/hdl4secell.v
hdl4secell/verilog/hdl4secell.v
+3
-3
未找到文件。
examples/counter/src/counter.c
浏览文件 @
59ac2525
...
...
@@ -65,8 +65,8 @@ static IHDL4SEUnit** hdl4seCreateDec2seg(IHDL4SEModule** parent, char* instancep
/* 得到对象的IHDL4SEModule 接口 */
objectQueryInterface
(
unit_dec2seg
,
IID_HDL4SEMODULE
,
&
module_dec2seg
);
/* 增加端口 */
objectCall3
(
module_dec2seg
,
AddPort
,
4
,
PORTTYPE_INPUT
,
"dec"
);
objectCall3
(
module_dec2seg
,
AddPort
,
8
,
PORTTYPE_OUTPUT
,
"seg"
);
objectCall3
(
module_dec2seg
,
AddPort
,
4
,
PORTTYPE_INPUT
,
"
0.
dec"
);
objectCall3
(
module_dec2seg
,
AddPort
,
8
,
PORTTYPE_OUTPUT
,
"
1.
seg"
);
for
(
i
=
0
;
i
<
11
;
i
++
)
{
char
tempname
[
32
];
...
...
@@ -88,6 +88,7 @@ static IHDL4SEUnit** hdl4seCreateDec2seg(IHDL4SEModule** parent, char* instancep
}
/* 译码模块的输出seg连接到数据先择器的输出*/
objectCall3
(
unit_dec2seg
,
Connect
,
1
,
unit_mux16
,
17
);
/*释放module接口*/
objectRelease
(
module_dec2seg
);
/*返回unit接口*/
...
...
@@ -105,10 +106,10 @@ static IHDL4SEUnit** hdl4seCreateCounter(IHDL4SEModule** parent, char* instancep
/* 得到对象的IHDL4SEModule 接口 */
objectQueryInterface
(
unit_counter
,
IID_HDL4SEMODULE
,
&
module_counter
);
/* 增加端口 */
objectCall3
(
module_counter
,
AddPort
,
1
,
PORTTYPE_INPUT
,
"nwReset"
);
objectCall3
(
module_counter
,
AddPort
,
1
,
PORTTYPE_INPUT
,
"wCounterIt"
);
objectCall3
(
module_counter
,
AddPort
,
width
,
PORTTYPE_OUTPUT
,
"bCouter"
);
objectCall3
(
module_counter
,
AddPort
,
1
,
PORTTYPE_OUTPUT
,
"wCounterOverflow"
);
objectCall3
(
module_counter
,
AddPort
,
1
,
PORTTYPE_INPUT
,
"
0.
nwReset"
);
objectCall3
(
module_counter
,
AddPort
,
1
,
PORTTYPE_INPUT
,
"
1.
wCounterIt"
);
objectCall3
(
module_counter
,
AddPort
,
width
,
PORTTYPE_OUTPUT
,
"
2.
bCouter"
);
objectCall3
(
module_counter
,
AddPort
,
1
,
PORTTYPE_OUTPUT
,
"
3.
wCounterOverflow"
);
/*WIDTH宽度的寄存器用来保存计数器的值*/
sprintf
(
temp
,
"%d"
,
width
);
...
...
@@ -221,9 +222,181 @@ static IHDL4SEUnit** hdl4seCreateCounter(IHDL4SEModule** parent, char* instancep
objectRelease
(
module_counter
);
/*返回unit接口*/
return
unit_counter
;
}
IHDL4SEUnit
**
hdl4seCreateMain
(
IHDL4SEModule
**
parent
,
char
*
instanceparam
,
char
*
name
)
{
/* module main */
IHDL4SEModule
**
module_main
=
NULL
;
IHDL4SEUnit
**
unit_main
=
NULL
;
char
temp
[
128
];
int
i
;
/* 生成模块对象 */
unit_main
=
hdl4seCreateUnit
(
parent
,
CLSID_HDL4SE_MODULE
,
instanceparam
,
name
);
/* 得到对象的IHDL4SEModule 接口 */
objectQueryInterface
(
unit_main
,
IID_HDL4SEMODULE
,
&
module_main
);
/* 增加端口 */
objectCall3
(
module_main
,
AddPort
,
1
,
PORTTYPE_INPUT
,
"0.nwReset"
);
objectCall3
(
module_main
,
AddPort
,
1
,
PORTTYPE_OUTPUT
,
"1.wWrite"
);
objectCall3
(
module_main
,
AddPort
,
32
,
PORTTYPE_OUTPUT
,
"2.bWriteAddr"
);
objectCall3
(
module_main
,
AddPort
,
32
,
PORTTYPE_OUTPUT
,
"3.bWriteData"
);
objectCall3
(
module_main
,
AddPort
,
4
,
PORTTYPE_OUTPUT
,
"4.bWriteMask"
);
objectCall3
(
module_main
,
AddPort
,
1
,
PORTTYPE_OUTPUT
,
"5.wRead"
);
objectCall3
(
module_main
,
AddPort
,
32
,
PORTTYPE_OUTPUT
,
"6.bReadAddr"
);
objectCall3
(
module_main
,
AddPort
,
32
,
PORTTYPE_INPUT
,
"7.bReadData"
);
IHDL4SEUnit
**
wire_wButton0Pressed
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wButton0Pressed"
);
IHDL4SEUnit
**
wire_wButton1Pressed
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wButton1Pressed"
);
IHDL4SEUnit
**
wire_wButton2Pressed
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wButton2Pressed"
);
IHDL4SEUnit
**
const_0_wRead
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_CONST
,
"1, 1"
,
"const_0_wRead"
);
objectCall3
(
unit_main
,
Connect
,
5
,
const_0_wRead
,
0
);
IHDL4SEUnit
**
const_bReadAddr
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_CONST
,
"32, 32'hF000_0000"
,
"const_bReadAddr"
);
objectCall3
(
unit_main
,
Connect
,
6
,
const_bReadAddr
,
0
);
IHDL4SEUnit
**
split_bReadData_wButton012
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_SPLIT4
,
"32, 1, 0, 1, 1, 1, 2, 1, 3"
,
"bReadData_wButton012"
);
objectCall3
(
split_bReadData_wButton012
,
Connect
,
0
,
unit_main
,
7
);
objectCall3
(
wire_wButton0Pressed
,
Connect
,
0
,
split_bReadData_wButton012
,
1
);
objectCall3
(
wire_wButton1Pressed
,
Connect
,
0
,
split_bReadData_wButton012
,
2
);
objectCall3
(
wire_wButton2Pressed
,
Connect
,
0
,
split_bReadData_wButton012
,
3
);
/* split_bReadData_wButton012的第四脚不连接 */
IHDL4SEUnit
**
wire_nwResetCount
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"nwResetCount"
);
IHDL4SEUnit
**
wire_wCounterin
[
10
];
for
(
i
=
0
;
i
<
10
;
i
++
)
{
sprintf
(
temp
,
"wCounterin0%d"
,
i
);
wire_wCounterin
[
i
]
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
temp
);
}
IHDL4SEUnit
**
wire_bCount
[
10
];
for
(
i
=
0
;
i
<
10
;
i
++
)
{
sprintf
(
temp
,
"bCount0%d"
,
i
);
wire_bCount
[
i
]
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"4"
,
temp
);
}
IHDL4SEUnit
**
counter_counter
[
10
];
for
(
i
=
0
;
i
<
10
;
i
++
)
{
sprintf
(
temp
,
"counter%d"
,
i
);
counter_counter
[
i
]
=
hdl4seCreateCounter
(
module_main
,
"4, 9, 0"
,
temp
);
objectCall3
(
counter_counter
[
i
],
Connect
,
0
,
wire_nwResetCount
,
0
);
objectCall3
(
counter_counter
[
i
],
Connect
,
1
,
wire_wCounterin
[
i
],
0
);
objectCall3
(
wire_bCount
[
i
],
Connect
,
0
,
counter_counter
[
i
],
2
);
if
(
i
<
9
)
objectCall3
(
wire_wCounterin
[
i
+
1
],
Connect
,
0
,
counter_counter
[
i
],
3
);
}
IHDL4SEUnit
**
wire_wirein_wCounterIt
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wirein_wCounterIt"
);
IHDL4SEUnit
**
wire_wireout_wCounterIt
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wireout_wCounterIt"
);
IHDL4SEUnit
**
reg_wCounterIt
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_REG
,
"1"
,
"wCounterIt"
);
/*寄存器和线网连接在一起*/
objectCall3
(
reg_wCounterIt
,
Connect
,
0
,
wire_wirein_wCounterIt
,
0
);
objectCall3
(
wire_wireout_wCounterIt
,
Connect
,
0
,
reg_wCounterIt
,
1
);
objectCall3
(
wire_wCounterin
[
0
],
Connect
,
0
,
wire_wireout_wCounterIt
,
0
);
IHDL4SEUnit
**
wire_wButton0NotPressed
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wButton0NotPressed"
);
sprintf
(
temp
,
"1, 1, %d"
,
UNOP_NOT
);
IHDL4SEUnit
**
unop_Button0NotPressed
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_UNOP
,
temp
,
"unop_Button0NotPressed"
);
objectCall3
(
unop_Button0NotPressed
,
Connect
,
0
,
wire_wButton0Pressed
,
0
);
objectCall3
(
wire_wButton0NotPressed
,
Connect
,
0
,
unop_Button0NotPressed
,
1
);
IHDL4SEUnit
**
wire_wButton1NotPressed
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wButton1NotPressed"
);
sprintf
(
temp
,
"1, 1, %d"
,
UNOP_NOT
);
IHDL4SEUnit
**
unop_Button1NotPressed
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_UNOP
,
temp
,
"unop_Button1NotPressed"
);
objectCall3
(
unop_Button1NotPressed
,
Connect
,
0
,
wire_wButton1Pressed
,
0
);
objectCall3
(
wire_wButton1NotPressed
,
Connect
,
0
,
unop_Button1NotPressed
,
1
);
sprintf
(
temp
,
"1, 1, 1, %d"
,
BINOP_AND
);
IHDL4SEUnit
**
binop_binop_counterit
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_BINOP
,
temp
,
"binop_counterit"
);
objectCall3
(
binop_binop_counterit
,
Connect
,
0
,
wire_wButton1NotPressed
,
0
);
objectCall3
(
binop_binop_counterit
,
Connect
,
1
,
wire_wButton2Pressed
,
0
);
objectCall3
(
wire_wirein_wCounterIt
,
Connect
,
0
,
binop_binop_counterit
,
2
);
sprintf
(
temp
,
"1, 1, 1, %d"
,
BINOP_AND
);
IHDL4SEUnit
**
binop_binop_resetcounter
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_BINOP
,
temp
,
"binop_resetcounter"
);
objectCall3
(
binop_binop_resetcounter
,
Connect
,
0
,
wire_wButton0NotPressed
,
0
);
objectCall3
(
binop_binop_resetcounter
,
Connect
,
1
,
unit_main
,
0
);
objectCall3
(
wire_nwResetCount
,
Connect
,
0
,
binop_binop_resetcounter
,
2
);
/* 以下是译码器连接,十个计数器的输出对应到十个译码器 */
IHDL4SEUnit
**
code
[
10
];
IHDL4SEUnit
**
dec
[
10
];
for
(
i
=
0
;
i
<
10
;
i
++
)
{
sprintf
(
temp
,
"code%d"
,
i
);
code
[
i
]
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"8"
,
temp
);
sprintf
(
temp
,
"dec%d"
,
i
);
dec
[
i
]
=
hdl4seCreateDec2seg
(
module_main
,
""
,
temp
);
objectCall3
(
dec
[
i
],
Connect
,
0
,
wire_bCount
[
i
],
0
);
objectCall3
(
code
[
i
],
Connect
,
0
,
dec
[
i
],
1
);
}
IHDL4SEUnit
**
wire_wCounterin98
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wCounterin98"
);
IHDL4SEUnit
**
wire_wCounterin76
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wCounterin76"
);
IHDL4SEUnit
**
wire_wCounterin54
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wCounterin54"
);
IHDL4SEUnit
**
wire_wCounterin32
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wCounterin32"
);
IHDL4SEUnit
**
wire_wCounterin10
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wCounterin10"
);
IHDL4SEUnit
**
wire_wCounterin7654
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wCounterin7654"
);
IHDL4SEUnit
**
wire_wCounterin3210
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1"
,
"wCounterin3210"
);
sprintf
(
temp
,
"1, 1, 1, %d"
,
BINOP_OR
);
IHDL4SEUnit
**
binop_or98
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_BINOP
,
temp
,
"or98"
);
objectCall3
(
binop_or98
,
Connect
,
0
,
wire_wCounterin
[
9
],
0
);
objectCall3
(
binop_or98
,
Connect
,
1
,
wire_wCounterin
[
8
],
0
);
objectCall3
(
wire_wCounterin98
,
Connect
,
0
,
binop_or98
,
2
);
sprintf
(
temp
,
"1, 1, 1, %d"
,
BINOP_OR
);
IHDL4SEUnit
**
binop_or76
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_BINOP
,
temp
,
"or76"
);
objectCall3
(
binop_or76
,
Connect
,
0
,
wire_wCounterin
[
7
],
0
);
objectCall3
(
binop_or76
,
Connect
,
1
,
wire_wCounterin
[
6
],
0
);
objectCall3
(
wire_wCounterin76
,
Connect
,
0
,
binop_or76
,
2
);
sprintf
(
temp
,
"1, 1, 1, %d"
,
BINOP_OR
);
IHDL4SEUnit
**
binop_or54
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_BINOP
,
temp
,
"or54"
);
objectCall3
(
binop_or54
,
Connect
,
0
,
wire_wCounterin
[
5
],
0
);
objectCall3
(
binop_or54
,
Connect
,
1
,
wire_wCounterin
[
4
],
0
);
objectCall3
(
wire_wCounterin54
,
Connect
,
0
,
binop_or54
,
2
);
sprintf
(
temp
,
"1, 1, 1, %d"
,
BINOP_OR
);
IHDL4SEUnit
**
binop_or32
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_BINOP
,
temp
,
"or32"
);
objectCall3
(
binop_or32
,
Connect
,
0
,
wire_wCounterin
[
3
],
0
);
objectCall3
(
binop_or32
,
Connect
,
1
,
wire_wCounterin
[
2
],
0
);
objectCall3
(
wire_wCounterin32
,
Connect
,
0
,
binop_or32
,
2
);
sprintf
(
temp
,
"1, 1, 1, %d"
,
BINOP_OR
);
IHDL4SEUnit
**
binop_or10
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_BINOP
,
temp
,
"or10"
);
objectCall3
(
binop_or10
,
Connect
,
0
,
wire_wCounterin
[
1
],
0
);
objectCall3
(
binop_or10
,
Connect
,
1
,
wire_wCounterin
[
0
],
0
);
objectCall3
(
wire_wCounterin10
,
Connect
,
0
,
binop_or10
,
2
);
sprintf
(
temp
,
"1, 1, 1, %d"
,
BINOP_OR
);
IHDL4SEUnit
**
binop_or7654
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_BINOP
,
temp
,
"or7654"
);
objectCall3
(
binop_or7654
,
Connect
,
0
,
binop_or76
,
0
);
objectCall3
(
binop_or7654
,
Connect
,
1
,
binop_or54
,
0
);
objectCall3
(
wire_wCounterin7654
,
Connect
,
0
,
binop_or7654
,
2
);
sprintf
(
temp
,
"1, 1, 1, %d"
,
BINOP_OR
);
IHDL4SEUnit
**
binop_or3210
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_BINOP
,
temp
,
"or3210"
);
objectCall3
(
binop_or3210
,
Connect
,
0
,
binop_or32
,
0
);
objectCall3
(
binop_or3210
,
Connect
,
1
,
binop_or10
,
0
);
objectCall3
(
wire_wCounterin3210
,
Connect
,
0
,
binop_or3210
,
2
);
IHDL4SEUnit
**
wire_bChanged_if_nwReset
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"3"
,
"bChanged_if_nwReset"
);
IHDL4SEUnit
**
bind_wCounterin
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"1, 1, 1"
,
"bind_wCounterin"
);
objectCall3
(
bind_wCounterin
,
Connect
,
0
,
wire_wCounterin3210
,
0
);
objectCall3
(
bind_wCounterin
,
Connect
,
1
,
wire_wCounterin7654
,
0
);
objectCall3
(
bind_wCounterin
,
Connect
,
2
,
wire_wCounterin98
,
0
);
objectCall3
(
wire_bChanged_if_nwReset
,
Connect
,
0
,
bind_wCounterin
,
3
);
IHDL4SEUnit
**
b3b0
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_WIRE
,
"3"
,
"b3b0"
);
IHDL4SEUnit
**
mux_if_nwReset
=
hdl4seCreateUnit
(
module_main
,
CLSID_HDL4SE_MUX2
,
"3"
,
"mux_if_nwReset"
);
objectCall3
(
mux_if_nwReset
,
Connect
,
0
,
b3b0
,
0
);
objectCall3
(
mux_if_nwReset
,
Connect
,
1
,
wire_bChanged_if_nwReset
,
0
);
objectCall3
(
wire_wirein_bCounterChanged
,
Connect
,
1
,
mux_if_nwReset
,
2
);
/*释放module接口*/
objectRelease
(
module_main
);
/*返回unit接口*/
return
unit_main
;
}
\ No newline at end of file
examples/counter/verilog/main_asm.v
浏览文件 @
59ac2525
...
...
@@ -190,7 +190,7 @@ module main(input wClk,
wire
wButton2Pressed
;
/*我们一直在读按键的状态*/
hdl4se_const
#(
1
,
1
)
const_0_wRead
(
wRead
);
hdl4se_const
#(
32
,
32'hF000_0000
)
const_bReadAddr
(
w
ReadAddr
);
hdl4se_const
#(
32
,
32'hF000_0000
)
const_bReadAddr
(
b
ReadAddr
);
hdl4se_split4
#(
INPUTWIDTH
=
32
,
...
...
@@ -217,16 +217,16 @@ module main(input wClk,
wCounterin9
;
wire
[
3
:
0
]
bCount0
,
bCount1
,
bCount2
,
bCount3
,
bCount4
,
bCount5
,
bCount6
,
bCount7
,
bCount8
,
bCount9
;
counter
#(
4
,
9
,
0
)
counter0
(
wClk
,
nw
CounterRese
t
,
wCounterin0
,
bCount0
,
wCounterin1
);
counter
#(
4
,
9
,
0
)
counter1
(
wClk
,
nw
CounterRese
t
,
wCounterin1
,
bCount1
,
wCounterin2
);
counter
#(
4
,
9
,
0
)
counter2
(
wClk
,
nw
CounterRese
t
,
wCounterin2
,
bCount2
,
wCounterin3
);
counter
#(
4
,
9
,
0
)
counter3
(
wClk
,
nw
CounterRese
t
,
wCounterin3
,
bCount3
,
wCounterin4
);
counter
#(
4
,
9
,
0
)
counter4
(
wClk
,
nw
CounterRese
t
,
wCounterin4
,
bCount4
,
wCounterin5
);
counter
#(
4
,
9
,
0
)
counter5
(
wClk
,
nw
CounterRese
t
,
wCounterin5
,
bCount5
,
wCounterin6
);
counter
#(
4
,
9
,
0
)
counter6
(
wClk
,
nw
CounterRese
t
,
wCounterin6
,
bCount6
,
wCounterin7
);
counter
#(
4
,
9
,
0
)
counter7
(
wClk
,
nw
CounterRese
t
,
wCounterin7
,
bCount7
,
wCounterin8
);
counter
#(
4
,
9
,
0
)
counter8
(
wClk
,
nw
CounterRese
t
,
wCounterin8
,
bCount8
,
wCounterin9
);
counter
#(
4
,
9
,
0
)
counter9
(
wClk
,
nw
CounterRese
t
,
wCounterin9
,
bCount9
,
.
wCounterOverflow
());
counter
#(
4
,
9
,
0
)
counter0
(
wClk
,
nw
ResetCoun
t
,
wCounterin0
,
bCount0
,
wCounterin1
);
counter
#(
4
,
9
,
0
)
counter1
(
wClk
,
nw
ResetCoun
t
,
wCounterin1
,
bCount1
,
wCounterin2
);
counter
#(
4
,
9
,
0
)
counter2
(
wClk
,
nw
ResetCoun
t
,
wCounterin2
,
bCount2
,
wCounterin3
);
counter
#(
4
,
9
,
0
)
counter3
(
wClk
,
nw
ResetCoun
t
,
wCounterin3
,
bCount3
,
wCounterin4
);
counter
#(
4
,
9
,
0
)
counter4
(
wClk
,
nw
ResetCoun
t
,
wCounterin4
,
bCount4
,
wCounterin5
);
counter
#(
4
,
9
,
0
)
counter5
(
wClk
,
nw
ResetCoun
t
,
wCounterin5
,
bCount5
,
wCounterin6
);
counter
#(
4
,
9
,
0
)
counter6
(
wClk
,
nw
ResetCoun
t
,
wCounterin6
,
bCount6
,
wCounterin7
);
counter
#(
4
,
9
,
0
)
counter7
(
wClk
,
nw
ResetCoun
t
,
wCounterin7
,
bCount7
,
wCounterin8
);
counter
#(
4
,
9
,
0
)
counter8
(
wClk
,
nw
ResetCoun
t
,
wCounterin8
,
bCount8
,
wCounterin9
);
counter
#(
4
,
9
,
0
)
counter9
(
wClk
,
nw
ResetCoun
t
,
wCounterin9
,
bCount9
,
.
wCounterOverflow
());
wire
wirein_wCounterIt
,
wireout_wCounterIt
;
hdl4se_reg
#(
1
)
wCounterIt
(
...
...
@@ -236,11 +236,10 @@ module main(input wClk,
);
wire
wButton0NotPressed
;
hdl4se_unop
#(
1
,
1
,
UNOP_NOT
)
Button0NotPressed
(
wButton0Pressed
,
wButton0NotPressed
);
assign
wEn_wCounterIt
=
wButton0NotPressed
;
/*counterit= (~b1) & b2*/
wire
wButton1NotPressed
;
hdl4se_unop
#(
1
,
1
,
UNOP_NOT
)
Button1NotPressed
(
wButton1Pressed
,
wButton1NotPressed
);
hdl4se_unop
#(
1
,
1
,
UNOP_NOT
)
unop_
Button1NotPressed
(
wButton1Pressed
,
wButton1NotPressed
);
hdl4se_binop
#(
1
,
1
,
1
,
BINOP_AND
)
binop_counterit
(
wButton1NotPressed
,
wButton2Pressed
,
wirein_wCounterIt
);
/*assign nwResetCount = (~b0) & nwReset; */
...
...
@@ -270,21 +269,7 @@ dec2seg dec9(bCount9, code9);
/*下面将译码器输出写到外面去,控制数码管显示*/
/*
我们用寄存器输出,
注意到我们一次只能输出4个字节,因此一个
时钟周期最多只能控制四个数码管,我们分三段
来写,优先写变化慢的,用对应计数器的输入
标志来得到是否变化。不过要注意计数器的输出
晚一拍出来,所以变化情况也寄存一拍。
*/
wire
[
2
:
0
]
wirein_bCounterChanged
,
wireout_bCounterChanged
;
hdl4se_reg
#(
3
)
reg_wCounterIt
(
wClk
,
wirein_bCounterChanged
,
wireout_bCounterChanged
);
wire
wCounterin98
,
wCounterin76
,
wCounterin54
,
wCounterin32
,
wCounterin10
,
wCounterin7654
,
wCounterin3210
;
hdl4se_binop
#(
1
,
1
,
1
,
BINOP_OR
)
or98
(
wCounterin9
,
wCounterin8
,
wCounterin98
);
...
...
@@ -294,13 +279,15 @@ dec2seg dec9(bCount9, code9);
hdl4se_binop
#(
1
,
1
,
1
,
BINOP_OR
)
or10
(
wCounterin1
,
wCounterin0
,
wCounterin10
);
hdl4se_binop
#(
1
,
1
,
1
,
BINOP_OR
)
or32
(
wCounterin76
,
wCounterin54
,
wCounterin7654
);
hdl4se_binop
#(
1
,
1
,
1
,
BINOP_OR
)
or10
(
wCounterin32
,
wCounterin10
,
wCounterin3210
);
wire
[
2
:
0
]
bChanded_if_nwReset
;
hdl4se_bind3
#(
1
,
1
,
1
)(
wCounterin98
,
wCounterin7654
,
wCounterin3210
,
bChanded_if_nwReset
);
wire
[
2
:
0
]
bChanged_if_nwReset
;
hdl4se_bind3
#(
1
,
1
,
1
)
bind_wCounterin
(
wCounterin98
,
wCounterin7654
,
wCounterin3210
,
bChanged_if_nwReset
);
wire
[
2
:
0
]
b3b0
;
hdl4se_const
#(
3
,
0
)
const_3b0
(
b3b0
);
hdl4se_mux2
#(
3
)
(
nwReset
,
hdl4se_mux2
#(
3
)
mux_if_nwReset
(
nwReset
,
b3b0
,
bChan
d
ed_if_nwReset
,
bChan
g
ed_if_nwReset
,
wirein_bCounterChanged
);
...
...
@@ -377,97 +364,83 @@ dec2seg dec9(bCount9, code9);
wire
[
31
:
0
]
wire_bWriteAddr_if_bCounterChanged0
;
hdl4se_mux2
#(
32
)
mux_bWriteAddr_if_bCounterChanged0
(
wCounterChanged0
,
wireout_bWriteAddr
,
b3210
,
b32
hf00000
10
,
wire_bWriteAddr_if_bCounterChanged0
);
wire
[
31
:
0
]
wire_bWriteData_if_bCounterChanged0
;
hdl4se_mux2
#(
32
)
mux_bWriteData_if_bCounterChanged0
(
wCounterChanged0
,
wireout_bWriteData
,
b32hf0000010
,
,
b3210
wire_bWriteData_if_bCounterChanged0
);
wire
[
3
:
0
]
wire_bWriteMask_if_bCounterChanged1
;
hdl4se_mux2
#(
4
)
mux_bWriteMask_if_bCounterChanged1
(
wCounterChanged1
,
wire
out_bWriteMask
,
wire
_bWriteMask_if_bCounterChanged0
,
b4b0000
,
wire_bWriteMask_if_bCounterChanged1
);
wire
[
31
:
0
]
wire_bWriteAddr_if_bCounterChanged1
;
hdl4se_mux2
#(
32
)
mux_bWriteAddr_if_bCounterChanged1
(
wCounterChanged1
,
wire
out_bWriteAddr
,
b32
10
,
wire
_bWriteAddr_if_bCounterChanged0
,
b32
hf0000014
,
wire_bWriteAddr_if_bCounterChanged1
);
wire
[
31
:
0
]
wire_bWriteData_if_bCounterChanged1
;
hdl4se_mux2
#(
32
)
mux_bWriteData_if_bCounterChanged1
(
wCounterChanged1
,
wire
out_bWriteData
,
b
32hf0000010
,
wire
_bWriteData_if_bCounterChanged0
,
b
7654
,
wire_bWriteData_if_bCounterChanged1
);
wire
[
3
:
0
]
wire_bWriteMask_if_bCounterChanged2
;
hdl4se_mux2
#(
4
)
mux_bWriteMask_if_bCounterChanged2
(
wCounterChanged2
,
wire
out_bWriteMask
,
b4b
00
00
,
wire
_bWriteMask_if_bCounterChanged1
,
b4b
11
00
,
wire_bWriteMask_if_bCounterChanged2
);
wire
[
31
:
0
]
wire_bWriteAddr_if_bCounterChanged2
;
hdl4se_mux2
#(
32
)
mux_bWriteAddr_if_bCounterChanged1
(
wCounterChanged2
,
wire
out_bWriteAddr
,
b3210
,
wire
_bWriteAddr_if_bCounterChanged1
,
,
b32hf0000018
wire_bWriteAddr_if_bCounterChanged2
);
wire
[
31
:
0
]
wire_bWriteData_if_bCounterChanged2
;
hdl4se_mux2
#(
32
)
mux_bWriteData_if_bCounterChanged2
(
wCounterChanged2
,
wire
out_bWriteData
,
b
32hf0000010
,
wire
_bWriteData_if_bCounterChanged1
,
b
0098
,
wire_bWriteData_if_bCounterChanged2
);
wire
[
3
:
0
]
wire_bWriteMask_if_nwReset
;
hdl4se_mux2
#(
4
)
mux_bWriteMask_if_nwReset
(
nwReset
,
wire
out_bWriteMask
,
wire
_bWriteMask_if_bCounterChanged2
,
b4b0000
,
wire
_bWriteMask_if_nwReset
wire
in_bWriteMask
);
wire
[
31
:
0
]
wire_bWriteAddr_if_nwReset
;
hdl4se_mux2
#(
32
)
mux_bWriteAddr_if_nwReset
(
nwReset
,
wire
out_bWriteAddr
,
b32
1
0
,
wire
_bWriteAddr_if_nwReset
wire
_bWriteAddr_if_bCounterChanged2
,
b32
b
0
,
wire
in_bWriteAddr
);
wire
[
31
:
0
]
wire_bWriteData_if_nwReset
;
hdl4se_mux2
#(
32
)
mux_bWriteData_if_nwReset
(
nwReset
,
wireout_bWriteData
,
b32hf0000010
,
wire_bWriteData_if_nwReset
);
hdl4se_mux2
#(
4
)
mux_bWriteMask_if_nwReset
(
nwReset
,
wireout_bWriteMask
,
b4b0000
,
wire_bWriteMask_if_nwReset
);
hdl4se_mux2
#(
32
)
mux_bWriteAddr_if_nwReset
(
nwReset
,
wireout_bWriteAddr
,
b3210
,
wire_bWriteAddr_if_nwReset
);
hdl4se_mux2
#(
32
)
mux_bWriteData_if_nwReset
(
nwReset
,
wireout_bWriteData
,
b32hf0000010
,
wire_bWriteData_if_nwReset
wire_bWriteData_if_bCounterChanged2
,
b32b0
,
wirein_bWriteData
);
wire
wire_or_bCounterChanged
;
hdl4se_unop
#(
3
,
1
,
UNOP_OR
)
or_bCounterChanged
(
wireout_bCounterChanged
,
wire_or_bCounterChanged
)
hdl4se_binip
#(
1
,
1
,
1
,
BIN_AND
)
and_nwReset_bCounterChanged
(
nwReset
,
wire_or_bCounterChanged
,
wirein_wWrite
);
/*
wWrite <= nwReset & (bCounterChanged[0] | bCounterChanged[1] | bCounterChanged[2])
nwReset==0 ::
...
...
hdl4secell/include/hdl4secell.h
浏览文件 @
59ac2525
...
...
@@ -126,7 +126,7 @@ DEFINE_GUID(CLSID_HDL4SE_MUX4, 0x041F3AA1, 0x97CD, 0x4412, 0x9E, 0x8E, 0xD0, 0x
DEFINE_GUID
(
CLSID_HDL4SE_MUX8
,
0xDD99B7F6
,
0x9ED1
,
0x45BB
,
0x81
,
0x50
,
0xED
,
0x78
,
0xEE
,
0xF9
,
0x82
,
0xCA
);
DEFINE_GUID
(
CLSID_HDL4SE_MUX16
,
0x69B4A095
,
0x0644
,
0x4B9E
,
0x9C
,
0xF0
,
0x29
,
0x54
,
0x74
,
0xD7
,
0xC2
,
0x43
);
DEFINE_GUID
(
CLSID_HDL4SE_SPLIT2
,
0x29D9C8D6
,
0x810E
,
0x41D0
,
0xBC
,
0xEF
,
0xA5
,
0xB8
,
0x6E
,
0xE1
,
0xEE
,
0x01
);
DEFINE_GUID
(
CLSID_HDL4SE_S
LPL
T4
,
0xD5152459
,
0x6798
,
0x49C8
,
0x83
,
0x76
,
0x21
,
0xEB
,
0xE8
,
0xA9
,
0xEE
,
0x3C
);
DEFINE_GUID
(
CLSID_HDL4SE_S
PLI
T4
,
0xD5152459
,
0x6798
,
0x49C8
,
0x83
,
0x76
,
0x21
,
0xEB
,
0xE8
,
0xA9
,
0xEE
,
0x3C
);
DEFINE_GUID
(
CLSID_HDL4SE_BIND2
,
0xDA8C1494
,
0xB6F6
,
0x4910
,
0xBB
,
0x2B
,
0xC9
,
0xBC
,
0xFC
,
0xB9
,
0xFA
,
0xD0
);
DEFINE_GUID
(
CLSID_HDL4SE_BIND3
,
0xD1F303E2
,
0x3ED1
,
0x42FD
,
0x87
,
0x62
,
0x3A
,
0xA6
,
0x23
,
0xDA
,
0x90
,
0x1E
);
DEFINE_GUID
(
CLSID_HDL4SE_BIND4
,
0x0234ECE7
,
0xA9C5
,
0x406B
,
0x9A
,
0xE7
,
0x48
,
0x41
,
0xEA
,
0x0D
,
0xF7
,
0xC9
);
...
...
@@ -148,9 +148,10 @@ DEFINE_GUID(CLSID_HDL4SE_CONST, 0x8FBE5B87, 0xB484, 0x4f95, 0x82, 0x91, 0xDB, 0x
DEFINE_GUID
(
CLSID_HDL4SE_BINOP
,
0x060FB913
,
0x1C0F
,
0x4704
,
0x8E
,
0xC2
,
0xA0
,
0x8B
,
0xF5
,
0x38
,
0x70
,
0x62
);
#define UNOP_NEG 0
#define UNOP_BITAND 1
#define UNOP_BITOR 2
#define UNOP_BITXOR 3
#define UNOP_NOT 1
#define UNOP_AND 2
#define UNOP_OR 3
#define UNOP_XOR 4
DEFINE_GUID
(
CLSID_HDL4SE_UNOP
,
0xE6772805
,
0x57BB
,
0x4b39
,
0xA1
,
0x0D
,
0xFD
,
0xA6
,
0xA4
,
0x81
,
0x0E
,
0x3B
);
DEFINE_GUID
(
CLSID_HDL4SE_REG
,
0x76FBFD4B
,
0xFEAD
,
0x45fd
,
0xAA
,
0x27
,
0xAF
,
0xC5
,
0x8A
,
0xC2
,
0x41
,
0xC2
);
...
...
hdl4secell/verilog/hdl4secell.v
浏览文件 @
59ac2525
...
...
@@ -332,9 +332,9 @@ module #(INPUTWIDTH0=8, INPUTWIDTH1=8, OUTPUTWIDTH=8, OP=`BINOP_ADD)
endmodule
`define
UNOP_NEG 0
`define
UNOP_
BIT
AND 1
`define
UNOP_
BIT
OR 2
`define
UNOP_
BIT
XOR 3
`define
UNOP_AND 1
`define
UNOP_OR 2
`define
UNOP_XOR 3
(
*
HDL4SE
=
"LCOM"
,
CLSID
=
"E6772805-57BB-4b39-A10D-FDA6A4810E3B"
,
...
...
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