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提交 9101e622 编写于 作者: M Mauro Carvalho Chehab 提交者： Linus Torvalds
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[PATCH] V4L/DVB: (3086a) Whitespaces cleanups part 1 

Clean up whitespaces at v4l/dvb files
Signed-off-by: NMauro Carvalho Chehab <mchehab@brturbo.com.br>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
上级 68352e6e
隐藏空白更改
内联 并排
Showing with 542 addition and 542 deletion
drivers/media/dvb/b2c2/flexcop-common.h
浏览文件 @ 9101e622
......@@ -132,7 +132,7 @@ int flexcop_eeprom_check_mac_addr(struct flexcop_device *fc, int extended);
* I2C-channel of the flexcop.
*/
int flexcop_i2c_request(struct flexcop_device*, flexcop_access_op_t,
flexcop_i2c_port_t, u8 chipaddr, u8 addr, u8 *buf, u16 len);
flexcop_i2c_port_t, u8 chipaddr, u8 addr, u8 *buf, u16 len);
/* from flexcop-sram.c */
int flexcop_sram_set_dest(struct flexcop_device *fc, flexcop_sram_dest_t dest, flexcop_sram_dest_target_t target);
......
drivers/media/dvb/b2c2/flexcop-fe-tuner.c
浏览文件 @ 9101e622
......@@ -298,7 +298,7 @@ static int flexcop_fe_request_firmware(struct dvb_frontend* fe, const struct fir
}
static int lgdt3303_pll_set(struct dvb_frontend* fe,
struct dvb_frontend_parameters* params)
struct dvb_frontend_parameters* params)
{
struct flexcop_device *fc = fe->dvb->priv;
u8 buf[4];
......@@ -332,7 +332,7 @@ static int lgdt3303_pll_set(struct dvb_frontend* fe,
return -EREMOTEIO;
}
return 0;
return 0;
}
static struct lgdt330x_config air2pc_atsc_hd5000_config = {
......
drivers/media/dvb/bt8xx/dvb-bt8xx.c
浏览文件 @ 9101e622
......@@ -556,9 +556,9 @@ static int tdvs_tua6034_pll_set(struct dvb_frontend* fe, struct dvb_frontend_par
dprintk("%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
__FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
if ((err = i2c_transfer(card->i2c_adapter, &msg, 1)) != 1) {
printk(KERN_WARNING "dvb-bt8xx: %s error "
"(addr %02x <- %02x, err = %i)\n",
__FUNCTION__, buf[0], buf[1], err);
printk(KERN_WARNING "dvb-bt8xx: %s error "
"(addr %02x <- %02x, err = %i)\n",
__FUNCTION__, buf[0], buf[1], err);
if (err < 0)
return err;
else
......
drivers/media/dvb/dvb-usb/vp702x-fe.c
浏览文件 @ 9101e622
......@@ -190,7 +190,7 @@ static int vp702x_fe_get_frontend(struct dvb_frontend* fe,
}
static int vp702x_fe_send_diseqc_msg (struct dvb_frontend* fe,
struct dvb_diseqc_master_cmd *m)
struct dvb_diseqc_master_cmd *m)
{
struct vp702x_fe_state *st = fe->demodulator_priv;
u8 cmd[8],ibuf[10];
......
drivers/media/dvb/dvb-usb/vp7045-fe.c
浏览文件 @ 9101e622
......@@ -58,7 +58,7 @@ static int vp7045_fe_read_ber(struct dvb_frontend* fe, u32 *ber)
struct vp7045_fe_state *state = fe->demodulator_priv;
*ber = (vp7045_read_reg(state->d, 0x0D) << 16) |
(vp7045_read_reg(state->d, 0x0E) << 8) |
vp7045_read_reg(state->d, 0x0F);
vp7045_read_reg(state->d, 0x0F);
return 0;
}
......
drivers/media/dvb/frontends/at76c651.c
浏览文件 @ 9101e622
......@@ -361,9 +361,9 @@ static int at76c651_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
static int at76c651_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *fesettings)
{
fesettings->min_delay_ms = 50;
fesettings->step_size = 0;
fesettings->max_drift = 0;
fesettings->min_delay_ms = 50;
fesettings->step_size = 0;
fesettings->max_drift = 0;
return 0;
}
......
drivers/media/dvb/frontends/bcm3510.c
浏览文件 @ 9101e622
......@@ -69,7 +69,7 @@ MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able)).");
#define dbufout(b,l,m) {\
int i; \
for (i = 0; i < l; i++) \
m("%02x ",b[i]); \
m("%02x ",b[i]); \
}
#define deb_info(args...) dprintk(0x01,args)
#define deb_i2c(args...) dprintk(0x02,args)
......@@ -827,7 +827,7 @@ static struct dvb_frontend_ops bcm3510_ops = {
.type = FE_ATSC,
.frequency_min = 54000000,
.frequency_max = 803000000,
/* stepsize is just a guess */
/* stepsize is just a guess */
.frequency_stepsize = 0,
.caps =
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
......
drivers/media/dvb/frontends/cx22700.c
浏览文件 @ 9101e622
......@@ -355,10 +355,10 @@ static int cx22700_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
static int cx22700_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
{
fesettings->min_delay_ms = 150;
fesettings->step_size = 166667;
fesettings->max_drift = 166667*2;
return 0;
fesettings->min_delay_ms = 150;
fesettings->step_size = 166667;
fesettings->max_drift = 166667*2;
return 0;
}
static void cx22700_release(struct dvb_frontend* fe)
......@@ -407,7 +407,7 @@ static struct dvb_frontend_ops cx22700_ops = {
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
FE_CAN_RECOVER
FE_CAN_RECOVER
},
.release = cx22700_release,
......
drivers/media/dvb/frontends/cx22702.c
浏览文件 @ 9101e622
......@@ -2,7 +2,7 @@
Conexant 22702 DVB OFDM demodulator driver
based on:
Alps TDMB7 DVB OFDM demodulator driver
Alps TDMB7 DVB OFDM demodulator driver
Copyright (C) 2001-2002 Convergence Integrated Media GmbH
Holger Waechtler <holger@convergence.de>
......
drivers/media/dvb/frontends/cx22702.h
浏览文件 @ 9101e622
......@@ -2,7 +2,7 @@
Conexant 22702 DVB OFDM demodulator driver
based on:
Alps TDMB7 DVB OFDM demodulator driver
Alps TDMB7 DVB OFDM demodulator driver
Copyright (C) 2001-2002 Convergence Integrated Media GmbH
Holger Waechtler <holger@convergence.de>
......
drivers/media/dvb/frontends/cx24110.c
浏览文件 @ 9101e622
......@@ -55,81 +55,81 @@ static int debug;
} while (0)
static struct {u8 reg; u8 data;} cx24110_regdata[]=
/* Comments beginning with @ denote this value should
be the default */
{{0x09,0x01}, /* SoftResetAll */
{0x09,0x00}, /* release reset */
{0x01,0xe8}, /* MSB of code rate 27.5MS/s */
{0x02,0x17}, /* middle byte " */
{0x03,0x29}, /* LSB " */
{0x05,0x03}, /* @ DVB mode, standard code rate 3/4 */
{0x06,0xa5}, /* @ PLL 60MHz */
{0x07,0x01}, /* @ Fclk, i.e. sampling clock, 60MHz */
{0x0a,0x00}, /* @ partial chip disables, do not set */
{0x0b,0x01}, /* set output clock in gapped mode, start signal low
active for first byte */
{0x0c,0x11}, /* no parity bytes, large hold time, serial data out */
{0x0d,0x6f}, /* @ RS Sync/Unsync thresholds */
{0x10,0x40}, /* chip doc is misleading here: write bit 6 as 1
to avoid starting the BER counter. Reset the
CRC test bit. Finite counting selected */
{0x15,0xff}, /* @ size of the limited time window for RS BER
estimation. It is <value>*256 RS blocks, this
gives approx. 2.6 sec at 27.5MS/s, rate 3/4 */
{0x16,0x00}, /* @ enable all RS output ports */
{0x17,0x04}, /* @ time window allowed for the RS to sync */
{0x18,0xae}, /* @ allow all standard DVB code rates to be scanned
for automatically */
/* leave the current code rate and normalization
registers as they are after reset... */
{0x21,0x10}, /* @ during AutoAcq, search each viterbi setting
only once */
{0x23,0x18}, /* @ size of the limited time window for Viterbi BER
estimation. It is <value>*65536 channel bits, i.e.
approx. 38ms at 27.5MS/s, rate 3/4 */
{0x24,0x24}, /* do not trigger Viterbi CRC test. Finite count window */
/* leave front-end AGC parameters at default values */
/* leave decimation AGC parameters at default values */
{0x35,0x40}, /* disable all interrupts. They are not connected anyway */
{0x36,0xff}, /* clear all interrupt pending flags */
{0x37,0x00}, /* @ fully enable AutoAcqq state machine */
{0x38,0x07}, /* @ enable fade recovery, but not autostart AutoAcq */
/* leave the equalizer parameters on their default values */
/* leave the final AGC parameters on their default values */
{0x41,0x00}, /* @ MSB of front-end derotator frequency */
{0x42,0x00}, /* @ middle bytes " */
{0x43,0x00}, /* @ LSB " */
/* leave the carrier tracking loop parameters on default */
/* leave the bit timing loop parameters at gefault */
{0x56,0x4d}, /* set the filtune voltage to 2.7V, as recommended by */
/* the cx24108 data sheet for symbol rates above 15MS/s */
{0x57,0x00}, /* @ Filter sigma delta enabled, positive */
{0x61,0x95}, /* GPIO pins 1-4 have special function */
{0x62,0x05}, /* GPIO pin 5 has special function, pin 6 is GPIO */
{0x63,0x00}, /* All GPIO pins use CMOS output characteristics */
{0x64,0x20}, /* GPIO 6 is input, all others are outputs */
{0x6d,0x30}, /* tuner auto mode clock freq 62kHz */
{0x70,0x15}, /* use auto mode, tuner word is 21 bits long */
{0x73,0x00}, /* @ disable several demod bypasses */
{0x74,0x00}, /* @ " */
{0x75,0x00} /* @ " */
/* the remaining registers are for SEC */
/* Comments beginning with @ denote this value should
be the default */
{{0x09,0x01}, /* SoftResetAll */
{0x09,0x00}, /* release reset */
{0x01,0xe8}, /* MSB of code rate 27.5MS/s */
{0x02,0x17}, /* middle byte " */
{0x03,0x29}, /* LSB " */
{0x05,0x03}, /* @ DVB mode, standard code rate 3/4 */
{0x06,0xa5}, /* @ PLL 60MHz */
{0x07,0x01}, /* @ Fclk, i.e. sampling clock, 60MHz */
{0x0a,0x00}, /* @ partial chip disables, do not set */
{0x0b,0x01}, /* set output clock in gapped mode, start signal low
active for first byte */
{0x0c,0x11}, /* no parity bytes, large hold time, serial data out */
{0x0d,0x6f}, /* @ RS Sync/Unsync thresholds */
{0x10,0x40}, /* chip doc is misleading here: write bit 6 as 1
to avoid starting the BER counter. Reset the
CRC test bit. Finite counting selected */
{0x15,0xff}, /* @ size of the limited time window for RS BER
estimation. It is <value>*256 RS blocks, this
gives approx. 2.6 sec at 27.5MS/s, rate 3/4 */
{0x16,0x00}, /* @ enable all RS output ports */
{0x17,0x04}, /* @ time window allowed for the RS to sync */
{0x18,0xae}, /* @ allow all standard DVB code rates to be scanned
for automatically */
/* leave the current code rate and normalization
registers as they are after reset... */
{0x21,0x10}, /* @ during AutoAcq, search each viterbi setting
only once */
{0x23,0x18}, /* @ size of the limited time window for Viterbi BER
estimation. It is <value>*65536 channel bits, i.e.
approx. 38ms at 27.5MS/s, rate 3/4 */
{0x24,0x24}, /* do not trigger Viterbi CRC test. Finite count window */
/* leave front-end AGC parameters at default values */
/* leave decimation AGC parameters at default values */
{0x35,0x40}, /* disable all interrupts. They are not connected anyway */
{0x36,0xff}, /* clear all interrupt pending flags */
{0x37,0x00}, /* @ fully enable AutoAcqq state machine */
{0x38,0x07}, /* @ enable fade recovery, but not autostart AutoAcq */
/* leave the equalizer parameters on their default values */
/* leave the final AGC parameters on their default values */
{0x41,0x00}, /* @ MSB of front-end derotator frequency */
{0x42,0x00}, /* @ middle bytes " */
{0x43,0x00}, /* @ LSB " */
/* leave the carrier tracking loop parameters on default */
/* leave the bit timing loop parameters at gefault */
{0x56,0x4d}, /* set the filtune voltage to 2.7V, as recommended by */
/* the cx24108 data sheet for symbol rates above 15MS/s */
{0x57,0x00}, /* @ Filter sigma delta enabled, positive */
{0x61,0x95}, /* GPIO pins 1-4 have special function */
{0x62,0x05}, /* GPIO pin 5 has special function, pin 6 is GPIO */
{0x63,0x00}, /* All GPIO pins use CMOS output characteristics */
{0x64,0x20}, /* GPIO 6 is input, all others are outputs */
{0x6d,0x30}, /* tuner auto mode clock freq 62kHz */
{0x70,0x15}, /* use auto mode, tuner word is 21 bits long */
{0x73,0x00}, /* @ disable several demod bypasses */
{0x74,0x00}, /* @ " */
{0x75,0x00} /* @ " */
/* the remaining registers are for SEC */
};
static int cx24110_writereg (struct cx24110_state* state, int reg, int data)
{
u8 buf [] = { reg, data };
u8 buf [] = { reg, data };
struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
int err;
if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
dprintk ("%s: writereg error (err == %i, reg == 0x%02x,"
" data == 0x%02x)\n", __FUNCTION__, err, reg, data);
return -EREMOTEIO;
}
return 0;
return 0;
}
static int cx24110_readreg (struct cx24110_state* state, u8 reg)
......@@ -153,27 +153,27 @@ static int cx24110_set_inversion (struct cx24110_state* state, fe_spectral_inver
switch (inversion) {
case INVERSION_OFF:
cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x1);
/* AcqSpectrInvDis on. No idea why someone should want this */
cx24110_writereg(state,0x5,cx24110_readreg(state,0x5)&0xf7);
/* Initial value 0 at start of acq */
cx24110_writereg(state,0x22,cx24110_readreg(state,0x22)&0xef);
/* current value 0 */
/* The cx24110 manual tells us this reg is read-only.
But what the heck... set it ayways */
break;
cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x1);
/* AcqSpectrInvDis on. No idea why someone should want this */
cx24110_writereg(state,0x5,cx24110_readreg(state,0x5)&0xf7);
/* Initial value 0 at start of acq */
cx24110_writereg(state,0x22,cx24110_readreg(state,0x22)&0xef);
/* current value 0 */
/* The cx24110 manual tells us this reg is read-only.
But what the heck... set it ayways */
break;
case INVERSION_ON:
cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x1);
/* AcqSpectrInvDis on. No idea why someone should want this */
cx24110_writereg(state,0x5,cx24110_readreg(state,0x5)|0x08);
/* Initial value 1 at start of acq */
cx24110_writereg(state,0x22,cx24110_readreg(state,0x22)|0x10);
/* current value 1 */
break;
cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x1);
/* AcqSpectrInvDis on. No idea why someone should want this */
cx24110_writereg(state,0x5,cx24110_readreg(state,0x5)|0x08);
/* Initial value 1 at start of acq */
cx24110_writereg(state,0x22,cx24110_readreg(state,0x22)|0x10);
/* current value 1 */
break;
case INVERSION_AUTO:
cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)&0xfe);
/* AcqSpectrInvDis off. Leave initial & current states as is */
break;
cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)&0xfe);
/* AcqSpectrInvDis off. Leave initial & current states as is */
break;
default:
return -EINVAL;
}
......@@ -185,18 +185,18 @@ static int cx24110_set_fec (struct cx24110_state* state, fe_code_rate_t fec)
{
/* fixme (low): error handling */
static const int rate[]={-1,1,2,3,5,7,-1};
static const int g1[]={-1,0x01,0x02,0x05,0x15,0x45,-1};
static const int g2[]={-1,0x01,0x03,0x06,0x1a,0x7a,-1};
static const int rate[]={-1,1,2,3,5,7,-1};
static const int g1[]={-1,0x01,0x02,0x05,0x15,0x45,-1};
static const int g2[]={-1,0x01,0x03,0x06,0x1a,0x7a,-1};
/* Well, the AutoAcq engine of the cx24106 and 24110 automatically
searches all enabled viterbi rates, and can handle non-standard
rates as well. */
/* Well, the AutoAcq engine of the cx24106 and 24110 automatically
searches all enabled viterbi rates, and can handle non-standard
rates as well. */
if (fec>FEC_AUTO)
fec=FEC_AUTO;
if (fec>FEC_AUTO)
fec=FEC_AUTO;
if (fec==FEC_AUTO) { /* (re-)establish AutoAcq behaviour */
if (fec==FEC_AUTO) { /* (re-)establish AutoAcq behaviour */
cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)&0xdf);
/* clear AcqVitDis bit */
cx24110_writereg(state,0x18,0xae);
......@@ -208,7 +208,7 @@ static int cx24110_set_fec (struct cx24110_state* state, fe_code_rate_t fec)
cx24110_writereg(state,0x1a,0x05); cx24110_writereg(state,0x1b,0x06);
/* set the puncture registers for code rate 3/4 */
return 0;
} else {
} else {
cx24110_writereg(state,0x37,cx24110_readreg(state,0x37)|0x20);
/* set AcqVitDis bit */
if(rate[fec]>0) {
......@@ -219,10 +219,10 @@ static int cx24110_set_fec (struct cx24110_state* state, fe_code_rate_t fec)
cx24110_writereg(state,0x1a,g1[fec]);
cx24110_writereg(state,0x1b,g2[fec]);
/* not sure if this is the right way: I always used AutoAcq mode */
} else
} else
return -EOPNOTSUPP;
/* fixme (low): which is the correct return code? */
};
};
return 0;
}
......@@ -245,72 +245,72 @@ static fe_code_rate_t cx24110_get_fec (struct cx24110_state* state)
static int cx24110_set_symbolrate (struct cx24110_state* state, u32 srate)
{
/* fixme (low): add error handling */
u32 ratio;
u32 tmp, fclk, BDRI;
u32 ratio;
u32 tmp, fclk, BDRI;
static const u32 bands[]={5000000UL,15000000UL,90999000UL/2};
int i;
static const u32 bands[]={5000000UL,15000000UL,90999000UL/2};
int i;
dprintk("cx24110 debug: entering %s(%d)\n",__FUNCTION__,srate);
if (srate>90999000UL/2)
srate=90999000UL/2;
if (srate<500000)
srate=500000;
if (srate>90999000UL/2)
srate=90999000UL/2;
if (srate<500000)
srate=500000;
for(i=0;(i<sizeof(bands)/sizeof(bands[0]))&&(srate>bands[i]);i++)
for(i=0;(i<sizeof(bands)/sizeof(bands[0]))&&(srate>bands[i]);i++)
;
/* first, check which sample rate is appropriate: 45, 60 80 or 90 MHz,
and set the PLL accordingly (R07[1:0] Fclk, R06[7:4] PLLmult,
R06[3:0] PLLphaseDetGain */
tmp=cx24110_readreg(state,0x07)&0xfc;
if(srate<90999000UL/4) { /* sample rate 45MHz*/
/* first, check which sample rate is appropriate: 45, 60 80 or 90 MHz,
and set the PLL accordingly (R07[1:0] Fclk, R06[7:4] PLLmult,
R06[3:0] PLLphaseDetGain */
tmp=cx24110_readreg(state,0x07)&0xfc;
if(srate<90999000UL/4) { /* sample rate 45MHz*/
cx24110_writereg(state,0x07,tmp);
cx24110_writereg(state,0x06,0x78);
fclk=90999000UL/2;
} else if(srate<60666000UL/2) { /* sample rate 60MHz */
} else if(srate<60666000UL/2) { /* sample rate 60MHz */
cx24110_writereg(state,0x07,tmp|0x1);
cx24110_writereg(state,0x06,0xa5);
fclk=60666000UL;
} else if(srate<80888000UL/2) { /* sample rate 80MHz */
} else if(srate<80888000UL/2) { /* sample rate 80MHz */
cx24110_writereg(state,0x07,tmp|0x2);
cx24110_writereg(state,0x06,0x87);
fclk=80888000UL;
} else { /* sample rate 90MHz */
} else { /* sample rate 90MHz */
cx24110_writereg(state,0x07,tmp|0x3);
cx24110_writereg(state,0x06,0x78);
fclk=90999000UL;
};
dprintk("cx24110 debug: fclk %d Hz\n",fclk);
/* we need to divide two integers with approx. 27 bits in 32 bit
arithmetic giving a 25 bit result */
/* the maximum dividend is 90999000/2, 0x02b6446c, this number is
also the most complex divisor. Hence, the dividend has,
assuming 32bit unsigned arithmetic, 6 clear bits on top, the
divisor 2 unused bits at the bottom. Also, the quotient is
always less than 1/2. Borrowed from VES1893.c, of course */
};
dprintk("cx24110 debug: fclk %d Hz\n",fclk);
/* we need to divide two integers with approx. 27 bits in 32 bit
arithmetic giving a 25 bit result */
/* the maximum dividend is 90999000/2, 0x02b6446c, this number is
also the most complex divisor. Hence, the dividend has,
assuming 32bit unsigned arithmetic, 6 clear bits on top, the
divisor 2 unused bits at the bottom. Also, the quotient is
always less than 1/2. Borrowed from VES1893.c, of course */
tmp=srate<<6;
BDRI=fclk>>2;
ratio=(tmp/BDRI);
tmp=srate<<6;
BDRI=fclk>>2;
ratio=(tmp/BDRI);
tmp=(tmp%BDRI)<<8;
ratio=(ratio<<8)+(tmp/BDRI);
tmp=(tmp%BDRI)<<8;
ratio=(ratio<<8)+(tmp/BDRI);
tmp=(tmp%BDRI)<<8;
ratio=(ratio<<8)+(tmp/BDRI);
tmp=(tmp%BDRI)<<8;
ratio=(ratio<<8)+(tmp/BDRI);
tmp=(tmp%BDRI)<<1;
ratio=(ratio<<1)+(tmp/BDRI);
tmp=(tmp%BDRI)<<1;
ratio=(ratio<<1)+(tmp/BDRI);
dprintk("srate= %d (range %d, up to %d)\n", srate,i,bands[i]);
dprintk("fclk = %d\n", fclk);
dprintk("ratio= %08x\n", ratio);
dprintk("srate= %d (range %d, up to %d)\n", srate,i,bands[i]);
dprintk("fclk = %d\n", fclk);
dprintk("ratio= %08x\n", ratio);
cx24110_writereg(state, 0x1, (ratio>>16)&0xff);
cx24110_writereg(state, 0x2, (ratio>>8)&0xff);
cx24110_writereg(state, 0x3, (ratio)&0xff);
cx24110_writereg(state, 0x1, (ratio>>16)&0xff);
cx24110_writereg(state, 0x2, (ratio>>8)&0xff);
cx24110_writereg(state, 0x3, (ratio)&0xff);
return 0;
return 0;
}
......@@ -324,48 +324,48 @@ int cx24110_pll_write (struct dvb_frontend* fe, u32 data)
dprintk("cx24110 debug: cx24108_write(%8.8x)\n",data);
cx24110_writereg(state,0x6d,0x30); /* auto mode at 62kHz */
cx24110_writereg(state,0x70,0x15); /* auto mode 21 bits */
cx24110_writereg(state,0x6d,0x30); /* auto mode at 62kHz */
cx24110_writereg(state,0x70,0x15); /* auto mode 21 bits */
/* if the auto tuner writer is still busy, clear it out */
while (cx24110_readreg(state,0x6d)&0x80)
/* if the auto tuner writer is still busy, clear it out */
while (cx24110_readreg(state,0x6d)&0x80)
cx24110_writereg(state,0x72,0);
/* write the topmost 8 bits */
cx24110_writereg(state,0x72,(data>>24)&0xff);
/* write the topmost 8 bits */
cx24110_writereg(state,0x72,(data>>24)&0xff);
/* wait for the send to be completed */
while ((cx24110_readreg(state,0x6d)&0xc0)==0x80)
/* wait for the send to be completed */
while ((cx24110_readreg(state,0x6d)&0xc0)==0x80)
;
/* send another 8 bytes */
cx24110_writereg(state,0x72,(data>>16)&0xff);
while ((cx24110_readreg(state,0x6d)&0xc0)==0x80)
/* send another 8 bytes */
cx24110_writereg(state,0x72,(data>>16)&0xff);
while ((cx24110_readreg(state,0x6d)&0xc0)==0x80)
;
/* and the topmost 5 bits of this byte */
cx24110_writereg(state,0x72,(data>>8)&0xff);
while ((cx24110_readreg(state,0x6d)&0xc0)==0x80)
/* and the topmost 5 bits of this byte */
cx24110_writereg(state,0x72,(data>>8)&0xff);
while ((cx24110_readreg(state,0x6d)&0xc0)==0x80)
;
/* now strobe the enable line once */
cx24110_writereg(state,0x6d,0x32);
cx24110_writereg(state,0x6d,0x30);
/* now strobe the enable line once */
cx24110_writereg(state,0x6d,0x32);
cx24110_writereg(state,0x6d,0x30);
return 0;
return 0;
}
static int cx24110_initfe(struct dvb_frontend* fe)
{
struct cx24110_state *state = fe->demodulator_priv;
/* fixme (low): error handling */
int i;
int i;
dprintk("%s: init chip\n", __FUNCTION__);
for(i=0;i<sizeof(cx24110_regdata)/sizeof(cx24110_regdata[0]);i++) {
for(i=0;i<sizeof(cx24110_regdata)/sizeof(cx24110_regdata[0]);i++) {
cx24110_writereg(state, cx24110_regdata[i].reg, cx24110_regdata[i].data);
};
};
if (state->config->pll_init) state->config->pll_init(fe);
......
drivers/media/dvb/frontends/l64781.c
浏览文件 @ 9101e622
......@@ -2,7 +2,7 @@
driver for LSI L64781 COFDM demodulator
Copyright (C) 2001 Holger Waechtler for Convergence Integrated Media GmbH
Marko Kohtala <marko.kohtala@luukku.com>
Marko Kohtala <marko.kohtala@luukku.com>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
......@@ -433,7 +433,7 @@ static int l64781_init(struct dvb_frontend* fe)
{
struct l64781_state* state = fe->demodulator_priv;
reset_and_configure (state);
reset_and_configure (state);
/* Power up */
l64781_writereg (state, 0x3e, 0xa5);
......@@ -456,9 +456,9 @@ static int l64781_init(struct dvb_frontend* fe)
l64781_writereg (state, 0x0d, 0x8c);
/* With ppm=8000, it seems the DTR_SENSITIVITY will result in
value of 2 with all possible bandwidths and guard
intervals, which is the initial value anyway. */
/*l64781_writereg (state, 0x19, 0x92);*/
value of 2 with all possible bandwidths and guard
intervals, which is the initial value anyway. */
/*l64781_writereg (state, 0x19, 0x92);*/
/* Everything is two's complement, soft bit and CSI_OUT too */
l64781_writereg (state, 0x1e, 0x09);
......@@ -477,10 +477,10 @@ static int l64781_init(struct dvb_frontend* fe)
static int l64781_get_tune_settings(struct dvb_frontend* fe,
struct dvb_frontend_tune_settings* fesettings)
{
fesettings->min_delay_ms = 4000;
fesettings->step_size = 0;
fesettings->max_drift = 0;
return 0;
fesettings->min_delay_ms = 4000;
fesettings->step_size = 0;
fesettings->max_drift = 0;
return 0;
}
static void l64781_release(struct dvb_frontend* fe)
......@@ -522,7 +522,7 @@ struct dvb_frontend* l64781_attach(const struct l64781_config* config,
/* The chip always responds to reads */
if (i2c_transfer(state->i2c, msg, 2) != 2) {
dprintk("No response to read on I2C bus\n");
dprintk("No response to read on I2C bus\n");
goto error;
}
......@@ -531,7 +531,7 @@ struct dvb_frontend* l64781_attach(const struct l64781_config* config,
/* Reading the POWER_DOWN register always returns 0 */
if (reg0x3e != 0) {
dprintk("Device doesn't look like L64781\n");
dprintk("Device doesn't look like L64781\n");
goto error;
}
......@@ -540,7 +540,7 @@ struct dvb_frontend* l64781_attach(const struct l64781_config* config,
/* Responds to all reads with 0 */
if (l64781_readreg(state, 0x1a) != 0) {
dprintk("Read 1 returned unexpcted value\n");
dprintk("Read 1 returned unexpcted value\n");
goto error;
}
......@@ -549,7 +549,7 @@ struct dvb_frontend* l64781_attach(const struct l64781_config* config,
/* Responds with register default value */
if (l64781_readreg(state, 0x1a) != 0xa1) {
dprintk("Read 2 returned unexpcted value\n");
dprintk("Read 2 returned unexpcted value\n");
goto error;
}
......
drivers/media/dvb/frontends/l64781.h
浏览文件 @ 9101e622
......@@ -2,7 +2,7 @@
driver for LSI L64781 COFDM demodulator
Copyright (C) 2001 Holger Waechtler for Convergence Integrated Media GmbH
Marko Kohtala <marko.kohtala@luukku.com>
Marko Kohtala <marko.kohtala@luukku.com>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
......
drivers/media/dvb/frontends/lgdt330x.c
浏览文件 @ 9101e622
......@@ -301,10 +301,10 @@ static int lgdt330x_set_parameters(struct dvb_frontend* fe,
static u8 lgdt3303_8vsb_44_data[] = {
0x04, 0x00,
0x0d, 0x40,
0x0e, 0x87,
0x0f, 0x8e,
0x10, 0x01,
0x47, 0x8b };
0x0e, 0x87,
0x0f, 0x8e,
0x10, 0x01,
0x47, 0x8b };
/*
* Array of byte pairs <address, value>
......
drivers/media/dvb/frontends/mt312.c
浏览文件 @ 9101e622
......@@ -554,7 +554,7 @@ static int mt312_set_frontend(struct dvb_frontend* fe,
if ((ret = mt312_write(state, SYM_RATE_H, buf, sizeof(buf))) < 0)
return ret;
mt312_reset(state, 0);
mt312_reset(state, 0);
return 0;
}
......@@ -695,7 +695,7 @@ static struct dvb_frontend_ops vp310_mt312_ops = {
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
FE_CAN_FEC_AUTO | FE_CAN_QPSK | FE_CAN_MUTE_TS |
FE_CAN_RECOVER
FE_CAN_RECOVER
},
.release = mt312_release,
......
drivers/media/dvb/frontends/nxt2002.c
浏览文件 @ 9101e622
......@@ -527,7 +527,7 @@ static int nxt2002_read_snr(struct dvb_frontend* fe, u16* snr)
else
snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
/* the value reported back from the frontend will be FFFF=32db 0000=0db */
/* the value reported back from the frontend will be FFFF=32db 0000=0db */
*snr = snrdb * (0xFFFF/32000);
......@@ -646,7 +646,7 @@ struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config,
memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops));
state->initialised = 0;
/* Check the first 5 registers to ensure this a revision we can handle */
/* Check the first 5 registers to ensure this a revision we can handle */
i2c_readbytes(state, 0x00, buf, 5);
if (buf[0] != 0x04) goto error; /* device id */
......@@ -672,7 +672,7 @@ static struct dvb_frontend_ops nxt2002_ops = {
.type = FE_ATSC,
.frequency_min = 54000000,
.frequency_max = 860000000,
/* stepsize is just a guess */
/* stepsize is just a guess */
.frequency_stepsize = 166666,
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
......
drivers/media/dvb/frontends/nxt200x.c
浏览文件 @ 9101e622
......@@ -339,7 +339,7 @@ static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
switch (state->demod_chip) {
case NXT2004:
if (i2c_writebytes(state, state->config->pll_address, data, 4))
printk(KERN_WARNING "nxt200x: error writing to tuner\n");
printk(KERN_WARNING "nxt200x: error writing to tuner\n");
/* wait until we have a lock */
while (count < 20) {
i2c_readbytes(state, state->config->pll_address, &buf, 1);
......@@ -497,7 +497,7 @@ static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware
/* calculate firmware CRC */
for (position = 0; position < fw->size; position++) {
crc = nxt200x_crc(crc, fw->data[position]);
crc = nxt200x_crc(crc, fw->data[position]);
}
buf[0] = rambase >> 8;
......
drivers/media/dvb/frontends/nxt6000.c
浏览文件 @ 9101e622
......@@ -574,11 +574,11 @@ static struct dvb_frontend_ops nxt6000_ops = {
.symbol_rate_max = 9360000, /* FIXME */
.symbol_rate_tolerance = 4000,
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
FE_CAN_HIERARCHY_AUTO,
FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
FE_CAN_HIERARCHY_AUTO,
},
.release = nxt6000_release,
......
drivers/media/dvb/frontends/or51132.c
浏览文件 @ 9101e622
......@@ -503,7 +503,7 @@ static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
rcvr_stat = rec_buf[1];
usK = (rcvr_stat & 0x10) ? 3 : 0;
/* The value reported back from the frontend will be FFFF=100% 0000=0% */
/* The value reported back from the frontend will be FFFF=100% 0000=0% */
signal_strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
if (signal_strength > 0xffff)
*strength = 0xffff;
......
drivers/media/dvb/frontends/s5h1420.c
浏览文件 @ 9101e622
......@@ -494,7 +494,7 @@ static int s5h1420_getfreqoffset(struct s5h1420_state* state)
}
static void s5h1420_setfec_inversion(struct s5h1420_state* state,
struct dvb_frontend_parameters *p)
struct dvb_frontend_parameters *p)
{
u8 inversion = 0;
......@@ -521,8 +521,8 @@ static void s5h1420_setfec_inversion(struct s5h1420_state* state,
case FEC_3_4:
s5h1420_writereg(state, 0x30, 0x04);
s5h1420_writereg(state, 0x31, 0x12 | inversion);
break;
s5h1420_writereg(state, 0x31, 0x12 | inversion);
break;
case FEC_5_6:
s5h1420_writereg(state, 0x30, 0x08);
......
drivers/media/dvb/frontends/s5h1420.h
浏览文件 @ 9101e622
......@@ -39,6 +39,6 @@ struct s5h1420_config
};
extern struct dvb_frontend* s5h1420_attach(const struct s5h1420_config* config,
struct i2c_adapter* i2c);
struct i2c_adapter* i2c);
#endif // S5H1420_H
drivers/media/dvb/frontends/sp8870.c
浏览文件 @ 9101e622
......@@ -67,16 +67,16 @@ static int debug;
static int sp8870_writereg (struct sp8870_state* state, u16 reg, u16 data)
{
u8 buf [] = { reg >> 8, reg & 0xff, data >> 8, data & 0xff };
u8 buf [] = { reg >> 8, reg & 0xff, data >> 8, data & 0xff };
struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 4 };
int err;
if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
dprintk ("%s: writereg error (err == %i, reg == 0x%02x, data == 0x%02x)\n", __FUNCTION__, err, reg, data);
return -EREMOTEIO;
}
return 0;
return 0;
}
static int sp8870_readreg (struct sp8870_state* state, u16 reg)
......@@ -305,7 +305,7 @@ static int sp8870_set_frontend_parameters (struct dvb_frontend* fe,
static int sp8870_init (struct dvb_frontend* fe)
{
struct sp8870_state* state = fe->demodulator_priv;
const struct firmware *fw = NULL;
const struct firmware *fw = NULL;
sp8870_wake_up(state);
if (state->initialised) return 0;
......@@ -534,10 +534,10 @@ static int sp8870_sleep(struct dvb_frontend* fe)
static int sp8870_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
{
fesettings->min_delay_ms = 350;
fesettings->step_size = 0;
fesettings->max_drift = 0;
return 0;
fesettings->min_delay_ms = 350;
fesettings->step_size = 0;
fesettings->max_drift = 0;
return 0;
}
static void sp8870_release(struct dvb_frontend* fe)
......
drivers/media/dvb/frontends/sp887x.c
浏览文件 @ 9101e622
......@@ -80,7 +80,7 @@ static int sp887x_readreg (struct sp887x_state* state, u16 reg)
u8 b1 [2];
int ret;
struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
......@@ -498,7 +498,7 @@ static int sp887x_sleep(struct dvb_frontend* fe)
static int sp887x_init(struct dvb_frontend* fe)
{
struct sp887x_state* state = fe->demodulator_priv;
const struct firmware *fw = NULL;
const struct firmware *fw = NULL;
int ret;
if (!state->initialised) {
......@@ -528,10 +528,10 @@ static int sp887x_init(struct dvb_frontend* fe)
static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
{
fesettings->min_delay_ms = 350;
fesettings->step_size = 166666*2;
fesettings->max_drift = (166666*2)+1;
return 0;
fesettings->min_delay_ms = 350;
fesettings->step_size = 166666*2;
fesettings->max_drift = (166666*2)+1;
return 0;
}
static void sp887x_release(struct dvb_frontend* fe)
......@@ -581,7 +581,7 @@ static struct dvb_frontend_ops sp887x_ops = {
.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
FE_CAN_RECOVER
FE_CAN_RECOVER
},
.release = sp887x_release,
......
drivers/media/dvb/frontends/stv0299.c
浏览文件 @ 9101e622
......@@ -95,7 +95,7 @@ static int stv0299_writeregI (struct stv0299_state* state, u8 reg, u8 data)
int stv0299_writereg (struct dvb_frontend* fe, u8 reg, u8 data)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
return stv0299_writeregI(state, reg, data);
}
......@@ -220,7 +220,7 @@ static int stv0299_wait_diseqc_idle (struct stv0299_state* state, int timeout)
static int stv0299_set_symbolrate (struct dvb_frontend* fe, u32 srate)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
u64 big = srate;
u32 ratio;
......@@ -271,7 +271,7 @@ static int stv0299_get_symbolrate (struct stv0299_state* state)
static int stv0299_send_diseqc_msg (struct dvb_frontend* fe,
struct dvb_diseqc_master_cmd *m)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
u8 val;
int i;
......@@ -301,7 +301,7 @@ static int stv0299_send_diseqc_msg (struct dvb_frontend* fe,
static int stv0299_send_diseqc_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t burst)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
u8 val;
dprintk ("%s\n", __FUNCTION__);
......@@ -328,7 +328,7 @@ static int stv0299_send_diseqc_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t
static int stv0299_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
u8 val;
if (stv0299_wait_diseqc_idle (state, 100) < 0)
......@@ -350,7 +350,7 @@ static int stv0299_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
static int stv0299_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltage)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
u8 reg0x08;
u8 reg0x0c;
......@@ -442,7 +442,7 @@ static int stv0299_send_legacy_dish_cmd (struct dvb_frontend* fe, u32 cmd)
static int stv0299_init (struct dvb_frontend* fe)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
int i;
dprintk("stv0299: init chip\n");
......@@ -461,7 +461,7 @@ static int stv0299_init (struct dvb_frontend* fe)
static int stv0299_read_status(struct dvb_frontend* fe, fe_status_t* status)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
u8 signal = 0xff - stv0299_readreg (state, 0x18);
u8 sync = stv0299_readreg (state, 0x1b);
......@@ -489,7 +489,7 @@ static int stv0299_read_status(struct dvb_frontend* fe, fe_status_t* status)
static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
if (state->errmode != STATUS_BER) return 0;
*ber = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e);
......@@ -499,7 +499,7 @@ static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber)
static int stv0299_read_signal_strength(struct dvb_frontend* fe, u16* strength)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
s32 signal = 0xffff - ((stv0299_readreg (state, 0x18) << 8)
| stv0299_readreg (state, 0x19));
......@@ -516,7 +516,7 @@ static int stv0299_read_signal_strength(struct dvb_frontend* fe, u16* strength)
static int stv0299_read_snr(struct dvb_frontend* fe, u16* snr)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
s32 xsnr = 0xffff - ((stv0299_readreg (state, 0x24) << 8)
| stv0299_readreg (state, 0x25));
......@@ -528,7 +528,7 @@ static int stv0299_read_snr(struct dvb_frontend* fe, u16* snr)
static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
if (state->errmode != STATUS_UCBLOCKS) *ucblocks = 0;
else *ucblocks = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e);
......@@ -538,7 +538,7 @@ static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
int invval = 0;
dprintk ("%s : FE_SET_FRONTEND\n", __FUNCTION__);
......@@ -571,7 +571,7 @@ static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
static int stv0299_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
s32 derot_freq;
int invval;
......@@ -596,7 +596,7 @@ static int stv0299_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_par
static int stv0299_sleep(struct dvb_frontend* fe)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
stv0299_writeregI(state, 0x02, 0x80);
state->initialised = 0;
......@@ -606,7 +606,7 @@ static int stv0299_sleep(struct dvb_frontend* fe)
static int stv0299_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
{
struct stv0299_state* state = fe->demodulator_priv;
struct stv0299_state* state = fe->demodulator_priv;
fesettings->min_delay_ms = state->config->min_delay_ms;
if (fesettings->parameters.u.qpsk.symbol_rate < 10000000) {
......@@ -658,7 +658,7 @@ struct dvb_frontend* stv0299_attach(const struct stv0299_config* config,
/* create dvb_frontend */
state->frontend.ops = &state->ops;
state->frontend.demodulator_priv = state;
state->frontend.demodulator_priv = state;
return &state->frontend;
error:
......@@ -714,7 +714,7 @@ MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
MODULE_DESCRIPTION("ST STV0299 DVB Demodulator driver");
MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, "
"Andreas Oberritter, Andrew de Quincey, Kenneth Aafly");
"Andreas Oberritter, Andrew de Quincey, Kenneth Aafly");
MODULE_LICENSE("GPL");
EXPORT_SYMBOL(stv0299_writereg);
......
drivers/media/dvb/frontends/tda10021.c
浏览文件 @ 9101e622
/*
TDA10021 - Single Chip Cable Channel Receiver driver module
used on the the Siemens DVB-C cards
used on the the Siemens DVB-C cards
Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
Support for TDA10021
Support for TDA10021
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
......@@ -76,9 +76,9 @@ static u8 tda10021_inittab[0x40]=
static int tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
{
u8 buf[] = { reg, data };
u8 buf[] = { reg, data };
struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
int ret;
int ret;
ret = i2c_transfer (state->i2c, &msg, 1);
if (ret != 1)
......@@ -95,7 +95,7 @@ static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
u8 b0 [] = { reg };
u8 b1 [] = { 0 };
struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
int ret;
ret = i2c_transfer (state->i2c, msg, 2);
......
drivers/media/dvb/frontends/tda10021.h
浏览文件 @ 9101e622
/*
TDA10021 - Single Chip Cable Channel Receiver driver module
used on the the Siemens DVB-C cards
used on the the Siemens DVB-C cards
Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
Support for TDA10021
Support for TDA10021
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
......
drivers/media/dvb/frontends/tda1004x.c
浏览文件 @ 9101e622
......@@ -475,7 +475,7 @@ static int tda10046_fwupload(struct dvb_frontend* fe)
ret = state->config->request_firmware(fe, &fw, TDA10046_DEFAULT_FIRMWARE);
if (ret) {
printk(KERN_ERR "tda1004x: no firmware upload (timeout or file not found?)\n");
return ret;
return ret;
}
tda1004x_write_mask(state, TDA1004X_CONFC4, 8, 8); // going to boot from HOST
ret = tda1004x_do_upload(state, fw->data, fw->size, TDA10046H_CODE_CPT, TDA10046H_CODE_IN);
......
drivers/media/dvb/frontends/tda8083.c
浏览文件 @ 9101e622
......@@ -66,13 +66,13 @@ static int tda8083_writereg (struct tda8083_state* state, u8 reg, u8 data)
u8 buf [] = { reg, data };
struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
ret = i2c_transfer(state->i2c, &msg, 1);
ret = i2c_transfer(state->i2c, &msg, 1);
if (ret != 1)
dprintk ("%s: writereg error (reg %02x, ret == %i)\n",
if (ret != 1)
dprintk ("%s: writereg error (reg %02x, ret == %i)\n",
__FUNCTION__, reg, ret);
return (ret != 1) ? -1 : 0;
return (ret != 1) ? -1 : 0;
}
static int tda8083_readregs (struct tda8083_state* state, u8 reg1, u8 *b, u8 len)
......@@ -87,7 +87,7 @@ static int tda8083_readregs (struct tda8083_state* state, u8 reg1, u8 *b, u8 len
dprintk ("%s: readreg error (reg %02x, ret == %i)\n",
__FUNCTION__, reg1, ret);
return ret == 2 ? 0 : -1;
return ret == 2 ? 0 : -1;
}
static inline u8 tda8083_readreg (struct tda8083_state* state, u8 reg)
......@@ -132,14 +132,14 @@ static fe_code_rate_t tda8083_get_fec (struct tda8083_state* state)
static int tda8083_set_symbolrate (struct tda8083_state* state, u32 srate)
{
u32 ratio;
u32 ratio;
u32 tmp;
u8 filter;
if (srate > 32000000)
srate = 32000000;
if (srate < 500000)
srate = 500000;
srate = 32000000;
if (srate < 500000)
srate = 500000;
filter = 0;
if (srate < 24000000)
......@@ -174,7 +174,7 @@ static void tda8083_wait_diseqc_fifo (struct tda8083_state* state, int timeout)
unsigned long start = jiffies;
while (jiffies - start < timeout &&
!(tda8083_readreg(state, 0x02) & 0x80))
!(tda8083_readreg(state, 0x02) & 0x80))
{
msleep(50);
};
......
drivers/media/dvb/ttpci/av7110.c
浏览文件 @ 9101e622
......@@ -217,10 +217,10 @@ static int arm_thread(void *data)
dprintk(4, "%p\n",av7110);
lock_kernel();
daemonize("arm_mon");
sigfillset(&current->blocked);
unlock_kernel();
lock_kernel();
daemonize("arm_mon");
sigfillset(&current->blocked);
unlock_kernel();
av7110->arm_thread = current;
......@@ -1535,7 +1535,7 @@ static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_param
buf[2] = ((div & 0x18000) >> 10) | 0x95;
buf[3] = (pwr << 6) | 0x30;
// NOTE: since we're using a prescaler of 2, we set the
// NOTE: since we're using a prescaler of 2, we set the
// divisor frequency to 62.5kHz and divide by 125 above
if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1)
......@@ -1811,7 +1811,7 @@ static struct tda8083_config grundig_29504_451_config = {
static int philips_cd1516_pll_set(struct dvb_frontend* fe,
struct dvb_frontend_parameters* params)
{
struct av7110* av7110 = fe->dvb->priv;
struct av7110* av7110 = fe->dvb->priv;
u32 div;
u32 f = params->frequency;
u8 data[4];
......@@ -2202,7 +2202,7 @@ static u8 read_pwm(struct av7110* av7110)
struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
{ .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
pwm = 0x48;
return pwm;
......@@ -2245,7 +2245,7 @@ static int frontend_init(struct av7110 *av7110)
}
// Try the grundig 29504-451
av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
if (av7110->fe) {
av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
......@@ -2271,12 +2271,12 @@ static int frontend_init(struct av7110 *av7110)
case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
// ALPS TDLB7
av7110->fe = sp8870_attach(&alps_tdlb7_config, &av7110->i2c_adap);
av7110->fe = sp8870_attach(&alps_tdlb7_config, &av7110->i2c_adap);
break;
case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
break;
case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
......@@ -2421,9 +2421,9 @@ static int av7110_attach(struct saa7146_dev* dev, struct saa7146_pci_extension_d
dprintk(4, "dev: %p\n", dev);
/* Set RPS_IRQ to 1 to track rps1 activity.
* Enabling this won't send any interrupt to PC CPU.
*/
/* Set RPS_IRQ to 1 to track rps1 activity.
* Enabling this won't send any interrupt to PC CPU.
*/
#define RPS_IRQ 0
if (budgetpatch == 1) {
......
drivers/media/dvb/ttpci/av7110_hw.c
浏览文件 @ 9101e622
......@@ -1203,15 +1203,15 @@ int av7110_osd_cmd(struct av7110 *av7110, osd_cmd_t *dc)
int av7110_osd_capability(struct av7110 *av7110, osd_cap_t *cap)
{
switch (cap->cmd) {
case OSD_CAP_MEMSIZE:
if (FW_4M_SDRAM(av7110->arm_app))
cap->val = 1000000;
else
cap->val = 92000;
return 0;
default:
return -EINVAL;
}
switch (cap->cmd) {
case OSD_CAP_MEMSIZE:
if (FW_4M_SDRAM(av7110->arm_app))
cap->val = 1000000;
else
cap->val = 92000;
return 0;
default:
return -EINVAL;
}
}
#endif /* CONFIG_DVB_AV7110_OSD */
drivers/media/dvb/ttpci/av7110_v4l.c
浏览文件 @ 9101e622
......@@ -120,8 +120,8 @@ static int ves1820_writereg(struct saa7146_dev *dev, u8 addr, u8 reg, u8 data)
static int stv0297_writereg(struct saa7146_dev *dev, u8 addr, u8 reg, u8 data)
{
u8 buf [] = { reg, data };
struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = 2 };
u8 buf [] = { reg, data };
struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = 2 };
if (1 != saa7146_i2c_transfer(dev, &msg, 1, 1))
return -1;
......
drivers/media/dvb/ttpci/budget-core.c
浏览文件 @ 9101e622
......@@ -87,7 +87,7 @@ static int start_ts_capture(struct budget *budget)
* Pitch: 188, NumBytes3: 188, NumLines3: 1024
*/
switch(budget->card->type) {
switch(budget->card->type) {
case BUDGET_FS_ACTIVY:
saa7146_write(dev, DD1_INIT, 0x04000000);
saa7146_write(dev, MC2, (MASK_09 | MASK_25));
......
drivers/media/dvb/ttpci/budget-patch.c
浏览文件 @ 9101e622
......@@ -45,11 +45,11 @@ MAKE_BUDGET_INFO(ttbp, "TT-Budget/Patch DVB-S 1.x PCI", BUDGET_PATCH);
//MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC);
static struct pci_device_id pci_tbl[] = {
MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000),
MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000),
// MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013),
{
.vendor = 0,
}
{
.vendor = 0,
}
};
/* those lines are for budget-patch to be tried
......@@ -165,57 +165,57 @@ static int budget_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t m
static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length)
{
int i;
dprintk(2, "budget: %p\n", budget);
for (i = 2; i < length; i++)
{
ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0);
msleep(5);
}
if (length)
ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0);
else
ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0);
msleep(5);
ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0);
msleep(5);
return 0;
int i;
dprintk(2, "budget: %p\n", budget);
for (i = 2; i < length; i++)
{
ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0);
msleep(5);
}
if (length)
ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0);
else
ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0);
msleep(5);
ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0);
msleep(5);
return 0;
}
static void av7110_set22k(struct budget_patch *budget, int state)
{
u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0};
u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0};
dprintk(2, "budget: %p\n", budget);
budget_av7110_send_fw_cmd(budget, buf, 2);
dprintk(2, "budget: %p\n", budget);
budget_av7110_send_fw_cmd(budget, buf, 2);
}
static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst)
{
int i;
u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC),
16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
int i;
u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC),
16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
dprintk(2, "budget: %p\n", budget);
dprintk(2, "budget: %p\n", budget);
if (len>10)
len=10;
if (len>10)
len=10;
buf[1] = len+2;
buf[2] = len;
buf[1] = len+2;
buf[2] = len;
if (burst != -1)
buf[3]=burst ? 0x01 : 0x00;
else
buf[3]=0xffff;
if (burst != -1)
buf[3]=burst ? 0x01 : 0x00;
else
buf[3]=0xffff;
for (i=0; i<len; i++)
buf[i+4]=msg[i];
for (i=0; i<len; i++)
buf[i+4]=msg[i];
budget_av7110_send_fw_cmd(budget, buf, 18);
return 0;
budget_av7110_send_fw_cmd(budget, buf, 18);
return 0;
}
static int budget_patch_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
......@@ -276,7 +276,7 @@ static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_param
buf[2] = ((div & 0x18000) >> 10) | 0x95;
buf[3] = (pwr << 6) | 0x30;
// NOTE: since we're using a prescaler of 2, we set the
// NOTE: since we're using a prescaler of 2, we set the
// divisor frequency to 62.5kHz and divide by 125 above
if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO;
......@@ -294,7 +294,7 @@ static u8 alps_bsru6_inittab[] = {
0x01, 0x15,
0x02, 0x00,
0x03, 0x00,
0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
0x06, 0x40, /* DAC not used, set to high impendance mode */
0x07, 0x00, /* DAC LSB */
......@@ -413,7 +413,7 @@ static void frontend_init(struct budget_patch* budget)
{
switch(budget->dev->pci->subsystem_device) {
case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
case 0x1013: // SATELCO Multimedia PCI
case 0x1013: // SATELCO Multimedia PCI
// try the ALPS BSRV2 first of all
budget->dvb_frontend = ves1x93_attach(&alps_bsrv2_config, &budget->i2c_adap);
......@@ -463,8 +463,8 @@ static void frontend_init(struct budget_patch* budget)
/* written by Emard */
static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info)
{
struct budget_patch *budget;
int err;
struct budget_patch *budget;
int err;
int count = 0;
int detected = 0;
......@@ -472,12 +472,12 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
#define RPS_IRQ 0
#define HPS_SETUP 0
#if PATCH_RESET
saa7146_write(dev, MC1, MASK_31);
msleep(40);
saa7146_write(dev, MC1, MASK_31);
msleep(40);
#endif
#if HPS_SETUP
// initialize registers. Better to have it like this
// than leaving something unconfigured
// initialize registers. Better to have it like this
// than leaving something unconfigured
saa7146_write(dev, DD1_STREAM_B, 0);
// port B VSYNC at rising edge
saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too!
......@@ -486,29 +486,29 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
// debi config
// saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18);
// zero all HPS registers
saa7146_write(dev, HPS_H_PRESCALE, 0); // r68
saa7146_write(dev, HPS_H_SCALE, 0); // r6c
saa7146_write(dev, BCS_CTRL, 0); // r70
saa7146_write(dev, HPS_V_SCALE, 0); // r60
saa7146_write(dev, HPS_V_GAIN, 0); // r64
saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74
saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78
// Set HPS prescaler for port B input
saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) );
saa7146_write(dev, MC2,
0 * (MASK_08 | MASK_24) | // BRS control
0 * (MASK_09 | MASK_25) | // a
0 * (MASK_10 | MASK_26) | // b
1 * (MASK_06 | MASK_22) | // HPS_CTRL1
1 * (MASK_05 | MASK_21) | // HPS_CTRL2
0 * (MASK_01 | MASK_15) // DEBI
);
// zero all HPS registers
saa7146_write(dev, HPS_H_PRESCALE, 0); // r68
saa7146_write(dev, HPS_H_SCALE, 0); // r6c
saa7146_write(dev, BCS_CTRL, 0); // r70
saa7146_write(dev, HPS_V_SCALE, 0); // r60
saa7146_write(dev, HPS_V_GAIN, 0); // r64
saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74
saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78
// Set HPS prescaler for port B input
saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) );
saa7146_write(dev, MC2,
0 * (MASK_08 | MASK_24) | // BRS control
0 * (MASK_09 | MASK_25) | // a
0 * (MASK_10 | MASK_26) | // b
1 * (MASK_06 | MASK_22) | // HPS_CTRL1
1 * (MASK_05 | MASK_21) | // HPS_CTRL2
0 * (MASK_01 | MASK_15) // DEBI
);
#endif
// Disable RPS1 and RPS0
saa7146_write(dev, MC1, ( MASK_29 | MASK_28));
// RPS1 timeout disable
saa7146_write(dev, RPS_TOV1, 0);
saa7146_write(dev, MC1, ( MASK_29 | MASK_28));
// RPS1 timeout disable
saa7146_write(dev, RPS_TOV1, 0);
// code for autodetection
// will wait for VBI_B event (vertical blank at port B)
......@@ -521,38 +521,38 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
WRITE_RPS1(cpu_to_le32(CMD_UPLOAD |
MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 ));
#endif
WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
#if RPS_IRQ
// issue RPS1 interrupt to increment counter
WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
// at least a NOP is neede between two interrupts
WRITE_RPS1(cpu_to_le32(CMD_NOP));
// interrupt again
WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
// issue RPS1 interrupt to increment counter
WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
// at least a NOP is neede between two interrupts
WRITE_RPS1(cpu_to_le32(CMD_NOP));
// interrupt again
WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
#endif
WRITE_RPS1(cpu_to_le32(CMD_STOP));
WRITE_RPS1(cpu_to_le32(CMD_STOP));
#if RPS_IRQ
// set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
// use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
// use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
// set event counter 1 treshold to maximum allowed value (rEC p55)
saa7146_write(dev, ECT1R, 0x3fff );
// set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
// use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
// use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
// set event counter 1 treshold to maximum allowed value (rEC p55)
saa7146_write(dev, ECT1R, 0x3fff );
#endif
// Fix VSYNC level
saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
// Set RPS1 Address register to point to RPS code (r108 p42)
saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
// Enable RPS1, (rFC p33)
saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
// Fix VSYNC level
saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
// Set RPS1 Address register to point to RPS code (r108 p42)
saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
// Enable RPS1, (rFC p33)
saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
mdelay(50);
saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
mdelay(50);
saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
mdelay(150);
......@@ -560,17 +560,17 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
detected = 1;
#if RPS_IRQ
printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
#endif
// Disable RPS1
saa7146_write(dev, MC1, ( MASK_29 ));
saa7146_write(dev, MC1, ( MASK_29 ));
if(detected == 0)
printk("budget-patch not detected or saa7146 in non-default state.\n"
"try enabling ressetting of 7146 with MASK_31 in MC1 register\n");
printk("budget-patch not detected or saa7146 in non-default state.\n"
"try enabling ressetting of 7146 with MASK_31 in MC1 register\n");
else
printk("BUDGET-PATCH DETECTED.\n");
printk("BUDGET-PATCH DETECTED.\n");
/* OLD (Original design by Roberto Deza):
......@@ -641,83 +641,83 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
*/
// Setup RPS1 "program" (p35)
count = 0;
count = 0;
// Wait Source Line Counter Threshold (p36)
WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
// Set GPIO3=1 (p42)
WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
// Wait Source Line Counter Threshold (p36)
WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
// Set GPIO3=1 (p42)
WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
#if RPS_IRQ
// issue RPS1 interrupt
WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
// issue RPS1 interrupt
WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
#endif
// Wait reset Source Line Counter Threshold (p36)
WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
// Set GPIO3=0 (p42)
WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
// Wait reset Source Line Counter Threshold (p36)
WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
// Set GPIO3=0 (p42)
WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
#if RPS_IRQ
// issue RPS1 interrupt
WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
// issue RPS1 interrupt
WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
#endif
// Jump to begin of RPS program (p37)
WRITE_RPS1(cpu_to_le32(CMD_JUMP));
WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
// Fix VSYNC level
saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
// Set RPS1 Address register to point to RPS code (r108 p42)
saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
// Set Source Line Counter Threshold, using BRS (rCC p43)
// It generates HS event every TS_HEIGHT lines
// this is related to TS_WIDTH set in register
// NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE
// low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188
//,then RPS_THRESH1
// should be set to trigger every TS_HEIGHT (512) lines.
//
saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
// Jump to begin of RPS program (p37)
WRITE_RPS1(cpu_to_le32(CMD_JUMP));
WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
// saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 );
// Enable RPS1 (rFC p33)
saa7146_write(dev, MC1, (MASK_13 | MASK_29));
if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL)))
return -ENOMEM;
// Fix VSYNC level
saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
// Set RPS1 Address register to point to RPS code (r108 p42)
saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
// Set Source Line Counter Threshold, using BRS (rCC p43)
// It generates HS event every TS_HEIGHT lines
// this is related to TS_WIDTH set in register
// NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE
// low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188
//,then RPS_THRESH1
// should be set to trigger every TS_HEIGHT (512) lines.
//
saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
// saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 );
// Enable RPS1 (rFC p33)
saa7146_write(dev, MC1, (MASK_13 | MASK_29));
if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL)))
return -ENOMEM;
dprintk(2, "budget: %p\n", budget);
dprintk(2, "budget: %p\n", budget);
if ((err = ttpci_budget_init (budget, dev, info, THIS_MODULE))) {
kfree (budget);
return err;
}
if ((err = ttpci_budget_init (budget, dev, info, THIS_MODULE))) {
kfree (budget);
return err;
}
dev->ext_priv = budget;
dev->ext_priv = budget;
budget->dvb_adapter.priv = budget;
frontend_init(budget);
return 0;
return 0;
}
static int budget_patch_detach (struct saa7146_dev* dev)
{
struct budget_patch *budget = (struct budget_patch*) dev->ext_priv;
int err;
struct budget_patch *budget = (struct budget_patch*) dev->ext_priv;
int err;
if (budget->dvb_frontend) dvb_unregister_frontend(budget->dvb_frontend);
err = ttpci_budget_deinit (budget);
err = ttpci_budget_deinit (budget);
kfree (budget);
kfree (budget);
return err;
return err;
}
static int __init budget_patch_init(void)
......@@ -727,20 +727,20 @@ static int __init budget_patch_init(void)
static void __exit budget_patch_exit(void)
{
saa7146_unregister_extension(&budget_extension);
saa7146_unregister_extension(&budget_extension);
}
static struct saa7146_extension budget_extension = {
.name = "budget_patch dvb\0",
.flags = 0,
.name = "budget_patch dvb\0",
.flags = 0,
.module = THIS_MODULE,
.pci_tbl = pci_tbl,
.attach = budget_patch_attach,
.detach = budget_patch_detach,
.module = THIS_MODULE,
.pci_tbl = pci_tbl,
.attach = budget_patch_attach,
.detach = budget_patch_detach,
.irq_mask = MASK_10,
.irq_func = ttpci_budget_irq10_handler,
.irq_mask = MASK_10,
.irq_func = ttpci_budget_irq10_handler,
};
module_init(budget_patch_init);
......@@ -749,4 +749,4 @@ module_exit(budget_patch_exit);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others");
MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 "
"based so-called Budget Patch cards");
"based so-called Budget Patch cards");
drivers/media/dvb/ttpci/budget.c
浏览文件 @ 9101e622
......@@ -256,7 +256,7 @@ static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_param
buf[2] = ((div & 0x18000) >> 10) | 0x95;
buf[3] = (pwr << 6) | 0x30;
// NOTE: since we're using a prescaler of 2, we set the
// NOTE: since we're using a prescaler of 2, we set the
// divisor frequency to 62.5kHz and divide by 125 above
if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO;
......@@ -565,7 +565,7 @@ static u8 read_pwm(struct budget* budget)
struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
{ .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
if ((i2c_transfer(&budget->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
if ((i2c_transfer(&budget->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
pwm = 0x48;
return pwm;
......@@ -593,7 +593,7 @@ static void frontend_init(struct budget *budget)
budget->dvb_frontend = ves1x93_attach(&alps_bsrv2_config, &budget->i2c_adap);
if (budget->dvb_frontend) {
budget->dvb_frontend->ops->diseqc_send_master_cmd = budget_diseqc_send_master_cmd;
budget->dvb_frontend->ops->diseqc_send_burst = budget_diseqc_send_burst;
budget->dvb_frontend->ops->diseqc_send_burst = budget_diseqc_send_burst;
budget->dvb_frontend->ops->set_tone = budget_set_tone;
break;
}
......
drivers/media/dvb/ttpci/budget.h
浏览文件 @ 9101e622
......@@ -19,7 +19,7 @@ extern int budget_debug;
#endif
#define dprintk(level,args...) \
do { if ((budget_debug & level)) { printk("%s: %s(): ",__stringify(KBUILD_MODNAME), __FUNCTION__); printk(args); } } while (0)
do { if ((budget_debug & level)) { printk("%s: %s(): ",__stringify(KBUILD_MODNAME), __FUNCTION__); printk(args); } } while (0)
struct budget_info {
char *name;
......
drivers/media/dvb/ttpci/fdump.c
浏览文件 @ 9101e622
......@@ -36,7 +36,7 @@ int main(int argc, char **argv)
}
fprintf(fd_out, "\n};\n\n");
fclose(fd_in);
fclose(fd_out);
......
drivers/media/dvb/ttpci/ttpci-eeprom.c
浏览文件 @ 9101e622
......@@ -13,7 +13,7 @@
Holger Waechtler Convergence
Copyright (C) 2002-2003 Ralph Metzler <rjkm@metzlerbros.de>
Metzler Brothers Systementwicklung GbR
Metzler Brothers Systementwicklung GbR
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
......@@ -48,41 +48,41 @@
static int check_mac_tt(u8 *buf)
{
int i;
u16 tmp = 0xffff;
for (i = 0; i < 8; i++) {
tmp = (tmp << 8) | ((tmp >> 8) ^ buf[i]);
tmp ^= (tmp >> 4) & 0x0f;
tmp ^= (tmp << 12) ^ ((tmp & 0xff) << 5);
}
tmp ^= 0xffff;
return (((tmp >> 8) ^ buf[8]) | ((tmp & 0xff) ^ buf[9]));
int i;
u16 tmp = 0xffff;
for (i = 0; i < 8; i++) {
tmp = (tmp << 8) | ((tmp >> 8) ^ buf[i]);
tmp ^= (tmp >> 4) & 0x0f;
tmp ^= (tmp << 12) ^ ((tmp & 0xff) << 5);
}
tmp ^= 0xffff;
return (((tmp >> 8) ^ buf[8]) | ((tmp & 0xff) ^ buf[9]));
}
static int getmac_tt(u8 * decodedMAC, u8 * encodedMAC)
{
u8 xor[20] = { 0x72, 0x23, 0x68, 0x19, 0x5c, 0xa8, 0x71, 0x2c,
u8 xor[20] = { 0x72, 0x23, 0x68, 0x19, 0x5c, 0xa8, 0x71, 0x2c,
0x54, 0xd3, 0x7b, 0xf1, 0x9E, 0x23, 0x16, 0xf6,
0x1d, 0x36, 0x64, 0x78};
u8 data[20];
int i;
u8 data[20];
int i;
/* In case there is a sig check failure have the orig contents available */
memcpy(data, encodedMAC, 20);
for (i = 0; i < 20; i++)
data[i] ^= xor[i];
for (i = 0; i < 10; i++)
data[i] = ((data[2 * i + 1] << 8) | data[2 * i])
data[i] ^= xor[i];
for (i = 0; i < 10; i++)
data[i] = ((data[2 * i + 1] << 8) | data[2 * i])
>> ((data[2 * i + 1] >> 6) & 3);
if (check_mac_tt(data))
return -ENODEV;
if (check_mac_tt(data))
return -ENODEV;
decodedMAC[0] = data[2]; decodedMAC[1] = data[1]; decodedMAC[2] = data[0];
decodedMAC[3] = data[6]; decodedMAC[4] = data[5]; decodedMAC[5] = data[4];
return 0;
return 0;
}
static int ttpci_eeprom_read_encodedMAC(struct i2c_adapter *adapter, u8 * encodedMAC)
......
drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
浏览文件 @ 9101e622
......@@ -225,8 +225,8 @@ static int ttusb_i2c_msg(struct ttusb *ttusb,
err = ttusb_result(ttusb, b, 0x20);
/* check if the i2c transaction was successful */
if ((snd_len != b[5]) || (rcv_len != b[6])) return -EREMOTEIO;
/* check if the i2c transaction was successful */
if ((snd_len != b[5]) || (rcv_len != b[6])) return -EREMOTEIO;
if (rcv_len > 0) {
......@@ -489,27 +489,27 @@ static int ttusb_send_diseqc(struct dvb_frontend* fe,
static int lnbp21_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
{
struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv;
int ret;
u8 data[1];
struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = data, .len = sizeof(data) };
switch(voltage) {
case SEC_VOLTAGE_OFF:
data[0] = 0x00;
break;
case SEC_VOLTAGE_13:
data[0] = 0x44;
break;
case SEC_VOLTAGE_18:
data[0] = 0x4c;
break;
default:
return -EINVAL;
};
ret = i2c_transfer(&ttusb->i2c_adap, &msg, 1);
return (ret != 1) ? -EIO : 0;
struct ttusb* ttusb = (struct ttusb*) fe->dvb->priv;
int ret;
u8 data[1];
struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = data, .len = sizeof(data) };
switch(voltage) {
case SEC_VOLTAGE_OFF:
data[0] = 0x00;
break;
case SEC_VOLTAGE_13:
data[0] = 0x44;
break;
case SEC_VOLTAGE_18:
data[0] = 0x4c;
break;
default:
return -EINVAL;
};
ret = i2c_transfer(&ttusb->i2c_adap, &msg, 1);
return (ret != 1) ? -EIO : 0;
}
static int ttusb_update_lnb(struct ttusb *ttusb)
......@@ -1184,45 +1184,45 @@ static struct tda1004x_config philips_tdm1316l_config = {
};
static u8 alps_bsbe1_inittab[] = {
0x01, 0x15,
0x02, 0x30,
0x03, 0x00,
0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
0x06, 0x40, /* DAC not used, set to high impendance mode */
0x07, 0x00, /* DAC LSB */
0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
0x09, 0x00, /* FIFO */
0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
0x10, 0x3f, // AGC2 0x3d
0x11, 0x84,
0x12, 0xb9,
0x15, 0xc9, // lock detector threshold
0x16, 0x00,
0x17, 0x00,
0x18, 0x00,
0x19, 0x00,
0x1a, 0x00,
0x1f, 0x50,
0x20, 0x00,
0x21, 0x00,
0x22, 0x00,
0x23, 0x00,
0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
0x29, 0x1e, // 1/2 threshold
0x2a, 0x14, // 2/3 threshold
0x2b, 0x0f, // 3/4 threshold
0x2c, 0x09, // 5/6 threshold
0x2d, 0x05, // 7/8 threshold
0x2e, 0x01,
0x31, 0x1f, // test all FECs
0x32, 0x19, // viterbi and synchro search
0x33, 0xfc, // rs control
0x34, 0x93, // error control
0x0f, 0x92,
0xff, 0xff
0x01, 0x15,
0x02, 0x30,
0x03, 0x00,
0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
0x06, 0x40, /* DAC not used, set to high impendance mode */
0x07, 0x00, /* DAC LSB */
0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
0x09, 0x00, /* FIFO */
0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
0x10, 0x3f, // AGC2 0x3d
0x11, 0x84,
0x12, 0xb9,
0x15, 0xc9, // lock detector threshold
0x16, 0x00,
0x17, 0x00,
0x18, 0x00,
0x19, 0x00,
0x1a, 0x00,
0x1f, 0x50,
0x20, 0x00,
0x21, 0x00,
0x22, 0x00,
0x23, 0x00,
0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
0x29, 0x1e, // 1/2 threshold
0x2a, 0x14, // 2/3 threshold
0x2b, 0x0f, // 3/4 threshold
0x2c, 0x09, // 5/6 threshold
0x2d, 0x05, // 7/8 threshold
0x2e, 0x01,
0x31, 0x1f, // test all FECs
0x32, 0x19, // viterbi and synchro search
0x33, 0xfc, // rs control
0x34, 0x93, // error control
0x0f, 0x92,
0xff, 0xff
};
static u8 alps_bsru6_inittab[] = {
......@@ -1350,7 +1350,7 @@ static int ttusb_novas_grundig_29504_491_pll_set(struct dvb_frontend *fe, struct
u32 div;
struct i2c_msg msg = {.addr = 0x61,.flags = 0,.buf = buf,.len = sizeof(buf) };
div = params->frequency / 125;
div = params->frequency / 125;
buf[0] = (div >> 8) & 0x7f;
buf[1] = div & 0xff;
......@@ -1487,7 +1487,7 @@ static int ttusb_probe(struct usb_interface *intf, const struct usb_device_id *i
udev = interface_to_usbdev(intf);
if (intf->altsetting->desc.bInterfaceNumber != 1) return -ENODEV;
if (intf->altsetting->desc.bInterfaceNumber != 1) return -ENODEV;
if (!(ttusb = kmalloc(sizeof(struct ttusb), GFP_KERNEL)))
return -ENOMEM;
......
drivers/media/dvb/ttusb-dec/ttusb_dec.c
浏览文件 @ 9101e622
......@@ -1203,7 +1203,7 @@ static int ttusb_init_rc(struct ttusb_dec *dec)
input_dev->keycode = rc_keys;
for (i = 0; i < ARRAY_SIZE(rc_keys); i++)
set_bit(rc_keys[i], input_dev->keybit);
set_bit(rc_keys[i], input_dev->keybit);
input_register_device(input_dev);
......@@ -1529,7 +1529,7 @@ static void ttusb_dec_exit_rc(struct ttusb_dec *dec)
usb_free_urb(dec->irq_urb);
usb_buffer_free(dec->udev,IRQ_PACKET_SIZE,
dec->irq_buffer, dec->irq_dma_handle);
dec->irq_buffer, dec->irq_dma_handle);
if (dec->rc_input_dev) {
input_unregister_device(dec->rc_input_dev);
......
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