未验证 提交 cdd2755b 编写于 作者: V vandoul 提交者: GitHub

[bsp][lpc55sxx]修复drv_spi和drv_pwm测试得到的问题 (#6983)

修复spi通过env配置选中之后没有使能的问题,修改spi获取时钟源的API,修改cs脚无效的问题;
修复pwm不能修改频率和占空比的问题,修改pwm获取时钟源的API解决PWM频率和占空比不正确的问题。
上级 e63e33a3
...@@ -68,7 +68,7 @@ static rt_err_t lpc_drv_pwm_get(struct rt_device_pwm *device, struct rt_pwm_conf ...@@ -68,7 +68,7 @@ static rt_err_t lpc_drv_pwm_get(struct rt_device_pwm *device, struct rt_pwm_conf
#ifdef BSP_USING_CTIMER2 #ifdef BSP_USING_CTIMER2
/* get frequence */ /* get frequence */
pwmClock = CLOCK_GetFreq(kCLOCK_Timer2) ; pwmClock = CLOCK_GetCTimerClkFreq(2U) ;
#endif #endif
get_frequence = pwmClock / (base->MR[kCTIMER_Match_3] + 1); get_frequence = pwmClock / (base->MR[kCTIMER_Match_3] + 1);
...@@ -110,17 +110,14 @@ static rt_err_t lpc_drv_pwm_set(struct rt_device_pwm *device, struct rt_pwm_conf ...@@ -110,17 +110,14 @@ static rt_err_t lpc_drv_pwm_set(struct rt_device_pwm *device, struct rt_pwm_conf
{ {
/* Get the PWM period match value and pulse width match value of DEFAULT_FREQ PWM signal with DEFAULT_DUTY dutycycle */ /* Get the PWM period match value and pulse width match value of DEFAULT_FREQ PWM signal with DEFAULT_DUTY dutycycle */
/* Calculate PWM period match value */ /* Calculate PWM period match value */
pwmPeriod = (( CLOCK_GetFreq(kCLOCK_Timer2) / (config.prescale + 1) ) / DEFAULT_FREQ) - 1; double tmp = configuration->period;
/* Target frequence. */
tmp = 1000000000/tmp;
pwmPeriod = (( CLOCK_GetCTimerClkFreq(2U) / (config.prescale + 1) ) / (uint32_t)tmp) - 1;
/* Calculate pulse width match value */ /* Calculate pulse width match value */
if (DEFAULT_DUTY == 0) tmp = configuration->pulse;
{ pulsePeriod = (1.0 - tmp / configuration->period) * pwmPeriod;
pulsePeriod = pwmPeriod + 1;
}
else
{
pulsePeriod = (pwmPeriod * (100 - DEFAULT_DUTY)) / 100;
}
/* Match on channel 3 will define the PWM period */ /* Match on channel 3 will define the PWM period */
base->MR[kCTIMER_Match_3] = pwmPeriod; base->MR[kCTIMER_Match_3] = pwmPeriod;
/* This will define the PWM pulse period */ /* This will define the PWM pulse period */
...@@ -175,7 +172,7 @@ int rt_hw_pwm_init(void) ...@@ -175,7 +172,7 @@ int rt_hw_pwm_init(void)
#ifdef BSP_USING_CTIMER2_MAT1 #ifdef BSP_USING_CTIMER2_MAT1
/* Get the PWM period match value and pulse width match value of DEFAULT_FREQ PWM signal with DEFAULT_DUTY dutycycle */ /* Get the PWM period match value and pulse width match value of DEFAULT_FREQ PWM signal with DEFAULT_DUTY dutycycle */
/* Calculate PWM period match value */ /* Calculate PWM period match value */
pwmPeriod = (( CLOCK_GetFreq(kCLOCK_Timer2) / (config.prescale + 1) ) / DEFAULT_FREQ) - 1; pwmPeriod = (( CLOCK_GetCTimerClkFreq(2U) / (config.prescale + 1) ) / DEFAULT_FREQ) - 1;
/* Calculate pulse width match value */ /* Calculate pulse width match value */
if (DEFAULT_DUTY == 0) if (DEFAULT_DUTY == 0)
...@@ -184,7 +181,7 @@ int rt_hw_pwm_init(void) ...@@ -184,7 +181,7 @@ int rt_hw_pwm_init(void)
} }
else else
{ {
pulsePeriod = (pwmPeriod * (100 - DEFAULT_DUTY)) / 100; pulsePeriod = ((pwmPeriod + 1) * (100 - DEFAULT_DUTY)) / 100;
} }
CTIMER_SetupPwmPeriod(CTIMER2, kCTIMER_Match_3 , kCTIMER_Match_1, pwmPeriod, pulsePeriod, false); CTIMER_SetupPwmPeriod(CTIMER2, kCTIMER_Match_3 , kCTIMER_Match_1, pwmPeriod, pulsePeriod, false);
#endif #endif
......
...@@ -35,11 +35,6 @@ struct lpc_spi ...@@ -35,11 +35,6 @@ struct lpc_spi
SYSCON_RSTn_t spi_rst; SYSCON_RSTn_t spi_rst;
}; };
struct lpc_sw_spi_cs
{
rt_uint32_t pin;
};
static uint32_t lpc_get_spi_freq(SPI_Type *base) static uint32_t lpc_get_spi_freq(SPI_Type *base)
{ {
...@@ -48,56 +43,56 @@ static uint32_t lpc_get_spi_freq(SPI_Type *base) ...@@ -48,56 +43,56 @@ static uint32_t lpc_get_spi_freq(SPI_Type *base)
#if defined(BSP_USING_SPIBUS0) #if defined(BSP_USING_SPIBUS0)
if(base == SPI0) if(base == SPI0)
{ {
freq = CLOCK_GetFreq(kCLOCK_Flexcomm0); freq = CLOCK_GetFlexCommClkFreq(0);
} }
#endif #endif
#if defined(BSP_USING_SPIBUS1) #if defined(BSP_USING_SPIBUS1)
if(base == SPI1) if(base == SPI1)
{ {
freq = CLOCK_GetFreq(kCLOCK_Flexcomm1); freq = CLOCK_GetFlexCommClkFreq(1);
} }
#endif #endif
#if defined(BSP_USING_SPIBUS2) #if defined(BSP_USING_SPIBUS2)
if(base == SPI2) if(base == SPI2)
{ {
freq = CLOCK_GetFreq(kCLOCK_Flexcomm2); freq = CLOCK_GetFlexCommClkFreq(2);
} }
#endif #endif
#if defined(BSP_USING_SPIBUS3) #if defined(BSP_USING_SPIBUS3)
if(base == SPI3) if(base == SPI3)
{ {
freq = CLOCK_GetFreq(kCLOCK_Flexcomm3); freq = CLOCK_GetFlexCommClkFreq(3);
} }
#endif #endif
#if defined(BSP_USING_SPIBUS4) #if defined(BSP_USING_SPIBUS4)
if(base == SPI4) if(base == SPI4)
{ {
freq = CLOCK_GetFreq(kCLOCK_Flexcomm4); freq = CLOCK_GetFlexCommClkFreq(4);
} }
#endif #endif
#if defined(BSP_USING_SPIBUS5) #if defined(BSP_USING_SPIBUS5)
if(base == SPI5) if(base == SPI5)
{ {
freq = CLOCK_GetFreq(kCLOCK_Flexcomm5); freq = CLOCK_GetFlexCommClkFreq(5);
} }
#endif #endif
#if defined(BSP_USING_SPIBUS6) #if defined(BSP_USING_SPIBUS6)
if(base == SPI6) if(base == SPI6)
{ {
freq = CLOCK_GetFreq(kCLOCK_Flexcomm6); freq = CLOCK_GetFlexCommClkFreq(6);
} }
#endif #endif
#if defined(BSP_USING_SPIBUS7) #if defined(BSP_USING_SPIBUS7)
if(base == SPI7) if(base == SPI7)
{ {
freq = CLOCK_GetFreq(kCLOCK_Flexcomm7); freq = CLOCK_GetFlexCommClkFreq(7);
} }
#endif #endif
...@@ -105,7 +100,7 @@ static uint32_t lpc_get_spi_freq(SPI_Type *base) ...@@ -105,7 +100,7 @@ static uint32_t lpc_get_spi_freq(SPI_Type *base)
#if defined(BSP_USING_SPIBUS8) #if defined(BSP_USING_SPIBUS8)
if(base == SPI8) if(base == SPI8)
{ {
freq = CLOCK_GetFreq(kCLOCK_HsLspi); freq = CLOCK_GetHsLspiClkFreq();
} }
#endif #endif
...@@ -191,14 +186,10 @@ rt_err_t lpc_spi_bus_attach_device(const char *bus_name, const char *device_name ...@@ -191,14 +186,10 @@ rt_err_t lpc_spi_bus_attach_device(const char *bus_name, const char *device_name
struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device)); struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
RT_ASSERT(spi_device != RT_NULL); RT_ASSERT(spi_device != RT_NULL);
struct lpc_sw_spi_cs *cs_pin = (struct lpc_sw_spi_cs *)rt_malloc(sizeof(struct lpc_sw_spi_cs));
RT_ASSERT(cs_pin != RT_NULL);
cs_pin->pin = pin;
rt_pin_mode(pin, PIN_MODE_OUTPUT); rt_pin_mode(pin, PIN_MODE_OUTPUT);
rt_pin_write(pin, PIN_HIGH); rt_pin_write(pin, PIN_HIGH);
ret = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin); ret = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, pin, NULL);
return ret; return ret;
} }
...@@ -228,11 +219,11 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * ...@@ -228,11 +219,11 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
RT_ASSERT(device->bus->parent.user_data != RT_NULL); RT_ASSERT(device->bus->parent.user_data != RT_NULL);
struct lpc_spi *spi = (struct lpc_spi *)(device->bus->parent.user_data); struct lpc_spi *spi = (struct lpc_spi *)(device->bus->parent.user_data);
struct lpc_sw_spi_cs *cs = device->parent.user_data; int cs_pin = device->cs_pin;
if(message->cs_take) if(message->cs_take)
{ {
rt_pin_write(cs->pin, PIN_LOW); rt_pin_write(cs_pin, PIN_LOW);
} }
length = message->length; length = message->length;
...@@ -261,7 +252,7 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * ...@@ -261,7 +252,7 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
if(message->cs_release) if(message->cs_release)
{ {
rt_pin_write(cs->pin, PIN_HIGH); rt_pin_write(cs_pin, PIN_HIGH);
} }
return (message->length - length); return (message->length - length);
......
...@@ -124,11 +124,11 @@ menu "On-chip Peripheral Drivers" ...@@ -124,11 +124,11 @@ menu "On-chip Peripheral Drivers"
default y default y
if BSP_USING_SPI if BSP_USING_SPI
config BSP_USING_SPI3 config BSP_USING_SPIBUS3
bool "Enable Flexcomm3 as SPI" bool "Enable Flexcomm3 as SPI"
default n default n
config BSP_USING_SPI8 config BSP_USING_SPIBUS8
bool "Enable Flexcomm8 as High Speed SPI" bool "Enable Flexcomm8 as High Speed SPI"
default y default y
endif endif
......
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