- 28 9月, 2014 1 次提交
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由 Dan Williams 提交于
Per commit "77873803 net_dma: mark broken" net_dma is no longer used and there is no plan to fix it. This is the mechanical removal of bits in CONFIG_NET_DMA ifdef guards. Reverting the remainder of the net_dma induced changes is deferred to subsequent patches. Marked for stable due to Roman's report of a memory leak in dma_pin_iovec_pages(): https://lkml.org/lkml/2014/9/3/177 Cc: Dave Jiang <dave.jiang@intel.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: David Whipple <whipple@securedatainnovations.ch> Cc: Alexander Duyck <alexander.h.duyck@intel.com> Cc: <stable@vger.kernel.org> Reported-by: NRoman Gushchin <klamm@yandex-team.ru> Acked-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 20 1月, 2014 1 次提交
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由 Jonas Jensen 提交于
The MOXA ART SoC has a DMA controller capable of offloading expensive memory operations, such as large copies. This patch adds support for the controller including four channels. Two of these are used to handle MMC copy on the UC-7112-LX hardware. The remaining two can be used in a future audio driver or client application. Signed-off-by: NJonas Jensen <jonas.jensen@gmail.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 08 1月, 2014 1 次提交
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由 Florian Meier 提交于
Add support for DMA controller of BCM2835 as used in the Raspberry Pi. Currently it only supports cyclic DMA. Signed-off-by: NFlorian Meier <florian.meier@koalo.de> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 08 10月, 2013 1 次提交
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由 Heiko Stuebner 提交于
This adds a new driver to support the s3c24xx dma using the dmaengine and makes the old one in mach-s3c24xx obsolete in the long run. Conceptually the s3c24xx-dma feels like a distant relative of the pl08x with numerous virtual channels being mapped to a lot less physical ones. The driver therefore borrows a lot from the amba-pl08x driver in this regard. Functionality-wise the driver gains a memcpy ability in addition to the slave_sg one. The driver supports both the method for requesting the peripheral used by SoCs before the S3C2443 and the different method for S3C2443 and later. On earlier SoCs the hardware channels usable for specific peripherals is constrainted while on later SoCs all channels can be used for any peripheral. Tested on a s3c2416-based board, memcpy using the dmatest module and slave_sg partially using the spi-s3c64xx driver. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 28 8月, 2013 1 次提交
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由 Zhangfei Gao 提交于
Add dmaengine driver for hisilicon k3 platform based on virt_dma Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org> Tested-by: NKai Yang <jean.yangkai@huawei.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 09 8月, 2013 1 次提交
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This driver is currently used by musb' cppi41 couter part. I may merge both dma engine user of musb at some point but not just yet. The driver seems to work in RX/TX mode in host mode, tested on mass storage. I increaed the size of the TX / RX transfers and waited for the core code to cancel a transfers and it seems to recover. v2..3: - use mall transfers on RX side and check data toggle. - use rndis mode on tx side so we haveon interrupt for 4096 transfers. - remove custom "transferred" hack and use dmaengine_tx_status() to compute the total amount of data that has been transferred. - cancel transfers and reclaim descriptors v1..v2: - RX path added - dma mode 0 & 1 is working - device tree nodes re-created. Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <djbw@fb.com> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NFelipe Balbi <balbi@ti.com>
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- 05 7月, 2013 3 次提交
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由 Lars-Peter Clausen 提交于
This patch adds dmaengine support for the JZ4740 DMA controller. For now the driver will be a wrapper around the custom JZ4740 DMA API. Once all users of the custom JZ4740 DMA API have been converted to the dmaengine API the custom API will be removed and direct hardware access will be added to the dmaengine driver. Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
To simplify the driver development let's split driver to library and platform code parts. It helps us to add PCI driver in future. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> [Fixed compile error and few checkpatch issues] Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Andy Shevchenko 提交于
The dw_dmac driver is going to be split into multiple files. To make this more convenient move it to an own directory. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 30 4月, 2013 1 次提交
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由 Shimoda, Yoshihiro 提交于
This patch adds Kconfig in the drivers/dma/sh. This patch also adds a new config "SH_DMAE_BASE" and the "config SH_DMAE" depends on it. Since some drivers (e.g. sh_mmcif.c) depends on shdma-base.c if CONFIG_DMA_ENGINE=y, the "config SH_DMAE_BASE" is set as "bool". Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 16 4月, 2013 1 次提交
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由 Andy Shevchenko 提交于
There is a new generic API to get a DMA channel for a slave device (commit 9a6cecc8 "dmaengine: add helper function to request a slave DMA channel"). In similar fashion to the DT case (commit aa3da644 "of: Add generic device tree DMA helpers") we introduce helpers to the DMAC drivers which are enumerated by ACPI. The proposed extension provides the following API calls: acpi_dma_controller_register(), devm_acpi_dma_controller_register() acpi_dma_controller_free(), devm_acpi_dma_controller_free() acpi_dma_simple_xlate() acpi_dma_request_slave_chan_by_index() acpi_dma_request_slave_chan_by_name() The first two should be used, for example, at probe() and remove() of the corresponding DMAC driver. At the register stage the DMAC driver supplies a custom xlate() function to translate a struct dma_spec into struct dma_chan. Accordingly to the ACPI Fixed DMA resource specification the only two pieces of information the slave device has are the channel id and the request line (slave id). Those two are represented by struct dma_spec. The acpi_dma_request_slave_chan_by_index() provides access to the specifix FixedDMA resource by its index. Whereas dma_request_slave_channel() takes a string parameter to identify the DMA resources required by the slave device. To make a slave device driver work with both DeviceTree and ACPI enumeration a simple convention is established: "tx" corresponds to the index 0 and "rx" to the index 1. In case of robust configuration the slave device driver unfortunately needs to call acpi_dma_request_slave_chan_by_index() directly. Additionally the patch provides "managed" version of the register/free pair i.e. devm_acpi_dma_controller_register() and devm_acpi_dma_controller_free(). Usually, the driver uses only devm_acpi_dma_controller_register(). Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 14 2月, 2013 1 次提交
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由 Vinod Koul 提交于
as requested by Rob Suggested-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 03 1月, 2013 1 次提交
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由 Philippe De Muyter 提交于
The bestcomm dma hardware, and some of its users like the FEC ethernet component, is used in different FreeScale parts, including non-powerpc parts like the ColdFire MCF547x & MCF548x families. Don't keep the driver hidden in arch/powerpc where it is inaccessible for other arches. .c files are moved to drivers/dma/bestcomm, while .h files are moved to include/linux/fsl/bestcomm. Makefiles, Kconfigs and #include directives are updated for the new file locations. Tested by recompiling for MPC5200 with all bestcomm users enabled. Signed-off-by: NPhilippe De Muyter <phdm@macqel.be> Signed-off-by: NAnatolij Gustschin <agust@denx.de>
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- 14 9月, 2012 1 次提交
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由 Zhangfei Gao 提交于
1. virtual channel vs. physical channel Virtual channel is managed by dmaengine Physical channel handling resource, such as irq Physical channel is alloced dynamically as descending priority, freed immediately when irq done. The availble highest priority physically channel will alwayes be alloced Issue pending list -> alloc highest dma physically channel available -> dma done -> free physically channel 2. list: running list & pending list submit: desc list -> pending list issue_pending_list: if (IDLE) pending list -> running list; free pending list (RUN) irq: free running list (IDLE) check pendlist -> pending list -> running list; free pending list (RUN) 3. irq: Each list generate one irq, calling callback One list may contain several desc chain, in such case, make sure only the last desc list generate irq. 4. async Submit will add desc chain to pending list, which can be multi-called If multi desc chain is submitted, only the last desc would generate irq -> call back If IDLE, issue_pending_list start pending_list, transforming pendlist to running list If RUN, irq will start pending list 5. test 5.1 pxa3xx_nand on pxa910 5.2 insmod dmatest.ko (threads_per_chan=y) By default drivers/dma/dmatest.c test every channel and test memcpy with 1 threads per channel Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 01 9月, 2012 1 次提交
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由 Matt Porter 提交于
Add a DMA engine driver for the TI EDMA controller. This driver is implemented as a wrapper around the existing DaVinci private DMA implementation. This approach allows for incremental conversion of each peripheral driver to the DMA engine API. The EDMA driver supports slave transfers but does not yet support cyclic transfers. Signed-off-by: NMatt Porter <mporter@ti.com> Tested-by: NTom Rini <trini@ti.com> Tested-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 31 7月, 2012 1 次提交
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由 Russell King 提交于
Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 7月, 2012 1 次提交
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由 Guennadi Liakhovetski 提交于
The shdma driver is going to be split into multiple files. To make this more convenient move it to an own directory. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 01 7月, 2012 1 次提交
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由 Russell King 提交于
Split the virtual slave channel DMA support from the sa11x0 driver so this code can be shared with other slave DMA engine drivers. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 6月, 2012 1 次提交
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由 Zhangfei Gao 提交于
Add support for two-channel dma under dmaengine support: mmp-adma and pxa910-squ Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com> Signed-off-by: NLeo Yan <leoy@marvell.com> Signed-off-by: NQiao Zhou <zhouqiao@marvell.com> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 08 6月, 2012 1 次提交
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由 Laxman Dewangan 提交于
Add dmaengine based NVIDIA's Tegra APB DMA driver. This driver support the slave mode of data transfer from peripheral to memory and vice versa. The driver supports for the cyclic and non-cyclic mode of data transfer. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 07 3月, 2012 1 次提交
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由 Russell King 提交于
Add support for the SA-11x0 DMA driver, which replaces the private API version in arch/arm/mach-sa1100/dma.c. We model this as a set of virtual DMA channels, one for each request signal, and assign the virtual DMA channel to a physical DMA channel when there is work to be done. This allows DMA users to claim their channels, and hold them while not in use, without affecting the availability of the physical channels. Another advantage over this approach, compared to the private version, is that a channel can be reconfigured on the fly without having to release and re-request it - which for the IrDA driver, allows us to use DMA for SIR mode transmit without eating up three physical channels. As IrDA is half-duplex, we actually only need one physical channel, and this architecture allows us to achieve that. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 18 11月, 2011 1 次提交
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由 Rongjun Ying 提交于
Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: NRongjun Ying <rongjun.ying@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> [fixed direction enums and cyclic api based on changes already merged] Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
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- 09 6月, 2011 1 次提交
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由 Mika Westerberg 提交于
The ep93xx DMA controller has 10 independent memory to peripheral (M2P) channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can also be used by SPI and IDE to perform DMA transfers to/from their memory mapped FIFOs. This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and DMA_MEMCPY (M2M only) capabilities. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NRyan Mallon <rmallon@gmail.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 06 6月, 2011 1 次提交
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由 Mika Westerberg 提交于
The ep93xx DMA controller has 10 independent memory to peripheral (M2P) channels, and 2 dedicated memory to memory (M2M) channels. M2M channels can also be used by SPI and IDE to perform DMA transfers to/from their memory mapped FIFOs. This driver supports both M2P and M2M channels with DMA_SLAVE, DMA_CYCLIC and DMA_MEMCPY (M2M only) capabilities. Signed-off-by: NMika Westerberg <mika.westerberg@iki.fi> Signed-off-by: NRyan Mallon <rmallon@gmail.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 17 3月, 2011 1 次提交
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由 matt mooney 提交于
Replace EXTRA_CFLAGS with ccflags-y. Signed-off-by: Nmatt mooney <mfm@muteddisk.com> Acked-by: NWANG Cong <xiyou.wangcong@gmail.com> Signed-off-by: NMichal Marek <mmarek@suse.cz>
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- 02 3月, 2011 1 次提交
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由 Shawn Guo 提交于
This patch adds dma support for Freescale MXS-based SoC i.MX23/28, including apbh-dma and apbx-dma. * apbh-dma and apbx-dma are supported in the driver as two mxs-dma instances. * apbh-dma is different between mx23 and mx28, hardware version register is used to differentiate. * mxs-dma supports pio function besides data transfer. The driver uses dma_data_direction DMA_NONE to identify the pio mode, and steals sgl and sg_len to get pio words and numbers from clients. * mxs dmaengine has some very specific features, like sense function and the special NAND support (nand_lock, nand_wait4ready). These are too specific to implemented in generic dmaengine driver. * The driver refers to imx-sdma and only a single descriptor is statically assigned to each channel. Signed-off-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 03 12月, 2010 1 次提交
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由 Tracey Dent 提交于
Use the ccflag-y flag instead of EXTRA_CFLAGS because EXTRA_CFLAGS is deprecated and should now be switched. According to (documentation/kbuild/makefiles.txt). Signed-off-by: NTracey Dent <tdent48227@gmail.com> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 08 10月, 2010 1 次提交
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由 Sascha Hauer 提交于
This driver is currently implemented as a user to the old i.MX DMA API. This allows us to convert each user of the old API to the dmaengine API one by one. Once this is done the old DMA driver can be merged into the i.MX dmaengine driver. V2: remove some debug leftovers and unused variables Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 06 10月, 2010 1 次提交
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由 Sascha Hauer 提交于
This patch adds support for the Freescale i.MX SDMA engine. The SDMA engine is a scatter/gather DMA engine which is implemented as a seperate coprocessor. SDMA needs its own firmware which is requested using the standard request_firmware mechanism. The firmware has different entry points for each peripheral type, so drivers have to pass the peripheral type to the DMA engine which in turn picks the correct firmware entry point from a table contained in the firmware image itself. The original Freescale code also supports support for transfering data to the internal SRAM which needs different entry points to the firmware. Support for this is currently not implemented. Also, support for the ASRC (asymmetric sample rate converter) is skipped. I took a very simple approach to implement dmaengine support. Only a single descriptor is statically assigned to a each channel. This means that transfers can't be queued up but only a single transfer is in progress. This simplifies implementation a lot and is sufficient for the usual device/memory transfers. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Reviewed-by: NLinus Walleij <linus.ml.walleij@gmail.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 30 9月, 2010 1 次提交
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由 Linus Walleij 提交于
This creates a DMAengine driver for the ARM PL080/PL081 PrimeCells based on the implementation earlier submitted by Peter Pearse. This is working like a charm for memcpy and slave DMA to the PL011 PrimeCell on the PB11MPCore. This DMA controller is used in mostly unmodified form in the ARM RealView and Versatile platforms, in the ST-Ericsson Nomadik, and in the ST SPEAr platform. It has been converted to use the header from the Samsung PL080 derivate instead of its own defintions. The Samsungs have a custom driver in their mach-* folders though, atleast we can share the register definitions. Cc: Peter Pearse <peter.pearse@arm.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> [GFP_KERNEL to GFP_NOWAIT in pl08x_prep_dma_memcpy] Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 05 8月, 2010 1 次提交
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由 Yong Wang 提交于
Topcliff PCH is the platform controller hub that is going to be used in Intel's upcoming general embedded platforms. This adds the driver for Topcliff PCH DMA controller. The DMA channels are strictly for device to host or host to device transfers and cannot be used for generic memcpy. Signed-off-by: NYong Wang <yong.y.wang@intel.com> [kill GFP_ATOMIC, kill __raw_{read|write}l, locking fixlet] Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 28 7月, 2010 1 次提交
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由 Vinod Koul 提交于
This patch add DMA drivers for DMA controllers in Langwell chipset of Intel(R) Moorestown platform and DMA controllers in Penwell of Intel(R) Medfield platfrom This patch adds support for Moorestown DMAC1 and DMAC2 controllers. It also add support for Medfiled GP DMA and DMAC1 controllers. These controllers supports memory to peripheral and peripheral to memory transfers. It support only single block transfers. This driver is based on Kernel DMA engine Anyone who wishes to use this controller should use DMA engine APIs This controller exposes DMA_SLAVE capabilities and notifies the client drivers of DMA transaction completion Config option required to be enabled CONFIG_INTEL_MID_DMAC=y Signed-off-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NAlan Cox <alan@linux.intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 24 5月, 2010 1 次提交
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由 Jassi Brar 提交于
Add DMA Engine API driver for the PL330 DMAC. This driver is supposed to be reusable by various platforms that have one or more PL330 DMACs. Atm, DMA_SLAVE and DMA_MEMCPY capabilities have been implemented. Signed-off-by: NJassi Brar <jassi.brar@samsung.com> Reviewed-by: NLinus Walleij <linus.walleij@stericsson.com> [dan.j.williams@intel.com: missing slab.h and ->device_control() fixups] Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 15 4月, 2010 1 次提交
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由 Linus Walleij 提交于
This is a straightforward driver for the ST-Ericsson DMA40 DMA controller found in U8500, implemented akin to the existing COH 901 318 driver. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NSrinidh Kasagar <srinidhi.kasagar@stericsson.com> Cc: STEricsson_nomadik_linux@list.st.com Cc: Alessandro Rubini <rubini@unipv.it> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 26 3月, 2010 1 次提交
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由 Richard Röjfors 提交于
Adds the support for the DMA engine withing the timberdale FPGA. The DMA channels are strict device to host, or host to device and can not be used for generic memcpy. Signed-off-by: NRichard Röjfors <richard.rojfors@pelagicore.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 02 3月, 2010 2 次提交
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由 Piotr Ziecik 提交于
Adds initial version of MPC512x DMA driver. Only memory to memory transfers are currenly supported. Signed-off-by: NPiotr Ziecik <kosmo@semihalf.com> Signed-off-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NAnatolij Gustschin <agust@denx.de> Cc: John Rigby <jcrigby@gmail.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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由 Linus Walleij 提交于
This adds Kconfig options for DEBUG and VERBOSE_DEBUG to the DMA engine subsystem, I got tired of editing the Makefile manually each time I want to debug things in here, modelled this on the debug switches for other subsystems and works like a charm when working on our DMA engines. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 12 12月, 2009 1 次提交
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由 Anatolij Gustschin 提交于
This patch adds new version of the PPC440SPe ADMA driver. Signed-off-by: NYuri Tikhonov <yur@emcraft.com> Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 20 11月, 2009 1 次提交
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由 Linus Walleij 提交于
This patch adds support for the ST-Ericsson COH 901 318 DMA block, found in the U300 series platforms. It registers a DMA slave for device I/O and also a memcpy slave for memcpy. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 09 9月, 2009 1 次提交
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由 Nobuhiro Iwamatsu 提交于
This supported all DMA channels, and it was tested in SH7722, SH7780, SH7785 and SH7763. This can not use with SH DMA API. Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Reviewed-by: NMatt Fleming <matt@console-pimps.org> Acked-by: NMaciej Sosnowski <maciej.sosnowski@intel.com> Acked-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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