1. 31 10月, 2016 9 次提交
    • F
      x86/intel_rdt: Add scheduler hook · 4f341a5e
      Fenghua Yu 提交于
      Hook the x86 scheduler code to update closid based on whether the current
      task is assigned to a specific closid or running on a CPU assigned to a
      specific closid.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477692289-37412-10-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      4f341a5e
    • T
      x86/intel_rdt: Add schemata file · 60ec2440
      Tony Luck 提交于
      Last of the per resource group files. Also mode 0644. This one shows
      the resources available to the group. Syntax depends on whether the
      "cdp" mount option was given. With code/data prioritization disabled
      it is simply a list of masks for each cache domain. Initial value
      allows access to all of the L3 cache on all domains. E.g. on a 2 socket
      Broadwell:
              L3:0=fffff;1=fffff
      With CDP enabled, separate masks for data and instructions are provided:
              L3DATA:0=fffff;1=fffff
              L3CODE:0=fffff;1=fffff
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477692289-37412-9-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      60ec2440
    • F
      x86/intel_rdt: Add tasks files · e02737d5
      Fenghua Yu 提交于
      The root directory all subdirectories are automatically populated with a
      read/write (mode 0644) file named "tasks". When read it will show all the
      task IDs assigned to the resource group. Tasks can be added (one at a time)
      to a group by writing the task ID to the file.  E.g.
      
      Membership in a resource group is indicated by a new field in the
      task_struct "int closid" which holds the CLOSID for each task. The default
      resource group uses CLOSID=0 which means that all existing tasks when the
      resctrl file system is mounted belong to the default group.
      
      If a group is removed, tasks which are members of that group are moved to
      the default group.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477692289-37412-8-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      e02737d5
    • T
      x86/intel_rdt: Add cpus file · 12e0110c
      Tony Luck 提交于
      Now we populate each directory with a read/write (mode 0644) file
      named "cpus". This is used to over-ride the resources available
      to processes in the default resource group when running on specific
      CPUs.  Each "cpus" file reads as a cpumask showing which CPUs belong
      to this resource group. Initially all online CPUs are assigned to
      the default group. They can be added to other groups by writing a
      cpumask to the "cpus" file in the directory for the resource group
      (which will remove them from the previous group to which they were
      assigned). CPU online/offline operations will delete CPUs that go
      offline from whatever group they are in and add new CPUs to the
      default group.
      
      If there are CPUs assigned to a group when the directory is removed,
      they are returned to the default group.
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477692289-37412-7-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      12e0110c
    • F
      x86/intel_rdt: Add mkdir to resctrl file system · 60cf5e10
      Fenghua Yu 提交于
      Resource control groups are represented as directories in the resctrl
      file system. The root directory describes the default resources available
      to tasks that have not been assigned specific resources. Other directories
      can be created at the root level to make new resource groups. It is not
      permitted to make directories within other directories.
      
      Hardware uses a CLOSID (Class of service ID) to determine which resource
      limits are currently in effect. The exact number available is enumerated
      by CPUID leaf 0x10, but on current implementations it is a small number.
      We implement a simple bitmask allocator for CLOSIDs.
      
      Each resource control group uses one CLOSID, which limits the total number
      of directories that can be created.
      
      Resource groups can be removed using rmdir.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477692289-37412-6-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      60cf5e10
    • F
      x86/intel_rdt: Add "info" files to resctrl file system · 4e978d06
      Fenghua Yu 提交于
      For the convenience of applications we make the decoded values of some
      of the CPUID values available in read-only (0444) files.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477692289-37412-5-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      4e978d06
    • F
      x86/intel_rdt: Add basic resctrl filesystem support · 5ff193fb
      Fenghua Yu 提交于
      Use kernfs as basis for our user interface filesystem. This patch
      supports mount/umount, and one mount parameter "cdp" to enable code/data
      prioritization (though all we do at this point is ensure that the system
      can support CDP).  The file system is not populated yet in this patch.
      
      [ tglx: Fixed up a few nits and added cdp handling in case of error ]
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477692289-37412-4-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      5ff193fb
    • T
      x86/intel_rdt: Build structures for each resource based on cache topology · 2264d9c7
      Tony Luck 提交于
      We use the cpu hotplug notifier to catch each cpu in turn and look at
      its cache topology w.r.t each of the resource groups. As we discover
      new resources, we initialize the bitmask array for each to the default
      (full access) value.
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477692289-37412-3-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      2264d9c7
    • F
      Documentation, x86: Documentation for Intel resource allocation user interface · f20e5789
      Fenghua Yu 提交于
      The documentation describes user interface of how to allocate resource
      in Intel RDT.
      
      Please note that the documentation covers generic user interface. Current
      patch set code only implemente CAT L3. CAT L2 code will be sent later.
      
      [ tglx: Added cpu example ]
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477692289-37412-2-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      f20e5789
  2. 27 10月, 2016 8 次提交
    • F
      x86/cqm: Share PQR_ASSOC related data between CQM and CAT · 6b281569
      Fenghua Yu 提交于
      PQR_ASSOC MSR contains the RMID used for preformance monitoring of cache
      occupancy and memory bandwidth. The upper 32bit of this MSR contain the
      CLOSID for cache allocation. So we need to share the information between
      the two facilities.
      
      Move the rdt data structure declaration into the shared header file and
      make the per cpu data structure containing the MSR values global.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477142405-32078-10-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      6b281569
    • F
      x86/intel_rdt: Pick up L3/L2 RDT parameters from CPUID · c1c7c3f9
      Fenghua Yu 提交于
      Define struct rdt_resource to hold all the parameterized values for an RDT
      resource and fill in the CPUID enumerated values from leaf 0x10 if
      available. Hard code them for the MSR detected Haswells.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477142405-32078-9-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      c1c7c3f9
    • F
      x86/intel_rdt: Add Haswell feature discovery · 113c6097
      Fenghua Yu 提交于
      Some Haswell generation CPUs support RDT, but they don't enumerate this via
      CPUID.  Use rdmsr_safe() and wrmsr_safe() to probe the MSRs on cpu model 63
      (INTEL_FAM6_HASWELL_X)
      
      Move the relevant defines into a common header file which is shared between
      RDT/CQM and RDT/Allocation to avoid duplication.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477142405-32078-8-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      113c6097
    • F
      x86/intel_rdt: Add CONFIG, Makefile, and basic initialization · 78e99b4a
      Fenghua Yu 提交于
      Introduce CONFIG_INTEL_RDT_A (default: no, dependent on CPU_SUP_INTEL) to
      control inclusion of Resource Director Technology in the build.
      
      Simple init() routine just checks which features are present. If they are
      pr_info() one line summary for each feature for now.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477142405-32078-7-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      78e99b4a
    • F
      x86/cpufeature: Add RDT CPUID feature bits · 4ab15864
      Fenghua Yu 提交于
      Check CPUID leaves for all the Resource Director Technology (RDT)
      Cache Allocation Technology (CAT) bits.
      
      Presence of allocation features:
        CPUID.(EAX=7H, ECX=0):EBX[bit 15]	X86_FEATURE_RDT_A
      
      L2 and L3 caches are each separately enabled:
        CPUID.(EAX=10H, ECX=0):EBX[bit 1]	X86_FEATURE_CAT_L3
        CPUID.(EAX=10H, ECX=0):EBX[bit 2]	X86_FEATURE_CAT_L2
      
      L3 cache may support independent control of allocation for
      code and data (CDP = Code/Data Prioritization):
        CPUID.(EAX=10H, ECX=1):ECX[bit 2]	X86_FEATURE_CDP_L3
      
      [ tglx: Fixed up Borislavs comments and moved the feature bits into a gap ]
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Acked-by: N"Borislav Petkov" <bp@suse.de>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477142405-32078-5-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      4ab15864
    • F
      x86/intel_cacheinfo: Enable cache id in cache info · d57e3ab7
      Fenghua Yu 提交于
      Cache id is retrieved from APIC ID and CPUID leaf 4 on x86.
      
      For more details please see the section on "Cache ID Extraction
      Parameters" in "Intel 64 Architecture Processor Topology Enumeration".
      
      Also the documentation of the CPUID instruction in the "Intel 64 and
      IA-32 Architectures Software Developer's Manual"
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477142405-32078-4-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      d57e3ab7
    • F
      cacheinfo: Introduce cache id · e9a2ea5a
      Fenghua Yu 提交于
      Cache management software needs an id for each instance of a cache of
      a particular type.
      
      The current cacheinfo structure does not provide any information about
      the underlying hardware so there is no way to expose it.
      
      Hardware with cache management features provides means (cpuid, enumeration
      etc.) to retrieve the hardware id of a particular cache instance. Cache
      instances which share hardware have the same hardware id.
      
      Add an 'id' field to struct cacheinfo to store this information. Expose
      this information under the /sys/devices/system/cpu/cpu*/cache/index*/
      directory as well.
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "Tony Luck" <tony.luck@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477142405-32078-3-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      e9a2ea5a
    • T
      Documentation, ABI: Document the new sysfs files for cpu cache ids · 1d78dc59
      Tony Luck 提交于
      Add an ABI document entry for /sys/devices/system/cpu/cpu*/cache/index*/id.
      Signed-off-by: NTony Luck <tony.luck@intel.com>
      Signed-off-by: NFenghua Yu <fenghua.yu@intel.com>
      Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
      Cc: "David Carrillo-Cisneros" <davidcc@google.com>
      Cc: "Sai Prakhya" <sai.praneeth.prakhya@intel.com>
      Cc: "Peter Zijlstra" <peterz@infradead.org>
      Cc: "Stephane Eranian" <eranian@google.com>
      Cc: "Dave Hansen" <dave.hansen@intel.com>
      Cc: "Shaohua Li" <shli@fb.com>
      Cc: "Nilay Vaish" <nilayvaish@gmail.com>
      Cc: "Vikas Shivappa" <vikas.shivappa@linux.intel.com>
      Cc: "Ingo Molnar" <mingo@elte.hu>
      Cc: "Borislav Petkov" <bp@suse.de>
      Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>
      Link: http://lkml.kernel.org/r/1477142405-32078-2-git-send-email-fenghua.yu@intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      1d78dc59
  3. 25 10月, 2016 6 次提交
    • L
      Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 · 9fe68cad
      Linus Torvalds 提交于
      Pull crypto fix from Herbert Xu:
       "This fixes a regression caused by the stack vmalloc change"
      
      * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
        hwrng: core - Don't use a stack buffer in add_early_randomness()
      9fe68cad
    • L
      Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux · b5cd8917
      Linus Torvalds 提交于
      Pull clk fixes from Stephen Boyd:
       "This is the first batch of clk driver fixes for this release.
      
        We have a handful of fixes for the uniphier clk driver that was
        introduced recently, as well as Kconfig option hiding, module
        autoloading markings, and a few fixes for clk_hw based registration
        patches that went in this merge window"
      
      * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
        clk: at91: Fix a return value in case of error
        clk: uniphier: rename MIO clock to SD clock for Pro5, PXs2, LD20 SoCs
        clk: uniphier: fix memory overrun bug
        clk: hi6220: use CLK_OF_DECLARE_DRIVER for sysctrl and mediactrl clock init
        clk: mvebu: armada-37xx-periph: Fix the clock gate flag
        clk: bcm2835: Clamp the PLL's requested rate to the hardware limits.
        clk: max77686: fix number of clocks setup for clk_hw based registration
        clk: mvebu: armada-37xx-periph: Fix the clock provider registration
        clk: core: add __init decoration for CLK_OF_DECLARE_DRIVER function
        clk: mediatek: Add hardware dependency
        clk: samsung: clk-exynos-audss: Fix module autoload
        clk: uniphier: fix type of variable passed to regmap_read()
        clk: uniphier: add system clock support for sLD3 SoC
      b5cd8917
    • L
      Merge tag 'gpio-v4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio · 1ce5bdb8
      Linus Torvalds 提交于
      Pull GPIO fixes from Linus Walleij:
       "Here is a set of GPIO fixes for the v4.9 kernel series:
      
         - Fix up off-by one and line offset validation, info leak to
           userspace, and reject invalid flags. Those are especially valuable
           hardening patches from Lars-Peter Clausen, all tagged for stable.
      
         - Fix module autoload for TS4800 and ATH79.
      
         - Correct the IRQ handler for MPC8xxx to use handle_level_irq() as it
           (a) reacts to edges not levels and (b) even implements .irq_ack().
           We were missing IRQs here.
      
         - Fix the error path for acpi_dev_gpio_irq_get()
      
         - Fix a memory leak in the MXS driver.
      
         - Fix an annoying typo in the STMPE driver.
      
         - Put a dependency on sysfs to the mockup driver"
      
      * tag 'gpio-v4.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio:
        gpio: mpc8xxx: Correct irq handler function
        gpio: ath79: Fix module autoload
        gpio: ts4800: Fix module autoload
        gpio: GPIO_GET_LINEEVENT_IOCTL: Reject invalid line and event flags
        gpio: GPIO_GET_LINEHANDLE_IOCTL: Reject invalid line flags
        gpio: GPIOHANDLE_GET_LINE_VALUES_IOCTL: Fix information leak
        gpio: GPIO_GET_LINEEVENT_IOCTL: Validate line offset
        gpio: GPIOHANDLE_GET_LINE_VALUES_IOCTL: Fix information leak
        gpio: GPIO_GET_LINEHANDLE_IOCTL: Validate line offset
        gpio: GPIO_GET_CHIPINFO_IOCTL: Fix information leak
        gpio: GPIO_GET_CHIPINFO_IOCTL: Fix line offset validation
        gpio / ACPI: fix returned error from acpi_dev_gpio_irq_get()
        gpio: mockup: add sysfs dependency
        gpio: stmpe: || vs && typo
        gpio: mxs: Unmap region obtained by of_iomap
        gpio/board.txt: point to gpiod_set_value
      1ce5bdb8
    • L
      Merge tag 'for-linus-4.9-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip · aa34e07e
      Linus Torvalds 提交于
      Pull xen fixes from David Vrabel:
      
       - advertise control feature flags in xenstore
      
       - fix x86 build when XEN_PVHVM is disabled
      
      * tag 'for-linus-4.9-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
        xenbus: check return value of xenbus_scanf()
        xenbus: prefer list_for_each()
        x86: xen: move cpu_up functions out of ifdef
        xenbus: advertise control feature flags
      aa34e07e
    • L
      mm: unexport __get_user_pages() · 0d731759
      Lorenzo Stoakes 提交于
      This patch unexports the low-level __get_user_pages() function.
      
      Recent refactoring of the get_user_pages* functions allow flags to be
      passed through get_user_pages() which eliminates the need for access to
      this function from its one user, kvm.
      
      We can see that the two calls to get_user_pages() which replace
      __get_user_pages() in kvm_main.c are equivalent by examining their call
      stacks:
      
        get_user_page_nowait():
          get_user_pages(start, 1, flags, page, NULL)
          __get_user_pages_locked(current, current->mm, start, 1, page, NULL, NULL,
      			    false, flags | FOLL_TOUCH)
          __get_user_pages(current, current->mm, start, 1,
      		     flags | FOLL_TOUCH | FOLL_GET, page, NULL, NULL)
      
        check_user_page_hwpoison():
          get_user_pages(addr, 1, flags, NULL, NULL)
          __get_user_pages_locked(current, current->mm, addr, 1, NULL, NULL, NULL,
      			    false, flags | FOLL_TOUCH)
          __get_user_pages(current, current->mm, addr, 1, flags | FOLL_TOUCH, NULL,
      		     NULL, NULL)
      Signed-off-by: NLorenzo Stoakes <lstoakes@gmail.com>
      Acked-by: NPaolo Bonzini <pbonzini@redhat.com>
      Acked-by: NMichal Hocko <mhocko@suse.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      0d731759
    • L
      proc: don't use FOLL_FORCE for reading cmdline and environment · 272ddc8b
      Linus Torvalds 提交于
      Now that Lorenzo cleaned things up and made the FOLL_FORCE users
      explicit, it becomes obvious how some of them don't really need
      FOLL_FORCE at all.
      
      So remove FOLL_FORCE from the proc code that reads the command line and
      arguments from user space.
      
      The mem_rw() function actually does want FOLL_FORCE, because gdd (and
      possibly many other debuggers) use it as a much more convenient version
      of PTRACE_PEEKDATA, but we should consider making the FOLL_FORCE part
      conditional on actually being a ptracer.  This does not actually do
      that, just moves adds a comment to that effect and moves the gup_flags
      settings next to each other.
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      272ddc8b
  4. 24 10月, 2016 12 次提交
  5. 23 10月, 2016 5 次提交