提交 3d0d14f9 编写于 作者: I Ingo Molnar

x86: lindent arch/i386/math-emu

lindent these files:
                                       errors   lines of code   errors/KLOC
 arch/x86/math-emu/                      2236            9424         237.2
 arch/x86/math-emu/                       128            8706          14.7

no other changes. No code changed:

   text    data     bss     dec     hex filename
   5589802  612739 3833856 10036397         9924ad vmlinux.before
   5589802  612739 3833856 10036397         9924ad vmlinux.after

the intent of this patch is to ease the automated tracking of kernel
code quality - it's just much easier for us to maintain it if every file
in arch/x86 is supposed to be clean.

NOTE: it is a known problem of lindent that it causes some style damage
of its own, but it's a safe tool (well, except for the gcc array range
initializers extension), so we did the bulk of the changes via lindent,
and did the manual fixups in a followup patch.

the resulting math-emu code has been tested by Thomas Gleixner on a real
386 DX CPU as well, and it works fine.
Signed-off-by: NIngo Molnar <mingo@elte.hu>
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
上级 a4ec1eff
此差异已折叠。
......@@ -9,7 +9,6 @@
#ifndef _EXCEPTION_H_
#define _EXCEPTION_H_
#ifdef __ASSEMBLY__
#define Const_(x) $##x
#else
......@@ -20,8 +19,8 @@
#include "fpu_emu.h"
#endif /* SW_C1 */
#define FPU_BUSY Const_(0x8000) /* FPU busy bit (8087 compatibility) */
#define EX_ErrorSummary Const_(0x0080) /* Error summary status */
#define FPU_BUSY Const_(0x8000) /* FPU busy bit (8087 compatibility) */
#define EX_ErrorSummary Const_(0x0080) /* Error summary status */
/* Special exceptions: */
#define EX_INTERNAL Const_(0x8000) /* Internal error in wm-FPU-emu */
#define EX_StackOver Const_(0x0041|SW_C1) /* stack overflow */
......@@ -34,11 +33,9 @@
#define EX_Denormal Const_(0x0002) /* denormalized operand */
#define EX_Invalid Const_(0x0001) /* invalid operation */
#define PRECISION_LOST_UP Const_((EX_Precision | SW_C1))
#define PRECISION_LOST_DOWN Const_(EX_Precision)
#ifndef __ASSEMBLY__
#ifdef DEBUG
......@@ -48,6 +45,6 @@
#define EXCEPTION(x) FPU_exception(x)
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ASSEMBLY__ */
#endif /* _EXCEPTION_H_ */
......@@ -15,160 +15,138 @@
#include "control_w.h"
#include "status_w.h"
void fadd__(void)
{
/* fadd st,st(i) */
int i = FPU_rm;
clear_C1();
FPU_add(&st(i), FPU_gettagi(i), 0, control_word);
/* fadd st,st(i) */
int i = FPU_rm;
clear_C1();
FPU_add(&st(i), FPU_gettagi(i), 0, control_word);
}
void fmul__(void)
{
/* fmul st,st(i) */
int i = FPU_rm;
clear_C1();
FPU_mul(&st(i), FPU_gettagi(i), 0, control_word);
/* fmul st,st(i) */
int i = FPU_rm;
clear_C1();
FPU_mul(&st(i), FPU_gettagi(i), 0, control_word);
}
void fsub__(void)
{
/* fsub st,st(i) */
clear_C1();
FPU_sub(0, FPU_rm, control_word);
/* fsub st,st(i) */
clear_C1();
FPU_sub(0, FPU_rm, control_word);
}
void fsubr_(void)
{
/* fsubr st,st(i) */
clear_C1();
FPU_sub(REV, FPU_rm, control_word);
/* fsubr st,st(i) */
clear_C1();
FPU_sub(REV, FPU_rm, control_word);
}
void fdiv__(void)
{
/* fdiv st,st(i) */
clear_C1();
FPU_div(0, FPU_rm, control_word);
/* fdiv st,st(i) */
clear_C1();
FPU_div(0, FPU_rm, control_word);
}
void fdivr_(void)
{
/* fdivr st,st(i) */
clear_C1();
FPU_div(REV, FPU_rm, control_word);
/* fdivr st,st(i) */
clear_C1();
FPU_div(REV, FPU_rm, control_word);
}
void fadd_i(void)
{
/* fadd st(i),st */
int i = FPU_rm;
clear_C1();
FPU_add(&st(i), FPU_gettagi(i), i, control_word);
/* fadd st(i),st */
int i = FPU_rm;
clear_C1();
FPU_add(&st(i), FPU_gettagi(i), i, control_word);
}
void fmul_i(void)
{
/* fmul st(i),st */
clear_C1();
FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word);
/* fmul st(i),st */
clear_C1();
FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word);
}
void fsubri(void)
{
/* fsubr st(i),st */
clear_C1();
FPU_sub(DEST_RM, FPU_rm, control_word);
/* fsubr st(i),st */
clear_C1();
FPU_sub(DEST_RM, FPU_rm, control_word);
}
void fsub_i(void)
{
/* fsub st(i),st */
clear_C1();
FPU_sub(REV|DEST_RM, FPU_rm, control_word);
/* fsub st(i),st */
clear_C1();
FPU_sub(REV | DEST_RM, FPU_rm, control_word);
}
void fdivri(void)
{
/* fdivr st(i),st */
clear_C1();
FPU_div(DEST_RM, FPU_rm, control_word);
/* fdivr st(i),st */
clear_C1();
FPU_div(DEST_RM, FPU_rm, control_word);
}
void fdiv_i(void)
{
/* fdiv st(i),st */
clear_C1();
FPU_div(REV|DEST_RM, FPU_rm, control_word);
/* fdiv st(i),st */
clear_C1();
FPU_div(REV | DEST_RM, FPU_rm, control_word);
}
void faddp_(void)
{
/* faddp st(i),st */
int i = FPU_rm;
clear_C1();
if ( FPU_add(&st(i), FPU_gettagi(i), i, control_word) >= 0 )
FPU_pop();
/* faddp st(i),st */
int i = FPU_rm;
clear_C1();
if (FPU_add(&st(i), FPU_gettagi(i), i, control_word) >= 0)
FPU_pop();
}
void fmulp_(void)
{
/* fmulp st(i),st */
clear_C1();
if ( FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word) >= 0 )
FPU_pop();
/* fmulp st(i),st */
clear_C1();
if (FPU_mul(&st(0), FPU_gettag0(), FPU_rm, control_word) >= 0)
FPU_pop();
}
void fsubrp(void)
{
/* fsubrp st(i),st */
clear_C1();
if ( FPU_sub(DEST_RM, FPU_rm, control_word) >= 0 )
FPU_pop();
/* fsubrp st(i),st */
clear_C1();
if (FPU_sub(DEST_RM, FPU_rm, control_word) >= 0)
FPU_pop();
}
void fsubp_(void)
{
/* fsubp st(i),st */
clear_C1();
if ( FPU_sub(REV|DEST_RM, FPU_rm, control_word) >= 0 )
FPU_pop();
/* fsubp st(i),st */
clear_C1();
if (FPU_sub(REV | DEST_RM, FPU_rm, control_word) >= 0)
FPU_pop();
}
void fdivrp(void)
{
/* fdivrp st(i),st */
clear_C1();
if ( FPU_div(DEST_RM, FPU_rm, control_word) >= 0 )
FPU_pop();
/* fdivrp st(i),st */
clear_C1();
if (FPU_div(DEST_RM, FPU_rm, control_word) >= 0)
FPU_pop();
}
void fdivp_(void)
{
/* fdivp st(i),st */
clear_C1();
if ( FPU_div(REV|DEST_RM, FPU_rm, control_word) >= 0 )
FPU_pop();
/* fdivp st(i),st */
clear_C1();
if (FPU_div(REV | DEST_RM, FPU_rm, control_word) >= 0)
FPU_pop();
}
......@@ -14,7 +14,6 @@
#define EXCEPTION FPU_exception
#define PARAM1 8(%ebp)
#define PARAM2 12(%ebp)
#define PARAM3 16(%ebp)
......
......@@ -16,34 +16,34 @@
#include "status_w.h"
#include "control_w.h"
static void fnop(void)
{
}
static void fclex(void)
{
partial_status &= ~(SW_Backward|SW_Summary|SW_Stack_Fault|SW_Precision|
SW_Underflow|SW_Overflow|SW_Zero_Div|SW_Denorm_Op|
SW_Invalid);
no_ip_update = 1;
partial_status &=
~(SW_Backward | SW_Summary | SW_Stack_Fault | SW_Precision |
SW_Underflow | SW_Overflow | SW_Zero_Div | SW_Denorm_Op |
SW_Invalid);
no_ip_update = 1;
}
/* Needs to be externally visible */
void finit(void)
{
control_word = 0x037f;
partial_status = 0;
top = 0; /* We don't keep top in the status word internally. */
fpu_tag_word = 0xffff;
/* The behaviour is different from that detailed in
Section 15.1.6 of the Intel manual */
operand_address.offset = 0;
operand_address.selector = 0;
instruction_address.offset = 0;
instruction_address.selector = 0;
instruction_address.opcode = 0;
no_ip_update = 1;
control_word = 0x037f;
partial_status = 0;
top = 0; /* We don't keep top in the status word internally. */
fpu_tag_word = 0xffff;
/* The behaviour is different from that detailed in
Section 15.1.6 of the Intel manual */
operand_address.offset = 0;
operand_address.selector = 0;
instruction_address.offset = 0;
instruction_address.selector = 0;
instruction_address.opcode = 0;
no_ip_update = 1;
}
/*
......@@ -54,151 +54,134 @@ void finit(void)
#define fsetpm fnop
static FUNC const finit_table[] = {
feni, fdisi, fclex, finit,
fsetpm, FPU_illegal, FPU_illegal, FPU_illegal
feni, fdisi, fclex, finit,
fsetpm, FPU_illegal, FPU_illegal, FPU_illegal
};
void finit_(void)
{
(finit_table[FPU_rm])();
(finit_table[FPU_rm]) ();
}
static void fstsw_ax(void)
{
*(short *) &FPU_EAX = status_word();
no_ip_update = 1;
*(short *)&FPU_EAX = status_word();
no_ip_update = 1;
}
static FUNC const fstsw_table[] = {
fstsw_ax, FPU_illegal, FPU_illegal, FPU_illegal,
FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
fstsw_ax, FPU_illegal, FPU_illegal, FPU_illegal,
FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
};
void fstsw_(void)
{
(fstsw_table[FPU_rm])();
(fstsw_table[FPU_rm]) ();
}
static FUNC const fp_nop_table[] = {
fnop, FPU_illegal, FPU_illegal, FPU_illegal,
FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
fnop, FPU_illegal, FPU_illegal, FPU_illegal,
FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
};
void fp_nop(void)
{
(fp_nop_table[FPU_rm])();
(fp_nop_table[FPU_rm]) ();
}
void fld_i_(void)
{
FPU_REG *st_new_ptr;
int i;
u_char tag;
if ( STACK_OVERFLOW )
{ FPU_stack_overflow(); return; }
/* fld st(i) */
i = FPU_rm;
if ( NOT_EMPTY(i) )
{
reg_copy(&st(i), st_new_ptr);
tag = FPU_gettagi(i);
push();
FPU_settag0(tag);
}
else
{
if ( control_word & CW_Invalid )
{
/* The masked response */
FPU_stack_underflow();
FPU_REG *st_new_ptr;
int i;
u_char tag;
if (STACK_OVERFLOW) {
FPU_stack_overflow();
return;
}
else
EXCEPTION(EX_StackUnder);
}
}
/* fld st(i) */
i = FPU_rm;
if (NOT_EMPTY(i)) {
reg_copy(&st(i), st_new_ptr);
tag = FPU_gettagi(i);
push();
FPU_settag0(tag);
} else {
if (control_word & CW_Invalid) {
/* The masked response */
FPU_stack_underflow();
} else
EXCEPTION(EX_StackUnder);
}
}
void fxch_i(void)
{
/* fxch st(i) */
FPU_REG t;
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
long tag_word = fpu_tag_word;
int regnr = top & 7, regnri = ((regnr + i) & 7);
u_char st0_tag = (tag_word >> (regnr*2)) & 3;
u_char sti_tag = (tag_word >> (regnri*2)) & 3;
if ( st0_tag == TAG_Empty )
{
if ( sti_tag == TAG_Empty )
{
FPU_stack_underflow();
FPU_stack_underflow_i(i);
return;
/* fxch st(i) */
FPU_REG t;
int i = FPU_rm;
FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
long tag_word = fpu_tag_word;
int regnr = top & 7, regnri = ((regnr + i) & 7);
u_char st0_tag = (tag_word >> (regnr * 2)) & 3;
u_char sti_tag = (tag_word >> (regnri * 2)) & 3;
if (st0_tag == TAG_Empty) {
if (sti_tag == TAG_Empty) {
FPU_stack_underflow();
FPU_stack_underflow_i(i);
return;
}
if (control_word & CW_Invalid) {
/* Masked response */
FPU_copy_to_reg0(sti_ptr, sti_tag);
}
FPU_stack_underflow_i(i);
return;
}
if ( control_word & CW_Invalid )
{
/* Masked response */
FPU_copy_to_reg0(sti_ptr, sti_tag);
if (sti_tag == TAG_Empty) {
if (control_word & CW_Invalid) {
/* Masked response */
FPU_copy_to_regi(st0_ptr, st0_tag, i);
}
FPU_stack_underflow();
return;
}
FPU_stack_underflow_i(i);
return;
}
if ( sti_tag == TAG_Empty )
{
if ( control_word & CW_Invalid )
{
/* Masked response */
FPU_copy_to_regi(st0_ptr, st0_tag, i);
}
FPU_stack_underflow();
return;
}
clear_C1();
reg_copy(st0_ptr, &t);
reg_copy(sti_ptr, st0_ptr);
reg_copy(&t, sti_ptr);
tag_word &= ~(3 << (regnr*2)) & ~(3 << (regnri*2));
tag_word |= (sti_tag << (regnr*2)) | (st0_tag << (regnri*2));
fpu_tag_word = tag_word;
}
clear_C1();
reg_copy(st0_ptr, &t);
reg_copy(sti_ptr, st0_ptr);
reg_copy(&t, sti_ptr);
tag_word &= ~(3 << (regnr * 2)) & ~(3 << (regnri * 2));
tag_word |= (sti_tag << (regnr * 2)) | (st0_tag << (regnri * 2));
fpu_tag_word = tag_word;
}
void ffree_(void)
{
/* ffree st(i) */
FPU_settagi(FPU_rm, TAG_Empty);
/* ffree st(i) */
FPU_settagi(FPU_rm, TAG_Empty);
}
void ffreep(void)
{
/* ffree st(i) + pop - unofficial code */
FPU_settagi(FPU_rm, TAG_Empty);
FPU_pop();
/* ffree st(i) + pop - unofficial code */
FPU_settagi(FPU_rm, TAG_Empty);
FPU_pop();
}
void fst_i_(void)
{
/* fst st(i) */
FPU_copy_to_regi(&st(0), FPU_gettag0(), FPU_rm);
/* fst st(i) */
FPU_copy_to_regi(&st(0), FPU_gettag0(), FPU_rm);
}
void fstp_i(void)
{
/* fstp st(i) */
FPU_copy_to_regi(&st(0), FPU_gettag0(), FPU_rm);
FPU_pop();
/* fstp st(i) */
FPU_copy_to_regi(&st(0), FPU_gettag0(), FPU_rm);
FPU_pop();
}
......@@ -7,7 +7,6 @@
| |
+---------------------------------------------------------------------------*/
#ifndef _FPU_EMU_H_
#define _FPU_EMU_H_
......@@ -28,15 +27,15 @@
#endif
#define EXP_BIAS Const(0)
#define EXP_OVER Const(0x4000) /* smallest invalid large exponent */
#define EXP_UNDER Const(-0x3fff) /* largest invalid small exponent */
#define EXP_WAY_UNDER Const(-0x6000) /* Below the smallest denormal, but
still a 16 bit nr. */
#define EXP_OVER Const(0x4000) /* smallest invalid large exponent */
#define EXP_UNDER Const(-0x3fff) /* largest invalid small exponent */
#define EXP_WAY_UNDER Const(-0x6000) /* Below the smallest denormal, but
still a 16 bit nr. */
#define EXP_Infinity EXP_OVER
#define EXP_NaN EXP_OVER
#define EXTENDED_Ebias Const(0x3fff)
#define EXTENDED_Emin (-0x3ffe) /* smallest valid exponent */
#define EXTENDED_Emin (-0x3ffe) /* smallest valid exponent */
#define SIGN_POS Const(0)
#define SIGN_NEG Const(0x80)
......@@ -44,10 +43,9 @@
#define SIGN_Positive Const(0)
#define SIGN_Negative Const(0x8000)
/* Keep the order TAG_Valid, TAG_Zero, TW_Denormal */
/* The following fold to 2 (Special) in the Tag Word */
#define TW_Denormal Const(4) /* De-normal */
#define TW_Denormal Const(4) /* De-normal */
#define TW_Infinity Const(5) /* + or - infinity */
#define TW_NaN Const(6) /* Not a Number */
#define TW_Unsupported Const(7) /* Not supported by an 80486 */
......@@ -67,14 +65,13 @@
#define DEST_RM 0x20
#define LOADED 0x40
#define FPU_Exception Const(0x80000000) /* Added to tag returns. */
#define FPU_Exception Const(0x80000000) /* Added to tag returns. */
#ifndef __ASSEMBLY__
#include "fpu_system.h"
#include <asm/sigcontext.h> /* for struct _fpstate */
#include <asm/sigcontext.h> /* for struct _fpstate */
#include <asm/math_emu.h>
#include <linux/linkage.h>
......@@ -112,30 +109,33 @@ extern u_char emulating;
#define PREFIX_DEFAULT 7
struct address {
unsigned int offset;
unsigned int selector:16;
unsigned int opcode:11;
unsigned int empty:5;
unsigned int offset;
unsigned int selector:16;
unsigned int opcode:11;
unsigned int empty:5;
};
struct fpu__reg {
unsigned sigl;
unsigned sigh;
short exp;
unsigned sigl;
unsigned sigh;
short exp;
};
typedef void (*FUNC)(void);
typedef void (*FUNC) (void);
typedef struct fpu__reg FPU_REG;
typedef void (*FUNC_ST0)(FPU_REG *st0_ptr, u_char st0_tag);
typedef struct { u_char address_size, operand_size, segment; }
overrides;
typedef void (*FUNC_ST0) (FPU_REG * st0_ptr, u_char st0_tag);
typedef struct {
u_char address_size, operand_size, segment;
} overrides;
/* This structure is 32 bits: */
typedef struct { overrides override;
u_char default_mode; } fpu_addr_modes;
typedef struct {
overrides override;
u_char default_mode;
} fpu_addr_modes;
/* PROTECTED has a restricted meaning in the emulator; it is used
to signal that the emulator needs to do special things to ensure
that protection is respected in a segmented model. */
#define PROTECTED 4
#define SIXTEEN 1 /* We rely upon this being 1 (true) */
#define SIXTEEN 1 /* We rely upon this being 1 (true) */
#define VM86 SIXTEEN
#define PM16 (SIXTEEN | PROTECTED)
#define SEG32 PROTECTED
......@@ -166,10 +166,10 @@ extern u_char const data_sizes_16[32];
#define signpositive(a) ( (signbyte(a) & 0x80) == 0 )
#define signnegative(a) (signbyte(a) & 0x80)
static inline void reg_copy(FPU_REG const *x, FPU_REG *y)
static inline void reg_copy(FPU_REG const *x, FPU_REG * y)
{
*(short *)&(y->exp) = *(const short *)&(x->exp);
*(long long *)&(y->sigl) = *(const long long *)&(x->sigl);
*(short *)&(y->exp) = *(const short *)&(x->exp);
*(long long *)&(y->sigl) = *(const long long *)&(x->sigl);
}
#define exponent(x) (((*(short *)&((x)->exp)) & 0x7fff) - EXTENDED_Ebias)
......@@ -184,29 +184,28 @@ static inline void reg_copy(FPU_REG const *x, FPU_REG *y)
#define significand(x) ( ((unsigned long long *)&((x)->sigl))[0] )
/*----- Prototypes for functions written in assembler -----*/
/* extern void reg_move(FPU_REG *a, FPU_REG *b); */
asmlinkage int FPU_normalize(FPU_REG *x);
asmlinkage int FPU_normalize_nuo(FPU_REG *x);
asmlinkage int FPU_normalize(FPU_REG * x);
asmlinkage int FPU_normalize_nuo(FPU_REG * x);
asmlinkage int FPU_u_sub(FPU_REG const *arg1, FPU_REG const *arg2,
FPU_REG *answ, unsigned int control_w, u_char sign,
FPU_REG * answ, unsigned int control_w, u_char sign,
int expa, int expb);
asmlinkage int FPU_u_mul(FPU_REG const *arg1, FPU_REG const *arg2,
FPU_REG *answ, unsigned int control_w, u_char sign,
FPU_REG * answ, unsigned int control_w, u_char sign,
int expon);
asmlinkage int FPU_u_div(FPU_REG const *arg1, FPU_REG const *arg2,
FPU_REG *answ, unsigned int control_w, u_char sign);
FPU_REG * answ, unsigned int control_w, u_char sign);
asmlinkage int FPU_u_add(FPU_REG const *arg1, FPU_REG const *arg2,
FPU_REG *answ, unsigned int control_w, u_char sign,
FPU_REG * answ, unsigned int control_w, u_char sign,
int expa, int expb);
asmlinkage int wm_sqrt(FPU_REG *n, int dummy1, int dummy2,
asmlinkage int wm_sqrt(FPU_REG * n, int dummy1, int dummy2,
unsigned int control_w, u_char sign);
asmlinkage unsigned FPU_shrx(void *l, unsigned x);
asmlinkage unsigned FPU_shrxs(void *v, unsigned x);
asmlinkage unsigned FPU_shrx(void *l, unsigned x);
asmlinkage unsigned FPU_shrxs(void *v, unsigned x);
asmlinkage unsigned long FPU_div_small(unsigned long long *x, unsigned long y);
asmlinkage int FPU_round(FPU_REG *arg, unsigned int extent, int dummy,
asmlinkage int FPU_round(FPU_REG * arg, unsigned int extent, int dummy,
unsigned int control_w, u_char sign);
#ifndef MAKING_PROTO
......
此差异已折叠。
......@@ -16,128 +16,115 @@
#include "status_w.h"
#include "reg_constant.h"
static void fchs(FPU_REG *st0_ptr, u_char st0tag)
static void fchs(FPU_REG * st0_ptr, u_char st0tag)
{
if ( st0tag ^ TAG_Empty )
{
signbyte(st0_ptr) ^= SIGN_NEG;
clear_C1();
}
else
FPU_stack_underflow();
if (st0tag ^ TAG_Empty) {
signbyte(st0_ptr) ^= SIGN_NEG;
clear_C1();
} else
FPU_stack_underflow();
}
static void fabs(FPU_REG *st0_ptr, u_char st0tag)
static void fabs(FPU_REG * st0_ptr, u_char st0tag)
{
if ( st0tag ^ TAG_Empty )
{
setpositive(st0_ptr);
clear_C1();
}
else
FPU_stack_underflow();
if (st0tag ^ TAG_Empty) {
setpositive(st0_ptr);
clear_C1();
} else
FPU_stack_underflow();
}
static void ftst_(FPU_REG *st0_ptr, u_char st0tag)
static void ftst_(FPU_REG * st0_ptr, u_char st0tag)
{
switch (st0tag)
{
case TAG_Zero:
setcc(SW_C3);
break;
case TAG_Valid:
if (getsign(st0_ptr) == SIGN_POS)
setcc(0);
else
setcc(SW_C0);
break;
case TAG_Special:
switch ( FPU_Special(st0_ptr) )
{
case TW_Denormal:
if (getsign(st0_ptr) == SIGN_POS)
setcc(0);
else
setcc(SW_C0);
if ( denormal_operand() < 0 )
{
#ifdef PECULIAR_486
/* This is weird! */
if (getsign(st0_ptr) == SIGN_POS)
switch (st0tag) {
case TAG_Zero:
setcc(SW_C3);
break;
case TAG_Valid:
if (getsign(st0_ptr) == SIGN_POS)
setcc(0);
else
setcc(SW_C0);
break;
case TAG_Special:
switch (FPU_Special(st0_ptr)) {
case TW_Denormal:
if (getsign(st0_ptr) == SIGN_POS)
setcc(0);
else
setcc(SW_C0);
if (denormal_operand() < 0) {
#ifdef PECULIAR_486
/* This is weird! */
if (getsign(st0_ptr) == SIGN_POS)
setcc(SW_C3);
#endif /* PECULIAR_486 */
return;
}
break;
case TW_NaN:
setcc(SW_C0|SW_C2|SW_C3); /* Operand is not comparable */
EXCEPTION(EX_Invalid);
break;
case TW_Infinity:
if (getsign(st0_ptr) == SIGN_POS)
setcc(0);
else
setcc(SW_C0);
break;
default:
setcc(SW_C0|SW_C2|SW_C3); /* Operand is not comparable */
EXCEPTION(EX_INTERNAL|0x14);
break;
return;
}
break;
case TW_NaN:
setcc(SW_C0 | SW_C2 | SW_C3); /* Operand is not comparable */
EXCEPTION(EX_Invalid);
break;
case TW_Infinity:
if (getsign(st0_ptr) == SIGN_POS)
setcc(0);
else
setcc(SW_C0);
break;
default:
setcc(SW_C0 | SW_C2 | SW_C3); /* Operand is not comparable */
EXCEPTION(EX_INTERNAL | 0x14);
break;
}
break;
case TAG_Empty:
setcc(SW_C0 | SW_C2 | SW_C3);
EXCEPTION(EX_StackUnder);
break;
}
break;
case TAG_Empty:
setcc(SW_C0|SW_C2|SW_C3);
EXCEPTION(EX_StackUnder);
break;
}
}
static void fxam(FPU_REG *st0_ptr, u_char st0tag)
static void fxam(FPU_REG * st0_ptr, u_char st0tag)
{
int c = 0;
switch (st0tag)
{
case TAG_Empty:
c = SW_C3|SW_C0;
break;
case TAG_Zero:
c = SW_C3;
break;
case TAG_Valid:
c = SW_C2;
break;
case TAG_Special:
switch ( FPU_Special(st0_ptr) )
{
case TW_Denormal:
c = SW_C2|SW_C3; /* Denormal */
break;
case TW_NaN:
/* We also use NaN for unsupported types. */
if ( (st0_ptr->sigh & 0x80000000) && (exponent(st0_ptr) == EXP_OVER) )
c = SW_C0;
break;
case TW_Infinity:
c = SW_C2|SW_C0;
break;
int c = 0;
switch (st0tag) {
case TAG_Empty:
c = SW_C3 | SW_C0;
break;
case TAG_Zero:
c = SW_C3;
break;
case TAG_Valid:
c = SW_C2;
break;
case TAG_Special:
switch (FPU_Special(st0_ptr)) {
case TW_Denormal:
c = SW_C2 | SW_C3; /* Denormal */
break;
case TW_NaN:
/* We also use NaN for unsupported types. */
if ((st0_ptr->sigh & 0x80000000)
&& (exponent(st0_ptr) == EXP_OVER))
c = SW_C0;
break;
case TW_Infinity:
c = SW_C2 | SW_C0;
break;
}
}
}
if ( getsign(st0_ptr) == SIGN_NEG )
c |= SW_C1;
setcc(c);
if (getsign(st0_ptr) == SIGN_NEG)
c |= SW_C1;
setcc(c);
}
static FUNC_ST0 const fp_etc_table[] = {
fchs, fabs, (FUNC_ST0)FPU_illegal, (FUNC_ST0)FPU_illegal,
ftst_, fxam, (FUNC_ST0)FPU_illegal, (FUNC_ST0)FPU_illegal
fchs, fabs, (FUNC_ST0) FPU_illegal, (FUNC_ST0) FPU_illegal,
ftst_, fxam, (FUNC_ST0) FPU_illegal, (FUNC_ST0) FPU_illegal
};
void FPU_etc(void)
{
(fp_etc_table[FPU_rm])(&st(0), FPU_gettag0());
(fp_etc_table[FPU_rm]) (&st(0), FPU_gettag0());
}
......@@ -5,7 +5,7 @@
extern void FPU_illegal(void);
extern void FPU_printall(void);
asmlinkage void FPU_exception(int n);
extern int real_1op_NaN(FPU_REG *a);
extern int real_1op_NaN(FPU_REG * a);
extern int real_2op_NaN(FPU_REG const *b, u_char tagb, int deststnr,
FPU_REG const *defaultNaN);
asmlinkage int arith_invalid(int deststnr);
......@@ -14,8 +14,8 @@ extern int set_precision_flag(int flags);
asmlinkage void set_precision_flag_up(void);
asmlinkage void set_precision_flag_down(void);
asmlinkage int denormal_operand(void);
asmlinkage int arith_overflow(FPU_REG *dest);
asmlinkage int arith_underflow(FPU_REG *dest);
asmlinkage int arith_overflow(FPU_REG * dest);
asmlinkage int arith_underflow(FPU_REG * dest);
extern void FPU_stack_overflow(void);
extern void FPU_stack_underflow(void);
extern void FPU_stack_underflow_i(int i);
......@@ -66,7 +66,7 @@ extern int FPU_Special(FPU_REG const *ptr);
extern int isNaN(FPU_REG const *ptr);
extern void FPU_pop(void);
extern int FPU_empty_i(int stnr);
extern int FPU_stackoverflow(FPU_REG **st_new_ptr);
extern int FPU_stackoverflow(FPU_REG ** st_new_ptr);
extern void FPU_copy_to_regi(FPU_REG const *r, u_char tag, int stnr);
extern void FPU_copy_to_reg1(FPU_REG const *r, u_char tag);
extern void FPU_copy_to_reg0(FPU_REG const *r, u_char tag);
......@@ -75,26 +75,28 @@ extern void FPU_triga(void);
extern void FPU_trigb(void);
/* get_address.c */
extern void __user *FPU_get_address(u_char FPU_modrm, unsigned long *fpu_eip,
struct address *addr, fpu_addr_modes addr_modes);
struct address *addr,
fpu_addr_modes addr_modes);
extern void __user *FPU_get_address_16(u_char FPU_modrm, unsigned long *fpu_eip,
struct address *addr, fpu_addr_modes addr_modes);
struct address *addr,
fpu_addr_modes addr_modes);
/* load_store.c */
extern int FPU_load_store(u_char type, fpu_addr_modes addr_modes,
void __user *data_address);
void __user * data_address);
/* poly_2xm1.c */
extern int poly_2xm1(u_char sign, FPU_REG *arg, FPU_REG *result);
extern int poly_2xm1(u_char sign, FPU_REG * arg, FPU_REG * result);
/* poly_atan.c */
extern void poly_atan(FPU_REG *st0_ptr, u_char st0_tag, FPU_REG *st1_ptr,
extern void poly_atan(FPU_REG * st0_ptr, u_char st0_tag, FPU_REG * st1_ptr,
u_char st1_tag);
/* poly_l2.c */
extern void poly_l2(FPU_REG *st0_ptr, FPU_REG *st1_ptr, u_char st1_sign);
extern int poly_l2p1(u_char s0, u_char s1, FPU_REG *r0, FPU_REG *r1,
FPU_REG *d);
extern void poly_l2(FPU_REG * st0_ptr, FPU_REG * st1_ptr, u_char st1_sign);
extern int poly_l2p1(u_char s0, u_char s1, FPU_REG * r0, FPU_REG * r1,
FPU_REG * d);
/* poly_sin.c */
extern void poly_sine(FPU_REG *st0_ptr);
extern void poly_cos(FPU_REG *st0_ptr);
extern void poly_sine(FPU_REG * st0_ptr);
extern void poly_cos(FPU_REG * st0_ptr);
/* poly_tan.c */
extern void poly_tan(FPU_REG *st0_ptr);
extern void poly_tan(FPU_REG * st0_ptr);
/* reg_add_sub.c */
extern int FPU_add(FPU_REG const *b, u_char tagb, int destrnr, int control_w);
extern int FPU_sub(int flags, int rm, int control_w);
......@@ -109,32 +111,34 @@ extern void fucompp(void);
/* reg_constant.c */
extern void fconst(void);
/* reg_ld_str.c */
extern int FPU_load_extended(long double __user *s, int stnr);
extern int FPU_load_double(double __user *dfloat, FPU_REG *loaded_data);
extern int FPU_load_single(float __user *single, FPU_REG *loaded_data);
extern int FPU_load_int64(long long __user *_s);
extern int FPU_load_int32(long __user *_s, FPU_REG *loaded_data);
extern int FPU_load_int16(short __user *_s, FPU_REG *loaded_data);
extern int FPU_load_bcd(u_char __user *s);
extern int FPU_store_extended(FPU_REG *st0_ptr, u_char st0_tag,
long double __user *d);
extern int FPU_store_double(FPU_REG *st0_ptr, u_char st0_tag, double __user *dfloat);
extern int FPU_store_single(FPU_REG *st0_ptr, u_char st0_tag, float __user *single);
extern int FPU_store_int64(FPU_REG *st0_ptr, u_char st0_tag, long long __user *d);
extern int FPU_store_int32(FPU_REG *st0_ptr, u_char st0_tag, long __user *d);
extern int FPU_store_int16(FPU_REG *st0_ptr, u_char st0_tag, short __user *d);
extern int FPU_store_bcd(FPU_REG *st0_ptr, u_char st0_tag, u_char __user *d);
extern int FPU_round_to_int(FPU_REG *r, u_char tag);
extern u_char __user *fldenv(fpu_addr_modes addr_modes, u_char __user *s);
extern void frstor(fpu_addr_modes addr_modes, u_char __user *data_address);
extern u_char __user *fstenv(fpu_addr_modes addr_modes, u_char __user *d);
extern void fsave(fpu_addr_modes addr_modes, u_char __user *data_address);
extern int FPU_tagof(FPU_REG *ptr);
extern int FPU_load_extended(long double __user * s, int stnr);
extern int FPU_load_double(double __user * dfloat, FPU_REG * loaded_data);
extern int FPU_load_single(float __user * single, FPU_REG * loaded_data);
extern int FPU_load_int64(long long __user * _s);
extern int FPU_load_int32(long __user * _s, FPU_REG * loaded_data);
extern int FPU_load_int16(short __user * _s, FPU_REG * loaded_data);
extern int FPU_load_bcd(u_char __user * s);
extern int FPU_store_extended(FPU_REG * st0_ptr, u_char st0_tag,
long double __user * d);
extern int FPU_store_double(FPU_REG * st0_ptr, u_char st0_tag,
double __user * dfloat);
extern int FPU_store_single(FPU_REG * st0_ptr, u_char st0_tag,
float __user * single);
extern int FPU_store_int64(FPU_REG * st0_ptr, u_char st0_tag,
long long __user * d);
extern int FPU_store_int32(FPU_REG * st0_ptr, u_char st0_tag, long __user * d);
extern int FPU_store_int16(FPU_REG * st0_ptr, u_char st0_tag, short __user * d);
extern int FPU_store_bcd(FPU_REG * st0_ptr, u_char st0_tag, u_char __user * d);
extern int FPU_round_to_int(FPU_REG * r, u_char tag);
extern u_char __user *fldenv(fpu_addr_modes addr_modes, u_char __user * s);
extern void frstor(fpu_addr_modes addr_modes, u_char __user * data_address);
extern u_char __user *fstenv(fpu_addr_modes addr_modes, u_char __user * d);
extern void fsave(fpu_addr_modes addr_modes, u_char __user * data_address);
extern int FPU_tagof(FPU_REG * ptr);
/* reg_mul.c */
extern int FPU_mul(FPU_REG const *b, u_char tagb, int deststnr, int control_w);
extern int FPU_div(int flags, int regrm, int control_w);
/* reg_convert.c */
extern int FPU_to_exp16(FPU_REG const *a, FPU_REG *x);
extern int FPU_to_exp16(FPU_REG const *a, FPU_REG * x);
#endif /* _FPU_PROTO_H */
......@@ -14,114 +14,102 @@
#include "fpu_system.h"
#include "exception.h"
void FPU_pop(void)
{
fpu_tag_word |= 3 << ((top & 7)*2);
top++;
fpu_tag_word |= 3 << ((top & 7) * 2);
top++;
}
int FPU_gettag0(void)
{
return (fpu_tag_word >> ((top & 7)*2)) & 3;
return (fpu_tag_word >> ((top & 7) * 2)) & 3;
}
int FPU_gettagi(int stnr)
{
return (fpu_tag_word >> (((top+stnr) & 7)*2)) & 3;
return (fpu_tag_word >> (((top + stnr) & 7) * 2)) & 3;
}
int FPU_gettag(int regnr)
{
return (fpu_tag_word >> ((regnr & 7)*2)) & 3;
return (fpu_tag_word >> ((regnr & 7) * 2)) & 3;
}
void FPU_settag0(int tag)
{
int regnr = top;
regnr &= 7;
fpu_tag_word &= ~(3 << (regnr*2));
fpu_tag_word |= (tag & 3) << (regnr*2);
int regnr = top;
regnr &= 7;
fpu_tag_word &= ~(3 << (regnr * 2));
fpu_tag_word |= (tag & 3) << (regnr * 2);
}
void FPU_settagi(int stnr, int tag)
{
int regnr = stnr+top;
regnr &= 7;
fpu_tag_word &= ~(3 << (regnr*2));
fpu_tag_word |= (tag & 3) << (regnr*2);
int regnr = stnr + top;
regnr &= 7;
fpu_tag_word &= ~(3 << (regnr * 2));
fpu_tag_word |= (tag & 3) << (regnr * 2);
}
void FPU_settag(int regnr, int tag)
{
regnr &= 7;
fpu_tag_word &= ~(3 << (regnr*2));
fpu_tag_word |= (tag & 3) << (regnr*2);
regnr &= 7;
fpu_tag_word &= ~(3 << (regnr * 2));
fpu_tag_word |= (tag & 3) << (regnr * 2);
}
int FPU_Special(FPU_REG const *ptr)
{
int exp = exponent(ptr);
if ( exp == EXP_BIAS+EXP_UNDER )
return TW_Denormal;
else if ( exp != EXP_BIAS+EXP_OVER )
return TW_NaN;
else if ( (ptr->sigh == 0x80000000) && (ptr->sigl == 0) )
return TW_Infinity;
return TW_NaN;
int exp = exponent(ptr);
if (exp == EXP_BIAS + EXP_UNDER)
return TW_Denormal;
else if (exp != EXP_BIAS + EXP_OVER)
return TW_NaN;
else if ((ptr->sigh == 0x80000000) && (ptr->sigl == 0))
return TW_Infinity;
return TW_NaN;
}
int isNaN(FPU_REG const *ptr)
{
return ( (exponent(ptr) == EXP_BIAS+EXP_OVER)
&& !((ptr->sigh == 0x80000000) && (ptr->sigl == 0)) );
return ((exponent(ptr) == EXP_BIAS + EXP_OVER)
&& !((ptr->sigh == 0x80000000) && (ptr->sigl == 0)));
}
int FPU_empty_i(int stnr)
{
int regnr = (top+stnr) & 7;
int regnr = (top + stnr) & 7;
return ((fpu_tag_word >> (regnr*2)) & 3) == TAG_Empty;
return ((fpu_tag_word >> (regnr * 2)) & 3) == TAG_Empty;
}
int FPU_stackoverflow(FPU_REG **st_new_ptr)
int FPU_stackoverflow(FPU_REG ** st_new_ptr)
{
*st_new_ptr = &st(-1);
*st_new_ptr = &st(-1);
return ((fpu_tag_word >> (((top - 1) & 7)*2)) & 3) != TAG_Empty;
return ((fpu_tag_word >> (((top - 1) & 7) * 2)) & 3) != TAG_Empty;
}
void FPU_copy_to_regi(FPU_REG const *r, u_char tag, int stnr)
{
reg_copy(r, &st(stnr));
FPU_settagi(stnr, tag);
reg_copy(r, &st(stnr));
FPU_settagi(stnr, tag);
}
void FPU_copy_to_reg1(FPU_REG const *r, u_char tag)
{
reg_copy(r, &st(1));
FPU_settagi(1, tag);
reg_copy(r, &st(1));
FPU_settagi(1, tag);
}
void FPU_copy_to_reg0(FPU_REG const *r, u_char tag)
{
int regnr = top;
regnr &= 7;
int regnr = top;
regnr &= 7;
reg_copy(r, &st(0));
reg_copy(r, &st(0));
fpu_tag_word &= ~(3 << (regnr*2));
fpu_tag_word |= (tag & 3) << (regnr*2);
fpu_tag_word &= ~(3 << (regnr * 2));
fpu_tag_word |= (tag & 3) << (regnr * 2);
}
此差异已折叠。
......@@ -17,7 +17,6 @@
| other processes using the emulator while swapping is in progress. |
+---------------------------------------------------------------------------*/
#include <linux/stddef.h>
#include <asm/uaccess.h>
......@@ -27,31 +26,30 @@
#include "exception.h"
#include "fpu_emu.h"
#define FPU_WRITE_BIT 0x10
static int reg_offset[] = {
offsetof(struct info,___eax),
offsetof(struct info,___ecx),
offsetof(struct info,___edx),
offsetof(struct info,___ebx),
offsetof(struct info,___esp),
offsetof(struct info,___ebp),
offsetof(struct info,___esi),
offsetof(struct info,___edi)
offsetof(struct info, ___eax),
offsetof(struct info, ___ecx),
offsetof(struct info, ___edx),
offsetof(struct info, ___ebx),
offsetof(struct info, ___esp),
offsetof(struct info, ___ebp),
offsetof(struct info, ___esi),
offsetof(struct info, ___edi)
};
#define REG_(x) (*(long *)(reg_offset[(x)]+(u_char *) FPU_info))
static int reg_offset_vm86[] = {
offsetof(struct info,___cs),
offsetof(struct info,___vm86_ds),
offsetof(struct info,___vm86_es),
offsetof(struct info,___vm86_fs),
offsetof(struct info,___vm86_gs),
offsetof(struct info,___ss),
offsetof(struct info,___vm86_ds)
};
offsetof(struct info, ___cs),
offsetof(struct info, ___vm86_ds),
offsetof(struct info, ___vm86_es),
offsetof(struct info, ___vm86_fs),
offsetof(struct info, ___vm86_gs),
offsetof(struct info, ___ss),
offsetof(struct info, ___vm86_ds)
};
#define VM86_REG_(x) (*(unsigned short *) \
(reg_offset_vm86[((unsigned)x)]+(u_char *) FPU_info))
......@@ -60,158 +58,141 @@ static int reg_offset_vm86[] = {
#define ___GS ___ds
static int reg_offset_pm[] = {
offsetof(struct info,___cs),
offsetof(struct info,___ds),
offsetof(struct info,___es),
offsetof(struct info,___fs),
offsetof(struct info,___GS),
offsetof(struct info,___ss),
offsetof(struct info,___ds)
};
offsetof(struct info, ___cs),
offsetof(struct info, ___ds),
offsetof(struct info, ___es),
offsetof(struct info, ___fs),
offsetof(struct info, ___GS),
offsetof(struct info, ___ss),
offsetof(struct info, ___ds)
};
#define PM_REG_(x) (*(unsigned short *) \
(reg_offset_pm[((unsigned)x)]+(u_char *) FPU_info))
/* Decode the SIB byte. This function assumes mod != 0 */
static int sib(int mod, unsigned long *fpu_eip)
{
u_char ss,index,base;
long offset;
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(1);
FPU_get_user(base, (u_char __user *) (*fpu_eip)); /* The SIB byte */
RE_ENTRANT_CHECK_ON;
(*fpu_eip)++;
ss = base >> 6;
index = (base >> 3) & 7;
base &= 7;
if ((mod == 0) && (base == 5))
offset = 0; /* No base register */
else
offset = REG_(base);
if (index == 4)
{
/* No index register */
/* A non-zero ss is illegal */
if ( ss )
EXCEPTION(EX_Invalid);
}
else
{
offset += (REG_(index)) << ss;
}
if (mod == 1)
{
/* 8 bit signed displacement */
long displacement;
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(1);
FPU_get_user(displacement, (signed char __user *) (*fpu_eip));
offset += displacement;
RE_ENTRANT_CHECK_ON;
(*fpu_eip)++;
}
else if (mod == 2 || base == 5) /* The second condition also has mod==0 */
{
/* 32 bit displacement */
long displacement;
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(4);
FPU_get_user(displacement, (long __user *) (*fpu_eip));
offset += displacement;
RE_ENTRANT_CHECK_ON;
(*fpu_eip) += 4;
}
return offset;
}
u_char ss, index, base;
long offset;
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(1);
FPU_get_user(base, (u_char __user *) (*fpu_eip)); /* The SIB byte */
RE_ENTRANT_CHECK_ON;
(*fpu_eip)++;
ss = base >> 6;
index = (base >> 3) & 7;
base &= 7;
if ((mod == 0) && (base == 5))
offset = 0; /* No base register */
else
offset = REG_(base);
if (index == 4) {
/* No index register */
/* A non-zero ss is illegal */
if (ss)
EXCEPTION(EX_Invalid);
} else {
offset += (REG_(index)) << ss;
}
if (mod == 1) {
/* 8 bit signed displacement */
long displacement;
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(1);
FPU_get_user(displacement, (signed char __user *)(*fpu_eip));
offset += displacement;
RE_ENTRANT_CHECK_ON;
(*fpu_eip)++;
} else if (mod == 2 || base == 5) { /* The second condition also has mod==0 */
/* 32 bit displacement */
long displacement;
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(4);
FPU_get_user(displacement, (long __user *)(*fpu_eip));
offset += displacement;
RE_ENTRANT_CHECK_ON;
(*fpu_eip) += 4;
}
return offset;
}
static unsigned long vm86_segment(u_char segment,
struct address *addr)
static unsigned long vm86_segment(u_char segment, struct address *addr)
{
segment--;
segment--;
#ifdef PARANOID
if ( segment > PREFIX_SS_ )
{
EXCEPTION(EX_INTERNAL|0x130);
math_abort(FPU_info,SIGSEGV);
}
if (segment > PREFIX_SS_) {
EXCEPTION(EX_INTERNAL | 0x130);
math_abort(FPU_info, SIGSEGV);
}
#endif /* PARANOID */
addr->selector = VM86_REG_(segment);
return (unsigned long)VM86_REG_(segment) << 4;
addr->selector = VM86_REG_(segment);
return (unsigned long)VM86_REG_(segment) << 4;
}
/* This should work for 16 and 32 bit protected mode. */
static long pm_address(u_char FPU_modrm, u_char segment,
struct address *addr, long offset)
{
struct desc_struct descriptor;
unsigned long base_address, limit, address, seg_top;
{
struct desc_struct descriptor;
unsigned long base_address, limit, address, seg_top;
segment--;
segment--;
#ifdef PARANOID
/* segment is unsigned, so this also detects if segment was 0: */
if ( segment > PREFIX_SS_ )
{
EXCEPTION(EX_INTERNAL|0x132);
math_abort(FPU_info,SIGSEGV);
}
/* segment is unsigned, so this also detects if segment was 0: */
if (segment > PREFIX_SS_) {
EXCEPTION(EX_INTERNAL | 0x132);
math_abort(FPU_info, SIGSEGV);
}
#endif /* PARANOID */
switch ( segment )
{
/* gs isn't used by the kernel, so it still has its
user-space value. */
case PREFIX_GS_-1:
/* N.B. - movl %seg, mem is a 2 byte write regardless of prefix */
savesegment(gs, addr->selector);
break;
default:
addr->selector = PM_REG_(segment);
}
descriptor = LDT_DESCRIPTOR(PM_REG_(segment));
base_address = SEG_BASE_ADDR(descriptor);
address = base_address + offset;
limit = base_address
+ (SEG_LIMIT(descriptor)+1) * SEG_GRANULARITY(descriptor) - 1;
if ( limit < base_address ) limit = 0xffffffff;
if ( SEG_EXPAND_DOWN(descriptor) )
{
if ( SEG_G_BIT(descriptor) )
seg_top = 0xffffffff;
else
{
seg_top = base_address + (1 << 20);
if ( seg_top < base_address ) seg_top = 0xffffffff;
switch (segment) {
/* gs isn't used by the kernel, so it still has its
user-space value. */
case PREFIX_GS_ - 1:
/* N.B. - movl %seg, mem is a 2 byte write regardless of prefix */
savesegment(gs, addr->selector);
break;
default:
addr->selector = PM_REG_(segment);
}
access_limit =
(address <= limit) || (address >= seg_top) ? 0 :
((seg_top-address) >= 255 ? 255 : seg_top-address);
}
else
{
access_limit =
(address > limit) || (address < base_address) ? 0 :
((limit-address) >= 254 ? 255 : limit-address+1);
}
if ( SEG_EXECUTE_ONLY(descriptor) ||
(!SEG_WRITE_PERM(descriptor) && (FPU_modrm & FPU_WRITE_BIT)) )
{
access_limit = 0;
}
return address;
}
descriptor = LDT_DESCRIPTOR(PM_REG_(segment));
base_address = SEG_BASE_ADDR(descriptor);
address = base_address + offset;
limit = base_address
+ (SEG_LIMIT(descriptor) + 1) * SEG_GRANULARITY(descriptor) - 1;
if (limit < base_address)
limit = 0xffffffff;
if (SEG_EXPAND_DOWN(descriptor)) {
if (SEG_G_BIT(descriptor))
seg_top = 0xffffffff;
else {
seg_top = base_address + (1 << 20);
if (seg_top < base_address)
seg_top = 0xffffffff;
}
access_limit =
(address <= limit) || (address >= seg_top) ? 0 :
((seg_top - address) >= 255 ? 255 : seg_top - address);
} else {
access_limit =
(address > limit) || (address < base_address) ? 0 :
((limit - address) >= 254 ? 255 : limit - address + 1);
}
if (SEG_EXECUTE_ONLY(descriptor) ||
(!SEG_WRITE_PERM(descriptor) && (FPU_modrm & FPU_WRITE_BIT))) {
access_limit = 0;
}
return address;
}
/*
MOD R/M byte: MOD == 3 has a special use for the FPU
......@@ -221,7 +202,6 @@ static long pm_address(u_char FPU_modrm, u_char segment,
..... ......... .........
MOD OPCODE(2) R/M
SIB byte
7 6 5 4 3 2 1 0
......@@ -231,208 +211,194 @@ static long pm_address(u_char FPU_modrm, u_char segment,
*/
void __user *FPU_get_address(u_char FPU_modrm, unsigned long *fpu_eip,
struct address *addr,
fpu_addr_modes addr_modes)
struct address *addr, fpu_addr_modes addr_modes)
{
u_char mod;
unsigned rm = FPU_modrm & 7;
long *cpu_reg_ptr;
int address = 0; /* Initialized just to stop compiler warnings. */
/* Memory accessed via the cs selector is write protected
in `non-segmented' 32 bit protected mode. */
if (!addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT)
&& (addr_modes.override.segment == PREFIX_CS_)) {
math_abort(FPU_info, SIGSEGV);
}
addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */
mod = (FPU_modrm >> 6) & 3;
if (rm == 4 && mod != 3) {
address = sib(mod, fpu_eip);
} else {
cpu_reg_ptr = &REG_(rm);
switch (mod) {
case 0:
if (rm == 5) {
/* Special case: disp32 */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(4);
FPU_get_user(address,
(unsigned long __user
*)(*fpu_eip));
(*fpu_eip) += 4;
RE_ENTRANT_CHECK_ON;
addr->offset = address;
return (void __user *)address;
} else {
address = *cpu_reg_ptr; /* Just return the contents
of the cpu register */
addr->offset = address;
return (void __user *)address;
}
case 1:
/* 8 bit signed displacement */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(1);
FPU_get_user(address, (signed char __user *)(*fpu_eip));
RE_ENTRANT_CHECK_ON;
(*fpu_eip)++;
break;
case 2:
/* 32 bit displacement */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(4);
FPU_get_user(address, (long __user *)(*fpu_eip));
(*fpu_eip) += 4;
RE_ENTRANT_CHECK_ON;
break;
case 3:
/* Not legal for the FPU */
EXCEPTION(EX_Invalid);
}
address += *cpu_reg_ptr;
}
addr->offset = address;
switch (addr_modes.default_mode) {
case 0:
break;
case VM86:
address += vm86_segment(addr_modes.override.segment, addr);
break;
case PM16:
case SEG32:
address = pm_address(FPU_modrm, addr_modes.override.segment,
addr, address);
break;
default:
EXCEPTION(EX_INTERNAL | 0x133);
}
return (void __user *)address;
}
void __user *FPU_get_address_16(u_char FPU_modrm, unsigned long *fpu_eip,
struct address *addr, fpu_addr_modes addr_modes)
{
u_char mod;
unsigned rm = FPU_modrm & 7;
long *cpu_reg_ptr;
int address = 0; /* Initialized just to stop compiler warnings. */
/* Memory accessed via the cs selector is write protected
in `non-segmented' 32 bit protected mode. */
if ( !addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT)
&& (addr_modes.override.segment == PREFIX_CS_) )
{
math_abort(FPU_info,SIGSEGV);
}
addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */
mod = (FPU_modrm >> 6) & 3;
if (rm == 4 && mod != 3)
{
address = sib(mod, fpu_eip);
}
else
{
cpu_reg_ptr = & REG_(rm);
switch (mod)
{
u_char mod;
unsigned rm = FPU_modrm & 7;
int address = 0; /* Default used for mod == 0 */
/* Memory accessed via the cs selector is write protected
in `non-segmented' 32 bit protected mode. */
if (!addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT)
&& (addr_modes.override.segment == PREFIX_CS_)) {
math_abort(FPU_info, SIGSEGV);
}
addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */
mod = (FPU_modrm >> 6) & 3;
switch (mod) {
case 0:
if (rm == 5)
{
/* Special case: disp32 */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(4);
FPU_get_user(address, (unsigned long __user *) (*fpu_eip));
(*fpu_eip) += 4;
RE_ENTRANT_CHECK_ON;
addr->offset = address;
return (void __user *) address;
}
else
{
address = *cpu_reg_ptr; /* Just return the contents
of the cpu register */
addr->offset = address;
return (void __user *) address;
}
if (rm == 6) {
/* Special case: disp16 */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(2);
FPU_get_user(address,
(unsigned short __user *)(*fpu_eip));
(*fpu_eip) += 2;
RE_ENTRANT_CHECK_ON;
goto add_segment;
}
break;
case 1:
/* 8 bit signed displacement */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(1);
FPU_get_user(address, (signed char __user *) (*fpu_eip));
RE_ENTRANT_CHECK_ON;
(*fpu_eip)++;
break;
/* 8 bit signed displacement */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(1);
FPU_get_user(address, (signed char __user *)(*fpu_eip));
RE_ENTRANT_CHECK_ON;
(*fpu_eip)++;
break;
case 2:
/* 32 bit displacement */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(4);
FPU_get_user(address, (long __user *) (*fpu_eip));
(*fpu_eip) += 4;
RE_ENTRANT_CHECK_ON;
break;
/* 16 bit displacement */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(2);
FPU_get_user(address, (unsigned short __user *)(*fpu_eip));
(*fpu_eip) += 2;
RE_ENTRANT_CHECK_ON;
break;
case 3:
/* Not legal for the FPU */
EXCEPTION(EX_Invalid);
/* Not legal for the FPU */
EXCEPTION(EX_Invalid);
break;
}
switch (rm) {
case 0:
address += FPU_info->___ebx + FPU_info->___esi;
break;
case 1:
address += FPU_info->___ebx + FPU_info->___edi;
break;
case 2:
address += FPU_info->___ebp + FPU_info->___esi;
if (addr_modes.override.segment == PREFIX_DEFAULT)
addr_modes.override.segment = PREFIX_SS_;
break;
case 3:
address += FPU_info->___ebp + FPU_info->___edi;
if (addr_modes.override.segment == PREFIX_DEFAULT)
addr_modes.override.segment = PREFIX_SS_;
break;
case 4:
address += FPU_info->___esi;
break;
case 5:
address += FPU_info->___edi;
break;
case 6:
address += FPU_info->___ebp;
if (addr_modes.override.segment == PREFIX_DEFAULT)
addr_modes.override.segment = PREFIX_SS_;
break;
case 7:
address += FPU_info->___ebx;
break;
}
address += *cpu_reg_ptr;
}
addr->offset = address;
switch ( addr_modes.default_mode )
{
case 0:
break;
case VM86:
address += vm86_segment(addr_modes.override.segment, addr);
break;
case PM16:
case SEG32:
address = pm_address(FPU_modrm, addr_modes.override.segment,
addr, address);
break;
default:
EXCEPTION(EX_INTERNAL|0x133);
}
return (void __user *)address;
}
add_segment:
address &= 0xffff;
void __user *FPU_get_address_16(u_char FPU_modrm, unsigned long *fpu_eip,
struct address *addr,
fpu_addr_modes addr_modes)
{
u_char mod;
unsigned rm = FPU_modrm & 7;
int address = 0; /* Default used for mod == 0 */
/* Memory accessed via the cs selector is write protected
in `non-segmented' 32 bit protected mode. */
if ( !addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT)
&& (addr_modes.override.segment == PREFIX_CS_) )
{
math_abort(FPU_info,SIGSEGV);
}
addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */
mod = (FPU_modrm >> 6) & 3;
switch (mod)
{
case 0:
if (rm == 6)
{
/* Special case: disp16 */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(2);
FPU_get_user(address, (unsigned short __user *) (*fpu_eip));
(*fpu_eip) += 2;
RE_ENTRANT_CHECK_ON;
goto add_segment;
addr->offset = address;
switch (addr_modes.default_mode) {
case 0:
break;
case VM86:
address += vm86_segment(addr_modes.override.segment, addr);
break;
case PM16:
case SEG32:
address = pm_address(FPU_modrm, addr_modes.override.segment,
addr, address);
break;
default:
EXCEPTION(EX_INTERNAL | 0x131);
}
break;
case 1:
/* 8 bit signed displacement */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(1);
FPU_get_user(address, (signed char __user *) (*fpu_eip));
RE_ENTRANT_CHECK_ON;
(*fpu_eip)++;
break;
case 2:
/* 16 bit displacement */
RE_ENTRANT_CHECK_OFF;
FPU_code_access_ok(2);
FPU_get_user(address, (unsigned short __user *) (*fpu_eip));
(*fpu_eip) += 2;
RE_ENTRANT_CHECK_ON;
break;
case 3:
/* Not legal for the FPU */
EXCEPTION(EX_Invalid);
break;
}
switch ( rm )
{
case 0:
address += FPU_info->___ebx + FPU_info->___esi;
break;
case 1:
address += FPU_info->___ebx + FPU_info->___edi;
break;
case 2:
address += FPU_info->___ebp + FPU_info->___esi;
if ( addr_modes.override.segment == PREFIX_DEFAULT )
addr_modes.override.segment = PREFIX_SS_;
break;
case 3:
address += FPU_info->___ebp + FPU_info->___edi;
if ( addr_modes.override.segment == PREFIX_DEFAULT )
addr_modes.override.segment = PREFIX_SS_;
break;
case 4:
address += FPU_info->___esi;
break;
case 5:
address += FPU_info->___edi;
break;
case 6:
address += FPU_info->___ebp;
if ( addr_modes.override.segment == PREFIX_DEFAULT )
addr_modes.override.segment = PREFIX_SS_;
break;
case 7:
address += FPU_info->___ebx;
break;
}
add_segment:
address &= 0xffff;
addr->offset = address;
switch ( addr_modes.default_mode )
{
case 0:
break;
case VM86:
address += vm86_segment(addr_modes.override.segment, addr);
break;
case PM16:
case SEG32:
address = pm_address(FPU_modrm, addr_modes.override.segment,
addr, address);
break;
default:
EXCEPTION(EX_INTERNAL|0x131);
}
return (void __user *)address ;
return (void __user *)address;
}
......@@ -26,247 +26,257 @@
#include "status_w.h"
#include "control_w.h"
#define _NONE_ 0 /* st0_ptr etc not needed */
#define _REG0_ 1 /* Will be storing st(0) */
#define _PUSH_ 3 /* Need to check for space to push onto stack */
#define _null_ 4 /* Function illegal or not implemented */
#define _NONE_ 0 /* st0_ptr etc not needed */
#define _REG0_ 1 /* Will be storing st(0) */
#define _PUSH_ 3 /* Need to check for space to push onto stack */
#define _null_ 4 /* Function illegal or not implemented */
#define pop_0() { FPU_settag0(TAG_Empty); top++; }
static u_char const type_table[32] = {
_PUSH_, _PUSH_, _PUSH_, _PUSH_,
_null_, _null_, _null_, _null_,
_REG0_, _REG0_, _REG0_, _REG0_,
_REG0_, _REG0_, _REG0_, _REG0_,
_NONE_, _null_, _NONE_, _PUSH_,
_NONE_, _PUSH_, _null_, _PUSH_,
_NONE_, _null_, _NONE_, _REG0_,
_NONE_, _REG0_, _NONE_, _REG0_
};
_PUSH_, _PUSH_, _PUSH_, _PUSH_,
_null_, _null_, _null_, _null_,
_REG0_, _REG0_, _REG0_, _REG0_,
_REG0_, _REG0_, _REG0_, _REG0_,
_NONE_, _null_, _NONE_, _PUSH_,
_NONE_, _PUSH_, _null_, _PUSH_,
_NONE_, _null_, _NONE_, _REG0_,
_NONE_, _REG0_, _NONE_, _REG0_
};
u_char const data_sizes_16[32] = {
4, 4, 8, 2, 0, 0, 0, 0,
4, 4, 8, 2, 4, 4, 8, 2,
14, 0, 94, 10, 2, 10, 0, 8,
14, 0, 94, 10, 2, 10, 2, 8
4, 4, 8, 2, 0, 0, 0, 0,
4, 4, 8, 2, 4, 4, 8, 2,
14, 0, 94, 10, 2, 10, 0, 8,
14, 0, 94, 10, 2, 10, 2, 8
};
static u_char const data_sizes_32[32] = {
4, 4, 8, 2, 0, 0, 0, 0,
4, 4, 8, 2, 4, 4, 8, 2,
28, 0,108, 10, 2, 10, 0, 8,
28, 0,108, 10, 2, 10, 2, 8
4, 4, 8, 2, 0, 0, 0, 0,
4, 4, 8, 2, 4, 4, 8, 2,
28, 0, 108, 10, 2, 10, 0, 8,
28, 0, 108, 10, 2, 10, 2, 8
};
int FPU_load_store(u_char type, fpu_addr_modes addr_modes,
void __user *data_address)
void __user * data_address)
{
FPU_REG loaded_data;
FPU_REG *st0_ptr;
u_char st0_tag = TAG_Empty; /* This is just to stop a gcc warning. */
u_char loaded_tag;
FPU_REG loaded_data;
FPU_REG *st0_ptr;
u_char st0_tag = TAG_Empty; /* This is just to stop a gcc warning. */
u_char loaded_tag;
st0_ptr = NULL; /* Initialized just to stop compiler warnings. */
st0_ptr = NULL; /* Initialized just to stop compiler warnings. */
if ( addr_modes.default_mode & PROTECTED )
{
if ( addr_modes.default_mode == SEG32 )
{
if ( access_limit < data_sizes_32[type] )
math_abort(FPU_info,SIGSEGV);
}
else if ( addr_modes.default_mode == PM16 )
{
if ( access_limit < data_sizes_16[type] )
math_abort(FPU_info,SIGSEGV);
}
if (addr_modes.default_mode & PROTECTED) {
if (addr_modes.default_mode == SEG32) {
if (access_limit < data_sizes_32[type])
math_abort(FPU_info, SIGSEGV);
} else if (addr_modes.default_mode == PM16) {
if (access_limit < data_sizes_16[type])
math_abort(FPU_info, SIGSEGV);
}
#ifdef PARANOID
else
EXCEPTION(EX_INTERNAL|0x140);
else
EXCEPTION(EX_INTERNAL | 0x140);
#endif /* PARANOID */
}
}
switch ( type_table[type] )
{
case _NONE_:
break;
case _REG0_:
st0_ptr = &st(0); /* Some of these instructions pop after
storing */
st0_tag = FPU_gettag0();
break;
case _PUSH_:
{
if ( FPU_gettagi(-1) != TAG_Empty )
{ FPU_stack_overflow(); return 0; }
top--;
st0_ptr = &st(0);
}
break;
case _null_:
FPU_illegal();
return 0;
switch (type_table[type]) {
case _NONE_:
break;
case _REG0_:
st0_ptr = &st(0); /* Some of these instructions pop after
storing */
st0_tag = FPU_gettag0();
break;
case _PUSH_:
{
if (FPU_gettagi(-1) != TAG_Empty) {
FPU_stack_overflow();
return 0;
}
top--;
st0_ptr = &st(0);
}
break;
case _null_:
FPU_illegal();
return 0;
#ifdef PARANOID
default:
EXCEPTION(EX_INTERNAL|0x141);
return 0;
default:
EXCEPTION(EX_INTERNAL | 0x141);
return 0;
#endif /* PARANOID */
}
switch ( type )
{
case 000: /* fld m32real */
clear_C1();
loaded_tag = FPU_load_single((float __user *)data_address, &loaded_data);
if ( (loaded_tag == TAG_Special)
&& isNaN(&loaded_data)
&& (real_1op_NaN(&loaded_data) < 0) )
{
top++;
break;
}
FPU_copy_to_reg0(&loaded_data, loaded_tag);
break;
case 001: /* fild m32int */
clear_C1();
loaded_tag = FPU_load_int32((long __user *)data_address, &loaded_data);
FPU_copy_to_reg0(&loaded_data, loaded_tag);
break;
case 002: /* fld m64real */
clear_C1();
loaded_tag = FPU_load_double((double __user *)data_address, &loaded_data);
if ( (loaded_tag == TAG_Special)
&& isNaN(&loaded_data)
&& (real_1op_NaN(&loaded_data) < 0) )
{
top++;
break;
}
FPU_copy_to_reg0(&loaded_data, loaded_tag);
break;
case 003: /* fild m16int */
clear_C1();
loaded_tag = FPU_load_int16((short __user *)data_address, &loaded_data);
FPU_copy_to_reg0(&loaded_data, loaded_tag);
break;
case 010: /* fst m32real */
clear_C1();
FPU_store_single(st0_ptr, st0_tag, (float __user *)data_address);
break;
case 011: /* fist m32int */
clear_C1();
FPU_store_int32(st0_ptr, st0_tag, (long __user *)data_address);
break;
case 012: /* fst m64real */
clear_C1();
FPU_store_double(st0_ptr, st0_tag, (double __user *)data_address);
break;
case 013: /* fist m16int */
clear_C1();
FPU_store_int16(st0_ptr, st0_tag, (short __user *)data_address);
break;
case 014: /* fstp m32real */
clear_C1();
if ( FPU_store_single(st0_ptr, st0_tag, (float __user *)data_address) )
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 015: /* fistp m32int */
clear_C1();
if ( FPU_store_int32(st0_ptr, st0_tag, (long __user *)data_address) )
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 016: /* fstp m64real */
clear_C1();
if ( FPU_store_double(st0_ptr, st0_tag, (double __user *)data_address) )
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 017: /* fistp m16int */
clear_C1();
if ( FPU_store_int16(st0_ptr, st0_tag, (short __user *)data_address) )
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 020: /* fldenv m14/28byte */
fldenv(addr_modes, (u_char __user *)data_address);
/* Ensure that the values just loaded are not changed by
fix-up operations. */
return 1;
case 022: /* frstor m94/108byte */
frstor(addr_modes, (u_char __user *)data_address);
/* Ensure that the values just loaded are not changed by
fix-up operations. */
return 1;
case 023: /* fbld m80dec */
clear_C1();
loaded_tag = FPU_load_bcd((u_char __user *)data_address);
FPU_settag0(loaded_tag);
break;
case 024: /* fldcw */
RE_ENTRANT_CHECK_OFF;
FPU_access_ok(VERIFY_READ, data_address, 2);
FPU_get_user(control_word, (unsigned short __user *) data_address);
RE_ENTRANT_CHECK_ON;
if ( partial_status & ~control_word & CW_Exceptions )
partial_status |= (SW_Summary | SW_Backward);
else
partial_status &= ~(SW_Summary | SW_Backward);
switch (type) {
case 000: /* fld m32real */
clear_C1();
loaded_tag =
FPU_load_single((float __user *)data_address, &loaded_data);
if ((loaded_tag == TAG_Special)
&& isNaN(&loaded_data)
&& (real_1op_NaN(&loaded_data) < 0)) {
top++;
break;
}
FPU_copy_to_reg0(&loaded_data, loaded_tag);
break;
case 001: /* fild m32int */
clear_C1();
loaded_tag =
FPU_load_int32((long __user *)data_address, &loaded_data);
FPU_copy_to_reg0(&loaded_data, loaded_tag);
break;
case 002: /* fld m64real */
clear_C1();
loaded_tag =
FPU_load_double((double __user *)data_address,
&loaded_data);
if ((loaded_tag == TAG_Special)
&& isNaN(&loaded_data)
&& (real_1op_NaN(&loaded_data) < 0)) {
top++;
break;
}
FPU_copy_to_reg0(&loaded_data, loaded_tag);
break;
case 003: /* fild m16int */
clear_C1();
loaded_tag =
FPU_load_int16((short __user *)data_address, &loaded_data);
FPU_copy_to_reg0(&loaded_data, loaded_tag);
break;
case 010: /* fst m32real */
clear_C1();
FPU_store_single(st0_ptr, st0_tag,
(float __user *)data_address);
break;
case 011: /* fist m32int */
clear_C1();
FPU_store_int32(st0_ptr, st0_tag, (long __user *)data_address);
break;
case 012: /* fst m64real */
clear_C1();
FPU_store_double(st0_ptr, st0_tag,
(double __user *)data_address);
break;
case 013: /* fist m16int */
clear_C1();
FPU_store_int16(st0_ptr, st0_tag, (short __user *)data_address);
break;
case 014: /* fstp m32real */
clear_C1();
if (FPU_store_single
(st0_ptr, st0_tag, (float __user *)data_address))
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 015: /* fistp m32int */
clear_C1();
if (FPU_store_int32
(st0_ptr, st0_tag, (long __user *)data_address))
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 016: /* fstp m64real */
clear_C1();
if (FPU_store_double
(st0_ptr, st0_tag, (double __user *)data_address))
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 017: /* fistp m16int */
clear_C1();
if (FPU_store_int16
(st0_ptr, st0_tag, (short __user *)data_address))
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 020: /* fldenv m14/28byte */
fldenv(addr_modes, (u_char __user *) data_address);
/* Ensure that the values just loaded are not changed by
fix-up operations. */
return 1;
case 022: /* frstor m94/108byte */
frstor(addr_modes, (u_char __user *) data_address);
/* Ensure that the values just loaded are not changed by
fix-up operations. */
return 1;
case 023: /* fbld m80dec */
clear_C1();
loaded_tag = FPU_load_bcd((u_char __user *) data_address);
FPU_settag0(loaded_tag);
break;
case 024: /* fldcw */
RE_ENTRANT_CHECK_OFF;
FPU_access_ok(VERIFY_READ, data_address, 2);
FPU_get_user(control_word,
(unsigned short __user *)data_address);
RE_ENTRANT_CHECK_ON;
if (partial_status & ~control_word & CW_Exceptions)
partial_status |= (SW_Summary | SW_Backward);
else
partial_status &= ~(SW_Summary | SW_Backward);
#ifdef PECULIAR_486
control_word |= 0x40; /* An 80486 appears to always set this bit */
control_word |= 0x40; /* An 80486 appears to always set this bit */
#endif /* PECULIAR_486 */
return 1;
case 025: /* fld m80real */
clear_C1();
loaded_tag = FPU_load_extended((long double __user *)data_address, 0);
FPU_settag0(loaded_tag);
break;
case 027: /* fild m64int */
clear_C1();
loaded_tag = FPU_load_int64((long long __user *)data_address);
if (loaded_tag == TAG_Error)
return 1;
case 025: /* fld m80real */
clear_C1();
loaded_tag =
FPU_load_extended((long double __user *)data_address, 0);
FPU_settag0(loaded_tag);
break;
case 027: /* fild m64int */
clear_C1();
loaded_tag = FPU_load_int64((long long __user *)data_address);
if (loaded_tag == TAG_Error)
return 0;
FPU_settag0(loaded_tag);
break;
case 030: /* fstenv m14/28byte */
fstenv(addr_modes, (u_char __user *) data_address);
return 1;
case 032: /* fsave */
fsave(addr_modes, (u_char __user *) data_address);
return 1;
case 033: /* fbstp m80dec */
clear_C1();
if (FPU_store_bcd
(st0_ptr, st0_tag, (u_char __user *) data_address))
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 034: /* fstcw m16int */
RE_ENTRANT_CHECK_OFF;
FPU_access_ok(VERIFY_WRITE, data_address, 2);
FPU_put_user(control_word,
(unsigned short __user *)data_address);
RE_ENTRANT_CHECK_ON;
return 1;
case 035: /* fstp m80real */
clear_C1();
if (FPU_store_extended
(st0_ptr, st0_tag, (long double __user *)data_address))
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 036: /* fstsw m2byte */
RE_ENTRANT_CHECK_OFF;
FPU_access_ok(VERIFY_WRITE, data_address, 2);
FPU_put_user(status_word(),
(unsigned short __user *)data_address);
RE_ENTRANT_CHECK_ON;
return 1;
case 037: /* fistp m64int */
clear_C1();
if (FPU_store_int64
(st0_ptr, st0_tag, (long long __user *)data_address))
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
}
return 0;
FPU_settag0(loaded_tag);
break;
case 030: /* fstenv m14/28byte */
fstenv(addr_modes, (u_char __user *)data_address);
return 1;
case 032: /* fsave */
fsave(addr_modes, (u_char __user *)data_address);
return 1;
case 033: /* fbstp m80dec */
clear_C1();
if ( FPU_store_bcd(st0_ptr, st0_tag, (u_char __user *)data_address) )
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 034: /* fstcw m16int */
RE_ENTRANT_CHECK_OFF;
FPU_access_ok(VERIFY_WRITE,data_address,2);
FPU_put_user(control_word, (unsigned short __user *) data_address);
RE_ENTRANT_CHECK_ON;
return 1;
case 035: /* fstp m80real */
clear_C1();
if ( FPU_store_extended(st0_ptr, st0_tag, (long double __user *)data_address) )
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
case 036: /* fstsw m2byte */
RE_ENTRANT_CHECK_OFF;
FPU_access_ok(VERIFY_WRITE,data_address,2);
FPU_put_user(status_word(),(unsigned short __user *) data_address);
RE_ENTRANT_CHECK_ON;
return 1;
case 037: /* fistp m64int */
clear_C1();
if ( FPU_store_int64(st0_ptr, st0_tag, (long long __user *)data_address) )
pop_0(); /* pop only if the number was actually stored
(see the 80486 manual p16-28) */
break;
}
return 0;
}
......@@ -21,9 +21,9 @@
allows. 9-byte would probably be sufficient.
*/
typedef struct {
unsigned long lsw;
unsigned long midw;
unsigned long msw;
unsigned long lsw;
unsigned long midw;
unsigned long msw;
} Xsig;
asmlinkage void mul64(unsigned long long const *a, unsigned long long const *b,
......@@ -33,12 +33,12 @@ asmlinkage void polynomial_Xsig(Xsig *, const unsigned long long *x,
asmlinkage void mul32_Xsig(Xsig *, const unsigned long mult);
asmlinkage void mul64_Xsig(Xsig *, const unsigned long long *mult);
asmlinkage void mul_Xsig_Xsig(Xsig *dest, const Xsig *mult);
asmlinkage void mul_Xsig_Xsig(Xsig * dest, const Xsig * mult);
asmlinkage void shr_Xsig(Xsig *, const int n);
asmlinkage int round_Xsig(Xsig *);
asmlinkage int norm_Xsig(Xsig *);
asmlinkage void div_Xsig(Xsig *x1, const Xsig *x2, const Xsig *dest);
asmlinkage void div_Xsig(Xsig * x1, const Xsig * x2, const Xsig * dest);
/* Macro to extract the most significant 32 bits from a long long */
#define LL_MSW(x) (((unsigned long *)&x)[1])
......@@ -49,7 +49,6 @@ asmlinkage void div_Xsig(Xsig *x1, const Xsig *x2, const Xsig *dest);
/* Macro to access the 8 ms bytes of an Xsig as a long long */
#define XSIG_LL(x) (*(unsigned long long *)&x.midw)
/*
Need to run gcc with optimizations on to get these to
actually be in-line.
......@@ -63,59 +62,53 @@ asmlinkage void div_Xsig(Xsig *x1, const Xsig *x2, const Xsig *dest);
static inline unsigned long mul_32_32(const unsigned long arg1,
const unsigned long arg2)
{
int retval;
asm volatile ("mull %2; movl %%edx,%%eax" \
:"=a" (retval) \
:"0" (arg1), "g" (arg2) \
:"dx");
return retval;
int retval;
asm volatile ("mull %2; movl %%edx,%%eax":"=a" (retval)
:"0"(arg1), "g"(arg2)
:"dx");
return retval;
}
/* Add the 12 byte Xsig x2 to Xsig dest, with no checks for overflow. */
static inline void add_Xsig_Xsig(Xsig *dest, const Xsig *x2)
static inline void add_Xsig_Xsig(Xsig * dest, const Xsig * x2)
{
asm volatile ("movl %1,%%edi; movl %2,%%esi;\n"
"movl (%%esi),%%eax; addl %%eax,(%%edi);\n"
"movl 4(%%esi),%%eax; adcl %%eax,4(%%edi);\n"
"movl 8(%%esi),%%eax; adcl %%eax,8(%%edi);\n"
:"=g" (*dest):"g" (dest), "g" (x2)
:"ax","si","di");
asm volatile ("movl %1,%%edi; movl %2,%%esi;\n"
"movl (%%esi),%%eax; addl %%eax,(%%edi);\n"
"movl 4(%%esi),%%eax; adcl %%eax,4(%%edi);\n"
"movl 8(%%esi),%%eax; adcl %%eax,8(%%edi);\n":"=g"
(*dest):"g"(dest), "g"(x2)
:"ax", "si", "di");
}
/* Add the 12 byte Xsig x2 to Xsig dest, adjust exp if overflow occurs. */
/* Note: the constraints in the asm statement didn't always work properly
with gcc 2.5.8. Changing from using edi to using ecx got around the
problem, but keep fingers crossed! */
static inline void add_two_Xsig(Xsig *dest, const Xsig *x2, long int *exp)
static inline void add_two_Xsig(Xsig * dest, const Xsig * x2, long int *exp)
{
asm volatile ("movl %2,%%ecx; movl %3,%%esi;\n"
"movl (%%esi),%%eax; addl %%eax,(%%ecx);\n"
"movl 4(%%esi),%%eax; adcl %%eax,4(%%ecx);\n"
"movl 8(%%esi),%%eax; adcl %%eax,8(%%ecx);\n"
"jnc 0f;\n"
"rcrl 8(%%ecx); rcrl 4(%%ecx); rcrl (%%ecx)\n"
"movl %4,%%ecx; incl (%%ecx)\n"
"movl $1,%%eax; jmp 1f;\n"
"0: xorl %%eax,%%eax;\n"
"1:\n"
:"=g" (*exp), "=g" (*dest)
:"g" (dest), "g" (x2), "g" (exp)
:"cx","si","ax");
asm volatile ("movl %2,%%ecx; movl %3,%%esi;\n"
"movl (%%esi),%%eax; addl %%eax,(%%ecx);\n"
"movl 4(%%esi),%%eax; adcl %%eax,4(%%ecx);\n"
"movl 8(%%esi),%%eax; adcl %%eax,8(%%ecx);\n"
"jnc 0f;\n"
"rcrl 8(%%ecx); rcrl 4(%%ecx); rcrl (%%ecx)\n"
"movl %4,%%ecx; incl (%%ecx)\n"
"movl $1,%%eax; jmp 1f;\n"
"0: xorl %%eax,%%eax;\n" "1:\n":"=g" (*exp), "=g"(*dest)
:"g"(dest), "g"(x2), "g"(exp)
:"cx", "si", "ax");
}
/* Negate (subtract from 1.0) the 12 byte Xsig */
/* This is faster in a loop on my 386 than using the "neg" instruction. */
static inline void negate_Xsig(Xsig *x)
static inline void negate_Xsig(Xsig * x)
{
asm volatile("movl %1,%%esi;\n"
"xorl %%ecx,%%ecx;\n"
"movl %%ecx,%%eax; subl (%%esi),%%eax; movl %%eax,(%%esi);\n"
"movl %%ecx,%%eax; sbbl 4(%%esi),%%eax; movl %%eax,4(%%esi);\n"
"movl %%ecx,%%eax; sbbl 8(%%esi),%%eax; movl %%eax,8(%%esi);\n"
:"=g" (*x):"g" (x):"si","ax","cx");
asm volatile ("movl %1,%%esi;\n"
"xorl %%ecx,%%ecx;\n"
"movl %%ecx,%%eax; subl (%%esi),%%eax; movl %%eax,(%%esi);\n"
"movl %%ecx,%%eax; sbbl 4(%%esi),%%eax; movl %%eax,4(%%esi);\n"
"movl %%ecx,%%eax; sbbl 8(%%esi),%%eax; movl %%eax,8(%%esi);\n":"=g"
(*x):"g"(x):"si", "ax", "cx");
}
#endif /* _POLY_H */
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......@@ -13,41 +13,34 @@
#include "exception.h"
#include "fpu_emu.h"
int FPU_to_exp16(FPU_REG const *a, FPU_REG *x)
int FPU_to_exp16(FPU_REG const *a, FPU_REG * x)
{
int sign = getsign(a);
*(long long *)&(x->sigl) = *(const long long *)&(a->sigl);
/* Set up the exponent as a 16 bit quantity. */
setexponent16(x, exponent(a));
if ( exponent16(x) == EXP_UNDER )
{
/* The number is a de-normal or pseudodenormal. */
/* We only deal with the significand and exponent. */
if (x->sigh & 0x80000000)
{
/* Is a pseudodenormal. */
/* This is non-80486 behaviour because the number
loses its 'denormal' identity. */
addexponent(x, 1);
}
else
{
/* Is a denormal. */
addexponent(x, 1);
FPU_normalize_nuo(x);
int sign = getsign(a);
*(long long *)&(x->sigl) = *(const long long *)&(a->sigl);
/* Set up the exponent as a 16 bit quantity. */
setexponent16(x, exponent(a));
if (exponent16(x) == EXP_UNDER) {
/* The number is a de-normal or pseudodenormal. */
/* We only deal with the significand and exponent. */
if (x->sigh & 0x80000000) {
/* Is a pseudodenormal. */
/* This is non-80486 behaviour because the number
loses its 'denormal' identity. */
addexponent(x, 1);
} else {
/* Is a denormal. */
addexponent(x, 1);
FPU_normalize_nuo(x);
}
}
}
if ( !(x->sigh & 0x80000000) )
{
EXCEPTION(EX_INTERNAL | 0x180);
}
if (!(x->sigh & 0x80000000)) {
EXCEPTION(EX_INTERNAL | 0x180);
}
return sign;
return sign;
}
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......@@ -10,7 +10,7 @@
#ifndef _STATUS_H_
#define _STATUS_H_
#include "fpu_emu.h" /* for definition of PECULIAR_486 */
#include "fpu_emu.h" /* for definition of PECULIAR_486 */
#ifdef __ASSEMBLY__
#define Const__(x) $##x
......@@ -34,7 +34,7 @@
#define SW_Denorm_Op Const__(0x0002) /* denormalized operand */
#define SW_Invalid Const__(0x0001) /* invalid operation */
#define SW_Exc_Mask Const__(0x27f) /* Status word exception bit mask */
#define SW_Exc_Mask Const__(0x27f) /* Status word exception bit mask */
#ifndef __ASSEMBLY__
......@@ -50,8 +50,8 @@
((partial_status & ~SW_Top & 0xffff) | ((top << SW_Top_Shift) & SW_Top))
static inline void setcc(int cc)
{
partial_status &= ~(SW_C0|SW_C1|SW_C2|SW_C3);
partial_status |= (cc) & (SW_C0|SW_C1|SW_C2|SW_C3);
partial_status &= ~(SW_C0 | SW_C1 | SW_C2 | SW_C3);
partial_status |= (cc) & (SW_C0 | SW_C1 | SW_C2 | SW_C3);
}
#ifdef PECULIAR_486
......
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