The AR71XX/AR9XXX SoC have a simple reset controller with one bit per
reset line.
Signed-off-by: NAlban Bedel <albeu@free.fr>
Acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>