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    ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless · 068de8d1
    Will Deacon 提交于
    The atomic64_add_unless function compares an atomic variable with
    a given value and, if they are not equal, adds another given value
    to the atomic variable. The function returns zero if the addition
    did not occur and non-zero otherwise.
    
    On ARM, the return value is initialised to 1 in C code. Inline assembly
    code then performs the atomic64_add_unless operation, setting the
    return value to 0 iff the addition does not occur. This means that
    when the addition *does* occur, the value of ret must be preserved
    across the inline assembly and therefore requires a "+r" constraint
    rather than the current one of "=&r".
    
    Thanks to Nicolas Pitre for helping to spot this.
    
    Cc: stable@kernel.org
    Reviewed-by: NNicolas Pitre <nicolas.pitre@linaro.org>
    Signed-off-by: NWill Deacon <will.deacon@arm.com>
    Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
    068de8d1
atomic.h 9.2 KB