- 04 3月, 2010 2 次提交
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由 H. Peter Anvin 提交于
Checkin bb24c471: "Moorestown APB system timer driver" suffered from severe whitespace damage in arch/x86/kernel/apb_timer.c due to using Microsoft Lookout to send a patch. Fix the whitespace breakage. Reported-by: NJacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
The current APB timer code incorrectly registers a static copy of the clockevent device for the boot CPU. The per cpu clockevent should be used instead. This bug was hidden by zero-initialized data; as such it did not get exposed in testing, but was discovered by code review. Signed-off-by: NJacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1267592494-7723-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 03 3月, 2010 1 次提交
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由 Jacob Pan 提交于
PCI_IOAPIC is used for PCI hotplug, Moorestown does not have ACPI PCI hotplug, as it does not have ACPI. This unnecessary dependency causes X86_MRST fail to be selected if ACPI is not selected. Signed-off-by: NJacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1267550368-7435-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 26 2月, 2010 5 次提交
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由 Thomas Gleixner 提交于
Replace the #ifdef'ed OLPC-specific init functions by a conditional x86_init function. If the function returns 0 we leave pci_arch_init, otherwise we continue. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Andres Salomon <dilinger@collabora.co.uk> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318CE89@orsmsx508.amr.corp.intel.com> Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Thomas Gleixner 提交于
Added an abstraction function for arch specific init calls. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318CE84@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
The Moorestown platform requires IOAPIC for all interrupts from the south complex, since there is no legacy PIC. Furthermore, Moorestown I/O requires PCI. Moorestown PCI depends on PCI MMCONFIG and DIRECT method to perform device enumeration, as there is no PCI BIOS. [ hpa: rewrote commit message ] Signed-off-by: NJacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1267120934-9505-1-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Yinghai Lu 提交于
If we don't have any Moorestown CPU support compiled in, we don't need the Moorestown PCI support either. Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <4B858E89.7040807@kernel.org> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Pan, Jacob jun 提交于
The NUMAQ initialization sets x86_init.pci.init to pci_numaq_init, which obviously isn't defined if CONFIG_PCI isn't defined. This dependency was implicit in the past, because pci_numaq_init was invoked from arch/x86/pci/legacy.c, which itself was conditioned on CONFIG_PCI. I suspect that no NUMA-Q machines without PCI were ever built, so instead of complicating the code by adding #ifdefs or stub functions, just disable this bit of the configuration space. [ hpa: rewrote the checkin comment ] Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A321EE1F@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 25 2月, 2010 5 次提交
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由 Jacob Pan 提交于
While probing for the PCI fixed BAR capability in the extended PCI configuration space we need to make sure raw_pci_ext_ops is actually initialized. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A321E8F7@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Yinghai Lu 提交于
Remove duplicated cfg[i].vector assignment. Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <4B8493A0.6080501@kernel.org> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Yinghai Lu 提交于
nr_legacy_irqs and its ilk have moved to legacy_pic. -v2: there is one in ioapic_.c Singed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <4B84AAC4.2020204@kernel.org> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
Add Moorestown platform clock setup code to the x86_init abstraction. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318D2D4@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
Moorestown platform does not have PIT or HPET platform timers. Instead it has a bank of eight APB timers. The number of available timers to the os is exposed via SFI mtmr tables. All APB timer interrupts are routed via ioapic rtes and delivered as MSI. Currently, we use timer 0 and 1 for per cpu clockevent devices, timer 2 for clocksource. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318D2D2@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 24 2月, 2010 8 次提交
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由 Feng Tang 提交于
vRTC information is obtained from SFI tables on Moorestown, this patch parses these tables and assign the information. Signed-off-by: NFeng Tang <feng.tang@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D0D@orsmsx508.amr.corp.intel.com> Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
Moorestown platform timer information is obtained from SFI FW tables. This patch parses SFI table then assign the irq information to mp_irqs. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D0B@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
This patch added Moorestown platform specific PCI init functions. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D0A@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
Moorestown has no legacy PIC; point it to the null legacy PIC. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D09@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jesse Barnes 提交于
The Moorestown platform only has a few devices that actually support PCI config cycles. The rest of the devices use an in-RAM MCFG space for the purposes of device enumeration and initialization. There are a few uglies in the fake support, like BAR sizes that aren't a power of two, sizing detection, and writes to the real devices, but other than that it's pretty straightforward. Another way to think of this is not really as PCI at all, but just a table in RAM describing which devices are present, their capabilities and their offsets in MMIO space. This could have been done with a special new firmware table on this platform, but given that we do have some real PCI devices too, simply describing things in an MCFG type space was pretty simple. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D08@orsmsx508.amr.corp.intel.com> Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
Some ioapic extern functions are used when CONFIG_X86_IO_APIC is not defined. We need the dummy functions to avoid a compile time error. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318DA07@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
Moorestown platform needs apic ready early for the system timer irq which is delievered via ioapic. Should not impact other platforms. In the longer term, once ioapic setup is moved before late time init, we will not need this patch to do early apic enabling. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D07@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
Move legacy_pic chip dummy functions out of init section as they might be referenced at run time. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A318D3AA@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 23 2月, 2010 2 次提交
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由 H. Peter Anvin 提交于
Conflicts: arch/x86/kernel/apic/io_apic.c
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由 H. Peter Anvin 提交于
Merge reason: Conflicts in arch/x86/kernel/apic/io_apic.c Resolved Conflicts: arch/x86/kernel/apic/io_apic.c Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 21 2月, 2010 1 次提交
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由 H. Peter Anvin 提交于
Merge reason: conflict in arch/x86/kernel/apic/io_apic.c Resolved Conflicts: arch/x86/kernel/apic/io_apic.c Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 20 2月, 2010 9 次提交
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由 Jacob Pan 提交于
The ioapic_disable_legacy() call is no longer needed for platforms do not have legacy pic. the legacy pic abstraction has taken care it automatically. This patch also initialize irq-related static variables based on information obtained from legacy_pic. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F0755A30A7660@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
This patch replaces legacy PIC-related global variable and functions with the new legacy_pic abstraction. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D04@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
This patch makes i8259A like legacy programmable interrupt controller code into a driver so that legacy pic functions can be selected at runtime based on platform information, such as HW subarchitecure ID. Default structure of legacy_pic maintains the current code path for x86pc. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D03@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jacob Pan 提交于
Some secondary clockevent setup code needs to call request_irq, which will cause fake stack check failure in schedule() if voluntary preemption model is chosen. It is safe to have stack canary initialized here early, since start_secondary() does not return. Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D02@orsmsx508.amr.corp.intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Alek Du 提交于
Since we already track the number of legacy vectors by nr_legacy_irqs, we can avoid use static vector allocations -- we can use dynamic one. Signed-off-by: NAlek Du <alek.du@intel.com> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D01@orsmsx508.amr.corp.intel.com> Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Thomas Gleixner 提交于
Platforms like Moorestown want to override the pcibios_fixup_irqs default function. Add it to x86_init.pci. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80D00@orsmsx508.amr.corp.intel.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Thomas Gleixner 提交于
Moorestown wants to reuse pcibios_init_irq but needs to provide its own implementation of pci_enable_irq. After we distangled the init we can move the init_irq call to x86_init and remove the pci_enable_irq != NULL check in pcibios_init_irq. pci_enable_irq is compile time initialized to pirq_enable_irq and the special cases which override it (visws and acpi) set the x86_init function pointer to noop. That allows MSRT to override pci_enable_irq and otherwise run pcibios_init_irq unmodified. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80CFF@orsmsx508.amr.corp.intel.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Thomas Gleixner 提交于
The PCI initialization in pci_subsys_init() is a mess. pci_numaq_init, pci_acpi_init, pci_visws_init and pci_legacy_init are called and each implementation checks and eventually modifies the global variable pcibios_scanned. x86_init functions allow us to do this more elegant. The pci.init function pointer is preset to pci_legacy_init. numaq, acpi and visws can modify the pointer in their early setup functions. The functions return 0 when they did the full initialization including bus scan. A non zero return value indicates that pci_legacy_init needs to be called either because the selected function failed or wants the generic bus scan in pci_legacy_init to happen (e.g. visws). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80CFE@orsmsx508.amr.corp.intel.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Jesse Barnes 提交于
For use by code that needs to walk extended capability lists before pci_dev structures are set up. Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> LKML-Reference: <43F901BD926A4E43B106BF17856F07559FB80CFD@orsmsx508.amr.corp.intel.com> Signed-off-by: NJacob Pan <jacob.jun.pan@intel.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 19 2月, 2010 2 次提交
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由 Brandon Philips 提交于
Version 4: use get_irq_chip_data() in destroy_irq() to get rid of some local vars. When two drivers are setting up MSI-X at the same time via pci_enable_msix() there is a race. See this dmesg excerpt: [ 85.170610] ixgbe 0000:02:00.1: irq 97 for MSI/MSI-X [ 85.170611] alloc irq_desc for 99 on node -1 [ 85.170613] igb 0000:08:00.1: irq 98 for MSI/MSI-X [ 85.170614] alloc kstat_irqs on node -1 [ 85.170616] alloc irq_2_iommu on node -1 [ 85.170617] alloc irq_desc for 100 on node -1 [ 85.170619] alloc kstat_irqs on node -1 [ 85.170621] alloc irq_2_iommu on node -1 [ 85.170625] ixgbe 0000:02:00.1: irq 99 for MSI/MSI-X [ 85.170626] alloc irq_desc for 101 on node -1 [ 85.170628] igb 0000:08:00.1: irq 100 for MSI/MSI-X [ 85.170630] alloc kstat_irqs on node -1 [ 85.170631] alloc irq_2_iommu on node -1 [ 85.170635] alloc irq_desc for 102 on node -1 [ 85.170636] alloc kstat_irqs on node -1 [ 85.170639] alloc irq_2_iommu on node -1 [ 85.170646] BUG: unable to handle kernel NULL pointer dereference at 0000000000000088 As you can see igb and ixgbe are both alternating on create_irq_nr() via pci_enable_msix() in their probe function. ixgbe: While looping through irq_desc_ptrs[] via create_irq_nr() ixgbe choses irq_desc_ptrs[102] and exits the loop, drops vector_lock and calls dynamic_irq_init. Then it sets irq_desc_ptrs[102]->chip_data = NULL via dynamic_irq_init(). igb: Grabs the vector_lock now and starts looping over irq_desc_ptrs[] via create_irq_nr(). It gets to irq_desc_ptrs[102] and does this: cfg_new = irq_desc_ptrs[102]->chip_data; if (cfg_new->vector != 0) continue; This hits the NULL deref. Another possible race exists via pci_disable_msix() in a driver or in the number of error paths that call free_msi_irqs(): destroy_irq() dynamic_irq_cleanup() which sets desc->chip_data = NULL ...race window... desc->chip_data = cfg; Remove the save and restore code for cfg in create_irq_nr() and destroy_irq() and take the desc->lock when checking the irq_cfg. Reported-and-analyzed-by: NBrandon Philips <bphilips@suse.de> Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <20100207210250.GB8256@jenkins.home.ifup.org> Signed-off-by: NBrandon Phiilps <bphilips@suse.de> Cc: stable@kernel.org Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Eric W. Biederman 提交于
Right now xen's use of the x86 and ia64 handle_irq is just bizarre and very fragile as it is very non-obvious the function exists and is is used by code out in drivers/.... Luckily using handle_irq is completely unnecessary, and we can just use the generic irq apis instead. This still leaves drivers/xen/events.c as a problematic user of the generic irq apis it has "static struct irq_info irq_info[NR_IRQS]" but that can be fixed some other time. Signed-off-by: NEric W. Biederman <ebiederm@xmission.com> LKML-Reference: <4B7CAAD2.10803@kernel.org> Acked-by: NJeremy Fitzhardinge <jeremy@goop.org> Cc: Ian Campbell <Ian.Campbell@citrix.com> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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- 18 2月, 2010 5 次提交
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由 Yinghai Lu 提交于
On x86, before prefill_possible_map(), nr_cpu_ids will be NR_CPUS aka CONFIG_NR_CPUS. Add nr_cpus= to set nr_cpu_ids. so we can simulate cpus <=8 are installed on normal config. -v2: accordging to Christoph, acpi_numa_init should use nr_cpu_ids in stead of NR_CPUS. -v3: add doc in kernel-parameters.txt according to Andrew. Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <1265793639-15071-34-git-send-email-yinghai@kernel.org> Acked-by: NLinus Torvalds <torvalds@linux-foundation.org> Signed-off-by: NH. Peter Anvin <hpa@zytor.com> Cc: Tony Luck <tony.luck@intel.com>
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由 Yinghai Lu 提交于
So keep nr_irqs == NR_IRQS. With radix trees is matters less. Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <1265793639-15071-33-git-send-email-yinghai@kernel.org> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Yinghai Lu 提交于
Use radix_tree irq_desc_tree instead of irq_desc_ptrs. -v2: according to Eric and cyrill to use radix_tree_lookup_slot and radix_tree_replace_slot Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <1265793639-15071-32-git-send-email-yinghai@kernel.org> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Yinghai Lu 提交于
Add replace_irq_desc() instead of poking at the array directly. -v2: remove unneeded boundary check in replace_irq_desc Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <1265793639-15071-31-git-send-email-yinghai@kernel.org> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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由 Yinghai Lu 提交于
Prepare for using radix trees in early_irq_init(). Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <1265793639-15071-30-git-send-email-yinghai@kernel.org> Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
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